100 lines
2.7 KiB
C
100 lines
2.7 KiB
C
/*
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* i.MX28 USBPHY setup
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*
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* Copyright 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <io.h>
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#include <errno.h>
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#include <mach/imx-regs.h>
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#define POWER_CTRL (IMX_POWER_BASE + 0x0)
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#define POWER_CTRL_CLKGATE 0x40000000
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#define POWER_STS (IMX_POWER_BASE + 0xc0)
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#define POWER_STS_VBUSVALID 0x00000002
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#define POWER_STS_BVALID 0x00000004
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#define POWER_STS_AVALID 0x00000008
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#define POWER_DEBUG (IMX_POWER_BASE + 0x110)
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#define POWER_DEBUG_BVALIDPIOLOCK 0x00000002
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#define POWER_DEBUG_AVALIDPIOLOCK 0x00000004
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#define POWER_DEBUG_VBUSVALIDPIOLOCK 0x00000008
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#define USBPHY_PWD 0x0
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#define USBPHY_CTRL 0x30
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#define USBPHY_CTRL_SFTRST (1 << 31)
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#define USBPHY_CTRL_CLKGATE (1 << 30)
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#define USBPHY_CTRL_ENUTMILEVEL3 (1 << 15)
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#define USBPHY_CTRL_ENUTMILEVEL2 (1 << 14)
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#define CLK_PLL0CTRL0 (IMX_CCM_BASE + 0x0)
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#define CLK_PLL1CTRL0 (IMX_CCM_BASE + 0x20)
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#define PLLCTRL0_EN_USB_CLKS (1 << 18)
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#define PLLCTRL0_POWER (1 << 17)
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#define DIGCTRL_CTRL (IMX_DIGCTL_BASE + 0x0)
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#define DIGCTL_CTRL_USB0_CLKGATE (1 << 2)
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#define DIGCTL_CTRL_USB1_CLKGATE (1 << 16)
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#define SET 0x4
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#define CLR 0x8
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static void imx28_usb_phy_reset(void __iomem *phybase)
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{
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/* Reset USBPHY module */
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writel(USBPHY_CTRL_SFTRST, phybase + USBPHY_CTRL + SET);
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udelay(10);
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writel(USBPHY_CTRL_CLKGATE | USBPHY_CTRL_SFTRST,
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phybase + USBPHY_CTRL + CLR);
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}
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static void imx28_usb_phy_enable(void __iomem *phybase)
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{
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/* Power up the PHY */
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writel(0, phybase + USBPHY_PWD);
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writel(USBPHY_CTRL_ENUTMILEVEL3 | USBPHY_CTRL_ENUTMILEVEL2 | 1,
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phybase + USBPHY_CTRL + SET);
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}
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int imx28_usb_phy0_enable(void)
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{
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imx28_usb_phy_reset((void *)IMX_USBPHY0_BASE);
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/* Turn on the USB clocks */
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writel(PLLCTRL0_EN_USB_CLKS | PLLCTRL0_POWER, CLK_PLL0CTRL0 + SET);
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writel(DIGCTL_CTRL_USB0_CLKGATE, DIGCTRL_CTRL + CLR);
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imx28_usb_phy_enable((void *)IMX_USBPHY0_BASE);
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return 0;
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}
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int imx28_usb_phy1_enable(void)
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{
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imx28_usb_phy_reset((void *)IMX_USBPHY1_BASE);
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/* Turn on the USB clocks */
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writel(PLLCTRL0_EN_USB_CLKS | PLLCTRL0_POWER, CLK_PLL1CTRL0 + SET);
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writel(DIGCTL_CTRL_USB1_CLKGATE, DIGCTRL_CTRL + CLR);
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imx28_usb_phy_enable((void *)IMX_USBPHY1_BASE);
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return 0;
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}
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