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Author SHA1 Message Date
Antony Pavlov 51cc423920 MIPS: dts: qemu-malta.dts: use i2c-gpio for accessing CBUS FPGA I2C bus
Also we can enable m24c02 eeprom chip in dts-file e.g.

    &i2c0 {
            status = "okay";

            eeprom: m24c02@50 {
                    compatible = "spd";
                    reg = <0x50>;
            };
    };

Alas! qemu mips malta spd m24c02 eeprom chip emulation is not perfect:
the block read operation does not work properly.

Here is an example.

If we read eeprom content byte-by-byte then there is no problem:

    barebox:/ for i in 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f ;
    > do i2c_read -b 0 -a 0x50 -r $i -c 1 ; done
    0x01
    0x75
    0x54
    0x00
    0x82
    0x08
    0x00
    0x01

Compare this output with content of qemu.git/hw/mips/mips_malta.c:

    static eeprom24c0x_t spd_eeprom = {
        .contents = {
            ...
            /* 00000008: */ 0x01,0x75,0x54,0x00,0x82,0x08,0x00,0x01,

But if we read several bytes at once the we have data corruption:

    barebox:/ i2c_read -b 0 -a 0x50 -r 0x8 -c 8
    0x01 0xff 0xff 0xff 0xff 0xff 0xff 0xff

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-06-25 08:34:52 +02:00
Antony Pavlov f21744fba3 MIPS: dts: qemu-malta.dts: enable CBUS FPGA I2C gpio driver
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-06-24 09:07:06 +02:00
Antony Pavlov 93f1811d8b MIPS: qemu-malta: add CBUS UART support
This patch adds CBUS UART dts support;
also it adds the necessary macros for DEBUG_LL.

qemu-malta supports three serial interfaces:

  * two ports are provided by the FDC37M817
    Super I/O; this chip is connected via LPC bus
    to Intel 82371EB (PIIX4E) South Bridge;

  * the third serial port is provided by
    the discrete TI 16C550C (CBUS UART);
    this chip is connected via CBUS directly
    to the board's GT64120 North Bridge.

See Malta User's Manual (MD00048) for details.

CBUS UART Instructions for use:

  1. Enable CONFIG_CONSOLE_ACTIVATE_ALL in .config
     (or disable uart0 in dts) and compile barebox;

  2. run qemu:

     qemu-system-mips -nographic -nodefaults \
        -monitor null -M malta -m 256 \
        -serial null -serial null -serial stdio \
        -bios barebox-flash-image

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-04-03 07:55:16 +02:00
Antony Pavlov 7b29868f3e MIPS: qemu-malta: use YAMON-style GT64120 memory map
There are some reasons for using YAMON-style memory map:
* we can run Linux kernel from barebox;
* we can use GXemul for running barebox.

YAMON-style GT64120 memory map make move UART to the new position.

The files gt64120.h and mach-gt64120.h are imported from Linux.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-28 09:01:48 +01:00
Antony Pavlov c9b62b2cb2 MIPS: qemu-malta: switch to devicetree
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-09-04 08:32:17 +02:00
Antony Pavlov 6cdc8f4b02 MIPS: qemu-malta: add device tree support
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-05-13 21:17:10 +02:00