net/phy: support of mmd register read and write
Add function for indirect access of the mmd registers, based on linux. phy_read_mmd_indirect phy_write_mmd_indirect Also clean some private mmd functions Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -58,23 +58,15 @@ static iomux_v3_cfg_t realq7_pads_gpio[] = {
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MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24,
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};
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static void mmd_write_reg(struct phy_device *dev, int device, int reg, int val)
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{
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phy_write(dev, 0x0d, device);
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phy_write(dev, 0x0e, reg);
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phy_write(dev, 0x0d, (1 << 14) | device);
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phy_write(dev, 0x0e, val);
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}
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static int ksz9031rn_phy_fixup(struct phy_device *dev)
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{
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/*
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* min rx data delay, max rx/tx clock delay,
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* min rx/tx control delay
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*/
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mmd_write_reg(dev, 2, 4, 0);
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mmd_write_reg(dev, 2, 5, 0);
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mmd_write_reg(dev, 2, 8, 0x003ff);
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phy_write_mmd_indirect(dev, 4, 2, 0);
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phy_write_mmd_indirect(dev, 5, 2, 0);
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phy_write_mmd_indirect(dev, 8, 2, 0x03ff);
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return 0;
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}
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@ -58,23 +58,15 @@ static iomux_v3_cfg_t tqma6x_pads_gpio[] = {
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MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24,
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};
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static void mmd_write_reg(struct phy_device *dev, int device, int reg, int val)
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{
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phy_write(dev, 0x0d, device);
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phy_write(dev, 0x0e, reg);
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phy_write(dev, 0x0d, (1 << 14) | device);
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phy_write(dev, 0x0e, val);
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}
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static int ksz9031rn_phy_fixup(struct phy_device *dev)
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{
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/*
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* min rx data delay, max rx/tx clock delay,
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* min rx/tx control delay
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*/
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mmd_write_reg(dev, 2, 4, 0);
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mmd_write_reg(dev, 2, 5, 0);
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mmd_write_reg(dev, 2, 8, 0x003ff);
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phy_write_mmd_indirect(dev, 4, 2, 0);
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phy_write_mmd_indirect(dev, 5, 2, 0);
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phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
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return 0;
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}
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@ -632,6 +632,69 @@ int genphy_read_status(struct phy_device *phydev)
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return 0;
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}
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static inline void mmd_phy_indirect(struct phy_device *phydev, int prtad,
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int devad)
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{
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/* Write the desired MMD Devad */
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phy_write(phydev, MII_MMD_CTRL, devad);
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/* Write the desired MMD register address */
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phy_write(phydev, MII_MMD_DATA, prtad);
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/* Select the Function : DATA with no post increment */
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phy_write(phydev, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
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}
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/**
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* phy_read_mmd_indirect - reads data from the MMD registers
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* @phy_device: phy device
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* @prtad: MMD Address
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* @devad: MMD DEVAD
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*
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* Description: it reads data from the MMD registers (clause 22 to access to
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* clause 45) of the specified phy address.
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* To read these register we have:
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* 1) Write reg 13 // DEVAD
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* 2) Write reg 14 // MMD Address
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* 3) Write reg 13 // MMD Data Command for MMD DEVAD
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* 3) Read reg 14 // Read MMD data
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*/
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int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
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{
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u32 ret;
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mmd_phy_indirect(phydev, prtad, devad);
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/* Read the content of the MMD's selected register */
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ret = phy_read(phydev, MII_MMD_DATA);
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return ret;
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}
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/**
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* phy_write_mmd_indirect - writes data to the MMD registers
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* @phy_device: phy device
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* @prtad: MMD Address
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* @devad: MMD DEVAD
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* @data: data to write in the MMD register
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*
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* Description: Write data from the MMD registers of the specified
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* phy address.
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* To write these register we have:
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* 1) Write reg 13 // DEVAD
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* 2) Write reg 14 // MMD Address
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* 3) Write reg 13 // MMD Data Command for MMD DEVAD
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* 3) Write reg 14 // Write MMD data
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*/
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void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, int devad,
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u16 data)
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{
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mmd_phy_indirect(phydev, prtad, devad);
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/* Write the data into MMD's selected register */
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phy_write(phydev, MII_MMD_DATA, data);
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}
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static int genphy_config_init(struct phy_device *phydev)
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{
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int val;
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@ -288,5 +288,9 @@ int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
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int (*run)(struct phy_device *));
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int phy_scan_fixups(struct phy_device *phydev);
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int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad);
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void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, int devad,
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u16 data);
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extern struct bus_type mdio_bus_type;
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#endif /* __PHYDEV_H__ */
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