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tegra: recognize T30 in debug UART code 

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Lucas Stach 2014-04-13 15:27:38 +02:00 committed by Sascha Hauer
parent fa94149a5b
commit e61f9e458d
2 changed files with 21 additions and 3 deletions
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13
arch/arm/mach-tegra/include/mach/lowlevel.h
View File

@ -200,6 +200,19 @@ int tegra_get_osc_clock(void)
}
}
static __always_inline
int tegra_get_pllp_rate(void)
{
switch (tegra_get_chiptype()) {
case TEGRA20:
return 216000000;
case TEGRA30:
return 408000000;
default:
return 0;
}
}
#define TIMER_CNTR_1US 0x00
#define TIMER_USEC_CFG 0x04

11
arch/arm/mach-tegra/tegra20.c
View File

@ -22,14 +22,17 @@
#include <mach/lowlevel.h>
static struct NS16550_plat debug_uart = {
.clock = 216000000, /* pll_p rate */
.shift = 2,
};
static int tegra20_add_debug_console(void)
static int tegra_add_debug_console(void)
{
unsigned long base = 0;
if (!of_machine_is_compatible("nvidia,tegra20") &&
!of_machine_is_compatible("nvidia,tegra30"))
return 0;
/* figure out which UART to use */
if (IS_ENABLED(CONFIG_TEGRA_UART_NONE))
return 0;
@ -49,12 +52,14 @@ static int tegra20_add_debug_console(void)
if (!base)
return -ENODEV;
debug_uart.clock = tegra_get_pllp_rate();
add_ns16550_device(DEVICE_ID_DYNAMIC, base, 8 << debug_uart.shift,
IORESOURCE_MEM_8BIT, &debug_uart);
return 0;
}
console_initcall(tegra20_add_debug_console);
console_initcall(tegra_add_debug_console);
static int tegra20_mem_init(void)
{