mtd: introduce ecc strength
This introduces the ecc stength fields in the structures and fills them in, but leaves them unused right now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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e3885851b7
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d155610821
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@ -1686,6 +1686,7 @@ int nand_scan_tail(struct mtd_info *mtd)
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chip->ecc.read_oob = nand_read_oob_std;
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chip->ecc.size = mtd->writesize;
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chip->ecc.bytes = 0;
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chip->ecc.strength = 0;
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break;
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#endif
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default:
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@ -1762,6 +1763,7 @@ int nand_scan_tail(struct mtd_info *mtd)
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#endif
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/* propagate ecc.layout to mtd_info */
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mtd->ecclayout = chip->ecc.layout;
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mtd->ecc_strength = chip->ecc.strength;
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/* Check, if we should skip the bad block table scan */
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if (chip->options & NAND_SKIP_BBTSCAN)
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@ -1298,6 +1298,9 @@ static int __init imxnd_probe(struct device_d *dev)
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writew(NFC_V2_SPAS_SPARESIZE(16), host->regs + NFC_V2_SPAS);
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}
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if (this->ecc.mode == NAND_ECC_HW)
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this->ecc.strength = host->eccsize;
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/* second phase scan */
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if (nand_scan_tail(mtd)) {
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err = -ENXIO;
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@ -1246,6 +1246,7 @@ static int mxs_nand_probe(struct device_d *dev)
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nand->ecc.mode = NAND_ECC_HW;
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nand->ecc.bytes = 9;
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nand->ecc.size = 512;
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nand->ecc.strength = 8;
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/* first scan to find the device and get the page size */
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err = nand_scan_ident(mtd, 1);
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@ -85,6 +85,9 @@
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#define GPMC_ECC_SIZE_CONFIG_ECCSIZE0(x) ((x) << 12)
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#define GPMC_ECC_SIZE_CONFIG_ECCSIZE1(x) ((x) << 22)
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#define BCH8_MAX_ERROR 8 /* upto 8 bit correctable */
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#define BCH4_MAX_ERROR 4 /* upto 4 bit correctable */
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int omap_gpmc_decode_bch(int select_4_8, unsigned char *ecc, unsigned int *err_loc);
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static char *ecc_mode_strings[] = {
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@ -785,6 +788,7 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
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case OMAP_ECC_HAMMING_CODE_HW_ROMCODE:
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oinfo->nand.ecc.bytes = 3;
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oinfo->nand.ecc.size = 512;
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oinfo->nand.ecc.strength = 1;
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oinfo->ecc_parity_pairs = 12;
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if (oinfo->nand.options & NAND_BUSWIDTH_16) {
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offset = 2;
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@ -802,6 +806,7 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
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case OMAP_ECC_BCH4_CODE_HW:
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oinfo->nand.ecc.bytes = 4 * 7;
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oinfo->nand.ecc.size = 4 * 512;
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oinfo->nand.ecc.strength = BCH4_MAX_ERROR;
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omap_oobinfo.oobfree->offset = offset;
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omap_oobinfo.oobfree->length = minfo->oobsize -
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offset - omap_oobinfo.eccbytes;
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@ -812,6 +817,7 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
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case OMAP_ECC_BCH8_CODE_HW:
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oinfo->nand.ecc.bytes = 4 * 13;
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oinfo->nand.ecc.size = 4 * 512;
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oinfo->nand.ecc.strength = BCH8_MAX_ERROR;
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omap_oobinfo.oobfree->offset = offset;
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omap_oobinfo.oobfree->length = minfo->oobsize -
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offset - omap_oobinfo.eccbytes;
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@ -822,6 +828,7 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
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case OMAP_ECC_BCH8_CODE_HW_ROMCODE:
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oinfo->nand.ecc.bytes = 4 * 13;
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oinfo->nand.ecc.size = 4 * 512;
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oinfo->nand.ecc.strength = BCH8_MAX_ERROR;
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nand->ecc.read_page = omap_gpmc_read_page_bch_rom_mode;
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omap_oobinfo.oobfree->length = 0;
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j = 0;
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@ -837,6 +844,7 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
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case OMAP_ECC_SOFT:
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nand->ecc.layout = NULL;
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nand->ecc.mode = NAND_ECC_SOFT;
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oinfo->nand.ecc.strength = 1;
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break;
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default:
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return -EINVAL;
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@ -456,6 +456,8 @@ static int s3c24x0_nand_probe(struct device_d *dev)
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*/
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chip->ecc.mode = NAND_ECC_HW;
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chip->ecc.bytes = 3; /* always 24 bit ECC per turn */
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chip->ecc.strength = 1;
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#ifdef CONFIG_CPU_S3C2440
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if (readl(host->base) & 0x8) {
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/* large page (2048 bytes per page) */
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@ -91,4 +91,5 @@ void nand_init_ecc_soft(struct nand_chip *chip)
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#endif
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chip->ecc.size = 256;
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chip->ecc.bytes = 3;
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chip->ecc.strength = 1;
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}
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@ -209,6 +209,7 @@ static int nomadik_nand_probe(struct device_d *dev)
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nand->ecc.hwctl = nomadik_ecc_control;
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nand->ecc.size = 512;
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nand->ecc.bytes = 3;
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nand->ecc.strength = 1;
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nand->options = pdata->options;
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@ -104,6 +104,15 @@ struct mtd_info {
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u_int32_t oobsize; // Amount of OOB data per block (e.g. 16)
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u_int32_t oobavail; // Available OOB bytes per block
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/*
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* read ops return -EUCLEAN if max number of bitflips corrected on any
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* one region comprising an ecc step equals or exceeds this value.
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* Settable by driver, else defaults to ecc_strength. User can override
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* in sysfs. N.B. The meaning of the -EUCLEAN return code has changed;
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* see Documentation/ABI/testing/sysfs-class-mtd for more detail.
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*/
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unsigned int bitflip_threshold;
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// Kernel-only stuff starts here.
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char *name;
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int index;
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@ -111,6 +120,9 @@ struct mtd_info {
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/* ecc layout structure pointer - read only ! */
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struct nand_ecclayout *ecclayout;
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/* max number of correctible bit errors per ecc step */
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unsigned int ecc_strength;
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/* Data for variable erase regions. If numeraseregions is zero,
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* it means that the whole device has erasesize as given above.
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*/
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@ -273,4 +285,16 @@ int mtd_all_ff(const void *buf, unsigned int len);
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#endif /* DOXYGEN_SHOULD_SKIP_THIS */
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static inline int mtd_is_bitflip(int err) {
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return err == -EUCLEAN;
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}
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static inline int mtd_is_eccerr(int err) {
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return err == -EBADMSG;
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}
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static inline int mtd_is_bitflip_or_eccerr(int err) {
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return mtd_is_bitflip(err) || mtd_is_eccerr(err);
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}
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#endif /* __MTD_MTD_H__ */
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@ -300,6 +300,7 @@ struct nand_hw_control {
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* @steps: number of ecc steps per page
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* @size: data bytes per ecc step
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* @bytes: ecc bytes per step
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* @strength: max number of correctible bits per ECC step
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* @total: total number of ecc bytes per page
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* @prepad: padding information for syndrome based ecc generators
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* @postpad: padding information for syndrome based ecc generators
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@ -321,6 +322,7 @@ struct nand_ecc_ctrl {
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int size;
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int bytes;
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int total;
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int strength;
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int prepad;
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int postpad;
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struct nand_ecclayout *layout;
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