RiOTboard: add new board
this board is produced by Embest/Element 14 and is based on i.MX6 Solo The following features are tested : - UART2 (console) - eMMC - SDCard - uSDCard - Ethernet - USB Host (through 4 ports hub) - I2C 1/2/3 - 2 LEDs Boot on eMMC and through USB loader are tested. For more informations on this board : http://www.riotboard.org/ Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Eric Bénard
Sascha Hauer
parent
724ea7e6c3
commit
ccc4eac632
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@ -28,6 +28,7 @@ obj-$(CONFIG_MACH_EDB9307) += edb93xx/
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obj-$(CONFIG_MACH_EDB9315A) += edb93xx/
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obj-$(CONFIG_MACH_EDB9315) += edb93xx/
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obj-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += efika-mx-smartbook/
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obj-$(CONFIG_MACH_EMBEST_RIOTBOARD) += embest-riotboard/
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obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += eukrea_cpuimx25/
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obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27/
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obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += eukrea_cpuimx35/
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@ -0,0 +1,3 @@
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obj-y += board.o flash-header-embest-riotboard.dcd.o
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extra-y += flash-header-embest-riotboard.dcd.S flash-header-embest-riotboard.dcd
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lwl-y += lowlevel.o
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@ -0,0 +1,90 @@
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/*
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* Copyright (C) 2014 Eric Bénard <eric@eukrea.com>
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* Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <asm/armlinux.h>
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#include <asm/io.h>
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#include <bootsource.h>
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#include <common.h>
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#include <environment.h>
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#include <envfs.h>
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#include <gpio.h>
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#include <init.h>
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#include <mach/generic.h>
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#include <mach/imx6-regs.h>
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#include <mach/imx6.h>
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#include <mach/bbu.h>
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#include <mfd/imx6q-iomuxc-gpr.h>
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#include <sizes.h>
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#include <linux/phy.h>
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static int ar8035_phy_fixup(struct phy_device *dev)
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{
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u16 val;
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/* Ar803x phy SmartEEE feature cause link status generates glitch,
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* which cause ethernet link down/up issue, so disable SmartEEE
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*/
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phy_write(dev, 0xd, 0x3);
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phy_write(dev, 0xe, 0x805d);
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phy_write(dev, 0xd, 0x4003);
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val = phy_read(dev, 0xe);
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phy_write(dev, 0xe, val & ~(1 << 8));
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/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
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phy_write(dev, 0xd, 0x7);
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phy_write(dev, 0xe, 0x8016);
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phy_write(dev, 0xd, 0x4007);
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val = phy_read(dev, 0xe);
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val &= 0xffe3;
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val |= 0x18;
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phy_write(dev, 0xe, val);
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/* introduce tx clock delay */
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phy_write(dev, 0x1d, 0x5);
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val = phy_read(dev, 0x1e);
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val |= 0x0100;
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phy_write(dev, 0x1e, val);
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return 0;
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}
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static int riotboard_device_init(void)
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{
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if (!of_machine_is_compatible("embest,riotboard"))
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return 0;
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phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup);
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imx6_bbu_internal_mmc_register_handler("emmc", "/dev/mmc3.barebox",
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BBU_HANDLER_FLAG_DEFAULT, NULL, 0, 0);
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return 0;
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}
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device_initcall(riotboard_device_init);
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static int riotboard_lwl_init(void)
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{
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if (!of_machine_is_compatible("embest,riotboard"))
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return 0;
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barebox_set_hostname("riotboard");
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imx6_init_lowlevel();
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return 0;
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}
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postcore_initcall(riotboard_lwl_init);
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@ -0,0 +1,62 @@
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loadaddr 0x20000000
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soc imx6
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dcdofs 0x400
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wm 32 0x020e0774 0x000c0000
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wm 32 0x020e0754 0x00000000
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wm 32 0x020e04ac 0x00000030
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wm 32 0x020e04b0 0x00000030
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wm 32 0x020e0464 0x00000030
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wm 32 0x020e0490 0x00000030
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wm 32 0x020e074c 0x00000030
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wm 32 0x020e0494 0x00000030
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wm 32 0x020e04a0 0x00000000
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wm 32 0x020e04b4 0x00000030
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wm 32 0x020e04b8 0x00000030
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wm 32 0x020e076c 0x00000030
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wm 32 0x020e0750 0x00020000
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wm 32 0x020e04bc 0x00000028
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wm 32 0x020e04c0 0x00000028
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wm 32 0x020e04c4 0x00000028
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wm 32 0x020e04c8 0x00000028
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wm 32 0x020e0760 0x00020000
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wm 32 0x020e0764 0x00000028
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wm 32 0x020e0770 0x00000028
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wm 32 0x020e0778 0x00000028
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wm 32 0x020e077c 0x00000028
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wm 32 0x020e0470 0x00000028
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wm 32 0x020e0474 0x00000028
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wm 32 0x020e0478 0x00000028
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wm 32 0x020e047c 0x00000028
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wm 32 0x021b0800 0xa1390003
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wm 32 0x021b080c 0x001f001f
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wm 32 0x021b0810 0x001f001f
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wm 32 0x021b083c 0x421c0216
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wm 32 0x021b0840 0x017b017a
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wm 32 0x021b0848 0x4b4a4e4c
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wm 32 0x021b0850 0x3f3f3334
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wm 32 0x021b081c 0x33333333
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wm 32 0x021b0820 0x33333333
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wm 32 0x021b0824 0x33333333
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wm 32 0x021b0828 0x33333333
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wm 32 0x021b08b8 0x00000800
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wm 32 0x021b0004 0x00020025
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wm 32 0x021b0008 0x00333030
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wm 32 0x021b000c 0x676b5313
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wm 32 0x021b0010 0xb66e8b63
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wm 32 0x021b0014 0x01ff00db
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wm 32 0x021b0018 0x00001740
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wm 32 0x021b001c 0x00008000
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wm 32 0x021b002c 0x000026d2
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wm 32 0x021b0030 0x006b1023
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wm 32 0x021b0040 0x00000027
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wm 32 0x021b0000 0x84190000
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wm 32 0x021b001c 0x04008032
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wm 32 0x021b001c 0x00008033
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wm 32 0x021b001c 0x00048031
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wm 32 0x021b001c 0x05208030
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wm 32 0x021b001c 0x04008040
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wm 32 0x021b0020 0x00005800
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wm 32 0x021b0818 0x00011117
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wm 32 0x021b0004 0x00025565
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wm 32 0x021b0404 0x00011006
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wm 32 0x021b001c 0x00000000
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@ -0,0 +1,43 @@
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#include <debug_ll.h>
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#include <common.h>
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#include <sizes.h>
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#include <io.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm.h>
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#include <asm/sections.h>
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#include <asm/cache.h>
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#include <asm/mmu.h>
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#include <mach/imx6-mmdc.h>
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#include <mach/imx6.h>
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static inline void setup_uart(void)
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{
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/* Enable UART for lowlevel debugging purposes */
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writel(0x00000000, 0x021e8080);
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writel(0x00004027, 0x021e8084);
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writel(0x00000704, 0x021e8088);
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writel(0x00000a81, 0x021e8090);
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writel(0x0000002b, 0x021e809c);
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writel(0x00013880, 0x021e80b0);
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writel(0x0000047f, 0x021e80a4);
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writel(0x0000c34f, 0x021e80a8);
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writel(0x00000001, 0x021e8080);
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}
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extern char __dtb_imx6s_riotboard_start[];
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ENTRY_FUNCTION(start_imx6s_riotboard, r0, r1, r2)
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{
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uint32_t fdt;
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arm_cpu_lowlevel_init();
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if (IS_ENABLED(CONFIG_DEBUG_LL)) {
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writel(0x4, 0x020e016c);
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setup_uart();
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putc_ll('a');
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}
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fdt = (uint32_t)__dtb_imx6s_riotboard_start - get_runtime_offset();
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barebox_arm_entry(0x10000000, SZ_1G, fdt);
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}
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@ -15,6 +15,7 @@ CONFIG_MACH_SABRELITE=y
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CONFIG_MACH_SABRESD=y
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CONFIG_MACH_NITROGEN6X=y
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CONFIG_MACH_SOLIDRUN_HUMMINGBOARD=y
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CONFIG_MACH_EMBEST_RIOTBOARD=y
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CONFIG_MACH_UDOO=y
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CONFIG_MACH_VARISCITE_MX6=y
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CONFIG_IMX_IIM=y
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@ -27,7 +27,8 @@ dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \
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imx6q-nitrogen6x.dtb \
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imx6dl-nitrogen6x.dtb \
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imx6q-udoo.dtb \
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imx6q-var-custom.dtb
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imx6q-var-custom.dtb \
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imx6s-riotboard.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += dove-cubox-bb.dtb
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dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_sockit.dtb \
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socfpga_cyclone5_socrates.dtb
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@ -40,6 +41,7 @@ obj-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o
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pbl-$(CONFIG_MACH_BEAGLEBONE) += am335x-bone.dtb.o am335x-boneblack.dtb.o
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pbl-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += imx51-genesi-efika-sb.dtb.o
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pbl-$(CONFIG_MACH_EMBEST_RIOTBOARD) += imx6s-riotboard.dtb.o
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pbl-$(CONFIG_MACH_FREESCALE_MX51_PDK) += imx51-babbage.dtb.o
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pbl-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += imx53-qsb.dtb.o imx53-qsrb.dtb.o
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pbl-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += imx53-voipac-bsb.dtb.o
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@ -0,0 +1,391 @@
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/*
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* Copyright (C) 2014 Eric Bénard - Eukréa Electromatique
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*
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* The code contained herein is licensed under the GNU General Public
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* License version 2.
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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/ {
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model = "RIoTboard Solo";
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compatible = "embest,riotboard", "fsl,imx6dl";
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chosen {
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linux,stdout-path = &uart2;
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environment@0 {
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compatible = "barebox,environment";
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device-path = &usdhc4, "partname:barebox-environment";
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};
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};
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memory {
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reg = <0x10000000 0x40000000>;
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};
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gpio-leds {
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compatible = "gpio-leds";
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d45 {
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label = "d45";
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gpios = <&gpio5 2 1>;
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linux,default-trigger = "heartbeat";
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};
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d46 {
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label = "d46";
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gpios = <&gpio3 28 1>;
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linux,default-trigger = "default-on";
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_3p3v: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx6s-riotboard {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* LED D45 */
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MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x80000000 /* LED D46 */
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MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x80000000 /* PMIC_INT_B */
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0 /* CAM_MCLK + SGTL_MCLK */
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <MX6QDL_UART2_PINGRP1>;
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};
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pinctrl_rgmii_ar8035: rgmii_ar8035 {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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/* AR8035 reset */
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MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0
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/* AR8035 interrupt */
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MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000
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/* GPIO16 -> AR8035 25MHz */
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
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/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
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/* AR8035 pin strapping: IO voltage: pull up */
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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/* AR8035 pin strapping: PHYADDR#0: pull down */
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0
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/* AR8035 pin strapping: PHYADDR#1: pull down */
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0
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/* AR8035 pin strapping: MODE#1: pull up */
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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/* AR8035 pin strapping: MODE#3: pull up */
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
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/* AR8035 pin strapping: MODE#0: pull down */
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0
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>;
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};
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pinctrl_usdhc4: usdhc4grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_CLK__SD4_CLK 0x80000000
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MX6QDL_PAD_SD4_CMD__SD4_CMD 0x80000000
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MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x80000000
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MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x80000000
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MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x80000000
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MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x80000000
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x80000000
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x80000000
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x80000000
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x80000000
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x80000000
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x80000000
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
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MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x80000000
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x80000000
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x80000000
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x80000000
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x80000000
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x80000000
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MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000
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MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
|
||||
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x80000000
|
||||
MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x80000000
|
||||
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x80000000
|
||||
>;
|
||||
};
|
||||
pinctrl_i2c1_2: i2c1grp-2 {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
pinctrl_i2c2_2: i2c2grp-2 {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
pinctrl_i2c3_2: i2c3grp-2 {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
pinctrl_i2c4_2: i2c4grp-2 {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_rgmii_ar8035>;
|
||||
phy-mode = "rgmii";
|
||||
phy-reset-duration = <2>;
|
||||
phy-reset-gpios = <&gpio3 31 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc2 {
|
||||
/* SD card socket - bottom */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio1 4 0>;
|
||||
wp-gpios = <&gpio1 2 0>;
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
/* uSD card socket - top */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio7 0 0>;
|
||||
wp-gpios = <&gpio7 1 0>;
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
&usdhc4 {
|
||||
/* eMMC */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc4>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "barebox";
|
||||
reg = <0x0 0x80000>;
|
||||
};
|
||||
|
||||
partition@1 {
|
||||
label = "barebox-environment";
|
||||
reg = <0x80000 0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
status = "okay";
|
||||
phy_type = "utmi";
|
||||
disable-over-current;
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
phy_type = "utmi";
|
||||
dr_mode = "peripheral";
|
||||
otg_id_pin_select_change;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1_2>;
|
||||
|
||||
pmic: pf0100@08 {
|
||||
compatible = "pf0100-regulator";
|
||||
reg = <0x08>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <16 8>;
|
||||
|
||||
regulators {
|
||||
reg_vddcore: sw1ab {
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1875000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_vddsoc: sw1c {
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1875000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_gen_3v3: sw2 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_ddr_1v5a: sw3a {
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1975000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_ddr_1v5b: sw3b {
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1975000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_ddr_vtt: sw4 {
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1975000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5v_600mA: swbst {
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5150000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_snvs_3v: vsnvs {
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_vrefddr: vrefddr {
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_vgen1_1v5: vgen1 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
/* not used */
|
||||
};
|
||||
|
||||
reg_vgen2_1v2_eth: vgen2 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_vgen3_2v8: vgen3 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_vgen4_1v8: vgen4 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_vgen5_2v5_sgtl: vgen5 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_vgen6_3v3: vgen6 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
codec: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
clocks = <&clks 201>;
|
||||
VDDA-supply = <®_vgen5_2v5_sgtl>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2_2>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3_2>;
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c4_2>;
|
||||
};
|
||||
|
||||
&ocotp {
|
||||
barebox,provide-mac-address = <&fec 0x620>;
|
||||
};
|
||||
|
||||
|
|
@ -250,6 +250,10 @@ config MACH_SOLIDRUN_HUMMINGBOARD
|
|||
bool "SolidRun Hummingboard"
|
||||
select ARCH_IMX6
|
||||
|
||||
config MACH_EMBEST_RIOTBOARD
|
||||
bool "Embest RIoTboard"
|
||||
select ARCH_IMX6
|
||||
|
||||
config MACH_UDOO
|
||||
bool "Freescale i.MX6 UDOO Board"
|
||||
select ARCH_IMX6
|
||||
|
|
|
|||
|
|
@ -166,3 +166,8 @@ pblx-$(CONFIG_MACH_VARISCITE_MX6) += start_variscite_custom
|
|||
CFG_start_variscite_custom.pblx.imximg = $(board)/variscite-mx6/flash-header-variscite.imxcfg
|
||||
FILE_barebox-variscite-custom.img = start_variscite_custom.pblx.imximg
|
||||
image-$(CONFIG_MACH_VARISCITE_MX6) += barebox-variscite-custom.img
|
||||
|
||||
pblx-$(CONFIG_MACH_EMBEST_RIOTBOARD) += start_imx6s_riotboard
|
||||
CFG_start_imx6s_riotboard.pblx.imximg = $(board)/embest-riotboard/flash-header-embest-riotboard.imxcfg
|
||||
FILE_barebox-embest-imx6s-riotboard.img = start_imx6s_riotboard.pblx.imximg
|
||||
image-$(CONFIG_MACH_EMBEST_RIOTBOARD) += barebox-embest-imx6s-riotboard.img
|
||||
|
|
|
|||
Loading…
Reference in New Issue