ARM: i.MX6: Add initial variscite VAR-SOM-MX6 CPU support
The VAR-SOM-MX6 is a System on module from Variscite, see: http://www.variscite.com/products/system-on-module-som/cortex-a9/var-som-mx6-cpu-freescale-imx6 This adds support for this module on the VAR-MX6CustomBoard baseboard. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer
parent
6676cfcec6
commit
b34eed098b
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@ -100,3 +100,4 @@ obj-$(CONFIG_MACH_USB_A9G20) += usb-a926x/
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obj-$(CONFIG_MACH_VERSATILEPB) += versatile/
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obj-$(CONFIG_MACH_VEXPRESS) += vexpress/
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obj-$(CONFIG_MACH_ZEDBOARD) += avnet-zedboard/
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obj-$(CONFIG_MACH_VARISCITE_MX6) += variscite-mx6/
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@ -0,0 +1,3 @@
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obj-y += board.o flash-header-variscite.dcd.o
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extra-y += flash-header-variscite.dcd.S flash-header-variscite.dcd
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lwl-y += lowlevel.o
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@ -0,0 +1,135 @@
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/*
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* Copyright (C) 2013 Michael Burkey
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* Based on code (C) Sascha Hauer, Pengutronix
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* Based on code (C) Variscite, Ltd.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation.
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*
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*/
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#define pr_fmt(fmt) "var-som-mx6: " fmt
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#include <common.h>
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#include <gpio.h>
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#include <init.h>
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#include <of.h>
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#include <debug_ll.h>
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#include <environment.h>
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#include <asm/armlinux.h>
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#include <generated/mach-types.h>
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#include <partition.h>
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#include <asm/io.h>
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#include <asm/mmu.h>
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#include <mach/generic.h>
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#include <sizes.h>
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#include <mach/imx6.h>
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#include <mach/devices-imx6.h>
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#include <mach/iomux-mx6.h>
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#include <spi/spi.h>
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#include <mach/spi.h>
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#include <i2c/i2c.h>
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#define ETH_PHY_RST IMX_GPIO_NR(1, 25)
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static int setup_pmic_voltages(void)
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{
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unsigned char value, rev_id = 0 ;
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struct i2c_adapter *adapter = NULL;
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struct i2c_client client;
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int addr = -1, ret, bus = 0;
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/* I2C2 bus (2-1 = 1 in barebox numbering) */
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bus = 1;
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/* PFUZE100 device address is 0x08 */
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addr = 0x08;
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adapter = i2c_get_adapter(bus);
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if (!adapter) {
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pr_err("i2c bus %d not found\n", bus);
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return -ENODEV;
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}
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client.adapter = adapter;
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client.addr = addr;
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/* Attempt to locate the PFUZE100 chip. */
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if (i2c_read_reg(&client, 0x00, &value, 1) != 1) {
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pr_err("Read device ID error!\n");
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return -1;
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}
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if (i2c_read_reg(&client, 0x03, &rev_id, 1) != 1) {
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pr_err("Read Rev ID error!\n");
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return -1;
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}
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pr_info("Found PFUZE100! deviceid=%x,revid=%x\n", value, rev_id);
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/* Set Gigabit Ethernet voltage (SOM v1.1/1.0)*/
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value = 0x60;
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ret = i2c_write_reg(&client, 0x4a, &value, 1);
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/* set VGEN3 to 2.5V */
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value = 0x77;
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if (i2c_write_reg(&client, 0x6e, &value, 1) != 1) {
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pr_err("Set VGEN3 error!\n");
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return -EIO;
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}
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return 0;
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}
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static int eth_phy_reset(void)
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{
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gpio_request(ETH_PHY_RST, "phy reset");
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gpio_direction_output(ETH_PHY_RST, 0);
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mdelay(1);
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gpio_set_value(ETH_PHY_RST, 1);
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return 0;
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}
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static int variscite_custom_init(void)
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{
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if (!of_machine_is_compatible("variscite,imx6q-custom"))
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return 0;
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barebox_set_hostname("var-som-mx6");
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setup_pmic_voltages();
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eth_phy_reset();
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armlinux_set_architecture(MACH_TYPE_VAR_SOM_MX6);
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pr_debug("Completing custom_init()\n");
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return 0;
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}
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device_initcall(variscite_custom_init);
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static int variscite_custom_core_init(void)
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{
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if (!of_machine_is_compatible("variscite,imx6q-custom"))
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return 0;
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imx6_init_lowlevel();
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pr_debug("Completing custom_core_init()\n");
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return 0;
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}
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postcore_initcall(variscite_custom_core_init);
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@ -0,0 +1,86 @@
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loadaddr 0x10000000
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soc imx6
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dcdofs 0x400
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wm 32 0x020e0798 0x000C0000
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wm 32 0x020e0758 0x00000000
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wm 32 0x020e0588 0x00000030
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wm 32 0x020e0594 0x00000030
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wm 32 0x020e056c 0x00000030
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wm 32 0x020e0578 0x00000030
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wm 32 0x020e074c 0x00000030
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wm 32 0x020e057c 0x00000030
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wm 32 0x020e058c 0x00000000
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wm 32 0x020e059c 0x00000030
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wm 32 0x020e05a0 0x00000030
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wm 32 0x020e078c 0x00000030
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wm 32 0x020e0750 0x00020000
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wm 32 0x020e05a8 0x00000030
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wm 32 0x020e05b0 0x00000030
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wm 32 0x020e0524 0x00000030
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wm 32 0x020e051c 0x00000030
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wm 32 0x020e0518 0x00000030
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wm 32 0x020e050c 0x00000030
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wm 32 0x020e05b8 0x00000030
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wm 32 0x020e05c0 0x00000030
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wm 32 0x020e0774 0x00020000
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wm 32 0x020e0784 0x00000030
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wm 32 0x020e0788 0x00000030
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wm 32 0x020e0794 0x00000030
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wm 32 0x020e079c 0x00000030
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wm 32 0x020e07a0 0x00000030
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wm 32 0x020e07a4 0x00000030
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wm 32 0x020e07a8 0x00000030
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wm 32 0x020e0748 0x00000030
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wm 32 0x020e05ac 0x00000030
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wm 32 0x020e05b4 0x00000030
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wm 32 0x020e0528 0x00000030
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wm 32 0x020e0520 0x00000030
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wm 32 0x020e0514 0x00000030
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wm 32 0x020e0510 0x00000030
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wm 32 0x020e05bc 0x00000030
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wm 32 0x020e05c4 0x00000030
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wm 32 0x021b0800 0xA1390003
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wm 32 0x021b080c 0x001F001F
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wm 32 0x021b0810 0x001F001F
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wm 32 0x021b480c 0x001F001F
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wm 32 0x021b4810 0x001F001F
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wm 32 0x021b083c 0x4333033F
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wm 32 0x021b0840 0x032C031D
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wm 32 0x021b483c 0x43200332
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wm 32 0x021b4840 0x031A026A
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wm 32 0x021b0848 0x4D464746
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wm 32 0x021b4848 0x47453F4D
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wm 32 0x021b0850 0x3E434440
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wm 32 0x021b4850 0x47384839
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wm 32 0x021b081c 0x33333333
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wm 32 0x021b0820 0x33333333
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wm 32 0x021b0824 0x33333333
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wm 32 0x021b0828 0x33333333
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wm 32 0x021b481c 0x33333333
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wm 32 0x021b4820 0x33333333
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wm 32 0x021b4824 0x33333333
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wm 32 0x021b4828 0x33333333
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wm 32 0x021b08b8 0x00000800
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wm 32 0x021b48b8 0x00000800
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wm 32 0x021b0004 0x00020036
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wm 32 0x021b0008 0x09444040
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wm 32 0x021b000c 0x555A7975
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wm 32 0x021b0010 0xFF538F64
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wm 32 0x021b0014 0x01FF00DB
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wm 32 0x021b0018 0x00001740
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wm 32 0x021b001c 0x00008000
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wm 32 0x021b002c 0x000026D2
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wm 32 0x021b0030 0x005A1023
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wm 32 0x021b0040 0x00000027
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wm 32 0x021b0000 0x831A0000
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wm 32 0x021b001c 0x04088032
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wm 32 0x021b001c 0x00008033
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wm 32 0x021b001c 0x00048031
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wm 32 0x021b001c 0x09408030
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wm 32 0x021b001c 0x04008040
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wm 32 0x021b0020 0x00005800
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wm 32 0x021b0818 0x00011117
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wm 32 0x021b4818 0x00011117
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wm 32 0x021b0004 0x00025576
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wm 32 0x021b0404 0x00011006
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wm 32 0x021b001c 0x00000000
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@ -0,0 +1,74 @@
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/*
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*
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* Copyright (C) 2013 Michael Burkey
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* Based on code by Sascha Hauer <s.hauer@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <debug_ll.h>
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#include <common.h>
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#include <sizes.h>
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#include <io.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm.h>
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#include <asm/sections.h>
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#include <asm/cache.h>
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#include <asm/mmu.h>
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#include <mach/imx6-mmdc.h>
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#include <mach/imx6.h>
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static inline void setup_uart(void)
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{
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void __iomem *ccmbase = (void *)MX6_CCM_BASE_ADDR;
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void __iomem *uartbase = (void *)MX6_UART1_BASE_ADDR;
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void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR;
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writel(0x03, iomuxbase + 0x0280);
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writel(0x03, iomuxbase + 0x0284);
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writel(0xffffffff, ccmbase + 0x68);
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writel(0xffffffff, ccmbase + 0x6c);
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writel(0xffffffff, ccmbase + 0x70);
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writel(0xffffffff, ccmbase + 0x74);
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writel(0xffffffff, ccmbase + 0x78);
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writel(0xffffffff, ccmbase + 0x7c);
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writel(0xffffffff, ccmbase + 0x80);
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writel(0x00000000, uartbase + 0x80);
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writel(0x00004027, uartbase + 0x84);
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writel(0x00000704, uartbase + 0x88);
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writel(0x00000a81, uartbase + 0x90);
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writel(0x0000002b, uartbase + 0x9c);
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writel(0x00013880, uartbase + 0xb0);
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writel(0x0000047f, uartbase + 0xa4);
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writel(0x0000c34f, uartbase + 0xa8);
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writel(0x00000001, uartbase + 0x80);
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putc_ll('>');
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}
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extern char __dtb_imx6q_var_custom_start[];
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ENTRY_FUNCTION(start_variscite_custom, r0, r1, r2)
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{
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uint32_t fdt;
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arm_cpu_lowlevel_init();
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arm_setup_stack(0x00920000 - 8);
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if (IS_ENABLED(CONFIG_DEBUG_LL))
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setup_uart();
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fdt = (uint32_t)__dtb_imx6q_var_custom_start - get_runtime_offset();
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barebox_arm_entry(0x10000000, SZ_1G, fdt);
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}
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@ -25,7 +25,8 @@ dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \
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imx6q-guf-santaro.dtb \
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imx6q-nitrogen6x.dtb \
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imx6dl-nitrogen6x.dtb \
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imx6q-udoo.dtb
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imx6q-udoo.dtb \
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imx6q-var-custom.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += dove-cubox-bb.dtb
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dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_sockit.dtb \
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socfpga_cyclone5_socrates.dtb
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@ -60,6 +61,7 @@ pbl-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o
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pbl-$(CONFIG_MACH_GUF_SANTARO) += imx6q-guf-santaro.dtb.o
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pbl-$(CONFIG_MACH_NITROGEN6X) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o
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pbl-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o
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pbl-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o
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.SECONDARY: $(obj)/$(BUILTIN_DTB).dtb.S
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.SECONDARY: $(patsubst %,$(obj)/%.S,$(dtb-y))
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@ -0,0 +1,149 @@
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/*
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* Copyright 2013 Michael Burkey
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* Based on code written by Christian Hemp, Phytec Messtechnik GmbH
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
|
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*
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*
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* environment@0 {
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compatible = "barebox,environment";
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device-path = &usdhc2, "partname:barebox-environment";
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};
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*
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*/
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/dts-v1/;
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#include "imx6q-var-som.dtsi"
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/ {
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model = "Variscite i.MX6 Quad Custom Carrier-Board";
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compatible = "variscite,imx6q-custom", "variscite,imx6q-som", "fsl,imx6q";
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chosen {
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linux,stdout-path = &uart1;
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environment@0 {
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compatible = "barebox,environment";
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device-path = &gpmi, "partname:barebox-environment";
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};
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx6q-variscite-custom {
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <MX6QDL_I2C1_PINGRP1>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <MX6QDL_I2C3_PINGRP3>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <MX6QDL_USDHC2_PINGRP_D4>;
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};
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pinctrl_usdhc2_cd: usdhc2cd {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000
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MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <MX6QDL_UART1_PINGRP1>;
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};
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};
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};
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&ldb {
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status = "okay";
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lvds-channel@0 {
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fsl,data-mapping = "spwg";
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fsl,data-width = <24>;
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status = "okay";
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display-timings {
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native-mode = &claawvga;
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claawvga: claawvga {
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native-mode;
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clock-frequency = <35714000>;
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hactive = <800>;
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vactive = <480>;
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hback-porch = <28>;
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hfront-porch = <17>;
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vback-porch = <13>;
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vfront-porch = <20>;
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hsync-len = <20>;
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vsync-len = <13>;
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};
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};
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};
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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};
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&usdhc2 {
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status = "okay";
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pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
cd-gpios = <&gpio4 14 0>;
|
||||
wp-gpios = <&gpio4 15 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "barebox";
|
||||
reg = <0x0 0x200000>;
|
||||
};
|
||||
|
||||
partition@1 {
|
||||
label = "barebox-environment";
|
||||
reg = <0x200000 0x20000>;
|
||||
};
|
||||
|
||||
partition@2 {
|
||||
label = "kernel";
|
||||
reg = <0x220000 0x600000>;
|
||||
};
|
||||
|
||||
partition@3 {
|
||||
label = "rootfs";
|
||||
reg = <0x820000 0x18000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
status = "okay";
|
||||
disable-over-current;
|
||||
dr_mode = "host";
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
clock-frequency = <1000000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
};
|
||||
|
|
@ -0,0 +1,99 @@
|
|||
/*
|
||||
* Copyright 2013 Michael Burkey
|
||||
* Based on code written by Christian Hemp, Phytec Messtechnik GmbH
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
#include "imx6q.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Variscite i.MX6 Quad SOM";
|
||||
compatible = "variscite,imx6q-som", "fsl,imx6q";
|
||||
|
||||
memory {
|
||||
reg = <0x10000000 0x40000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "barebox";
|
||||
reg = <0x0 0x200000>;
|
||||
};
|
||||
|
||||
partition@1 {
|
||||
label = "barebox-environment";
|
||||
reg = <0x200000 0x20000>;
|
||||
};
|
||||
|
||||
partition@2 {
|
||||
label = "kernel";
|
||||
reg = <0x220000 0x600000>;
|
||||
};
|
||||
|
||||
partition@3 {
|
||||
label = "rootfs";
|
||||
reg = <0x820000 0x1F7E0000>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "okay";
|
||||
ddc-i2c-bus = <&i2c2>;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
clock-frequency = <1000000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
imx6q-variscite-som {
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
|
||||
MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x80000000
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_ENET_PINGRP_RGMII_MD(0x1b0b0, 0x1b0b0)
|
||||
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000 /* KSZ9031 PHY Reset */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpmigrp {
|
||||
fsl,pins = <MX6QDL_GPMI_NAND_PINGRP1>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <MX6QDL_I2C2_PINGRP2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -39,6 +39,7 @@ config ARCH_TEXT_BASE
|
|||
default 0x4fc00000 if MACH_PHYTEC_PFLA02
|
||||
default 0x4fc00000 if MACH_DFI_FS700_M60
|
||||
default 0x4fc00000 if MACH_UDOO
|
||||
default 0x4fc00000 if MACH_VARISCITE_MX6
|
||||
|
||||
config ARCH_IMX_INTERNAL_BOOT
|
||||
bool "support internal boot mode"
|
||||
|
|
@ -247,6 +248,11 @@ config MACH_UDOO
|
|||
bool "Freescale i.MX6 UDOO Board"
|
||||
select ARCH_IMX6
|
||||
|
||||
config MACH_VARISCITE_MX6
|
||||
bool "Variscite i.MX6 Quad SOM"
|
||||
select ARCH_IMX6
|
||||
|
||||
|
||||
endif
|
||||
|
||||
# ----------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -143,3 +143,8 @@ pblx-$(CONFIG_MACH_UDOO) += start_imx6_udoo
|
|||
CFG_start_imx6_udoo.pblx.imximg = $(board)/udoo/flash-header-mx6-udoo.imxcfg
|
||||
FILE_barebox-udoo-imx6q.img = start_imx6_udoo.pblx.imximg
|
||||
image-$(CONFIG_MACH_UDOO) += barebox-udoo-imx6q.img
|
||||
|
||||
pblx-$(CONFIG_MACH_VARISCITE_MX6) += start_variscite_custom
|
||||
CFG_start_variscite_custom.pblx.imximg = $(board)/variscite-mx6/flash-header-variscite.imxcfg
|
||||
FILE_barebox-variscite-custom.img = start_variscite_custom.pblx.imximg
|
||||
image-$(CONFIG_MACH_VARISCITE_MX6) += barebox-variscite-custom.img
|
||||
|
|
|
|||
Loading…
Reference in New Issue