sysmo-bts
/
barebox
9
0
Fork 0
Code Releases Activity

arm: boards: phytec-som-am335x: Remove 1GB RAM type 

This machine was a prototype and was never shipped to customers.

Since it has no dependencies to any image, it can be removed.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Daniel Schultz 2017-03-01 08:50:54 +01:00 committed by Sascha Hauer
parent f0a2d7f036
commit 6d76aaf1bc
3 changed files with 0 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boards/phytec-som-am335x/lowlevel.c
View File

@ -122,7 +122,6 @@ PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_128mb, am335x_phytec_phycore_s
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J128M16125IT_256MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J256M16HA15EIT_512MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_2x512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J512M8125IT_2x512MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_1024mb, am335x_phytec_phycore_som_mlo, PHYCORE_IM8G16D3FBBG15EI_1024MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K256M16TW107IT_512MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K128M16JT_256MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_1024mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K512M16HA125IT_1024MB);

21
arch/arm/boards/phytec-som-am335x/ram-timings.h
View File

@ -29,7 +29,6 @@ enum {
PHYCORE_MT41J64M1615IT_128MB,
PHYCORE_MT41J256M16HA15EIT_512MB,
PHYCORE_MT41J512M8125IT_2x512MB,
PHYCORE_IM8G16D3FBBG15EI_1024MB,
PHYCORE_R2_MT41K256M16TW107IT_512MB,
PHYCORE_R2_MT41K128M16JT_256MB,
PHYCORE_R2_MT41K512M16HA125IT_1024MB,
@ -162,26 +161,6 @@ struct am335x_sdram_timings physom_timings[] = {
},
},
/* 1024MB */
[PHYCORE_IM8G16D3FBBG15EI_1024MB] = {
.regs = {
.emif_read_latency = 0x7,
.emif_tim1 = 0x0AAAE4DB,
.emif_tim2 = 0x268F7FDA,
.emif_tim3 = 0x501F88BF,
.ocp_config = 0x003d3d3d,
.sdram_config = 0x61C053B2,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30
},
.data = {
.rd_slave_ratio0 = 0x33,
.wr_dqs_slave_ratio0 = 0x4a,
.fifo_we_slave_ratio0 = 0xa4,
.wr_slave_ratio0 = 0x85,
},
},
/* 256MB */
[PHYCARD_NT5CB128M16BP_256MB] = {
.regs = {

6
images/Makefile.am33xx
View File

@ -77,12 +77,6 @@ FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.spi.img = start_am33xx_phytec_phy
am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-2x512mb.img
am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-2x512mb.spi.img
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_1024mb
FILE_barebox-am33xx-phytec-phycore-mlo-1024mb.img = start_am33xx_phytec_phycore_sram_1024mb.pblx.mlo
FILE_barebox-am33xx-phytec-phycore-mlo-1024mb.spi.img = start_am33xx_phytec_phycore_sram_1024mb.pblx.mlospi
am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-1024mb.img
am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-1024mb.spi.img
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_1024mb
FILE_barebox-am33xx-phytec-phycore-r2-mlo-1024mb.img = start_am33xx_phytec_phycore_r2_sram_1024mb.pblx.mlo
FILE_barebox-am33xx-phytec-phycore-r2-mlo-1024mb.spi.img = start_am33xx_phytec_phycore_r2_sram_1024mb.pblx.mlospi