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ARM OMAP AM33XX: create new ARCH for AM33xx 

Created ARCH for AM33xx boards as second stage bootloader.
This includes:
- Added dmtimer0
- Created basic header files
- Added MMC support for ARCH_AM33XX
- Added reset function

Signed-off-by: Teresa Gámez <t.gamez@phytec.de>

Some header file cleanup by:
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Teresa Gámez 2012-12-18 15:22:38 +01:00 committed by Sascha Hauer
parent 95f4112191
commit 4746717a5d
7 changed files with 204 additions and 1 deletions
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11
arch/arm/mach-omap/Kconfig
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@ -42,12 +42,23 @@ config ARCH_OMAP4
help
Say Y here if you are using Texas Instrument's OMAP4 based platform
config ARCH_AM33XX
bool "AM33xx"
select CPU_V7
select GENERIC_GPIO
select OMAP_CLOCK_SOURCE_DMTIMER0
help
Say Y here if you are using Texas Instrument's AM33xx based platform
endchoice
# Blind enable all possible clocks.. think twice before you do this.
config OMAP_CLOCK_SOURCE_S32K
bool
config OMAP_CLOCK_SOURCE_DMTIMER0
bool
config OMAP3_CLOCK_CONFIG
prompt "Clock Configuration"
bool

2
arch/arm/mach-omap/Makefile
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@ -18,10 +18,12 @@
obj-$(CONFIG_ARCH_OMAP) += syslib.o omap_devices.o
pbl-$(CONFIG_ARCH_OMAP) += syslib.o
obj-$(CONFIG_OMAP_CLOCK_SOURCE_S32K) += s32k_clksource.o
obj-$(CONFIG_OMAP_CLOCK_SOURCE_DMTIMER0) += dmtimer0.o
obj-$(CONFIG_ARCH_OMAP3) += omap3_core.o omap3_generic.o auxcr.o
pbl-$(CONFIG_ARCH_OMAP3) += omap3_core.o omap3_generic.o auxcr.o
obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
obj-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o
obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
pbl-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o

29
arch/arm/mach-omap/am33xx_generic.c Normal file
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@ -0,0 +1,29 @@
/*
* (C) Copyright 2012 Teresa Gámez, Phytec Messtechnik GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <io.h>
#include <mach/am33xx-silicon.h>
#include <mach/am33xx-clock.h>
void __noreturn reset_cpu(unsigned long addr)
{
writel(AM33XX_PRM_RSTCTRL_RESET, AM33XX_PRM_RSTCTRL);
while (1);
}

89
arch/arm/mach-omap/dmtimer0.c Normal file
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@ -0,0 +1,89 @@
/**
* @file
* @brief Support DMTimer0 counter
*
* FileName: arch/arm/mach-omap/dmtimer0.c
*/
/*
* This File is based on arch/arm/mach-omap/s32k_clksource.c
* (C) Copyright 2008
* Texas Instruments, <www.ti.com>
* Nishanth Menon <x0nishan@ti.com>
*
* (C) Copyright 2012 Teresa Gámez, Phytec Messtechnik GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <clock.h>
#include <init.h>
#include <io.h>
#include <mach/am33xx-silicon.h>
#define CLK_RC32K 32768
#define TIDR 0x0
#define TIOCP_CFG 0x10
#define IRQ_EOI 0x20
#define IRQSTATUS_RAW 0x24
#define IRQSTATUS 0x28
#define IRQSTATUS_SET 0x2c
#define IRQSTATUS_CLR 0x30
#define IRQWAKEEN 0x34
#define TCLR 0x38
#define TCRR 0x3C
#define TLDR 0x40
#define TTGR 0x44
#define TWPS 0x48
#define TMAR 0x4C
#define TCAR1 0x50
#define TSICR 0x54
#define TCAR2 0x58
/**
* @brief Provide a simple counter read
*
* @return DMTimer0 counter
*/
static uint64_t dmtimer0_read(void)
{
return readl(AM33XX_DMTIMER0_BASE + TCRR);
}
static struct clocksource dmtimer0_cs = {
.read = dmtimer0_read,
.mask = CLOCKSOURCE_MASK(32),
.shift = 10,
};
/**
* @brief Initialize the Clock
*
* Enable dmtimer0.
*
* @return result of @ref init_clock
*/
static int dmtimer0_init(void)
{
dmtimer0_cs.mult = clocksource_hz2mult(CLK_RC32K, dmtimer0_cs.shift);
/* Enable counter */
writel(0x3, AM33XX_DMTIMER0_BASE + TCLR);
return init_clock(&dmtimer0_cs);
}
/* Run me at boot time */
core_initcall(dmtimer0_init);

23
arch/arm/mach-omap/include/mach/am33xx-clock.h Normal file
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@ -0,0 +1,23 @@
/*
* (C) Copyright 2012 Teresa Gámez, Phytec Messtechnik GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef _AM33XX_CLOCKS_H_
#define _AM33XX_CLOCKS_H_
#endif /* endif _AM33XX_CLOCKS_H_ */

49
arch/arm/mach-omap/include/mach/am33xx-silicon.h Normal file
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@ -0,0 +1,49 @@
/*
* This file contains the address info for various AM33XX modules.
*
* Copyright (C) 2012 Teresa Gámez <t.gamez@phytec.de>,
* Phytec Messtechnik GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_AM33XX_H
#define __ASM_ARCH_AM33XX_H
/** AM335x Internal Bus Base addresses */
#define AM33XX_L4_WKUP_BASE 0x44C00000
#define AM33XX_L4_PER_BASE 0x48000000
#define AM33XX_L4_FAST_BASE 0x4A000000
/* UART */
#define AM33XX_UART0_BASE (AM33XX_L4_WKUP_BASE + 0x209000)
#define AM33XX_UART1_BASE (AM33XX_L4_PER_BASE + 0x22000)
#define AM33XX_UART2_BASE (AM33XX_L4_PER_BASE + 0x24000)
/* EMFI Registers */
#define AM33XX_EMFI0_BASE 0x4C000000
#define AM33XX_DRAM_ADDR_SPACE_START 0x80000000
#define AM33XX_DRAM_ADDR_SPACE_END 0xC0000000
/* GPMC */
#define AM33XX_GPMC_BASE 0x50000000
/* MMC */
#define AM33XX_MMCHS0_BASE (AM33XX_L4_PER_BASE + 0x60000)
/* DTMTimer0 */
#define AM33XX_DMTIMER0_BASE (AM33XX_L4_WKUP_BASE + 0x205000)
/* PRM */
#define AM33XX_PRM_BASE (AM33XX_L4_WKUP_BASE + 0x200000)
#endif

2
drivers/mci/Kconfig
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@ -67,7 +67,7 @@ config MCI_IMX_ESDHC_PIO
config MCI_OMAP_HSMMC
bool "OMAP HSMMC"
depends on ARCH_OMAP4 || ARCH_OMAP3
depends on ARCH_OMAP4 || ARCH_OMAP3 || ARCH_AM33XX
help
Enable this entry to add support to read and write SD cards on
both OMAP3 and OMAP4 based systems.