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ARM boards: Use _text rather than TEXT_BASE 

With compressed image support TEXT_BASE will become the base
address of the uncompressed image. What the boards want instead
is the base address of the decompressor code or, if not compressed,
the base address of the uncompressed image. Use _text which is
the correct one for both cases.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2012-07-08 18:30:42 +02:00
parent 218dffea80
commit 244198ea8b
29 changed files with 65 additions and 68 deletions
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3
arch/arm/boards/a9m2410/a9m2410.c
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@ -29,6 +29,7 @@
#include <init.h>
#include <asm/armlinux.h>
#include <generated/mach-types.h>
#include <asm-generic/sections.h>
#include <partition.h>
#include <nand.h>
#include <io.h>
@ -139,7 +140,7 @@ device_initcall(a9m2410_devices_init);
#ifdef CONFIG_S3C_NAND_BOOT
void __bare_init nand_boot(void)
{
s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
s3c24x0_nand_load_image(_text, 256 * 1024, 0);
}
#endif

3
arch/arm/boards/a9m2440/a9m2440.c
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@ -28,6 +28,7 @@
#include <driver.h>
#include <init.h>
#include <asm/armlinux.h>
#include <asm-generic/sections.h>
#include <generated/mach-types.h>
#include <partition.h>
#include <nand.h>
@ -158,7 +159,7 @@ device_initcall(a9m2440_devices_init);
#ifdef CONFIG_S3C_NAND_BOOT
void __bare_init nand_boot(void)
{
s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
s3c24x0_nand_load_image(_text, 256 * 1024, 0);
}
#endif

3
arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
View File

@ -28,6 +28,7 @@
#include <environment.h>
#include <mach/imx-regs.h>
#include <asm/armlinux.h>
#include <asm/barebox-arm.h>
#include <asm-generic/sections.h>
#include <mach/gpio.h>
#include <io.h>
@ -284,7 +285,7 @@ console_initcall(eukrea_cpuimx25_console_init);
#ifdef CONFIG_NAND_IMX_BOOT
void __bare_init nand_boot(void)
{
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
}
#endif

4
arch/arm/boards/eukrea_cpuimx25/lowlevel.c
View File

@ -42,7 +42,7 @@ static void __bare_init __naked insdram(void)
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
@ -154,7 +154,7 @@ void __bare_init __naked board_init_lowlevel(void)
board_init_lowlevel_return();
src = (unsigned int *)IMX_NFC_BASE;
trg = (unsigned int *)TEXT_BASE;
trg = (unsigned int *)_text;
/* Move ourselves out of NFC SRAM */
for (i = 0; i < 0x800 / sizeof(int); i++)

4
arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
View File

@ -31,6 +31,7 @@
#include <mach/gpio.h>
#include <asm/armlinux.h>
#include <asm-generic/sections.h>
#include <asm/barebox-arm.h>
#include <generated/mach-types.h>
#include <partition.h>
#include <fs.h>
@ -264,7 +265,8 @@ late_initcall(eukrea_cpuimx27_late_init);
#ifdef CONFIG_NAND_IMX_BOOT
void __bare_init nand_boot(void)
{
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
#endif

11
arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S
View File

@ -1,4 +1,5 @@
#include <config.h>
#include <asm-generic/memory_layout.h>
#include <mach/imx-regs.h>
#define writel(val, reg) \
@ -107,7 +108,7 @@ board_init_lowlevel:
sdram_init
#ifdef CONFIG_NAND_IMX_BOOT
ldr sp, =0xa0f00000 /* Setup a temporary stack in SDRAM */
ldr sp, =STACK_BASE + STACK_SIZE - 12 /* Setup a temporary stack in SDRAM */
ldr r0, =IMX_NFC_BASE /* start of NFC SRAM */
ldr r2, =IMX_NFC_BASE + 0x1000 /* end of NFC SRAM */
@ -119,7 +120,7 @@ board_init_lowlevel:
bhi ret
/* Move ourselves out of NFC SRAM */
ldr r1, =TEXT_BASE
ldr r1, =_text
copy_loop:
ldmia r0!, {r3-r9} /* copy from source address [r0] */
@ -129,12 +130,8 @@ copy_loop:
ldr pc, =1f /* Jump to SDRAM */
1:
bl nand_boot /* Load barebox from NAND Flash */
ldr r1, =IMX_NFC_BASE - TEXT_BASE
sub r10, r10, r1 /* adjust return address from NFC SRAM */
b nand_boot /* Load barebox from NAND Flash */
/* to SDRAM */
#endif /* CONFIG_NAND_IMX_BOOT */
ret:

4
arch/arm/boards/eukrea_cpuimx35/lowlevel.c
View File

@ -53,7 +53,7 @@ static void __bare_init __naked insdram(void)
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
@ -163,7 +163,7 @@ void __bare_init __naked board_init_lowlevel(void)
board_init_lowlevel_return();
src = (unsigned int *)IMX_NFC_BASE;
trg = (unsigned int *)TEXT_BASE;
trg = (unsigned int *)_text;
/* Move ourselves out of NFC SRAM */
for (i = 0; i < 0x800 / sizeof(int); i++)

4
arch/arm/boards/freescale-mx25-3-stack/3stack.c
View File

@ -28,6 +28,7 @@
#include <mach/imx-regs.h>
#include <asm/armlinux.h>
#include <asm-generic/sections.h>
#include <asm/barebox-arm.h>
#include <mach/gpio.h>
#include <io.h>
#include <partition.h>
@ -294,7 +295,8 @@ console_initcall(imx25_console_init);
#ifdef CONFIG_NAND_IMX_BOOT
void __bare_init nand_boot(void)
{
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
#endif

11
arch/arm/boards/freescale-mx25-3-stack/lowlevel_init.S
View File

@ -21,6 +21,7 @@
* MA 02111-1307 USA
*/
#include <asm-generic/memory_layout.h>
#include <mach/imx-regs.h>
#include <mach/imx-pll.h>
#include <mach/esdctl.h>
@ -100,7 +101,7 @@ board_init_lowlevel:
str r3, [r0, #0x30]
#ifdef CONFIG_NAND_IMX_BOOT
ldr sp, =0xa0f00000 /* Setup a temporary stack in SDRAM */
ldr sp, =STACK_BASE + STACK_SIZE - 12 /* Setup a temporary stack in SDRAM */
ldr r0, =IMX_NFC_BASE /* start of NFC SRAM */
ldr r2, =IMX_NFC_BASE + 0x1000 /* end of NFC SRAM */
@ -112,7 +113,7 @@ board_init_lowlevel:
bhi ret
/* Move ourselves out of NFC SRAM */
ldr r1, =TEXT_BASE
ldr r1, =_text
copy_loop:
ldmia r0!, {r3-r9} /* copy from source address [r0] */
@ -122,11 +123,7 @@ copy_loop:
ldr pc, =1f /* Jump to SDRAM */
1:
bl nand_boot /* Load barebox from NAND Flash */
ldr r1, =IMX_NFC_BASE - TEXT_BASE
sub r10, r10, r1 /* adjust return address from NFC SRAM */
/* to SDRAM */
b nand_boot /* Load barebox from NAND Flash */
#endif /* CONFIG_NAND_IMX_BOOT */

4
arch/arm/boards/freescale-mx35-3-stack/3stack.c
View File

@ -38,6 +38,7 @@
#include <asm/armlinux.h>
#include <asm-generic/sections.h>
#include <asm/barebox-arm.h>
#include <io.h>
#include <generated/mach-types.h>
@ -450,6 +451,7 @@ void __bare_init nand_boot(void)
* The driver is able to detect NAND's pagesize by CPU internal
* fuses or external pull ups. But not the blocksize...
*/
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
#endif

11
arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S
View File

@ -25,6 +25,7 @@
#include <mach/imx-pll.h>
#include <mach/esdctl.h>
#include <asm/cache-l2x0.h>
#include <asm-generic/memory_layout.h>
#include "board-mx35_3stack.h"
#define CSD0_BASE_ADDR 0x80000000
@ -156,7 +157,7 @@ board_init_lowlevel:
str r3, [r0, #0x30]
#ifdef CONFIG_NAND_IMX_BOOT
ldr sp, =TEXT_BASE - 4 /* Setup a temporary stack in SDRAM */
ldr sp, =STACK_BASE + STACK_SIZE - 12 /* Setup a temporary stack in SDRAM */
ldr r0, =IMX_NFC_BASE /* start of NFC SRAM */
ldr r2, =IMX_NFC_BASE + 0x800 /* end of NFC SRAM */
@ -168,7 +169,7 @@ board_init_lowlevel:
bhs ret
/* Move ourselves out of NFC SRAM */
ldr r1, =TEXT_BASE
ldr r1, =_text
copy_loop:
ldmia r0!, {r3-r9} /* copy from source address [r0] */
@ -178,11 +179,7 @@ copy_loop:
ldr pc, =1f /* Jump to SDRAM */
1:
bl nand_boot /* Load barebox from NAND Flash */
/* rebase the return address */
ldr r1, =IMX_NFC_BASE - TEXT_BASE
sub r10, r10, r1 /* adjust return address from NFC SRAM */
b nand_boot /* Load barebox from NAND Flash */
ret:
#endif /* CONFIG_NAND_IMX_BOOT */

2
arch/arm/boards/freescale-mx53-loco/flash_header.c
View File

@ -77,7 +77,7 @@ struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00000000), },
};
#define APP_DEST CONFIG_TEXT_BASE
#define APP_DEST 0x70000000
struct imx_flash_header_v2 __flash_header_section flash_header = {
.header.tag = IVT_HEADER_TAG,

2
arch/arm/boards/freescale-mx53-smd/flash_header.c
View File

@ -77,7 +77,7 @@ struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00000000), },
};
#define APP_DEST CONFIG_TEXT_BASE
#define APP_DEST 0x70000000
struct imx_flash_header_v2 __flash_header_section flash_header = {
.header.tag = IVT_HEADER_TAG,

2
arch/arm/boards/freescale-mx6-arm2/flash_header.c
View File

@ -146,7 +146,7 @@ struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
DCD(MX6_IOMUXC_BASE_ADDR + 0x01c, 0x007f007f),
};
#define APP_DEST CONFIG_TEXT_BASE
#define APP_DEST 0x10000000
struct imx_flash_header_v2 __flash_header_section flash_header = {
.header.tag = IVT_HEADER_TAG,

4
arch/arm/boards/guf-cupid/lowlevel.c
View File

@ -60,7 +60,7 @@ static void __bare_init __naked insdram(void)
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
@ -334,7 +334,7 @@ void __bare_init __naked board_init_lowlevel(void)
board_init_lowlevel_return();
src = (unsigned int *)IMX_NFC_BASE;
trg = (unsigned int *)TEXT_BASE;
trg = (unsigned int *)_text;
/* Move ourselves out of NFC SRAM */
for (i = 0; i < 0x800 / sizeof(int); i++)

4
arch/arm/boards/guf-neso/lowlevel.c
View File

@ -44,7 +44,7 @@ static void __bare_init __naked insdram(void)
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
@ -105,7 +105,7 @@ void __bare_init __naked board_init_lowlevel(void)
board_init_lowlevel_return();
src = (unsigned int *)IMX_NFC_BASE;
trg = (unsigned int *)TEXT_BASE;
trg = (unsigned int *)_text;
/* Move ourselves out of NFC SRAM */
for (i = 0; i < 0x800 / sizeof(int); i++)

4
arch/arm/boards/imx21ads/imx21ads.c
View File

@ -28,6 +28,7 @@
#include <mach/imx-regs.h>
#include <asm/armlinux.h>
#include <asm-generic/sections.h>
#include <asm/barebox-arm.h>
#include <io.h>
#include <mach/gpio.h>
#include <partition.h>
@ -204,7 +205,8 @@ console_initcall(mx21ads_console_init);
void __bare_init nand_boot(void)
{
PCCR0 |= PCCR0_NFC_EN;
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
#endif

10
arch/arm/boards/imx21ads/lowlevel_init.S
View File

@ -18,6 +18,7 @@
*/
#include <config.h>
#include <asm-generic/memory_layout.h>
#include <mach/imx-regs.h>
.section ".text_bare_init","ax"
@ -121,7 +122,7 @@ board_init_lowlevel:
str r1, [r0]
#ifdef CONFIG_NAND_IMX_BOOT
ldr sp, =TEXT_BASE - 4 /* Setup a temporary stack in SDRAM */
ldr sp, =STACK_BASE + STACK_SIZE - 12 /* Setup a temporary stack in SDRAM */
ldr r0, =IMX_NFC_BASE /* start of NFC SRAM */
ldr r2, =IMX_NFC_BASE + 0x800 /* end of NFC SRAM */
@ -133,7 +134,7 @@ board_init_lowlevel:
bhi ret
/* Move ourselves out of NFC SRAM */
ldr r1, =TEXT_BASE
ldr r1, =_text
copy_loop:
ldmia r0!, {r3-r9} /* copy from source address [r0] */
@ -143,10 +144,7 @@ copy_loop:
ldr pc, =1f /* Jump to SDRAM */
1:
bl nand_boot /* Load barebox from NAND Flash */
ldr r1, =IMX_NFC_BASE - TEXT_BASE
sub r10, r10, r1 /* adjust return address from NFC */
b nand_boot /* Load barebox from NAND Flash */
/* SRAM to SDRAM */
#endif /* CONFIG_NAND_IMX_BOOT */

3
arch/arm/boards/karo-tx25/board.c
View File

@ -28,6 +28,7 @@
#include <mach/imx-regs.h>
#include <asm/armlinux.h>
#include <asm-generic/sections.h>
#include <asm/barebox-arm.h>
#include <mach/gpio.h>
#include <io.h>
#include <partition.h>
@ -168,7 +169,7 @@ console_initcall(tx25_console_init);
#ifdef CONFIG_NAND_IMX_BOOT
void __bare_init nand_boot(void)
{
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
}
#endif

4
arch/arm/boards/karo-tx25/lowlevel.c
View File

@ -40,7 +40,7 @@ static void __bare_init __naked insdram(void)
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
@ -158,7 +158,7 @@ void __bare_init __naked board_init_lowlevel(void)
board_init_lowlevel_return();
src = (unsigned int *)IMX_NFC_BASE;
trg = (unsigned int *)TEXT_BASE;
trg = (unsigned int *)_text;
/* Move ourselves out of NFC SRAM */
for (i = 0; i < 0x800 / sizeof(int); i++)

2
arch/arm/boards/karo-tx51/flash_header.c
View File

@ -39,7 +39,7 @@ struct imx_dcd_entry __dcd_entry_section dcd_entry[] = {
{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00000000, },
};
#define APP_DEST CONFIG_ARCH_TEXT_BASE
#define APP_DEST 0x90000000
struct imx_flash_header __flash_header_section flash_header = {
.app_code_jump_vector = APP_DEST + 0x1000,

3
arch/arm/boards/mini2440/mini2440.c
View File

@ -36,6 +36,7 @@
#include <mci.h>
#include <fb.h>
#include <asm/armlinux.h>
#include <asm-generic/sections.h>
#include <io.h>
#include <mach/gpio.h>
#include <mach/s3c-iomap.h>
@ -326,7 +327,7 @@ device_initcall(mini2440_devices_init);
#ifdef CONFIG_S3C_NAND_BOOT
void __bare_init nand_boot(void)
{
s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
s3c24x0_nand_load_image(_text, 256 * 1024, 0);
}
#endif

7
arch/arm/boards/pcm037/lowlevel_init.S
View File

@ -146,7 +146,7 @@ clear_iomux:
bhs ret
/* Move ourselves out of NFC SRAM */
ldr r1, =TEXT_BASE
ldr r1, =_text
copy_loop:
ldmia r0!, {r3-r9} /* copy from source address [r0] */
@ -156,10 +156,7 @@ copy_loop:
ldr pc, =1f /* Jump to SDRAM */
1:
bl nand_boot /* Load barebox from NAND Flash */
ldr r1, =IMX_NFC_BASE - TEXT_BASE
sub r10, r10, r1 /* adjust return address from NFC SRAM */
b nand_boot /* Load barebox from NAND Flash */
ret:
#endif /* CONFIG_NAND_IMX_BOOT */

4
arch/arm/boards/pcm037/pcm037.c
View File

@ -37,6 +37,7 @@
#include <asm/mmu.h>
#include <partition.h>
#include <generated/mach-types.h>
#include <asm/barebox-arm.h>
#include <mach/imx-nand.h>
#include <mach/devices-imx31.h>
@ -246,6 +247,7 @@ console_initcall(imx31_console_init);
#ifdef CONFIG_NAND_IMX_BOOT
void __bare_init nand_boot(void)
{
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
#endif

4
arch/arm/boards/pcm038/lowlevel.c
View File

@ -45,7 +45,7 @@ static void __bare_init __naked insdram(void)
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
@ -111,7 +111,7 @@ void __bare_init __naked board_init_lowlevel(void)
board_init_lowlevel_return();
src = (unsigned int *)IMX_NFC_BASE;
trg = (unsigned int *)TEXT_BASE;
trg = (unsigned int *)_text;
/* Move ourselves out of NFC SRAM */
for (i = 0; i < 0x800 / sizeof(int); i++)

4
arch/arm/boards/pcm043/lowlevel.c
View File

@ -58,7 +58,7 @@ static void __bare_init __naked insdram(void)
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}
@ -213,7 +213,7 @@ void __bare_init __naked board_init_lowlevel(void)
board_init_lowlevel_return();
src = (unsigned int *)IMX_NFC_BASE;
trg = (unsigned int *)TEXT_BASE;
trg = (unsigned int *)_text;
/* Move ourselves out of NFC SRAM */
for (i = 0; i < 0x800 / sizeof(int); i++)

8
arch/arm/boards/phycard-i.MX27/lowlevel_init.S
View File

@ -106,7 +106,7 @@ board_init_lowlevel:
bhi ret
/* Move ourselves out of NFC SRAM */
ldr r1, =TEXT_BASE
ldr r1, =_text
copy_loop:
ldmia r0!, {r3-r9} /* copy from source address [r0] */
@ -116,11 +116,7 @@ copy_loop:
ldr pc, =1f /* Jump to SDRAM */
1:
bl nand_boot /* Load barebox from NAND Flash */
ldr r1, =IMX_NFC_BASE - TEXT_BASE
sub r10, r10, r1 /* adjust return address from NFC SRAM */
/* to SDRAM */
b nand_boot /* Load barebox from NAND Flash */
#endif /* CONFIG_NAND_IMX_BOOT */

2
arch/arm/boards/phycard-i.MX27/pca100.c
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@ -328,7 +328,7 @@ console_initcall(pca100_console_init);
#ifdef CONFIG_NAND_IMX_BOOT
void __bare_init nand_boot(void)
{
imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
imx_nand_load_image(_text, barebox_image_size);
}
#endif

2
arch/arm/boards/tqma53/flash_header.c
View File

@ -85,7 +85,7 @@ struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
{ .addr = cpu_to_be32(0x63fd901C), .val = cpu_to_be32(0x00000000), },
};
#define APP_DEST CONFIG_TEXT_BASE
#define APP_DEST 0x70000000
struct imx_flash_header_v2 __flash_header_section flash_header = {
.header.tag = IVT_HEADER_TAG,