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ARM: add basic support for Rockchip SoCs

This patch adds a basic support for the ARM-based Rockchip SoCs of the
RK3xxx family.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Beniamino Galvani 2014-04-27 11:30:36 +02:00 committed by Sascha Hauer
parent 8fe4e0058f
commit 036f0f1c60
6 changed files with 68 additions and 0 deletions

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@ -125,6 +125,11 @@ config ARCH_PXA
select GENERIC_GPIO
select HAS_POWEROFF
config ARCH_ROCKCHIP
bool "Rockchip RX3xxx"
select CPU_V7
select ARM_SMP_TWD
config ARCH_SOCFPGA
bool "Altera SOCFPGA cyclone5"
select HAS_DEBUG_LL
@ -204,6 +209,7 @@ source arch/arm/mach-netx/Kconfig
source arch/arm/mach-nomadik/Kconfig
source arch/arm/mach-omap/Kconfig
source arch/arm/mach-pxa/Kconfig
source arch/arm/mach-rockchip/Kconfig
source arch/arm/mach-samsung/Kconfig
source arch/arm/mach-socfpga/Kconfig
source arch/arm/mach-versatile/Kconfig

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@ -64,6 +64,7 @@ machine-$(CONFIG_ARCH_NOMADIK) := nomadik
machine-$(CONFIG_ARCH_NETX) := netx
machine-$(CONFIG_ARCH_OMAP) := omap
machine-$(CONFIG_ARCH_PXA) := pxa
machine-$(CONFIG_ARCH_ROCKCHIP) := rockchip
machine-$(CONFIG_ARCH_SAMSUNG) := samsung
machine-$(CONFIG_ARCH_SOCFPGA) := socfpga
machine-$(CONFIG_ARCH_VERSATILE) := versatile

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@ -0,0 +1,7 @@
if ARCH_ROCKCHIP
config ARCH_TEXT_BASE
hex
default 0x68000000
endif

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@ -0,0 +1 @@
obj-y += core.o

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@ -0,0 +1,28 @@
/*
* Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <asm/io.h>
#include <common.h>
#include <mach/rockchip-regs.h>
void __noreturn reset_cpu(unsigned long addr)
{
/* Map bootrom from address 0 */
writel(RK_SOC_CON0_REMAP << 16, RK_GRF_BASE + RK_GRF_SOC_CON0);
/* Reset */
writel(0xeca8, RK_CRU_BASE + RK_CRU_GLB_SRST_SND);
while (1)
;
}
EXPORT_SYMBOL(reset_cpu);

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@ -0,0 +1,25 @@
/*
* Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __MACH_ROCKCHIP_REGS_H
#define __MACH_ROCKCHIP_REGS_H
#define RK_CRU_BASE 0x20000000
#define RK_GRF_BASE 0x20008000
#define RK_CRU_GLB_SRST_SND 0x0104
#define RK_GRF_SOC_CON0 0x00a0
#define RK_SOC_CON0_REMAP (1 << 12)
#endif /* __MACH_ROCKCHIP_REGS_H */