177 lines
7.1 KiB
Diff
177 lines
7.1 KiB
Diff
From: Jon Bloomfield <jon.bloomfield@intel.com>
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Date: Fri, 20 Apr 2018 14:26:01 -0700
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Subject: drm/i915: Rename gen7 cmdparser tables
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Bug-Debian-Security: https://security-tracker.debian.org/tracker/CVE-2019-0155
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commit 0a2f661b6c21815a7fa60e30babe975fee8e73c6 upstream.
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We're about to introduce some new tables for later gens, and the
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current naming for the gen7 tables will no longer make sense.
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v2: rebase
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Signed-off-by: Jon Bloomfield <jon.bloomfield@intel.com>
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Cc: Tony Luck <tony.luck@intel.com>
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Cc: Dave Airlie <airlied@redhat.com>
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Cc: Takashi Iwai <tiwai@suse.de>
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Cc: Tyler Hicks <tyhicks@canonical.com>
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Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
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Reviewed-by: Chris Wilson <chris.p.wilson@intel.com>
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---
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drivers/gpu/drm/i915/i915_cmd_parser.c | 70 +++++++++++++-------------
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1 file changed, 35 insertions(+), 35 deletions(-)
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--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
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+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
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@@ -211,7 +211,7 @@ struct drm_i915_cmd_table {
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/* Command Mask Fixed Len Action
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---------------------------------------------------------- */
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-static const struct drm_i915_cmd_descriptor common_cmds[] = {
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+static const struct drm_i915_cmd_descriptor gen7_common_cmds[] = {
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CMD( MI_NOOP, SMI, F, 1, S ),
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CMD( MI_USER_INTERRUPT, SMI, F, 1, R ),
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CMD( MI_WAIT_FOR_EVENT, SMI, F, 1, M ),
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@@ -244,7 +244,7 @@ static const struct drm_i915_cmd_descrip
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CMD( MI_BATCH_BUFFER_START, SMI, !F, 0xFF, S ),
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};
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-static const struct drm_i915_cmd_descriptor render_cmds[] = {
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+static const struct drm_i915_cmd_descriptor gen7_render_cmds[] = {
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CMD( MI_FLUSH, SMI, F, 1, S ),
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CMD( MI_ARB_ON_OFF, SMI, F, 1, R ),
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CMD( MI_PREDICATE, SMI, F, 1, S ),
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@@ -328,7 +328,7 @@ static const struct drm_i915_cmd_descrip
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CMD( GFX_OP_3DSTATE_BINDING_TABLE_EDIT_PS, S3D, !F, 0x1FF, S ),
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};
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-static const struct drm_i915_cmd_descriptor video_cmds[] = {
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+static const struct drm_i915_cmd_descriptor gen7_video_cmds[] = {
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CMD( MI_ARB_ON_OFF, SMI, F, 1, R ),
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CMD( MI_SET_APPID, SMI, F, 1, S ),
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CMD( MI_STORE_DWORD_IMM, SMI, !F, 0xFF, B,
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@@ -372,7 +372,7 @@ static const struct drm_i915_cmd_descrip
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CMD( MFX_WAIT, SMFX, F, 1, S ),
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};
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-static const struct drm_i915_cmd_descriptor vecs_cmds[] = {
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+static const struct drm_i915_cmd_descriptor gen7_vecs_cmds[] = {
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CMD( MI_ARB_ON_OFF, SMI, F, 1, R ),
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CMD( MI_SET_APPID, SMI, F, 1, S ),
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CMD( MI_STORE_DWORD_IMM, SMI, !F, 0xFF, B,
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@@ -410,7 +410,7 @@ static const struct drm_i915_cmd_descrip
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}}, ),
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};
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-static const struct drm_i915_cmd_descriptor blt_cmds[] = {
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+static const struct drm_i915_cmd_descriptor gen7_blt_cmds[] = {
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CMD( MI_DISPLAY_FLIP, SMI, !F, 0xFF, R ),
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CMD( MI_STORE_DWORD_IMM, SMI, !F, 0x3FF, B,
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.bits = {{
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@@ -463,35 +463,35 @@ static const struct drm_i915_cmd_descrip
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#undef B
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#undef M
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-static const struct drm_i915_cmd_table gen7_render_cmds[] = {
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- { common_cmds, ARRAY_SIZE(common_cmds) },
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- { render_cmds, ARRAY_SIZE(render_cmds) },
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+static const struct drm_i915_cmd_table gen7_render_cmd_table[] = {
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+ { gen7_common_cmds, ARRAY_SIZE(gen7_common_cmds) },
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+ { gen7_render_cmds, ARRAY_SIZE(gen7_render_cmds) },
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};
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-static const struct drm_i915_cmd_table hsw_render_ring_cmds[] = {
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- { common_cmds, ARRAY_SIZE(common_cmds) },
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- { render_cmds, ARRAY_SIZE(render_cmds) },
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+static const struct drm_i915_cmd_table hsw_render_ring_cmd_table[] = {
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+ { gen7_common_cmds, ARRAY_SIZE(gen7_common_cmds) },
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+ { gen7_render_cmds, ARRAY_SIZE(gen7_render_cmds) },
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{ hsw_render_cmds, ARRAY_SIZE(hsw_render_cmds) },
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};
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-static const struct drm_i915_cmd_table gen7_video_cmds[] = {
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- { common_cmds, ARRAY_SIZE(common_cmds) },
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- { video_cmds, ARRAY_SIZE(video_cmds) },
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+static const struct drm_i915_cmd_table gen7_video_cmd_table[] = {
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+ { gen7_common_cmds, ARRAY_SIZE(gen7_common_cmds) },
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+ { gen7_video_cmds, ARRAY_SIZE(gen7_video_cmds) },
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};
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-static const struct drm_i915_cmd_table hsw_vebox_cmds[] = {
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- { common_cmds, ARRAY_SIZE(common_cmds) },
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- { vecs_cmds, ARRAY_SIZE(vecs_cmds) },
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+static const struct drm_i915_cmd_table hsw_vebox_cmd_table[] = {
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+ { gen7_common_cmds, ARRAY_SIZE(gen7_common_cmds) },
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+ { gen7_vecs_cmds, ARRAY_SIZE(gen7_vecs_cmds) },
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};
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-static const struct drm_i915_cmd_table gen7_blt_cmds[] = {
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- { common_cmds, ARRAY_SIZE(common_cmds) },
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- { blt_cmds, ARRAY_SIZE(blt_cmds) },
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+static const struct drm_i915_cmd_table gen7_blt_cmd_table[] = {
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+ { gen7_common_cmds, ARRAY_SIZE(gen7_common_cmds) },
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+ { gen7_blt_cmds, ARRAY_SIZE(gen7_blt_cmds) },
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};
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-static const struct drm_i915_cmd_table hsw_blt_ring_cmds[] = {
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- { common_cmds, ARRAY_SIZE(common_cmds) },
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- { blt_cmds, ARRAY_SIZE(blt_cmds) },
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+static const struct drm_i915_cmd_table hsw_blt_ring_cmd_table[] = {
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+ { gen7_common_cmds, ARRAY_SIZE(gen7_common_cmds) },
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+ { gen7_blt_cmds, ARRAY_SIZE(gen7_blt_cmds) },
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{ hsw_blt_cmds, ARRAY_SIZE(hsw_blt_cmds) },
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};
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@@ -871,12 +871,12 @@ void intel_engine_init_cmd_parser(struct
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switch (engine->id) {
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case RCS:
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if (IS_HASWELL(engine->i915)) {
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- cmd_tables = hsw_render_ring_cmds;
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+ cmd_tables = hsw_render_ring_cmd_table;
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cmd_table_count =
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- ARRAY_SIZE(hsw_render_ring_cmds);
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+ ARRAY_SIZE(hsw_render_ring_cmd_table);
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} else {
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- cmd_tables = gen7_render_cmds;
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- cmd_table_count = ARRAY_SIZE(gen7_render_cmds);
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+ cmd_tables = gen7_render_cmd_table;
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+ cmd_table_count = ARRAY_SIZE(gen7_render_cmd_table);
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}
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if (IS_HASWELL(engine->i915)) {
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@@ -890,17 +890,17 @@ void intel_engine_init_cmd_parser(struct
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engine->get_cmd_length_mask = gen7_render_get_cmd_length_mask;
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break;
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case VCS:
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- cmd_tables = gen7_video_cmds;
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- cmd_table_count = ARRAY_SIZE(gen7_video_cmds);
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+ cmd_tables = gen7_video_cmd_table;
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+ cmd_table_count = ARRAY_SIZE(gen7_video_cmd_table);
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engine->get_cmd_length_mask = gen7_bsd_get_cmd_length_mask;
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break;
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case BCS:
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if (IS_HASWELL(engine->i915)) {
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- cmd_tables = hsw_blt_ring_cmds;
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- cmd_table_count = ARRAY_SIZE(hsw_blt_ring_cmds);
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+ cmd_tables = hsw_blt_ring_cmd_table;
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+ cmd_table_count = ARRAY_SIZE(hsw_blt_ring_cmd_table);
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} else {
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- cmd_tables = gen7_blt_cmds;
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- cmd_table_count = ARRAY_SIZE(gen7_blt_cmds);
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+ cmd_tables = gen7_blt_cmd_table;
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+ cmd_table_count = ARRAY_SIZE(gen7_blt_cmd_table);
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}
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if (IS_HASWELL(engine->i915)) {
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@@ -914,8 +914,8 @@ void intel_engine_init_cmd_parser(struct
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engine->get_cmd_length_mask = gen7_blt_get_cmd_length_mask;
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break;
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case VECS:
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- cmd_tables = hsw_vebox_cmds;
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- cmd_table_count = ARRAY_SIZE(hsw_vebox_cmds);
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+ cmd_tables = hsw_vebox_cmd_table;
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+ cmd_table_count = ARRAY_SIZE(hsw_vebox_cmd_table);
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/* VECS can use the same length_mask function as VCS */
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engine->get_cmd_length_mask = gen7_bsd_get_cmd_length_mask;
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break;
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