93 lines
3.2 KiB
Diff
93 lines
3.2 KiB
Diff
From: Mark Gross <mgross@linux.intel.com>
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Date: Thu, 16 Apr 2020 17:32:42 +0200
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Subject: [2/5] x86/cpu: Add 'table' argument to cpu_matches()
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Origin: https://git.kernel.org/linus/93920f61c2ad7edb01e63323832585796af75fc9
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Bug-Debian-Security: https://security-tracker.debian.org/tracker/CVE-2020-0543
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To make cpu_matches() reusable for other matching tables, have it take a
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pointer to a x86_cpu_id table as an argument.
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[ bp: Flip arguments order. ]
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Signed-off-by: Mark Gross <mgross@linux.intel.com>
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Signed-off-by: Borislav Petkov <bp@suse.de>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
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---
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arch/x86/kernel/cpu/common.c | 23 +++++++++++++----------
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1 file changed, 13 insertions(+), 10 deletions(-)
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diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
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index 7f43eba8d0c1..375e1d459b68 100644
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--- a/arch/x86/kernel/cpu/common.c
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+++ b/arch/x86/kernel/cpu/common.c
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@@ -1013,9 +1013,9 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
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{}
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};
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-static bool __init cpu_matches(unsigned long which)
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+static bool __init cpu_matches(const struct x86_cpu_id *table, unsigned long which)
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{
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- const struct x86_cpu_id *m = x86_match_cpu(cpu_vuln_whitelist);
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+ const struct x86_cpu_id *m = x86_match_cpu(table);
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return m && !!(m->driver_data & which);
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}
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@@ -1035,29 +1035,32 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
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u64 ia32_cap = x86_read_arch_cap_msr();
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/* Set ITLB_MULTIHIT bug if cpu is not in the whitelist and not mitigated */
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- if (!cpu_matches(NO_ITLB_MULTIHIT) && !(ia32_cap & ARCH_CAP_PSCHANGE_MC_NO))
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+ if (!cpu_matches(cpu_vuln_whitelist, NO_ITLB_MULTIHIT) &&
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+ !(ia32_cap & ARCH_CAP_PSCHANGE_MC_NO))
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setup_force_cpu_bug(X86_BUG_ITLB_MULTIHIT);
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- if (cpu_matches(NO_SPECULATION))
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+ if (cpu_matches(cpu_vuln_whitelist, NO_SPECULATION))
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return;
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setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
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setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
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- if (!cpu_matches(NO_SSB) && !(ia32_cap & ARCH_CAP_SSB_NO) &&
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+ if (!cpu_matches(cpu_vuln_whitelist, NO_SSB) &&
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+ !(ia32_cap & ARCH_CAP_SSB_NO) &&
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!cpu_has(c, X86_FEATURE_AMD_SSB_NO))
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setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
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if (ia32_cap & ARCH_CAP_IBRS_ALL)
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setup_force_cpu_cap(X86_FEATURE_IBRS_ENHANCED);
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- if (!cpu_matches(NO_MDS) && !(ia32_cap & ARCH_CAP_MDS_NO)) {
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+ if (!cpu_matches(cpu_vuln_whitelist, NO_MDS) &&
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+ !(ia32_cap & ARCH_CAP_MDS_NO)) {
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setup_force_cpu_bug(X86_BUG_MDS);
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- if (cpu_matches(MSBDS_ONLY))
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+ if (cpu_matches(cpu_vuln_whitelist, MSBDS_ONLY))
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setup_force_cpu_bug(X86_BUG_MSBDS_ONLY);
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}
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- if (!cpu_matches(NO_SWAPGS))
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+ if (!cpu_matches(cpu_vuln_whitelist, NO_SWAPGS))
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setup_force_cpu_bug(X86_BUG_SWAPGS);
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/*
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@@ -1075,7 +1078,7 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
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(ia32_cap & ARCH_CAP_TSX_CTRL_MSR)))
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setup_force_cpu_bug(X86_BUG_TAA);
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- if (cpu_matches(NO_MELTDOWN))
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+ if (cpu_matches(cpu_vuln_whitelist, NO_MELTDOWN))
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return;
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/* Rogue Data Cache Load? No! */
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@@ -1084,7 +1087,7 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
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setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN);
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- if (cpu_matches(NO_L1TF))
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+ if (cpu_matches(cpu_vuln_whitelist, NO_L1TF))
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return;
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setup_force_cpu_bug(X86_BUG_L1TF);
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