90 lines
3.0 KiB
Diff
90 lines
3.0 KiB
Diff
From 9c6692963c4b96a40852c7ac28e8bd7d2a421821 Mon Sep 17 00:00:00 2001
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From: Allen Pais <allen.pais@oracle.com>
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Date: Fri, 13 Dec 2013 09:44:43 +0530
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Subject: [PATCH 3/3] sparc64: convert ctx_alloc_lock raw_spinlock_t
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Origin: https://www.kernel.org/pub/linux/kernel/projects/rt/3.12/patches-3.12.5-rt7.tar.xz
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Signed-off-by: Allen Pais <allen.pais@oracle.com>
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Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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---
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arch/sparc/include/asm/mmu_context_64.h | 2 +-
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arch/sparc/mm/init_64.c | 10 +++++-----
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arch/sparc/mm/tsb.c | 4 ++--
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3 files changed, 8 insertions(+), 8 deletions(-)
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--- a/arch/sparc/include/asm/mmu_context_64.h
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+++ b/arch/sparc/include/asm/mmu_context_64.h
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@@ -13,7 +13,7 @@ static inline void enter_lazy_tlb(struct
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{
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}
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-extern spinlock_t ctx_alloc_lock;
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+extern raw_spinlock_t ctx_alloc_lock;
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extern unsigned long tlb_context_cache;
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extern unsigned long mmu_context_bmap[];
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--- a/arch/sparc/mm/init_64.c
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+++ b/arch/sparc/mm/init_64.c
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@@ -661,7 +661,7 @@ void __flush_dcache_range(unsigned long
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EXPORT_SYMBOL(__flush_dcache_range);
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/* get_new_mmu_context() uses "cache + 1". */
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-DEFINE_SPINLOCK(ctx_alloc_lock);
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+DEFINE_RAW_SPINLOCK(ctx_alloc_lock);
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unsigned long tlb_context_cache = CTX_FIRST_VERSION - 1;
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#define MAX_CTX_NR (1UL << CTX_NR_BITS)
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#define CTX_BMAP_SLOTS BITS_TO_LONGS(MAX_CTX_NR)
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@@ -683,7 +683,7 @@ void get_new_mmu_context(struct mm_struc
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unsigned long orig_pgsz_bits;
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int new_version;
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- spin_lock(&ctx_alloc_lock);
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+ raw_spin_lock(&ctx_alloc_lock);
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orig_pgsz_bits = (mm->context.sparc64_ctx_val & CTX_PGSZ_MASK);
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ctx = (tlb_context_cache + 1) & CTX_NR_MASK;
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new_ctx = find_next_zero_bit(mmu_context_bmap, 1 << CTX_NR_BITS, ctx);
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@@ -719,7 +719,7 @@ void get_new_mmu_context(struct mm_struc
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out:
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tlb_context_cache = new_ctx;
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mm->context.sparc64_ctx_val = new_ctx | orig_pgsz_bits;
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- spin_unlock(&ctx_alloc_lock);
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+ raw_spin_unlock(&ctx_alloc_lock);
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if (unlikely(new_version))
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smp_new_mmu_context_version();
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@@ -2721,7 +2721,7 @@ void hugetlb_setup(struct pt_regs *regs)
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if (tlb_type == cheetah_plus) {
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unsigned long ctx;
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- spin_lock(&ctx_alloc_lock);
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+ raw_spin_lock(&ctx_alloc_lock);
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ctx = mm->context.sparc64_ctx_val;
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ctx &= ~CTX_PGSZ_MASK;
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ctx |= CTX_PGSZ_BASE << CTX_PGSZ0_SHIFT;
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@@ -2742,7 +2742,7 @@ void hugetlb_setup(struct pt_regs *regs)
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mm->context.sparc64_ctx_val = ctx;
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on_each_cpu(context_reload, mm, 0);
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}
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- spin_unlock(&ctx_alloc_lock);
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+ raw_spin_unlock(&ctx_alloc_lock);
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}
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}
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#endif
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--- a/arch/sparc/mm/tsb.c
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+++ b/arch/sparc/mm/tsb.c
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@@ -523,12 +523,12 @@ void destroy_context(struct mm_struct *m
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free_hot_cold_page(page, 0);
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}
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- spin_lock_irqsave(&ctx_alloc_lock, flags);
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+ raw_spin_lock_irqsave(&ctx_alloc_lock, flags);
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if (CTX_VALID(mm->context)) {
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unsigned long nr = CTX_NRBITS(mm->context);
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mmu_context_bmap[nr>>6] &= ~(1UL << (nr & 63));
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}
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- spin_unlock_irqrestore(&ctx_alloc_lock, flags);
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+ raw_spin_unlock_irqrestore(&ctx_alloc_lock, flags);
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}
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