652 lines
20 KiB
Diff
652 lines
20 KiB
Diff
From: Huacai Chen <chenhc@lemote.com>
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Date: Thu, 26 Jun 2014 11:41:28 +0800
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Subject: [4/8] MIPS: Add NUMA support for Loongson-3
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Origin: https://git.kernel.org/linus/c46173183657bbdbe0d54a981c28807581648422
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Multiple Loongson-3A chips can be interconnected with HT0-bus. This is
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a CC-NUMA system that every chip (node) has its own local memory and
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cache coherency is maintained by hardware. The 64-bit physical memory
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address format is as follows:
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0x-0000-YZZZ-ZZZZ-ZZZZ
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The high 16 bits should be 0, which means the real physical address
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supported by Loongson-3 is 48-bit. The "Y" bits is the base address of
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each node, which can be also considered as the node-id. The "Z" bits is
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the address offset within a node, which means every node has a 44 bits
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address space.
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Macros XPHYSADDR and MAX_PHYSMEM_BITS are modified unconditionally,
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because many other MIPS CPUs have also extended their address spaces.
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Signed-off-by: Huacai Chen <chenhc@lemote.com>
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Cc: John Crispin <john@phrozen.org>
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Cc: Steven J. Hill <Steven.Hill@imgtec.com>
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Cc: Aurelien Jarno <aurelien@aurel32.net>
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Cc: linux-mips@linux-mips.org
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Cc: Fuxin Zhang <zhangfx@lemote.com>
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Cc: Zhangjin Wu <wuzhangjin@gmail.com>
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Patchwork: https://patchwork.linux-mips.org/patch/7187/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/include/asm/addrspace.h | 2 +-
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arch/mips/include/asm/mach-loongson/boot_param.h | 3 +
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.../include/asm/mach-loongson/kernel-entry-init.h | 52 ++++
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arch/mips/include/asm/mach-loongson/mmzone.h | 53 ++++
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arch/mips/include/asm/mach-loongson/topology.h | 23 ++
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arch/mips/include/asm/sparsemem.h | 2 +-
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arch/mips/kernel/setup.c | 2 +-
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arch/mips/loongson/Kconfig | 1 +
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arch/mips/loongson/common/env.c | 7 +
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arch/mips/loongson/common/init.c | 4 +
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arch/mips/loongson/loongson-3/Makefile | 2 +
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arch/mips/loongson/loongson-3/numa.c | 291 ++++++++++++++++++++
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arch/mips/loongson/loongson-3/smp.c | 8 +-
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13 files changed, 445 insertions(+), 5 deletions(-)
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create mode 100644 arch/mips/include/asm/mach-loongson/kernel-entry-init.h
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create mode 100644 arch/mips/include/asm/mach-loongson/mmzone.h
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create mode 100644 arch/mips/include/asm/mach-loongson/topology.h
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create mode 100644 arch/mips/loongson/loongson-3/numa.c
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diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
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index 3f74545..3b0e51d 100644
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--- a/arch/mips/include/asm/addrspace.h
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+++ b/arch/mips/include/asm/addrspace.h
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@@ -52,7 +52,7 @@
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*/
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#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
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#define XPHYSADDR(a) ((_ACAST64_(a)) & \
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- _CONST64_(0x000000ffffffffff))
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+ _CONST64_(0x0000ffffffffffff))
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#ifdef CONFIG_64BIT
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diff --git a/arch/mips/include/asm/mach-loongson/boot_param.h b/arch/mips/include/asm/mach-loongson/boot_param.h
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index 829a7ec..8b06c96 100644
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--- a/arch/mips/include/asm/mach-loongson/boot_param.h
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+++ b/arch/mips/include/asm/mach-loongson/boot_param.h
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@@ -146,6 +146,9 @@ struct boot_params {
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struct loongson_system_configuration {
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u32 nr_cpus;
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+ u32 nr_nodes;
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+ int cores_per_node;
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+ int cores_per_package;
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enum loongson_cpu_type cputype;
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u64 ht_control_base;
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u64 pci_mem_start_addr;
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diff --git a/arch/mips/include/asm/mach-loongson/kernel-entry-init.h b/arch/mips/include/asm/mach-loongson/kernel-entry-init.h
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new file mode 100644
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index 0000000..df5fca8
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-loongson/kernel-entry-init.h
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@@ -0,0 +1,52 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2005 Embedded Alley Solutions, Inc
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+ * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
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+ * Copyright (C) 2009 Jiajie Chen (chenjiajie@cse.buaa.edu.cn)
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+ * Copyright (C) 2012 Huacai Chen (chenhc@lemote.com)
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+ */
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+#ifndef __ASM_MACH_LOONGSON_KERNEL_ENTRY_H
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+#define __ASM_MACH_LOONGSON_KERNEL_ENTRY_H
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+
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+/*
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+ * Override macros used in arch/mips/kernel/head.S.
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+ */
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+ .macro kernel_entry_setup
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+#ifdef CONFIG_CPU_LOONGSON3
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+ .set push
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+ .set mips64
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+ /* Set LPA on LOONGSON3 config3 */
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+ mfc0 t0, $16, 3
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+ or t0, (0x1 << 7)
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+ mtc0 t0, $16, 3
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+ /* Set ELPA on LOONGSON3 pagegrain */
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+ li t0, (0x1 << 29)
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+ mtc0 t0, $5, 1
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+ _ehb
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+ .set pop
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+#endif
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+ .endm
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+
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+/*
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+ * Do SMP slave processor setup.
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+ */
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+ .macro smp_slave_setup
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+#ifdef CONFIG_CPU_LOONGSON3
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+ .set push
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+ .set mips64
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+ /* Set LPA on LOONGSON3 config3 */
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+ mfc0 t0, $16, 3
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+ or t0, (0x1 << 7)
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+ mtc0 t0, $16, 3
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+ /* Set ELPA on LOONGSON3 pagegrain */
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+ li t0, (0x1 << 29)
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+ mtc0 t0, $5, 1
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+ _ehb
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+ .set pop
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+#endif
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+ .endm
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+
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+#endif /* __ASM_MACH_LOONGSON_KERNEL_ENTRY_H */
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diff --git a/arch/mips/include/asm/mach-loongson/mmzone.h b/arch/mips/include/asm/mach-loongson/mmzone.h
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new file mode 100644
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index 0000000..37c08a2
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-loongson/mmzone.h
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@@ -0,0 +1,53 @@
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+/*
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+ * Copyright (C) 2010 Loongson Inc. & Lemote Inc. &
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+ * Insititute of Computing Technology
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+ * Author: Xiang Gao, gaoxiang@ict.ac.cn
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+ * Huacai Chen, chenhc@lemote.com
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+ * Xiaofu Meng, Shuangshuang Zhang
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ */
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+#ifndef _ASM_MACH_MMZONE_H
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+#define _ASM_MACH_MMZONE_H
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+
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+#include <boot_param.h>
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+#define NODE_ADDRSPACE_SHIFT 44
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+#define NODE0_ADDRSPACE_OFFSET 0x000000000000UL
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+#define NODE1_ADDRSPACE_OFFSET 0x100000000000UL
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+#define NODE2_ADDRSPACE_OFFSET 0x200000000000UL
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+#define NODE3_ADDRSPACE_OFFSET 0x300000000000UL
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+
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+#define pa_to_nid(addr) (((addr) & 0xf00000000000) >> NODE_ADDRSPACE_SHIFT)
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+
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+#define LEVELS_PER_SLICE 128
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+
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+struct slice_data {
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+ unsigned long irq_enable_mask[2];
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+ int level_to_irq[LEVELS_PER_SLICE];
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+};
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+
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+struct hub_data {
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+ cpumask_t h_cpus;
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+ unsigned long slice_map;
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+ unsigned long irq_alloc_mask[2];
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+ struct slice_data slice[2];
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+};
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+
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+struct node_data {
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+ struct pglist_data pglist;
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+ struct hub_data hub;
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+ cpumask_t cpumask;
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+};
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+
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+extern struct node_data *__node_data[];
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+
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+#define NODE_DATA(n) (&__node_data[(n)]->pglist)
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+#define hub_data(n) (&__node_data[(n)]->hub)
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+
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+extern void setup_zero_pages(void);
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+extern void __init prom_init_numa_memory(void);
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+
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+#endif /* _ASM_MACH_MMZONE_H */
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diff --git a/arch/mips/include/asm/mach-loongson/topology.h b/arch/mips/include/asm/mach-loongson/topology.h
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new file mode 100644
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index 0000000..5598ba7
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-loongson/topology.h
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@@ -0,0 +1,23 @@
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+#ifndef _ASM_MACH_TOPOLOGY_H
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+#define _ASM_MACH_TOPOLOGY_H
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+
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+#ifdef CONFIG_NUMA
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+
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+#define cpu_to_node(cpu) ((cpu) >> 2)
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+#define parent_node(node) (node)
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+#define cpumask_of_node(node) (&__node_data[(node)]->cpumask)
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+
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+struct pci_bus;
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+extern int pcibus_to_node(struct pci_bus *);
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+
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+#define cpumask_of_pcibus(bus) (cpu_online_mask)
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+
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+extern unsigned char __node_distances[MAX_NUMNODES][MAX_NUMNODES];
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+
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+#define node_distance(from, to) (__node_distances[(from)][(to)])
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+
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+#endif
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+
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+#include <asm-generic/topology.h>
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+
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+#endif /* _ASM_MACH_TOPOLOGY_H */
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diff --git a/arch/mips/include/asm/sparsemem.h b/arch/mips/include/asm/sparsemem.h
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index d2da53c..b1071c1 100644
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--- a/arch/mips/include/asm/sparsemem.h
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+++ b/arch/mips/include/asm/sparsemem.h
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@@ -11,7 +11,7 @@
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#else
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# define SECTION_SIZE_BITS 28
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#endif
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-#define MAX_PHYSMEM_BITS 35
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+#define MAX_PHYSMEM_BITS 48
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#endif /* CONFIG_SPARSEMEM */
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#endif /* _MIPS_SPARSEMEM_H */
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diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
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index 2f01201..7c1fe2b 100644
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--- a/arch/mips/kernel/setup.c
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+++ b/arch/mips/kernel/setup.c
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@@ -282,7 +282,7 @@ static unsigned long __init init_initrd(void)
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* Initialize the bootmem allocator. It also setup initrd related data
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* if needed.
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*/
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-#ifdef CONFIG_SGI_IP27
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+#if defined(CONFIG_SGI_IP27) || (defined(CONFIG_CPU_LOONGSON3) && defined(CONFIG_NUMA))
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static void __init bootmem_init(void)
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{
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diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig
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index e6a86cc..a14a50d 100644
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--- a/arch/mips/loongson/Kconfig
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+++ b/arch/mips/loongson/Kconfig
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@@ -79,6 +79,7 @@ config LEMOTE_MACH3A
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select SYS_HAS_EARLY_PRINTK
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select SYS_SUPPORTS_SMP
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select SYS_SUPPORTS_HOTPLUG_CPU
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+ select SYS_SUPPORTS_NUMA
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select SYS_SUPPORTS_64BIT_KERNEL
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select SYS_SUPPORTS_HIGHMEM
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select SYS_SUPPORTS_LITTLE_ENDIAN
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diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c
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index dc59241..33a13b9 100644
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--- a/arch/mips/loongson/common/env.c
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+++ b/arch/mips/loongson/common/env.c
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@@ -80,17 +80,24 @@ void __init prom_init_env(void)
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cpu_clock_freq = ecpu->cpu_clock_freq;
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loongson_sysconf.cputype = ecpu->cputype;
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if (ecpu->cputype == Loongson_3A) {
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+ loongson_sysconf.cores_per_node = 4;
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+ loongson_sysconf.cores_per_package = 4;
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loongson_chipcfg[0] = 0x900000001fe00180;
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loongson_chipcfg[1] = 0x900010001fe00180;
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loongson_chipcfg[2] = 0x900020001fe00180;
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loongson_chipcfg[3] = 0x900030001fe00180;
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} else {
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+ loongson_sysconf.cores_per_node = 1;
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+ loongson_sysconf.cores_per_package = 1;
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loongson_chipcfg[0] = 0x900000001fe00180;
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}
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loongson_sysconf.nr_cpus = ecpu->nr_cpus;
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if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0)
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loongson_sysconf.nr_cpus = NR_CPUS;
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+ loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
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+ loongson_sysconf.cores_per_node - 1) /
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+ loongson_sysconf.cores_per_node;
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loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
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loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
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diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c
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index f37fe54..f6af3ab 100644
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--- a/arch/mips/loongson/common/init.c
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+++ b/arch/mips/loongson/common/init.c
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@@ -30,7 +30,11 @@ void __init prom_init(void)
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set_io_port_base((unsigned long)
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ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE));
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+#ifdef CONFIG_NUMA
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+ prom_init_numa_memory();
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+#else
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prom_init_memory();
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+#endif
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/*init the uart base address */
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prom_init_uart_base();
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diff --git a/arch/mips/loongson/loongson-3/Makefile b/arch/mips/loongson/loongson-3/Makefile
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index 70152b2..471b0f2a 100644
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--- a/arch/mips/loongson/loongson-3/Makefile
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+++ b/arch/mips/loongson/loongson-3/Makefile
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@@ -4,3 +4,5 @@
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obj-y += irq.o
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obj-$(CONFIG_SMP) += smp.o
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+
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+obj-$(CONFIG_NUMA) += numa.o
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diff --git a/arch/mips/loongson/loongson-3/numa.c b/arch/mips/loongson/loongson-3/numa.c
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new file mode 100644
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index 0000000..ca025a6
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--- /dev/null
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+++ b/arch/mips/loongson/loongson-3/numa.c
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@@ -0,0 +1,291 @@
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+/*
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+ * Copyright (C) 2010 Loongson Inc. & Lemote Inc. &
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+ * Insititute of Computing Technology
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+ * Author: Xiang Gao, gaoxiang@ict.ac.cn
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+ * Huacai Chen, chenhc@lemote.com
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+ * Xiaofu Meng, Shuangshuang Zhang
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ */
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/mm.h>
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+#include <linux/mmzone.h>
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+#include <linux/module.h>
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+#include <linux/nodemask.h>
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+#include <linux/swap.h>
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+#include <linux/memblock.h>
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+#include <linux/bootmem.h>
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+#include <linux/pfn.h>
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+#include <linux/highmem.h>
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+#include <asm/page.h>
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+#include <asm/pgalloc.h>
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+#include <asm/sections.h>
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+#include <linux/bootmem.h>
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+#include <linux/init.h>
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+#include <linux/irq.h>
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+#include <asm/bootinfo.h>
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+#include <asm/mc146818-time.h>
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+#include <asm/time.h>
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+#include <asm/wbflush.h>
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+#include <boot_param.h>
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+
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+static struct node_data prealloc__node_data[MAX_NUMNODES];
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+unsigned char __node_distances[MAX_NUMNODES][MAX_NUMNODES];
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+struct node_data *__node_data[MAX_NUMNODES];
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+EXPORT_SYMBOL(__node_data);
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+
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+static void enable_lpa(void)
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+{
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+ unsigned long value;
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+
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+ value = __read_32bit_c0_register($16, 3);
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+ value |= 0x00000080;
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+ __write_32bit_c0_register($16, 3, value);
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+ value = __read_32bit_c0_register($16, 3);
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+ pr_info("CP0_Config3: CP0 16.3 (0x%lx)\n", value);
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+
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+ value = __read_32bit_c0_register($5, 1);
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+ value |= 0x20000000;
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+ __write_32bit_c0_register($5, 1, value);
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+ value = __read_32bit_c0_register($5, 1);
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+ pr_info("CP0_PageGrain: CP0 5.1 (0x%lx)\n", value);
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+}
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+
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+static void cpu_node_probe(void)
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+{
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+ int i;
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+
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+ nodes_clear(node_possible_map);
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+ nodes_clear(node_online_map);
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+ for (i = 0; i < loongson_sysconf.nr_nodes; i++) {
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+ node_set_state(num_online_nodes(), N_POSSIBLE);
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+ node_set_online(num_online_nodes());
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+ }
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+
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+ pr_info("NUMA: Discovered %d cpus on %d nodes\n",
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+ loongson_sysconf.nr_cpus, num_online_nodes());
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+}
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+
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+static int __init compute_node_distance(int row, int col)
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+{
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+ int package_row = row * loongson_sysconf.cores_per_node /
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+ loongson_sysconf.cores_per_package;
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+ int package_col = col * loongson_sysconf.cores_per_node /
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+ loongson_sysconf.cores_per_package;
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+
|
|
+ if (col == row)
|
|
+ return 0;
|
|
+ else if (package_row == package_col)
|
|
+ return 40;
|
|
+ else
|
|
+ return 100;
|
|
+}
|
|
+
|
|
+static void __init init_topology_matrix(void)
|
|
+{
|
|
+ int row, col;
|
|
+
|
|
+ for (row = 0; row < MAX_NUMNODES; row++)
|
|
+ for (col = 0; col < MAX_NUMNODES; col++)
|
|
+ __node_distances[row][col] = -1;
|
|
+
|
|
+ for_each_online_node(row) {
|
|
+ for_each_online_node(col) {
|
|
+ __node_distances[row][col] =
|
|
+ compute_node_distance(row, col);
|
|
+ }
|
|
+ }
|
|
+}
|
|
+
|
|
+static unsigned long nid_to_addroffset(unsigned int nid)
|
|
+{
|
|
+ unsigned long result;
|
|
+ switch (nid) {
|
|
+ case 0:
|
|
+ default:
|
|
+ result = NODE0_ADDRSPACE_OFFSET;
|
|
+ break;
|
|
+ case 1:
|
|
+ result = NODE1_ADDRSPACE_OFFSET;
|
|
+ break;
|
|
+ case 2:
|
|
+ result = NODE2_ADDRSPACE_OFFSET;
|
|
+ break;
|
|
+ case 3:
|
|
+ result = NODE3_ADDRSPACE_OFFSET;
|
|
+ break;
|
|
+ }
|
|
+ return result;
|
|
+}
|
|
+
|
|
+static void __init szmem(unsigned int node)
|
|
+{
|
|
+ u32 i, mem_type;
|
|
+ static unsigned long num_physpages = 0;
|
|
+ u64 node_id, node_psize, start_pfn, end_pfn, mem_start, mem_size;
|
|
+
|
|
+ /* Parse memory information and activate */
|
|
+ for (i = 0; i < loongson_memmap->nr_map; i++) {
|
|
+ node_id = loongson_memmap->map[i].node_id;
|
|
+ if (node_id != node)
|
|
+ continue;
|
|
+
|
|
+ mem_type = loongson_memmap->map[i].mem_type;
|
|
+ mem_size = loongson_memmap->map[i].mem_size;
|
|
+ mem_start = loongson_memmap->map[i].mem_start;
|
|
+
|
|
+ switch (mem_type) {
|
|
+ case SYSTEM_RAM_LOW:
|
|
+ start_pfn = ((node_id << 44) + mem_start) >> PAGE_SHIFT;
|
|
+ node_psize = (mem_size << 20) >> PAGE_SHIFT;
|
|
+ end_pfn = start_pfn + node_psize;
|
|
+ num_physpages += node_psize;
|
|
+ pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
|
|
+ (u32)node_id, mem_type, mem_start, mem_size);
|
|
+ pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
|
|
+ start_pfn, end_pfn, num_physpages);
|
|
+ add_memory_region((node_id << 44) + mem_start,
|
|
+ (u64)mem_size << 20, BOOT_MEM_RAM);
|
|
+ memblock_add_node(PFN_PHYS(start_pfn),
|
|
+ PFN_PHYS(end_pfn - start_pfn), node);
|
|
+ break;
|
|
+ case SYSTEM_RAM_HIGH:
|
|
+ start_pfn = ((node_id << 44) + mem_start) >> PAGE_SHIFT;
|
|
+ node_psize = (mem_size << 20) >> PAGE_SHIFT;
|
|
+ end_pfn = start_pfn + node_psize;
|
|
+ num_physpages += node_psize;
|
|
+ pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
|
|
+ (u32)node_id, mem_type, mem_start, mem_size);
|
|
+ pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
|
|
+ start_pfn, end_pfn, num_physpages);
|
|
+ add_memory_region((node_id << 44) + mem_start,
|
|
+ (u64)mem_size << 20, BOOT_MEM_RAM);
|
|
+ memblock_add_node(PFN_PHYS(start_pfn),
|
|
+ PFN_PHYS(end_pfn - start_pfn), node);
|
|
+ break;
|
|
+ case MEM_RESERVED:
|
|
+ pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
|
|
+ (u32)node_id, mem_type, mem_start, mem_size);
|
|
+ add_memory_region((node_id << 44) + mem_start,
|
|
+ (u64)mem_size << 20, BOOT_MEM_RESERVED);
|
|
+ memblock_reserve(((node_id << 44) + mem_start),
|
|
+ mem_size << 20);
|
|
+ break;
|
|
+ }
|
|
+ }
|
|
+}
|
|
+
|
|
+static void __init node_mem_init(unsigned int node)
|
|
+{
|
|
+ unsigned long bootmap_size;
|
|
+ unsigned long node_addrspace_offset;
|
|
+ unsigned long start_pfn, end_pfn, freepfn;
|
|
+
|
|
+ node_addrspace_offset = nid_to_addroffset(node);
|
|
+ pr_info("Node%d's addrspace_offset is 0x%lx\n",
|
|
+ node, node_addrspace_offset);
|
|
+
|
|
+ get_pfn_range_for_nid(node, &start_pfn, &end_pfn);
|
|
+ freepfn = start_pfn;
|
|
+ if (node == 0)
|
|
+ freepfn = PFN_UP(__pa_symbol(&_end)); /* kernel end address */
|
|
+ pr_info("Node%d: start_pfn=0x%lx, end_pfn=0x%lx, freepfn=0x%lx\n",
|
|
+ node, start_pfn, end_pfn, freepfn);
|
|
+
|
|
+ __node_data[node] = prealloc__node_data + node;
|
|
+
|
|
+ NODE_DATA(node)->bdata = &bootmem_node_data[node];
|
|
+ NODE_DATA(node)->node_start_pfn = start_pfn;
|
|
+ NODE_DATA(node)->node_spanned_pages = end_pfn - start_pfn;
|
|
+
|
|
+ bootmap_size = init_bootmem_node(NODE_DATA(node), freepfn,
|
|
+ start_pfn, end_pfn);
|
|
+ free_bootmem_with_active_regions(node, end_pfn);
|
|
+ if (node == 0) /* used by finalize_initrd() */
|
|
+ max_low_pfn = end_pfn;
|
|
+
|
|
+ /* This is reserved for the kernel and bdata->node_bootmem_map */
|
|
+ reserve_bootmem_node(NODE_DATA(node), start_pfn << PAGE_SHIFT,
|
|
+ ((freepfn - start_pfn) << PAGE_SHIFT) + bootmap_size,
|
|
+ BOOTMEM_DEFAULT);
|
|
+
|
|
+ if (node == 0 && node_end_pfn(0) >= (0xffffffff >> PAGE_SHIFT)) {
|
|
+ /* Reserve 0xff800000~0xffffffff for RS780E integrated GPU */
|
|
+ reserve_bootmem_node(NODE_DATA(node),
|
|
+ (node_addrspace_offset | 0xff800000),
|
|
+ 8 << 20, BOOTMEM_DEFAULT);
|
|
+ }
|
|
+
|
|
+ sparse_memory_present_with_active_regions(node);
|
|
+}
|
|
+
|
|
+static __init void prom_meminit(void)
|
|
+{
|
|
+ unsigned int node, cpu;
|
|
+
|
|
+ cpu_node_probe();
|
|
+ init_topology_matrix();
|
|
+
|
|
+ for (node = 0; node < loongson_sysconf.nr_nodes; node++) {
|
|
+ if (node_online(node)) {
|
|
+ szmem(node);
|
|
+ node_mem_init(node);
|
|
+ cpus_clear(__node_data[(node)]->cpumask);
|
|
+ }
|
|
+ }
|
|
+ for (cpu = 0; cpu < loongson_sysconf.nr_cpus; cpu++) {
|
|
+ node = cpu / loongson_sysconf.cores_per_node;
|
|
+ if (node >= num_online_nodes())
|
|
+ node = 0;
|
|
+ pr_info("NUMA: set cpumask cpu %d on node %d\n", cpu, node);
|
|
+ cpu_set(cpu, __node_data[(node)]->cpumask);
|
|
+ }
|
|
+}
|
|
+
|
|
+void __init paging_init(void)
|
|
+{
|
|
+ unsigned node;
|
|
+ unsigned long zones_size[MAX_NR_ZONES] = {0, };
|
|
+
|
|
+ pagetable_init();
|
|
+
|
|
+ for_each_online_node(node) {
|
|
+ unsigned long start_pfn, end_pfn;
|
|
+
|
|
+ get_pfn_range_for_nid(node, &start_pfn, &end_pfn);
|
|
+
|
|
+ if (end_pfn > max_low_pfn)
|
|
+ max_low_pfn = end_pfn;
|
|
+ }
|
|
+#ifdef CONFIG_ZONE_DMA32
|
|
+ zones_size[ZONE_DMA32] = MAX_DMA32_PFN;
|
|
+#endif
|
|
+ zones_size[ZONE_NORMAL] = max_low_pfn;
|
|
+ free_area_init_nodes(zones_size);
|
|
+}
|
|
+
|
|
+void __init mem_init(void)
|
|
+{
|
|
+ high_memory = (void *) __va(get_num_physpages() << PAGE_SHIFT);
|
|
+ free_all_bootmem();
|
|
+ setup_zero_pages(); /* This comes from node 0 */
|
|
+ mem_init_print_info(NULL);
|
|
+}
|
|
+
|
|
+/* All PCI device belongs to logical Node-0 */
|
|
+int pcibus_to_node(struct pci_bus *bus)
|
|
+{
|
|
+ return 0;
|
|
+}
|
|
+EXPORT_SYMBOL(pcibus_to_node);
|
|
+
|
|
+void __init prom_init_numa_memory(void)
|
|
+{
|
|
+ enable_lpa();
|
|
+ prom_meminit();
|
|
+}
|
|
+EXPORT_SYMBOL(prom_init_numa_memory);
|
|
diff --git a/arch/mips/loongson/loongson-3/smp.c b/arch/mips/loongson/loongson-3/smp.c
|
|
index 3c320e7..ed0e2d0 100644
|
|
--- a/arch/mips/loongson/loongson-3/smp.c
|
|
+++ b/arch/mips/loongson/loongson-3/smp.c
|
|
@@ -203,6 +203,8 @@ static void loongson3_init_secondary(void)
|
|
for (i = 0; i < loongson_sysconf.nr_cpus; i++)
|
|
loongson3_ipi_write32(0xffffffff, ipi_en0_regs[i]);
|
|
|
|
+ cpu_data[cpu].package = cpu / loongson_sysconf.cores_per_package;
|
|
+ cpu_data[cpu].core = cpu % loongson_sysconf.cores_per_package;
|
|
per_cpu(cpu_state, cpu) = CPU_ONLINE;
|
|
|
|
i = 0;
|
|
@@ -394,17 +396,19 @@ static int loongson3_cpu_callback(struct notifier_block *nfb,
|
|
unsigned long action, void *hcpu)
|
|
{
|
|
unsigned int cpu = (unsigned long)hcpu;
|
|
+ uint64_t core_id = cpu_data[cpu].core;
|
|
+ uint64_t package_id = cpu_data[cpu].package;
|
|
|
|
switch (action) {
|
|
case CPU_POST_DEAD:
|
|
case CPU_POST_DEAD_FROZEN:
|
|
pr_info("Disable clock for CPU#%d\n", cpu);
|
|
- LOONGSON_CHIPCFG(0) &= ~(1 << (12 + cpu));
|
|
+ LOONGSON_CHIPCFG(package_id) &= ~(1 << (12 + core_id));
|
|
break;
|
|
case CPU_UP_PREPARE:
|
|
case CPU_UP_PREPARE_FROZEN:
|
|
pr_info("Enable clock for CPU#%d\n", cpu);
|
|
- LOONGSON_CHIPCFG(0) |= 1 << (12 + cpu);
|
|
+ LOONGSON_CHIPCFG(package_id) |= 1 << (12 + core_id);
|
|
break;
|
|
}
|
|
|
|
--
|
|
1.7.10.4
|
|
|