61 lines
2.3 KiB
Diff
61 lines
2.3 KiB
Diff
From b580b7eedc8ee3990b118003c4793291387c40ac Mon Sep 17 00:00:00 2001
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From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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Date: Fri, 21 Jun 2013 11:38:28 +0200
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Subject: [PATCH] gpu: i915: allow the user not to do the wbinvd
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Origin: https://www.kernel.org/pub/linux/kernel/projects/rt/3.10/patches-3.10.10-rt7.tar.xz
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The wbinvd() renders the system with i915 unusable on RT. Using this
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expensive instruction avoids GPU trouble according to
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https://bugs.freedesktop.org/show_bug.cgi?id=62191
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As a workaround for RT it is recommended to pin each GPU related process
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to the same CPU and then disable this instruction via the module
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paramter.
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Cc: stable-rt@vger.kernel.org
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Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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---
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drivers/gpu/drm/i915/i915_gem.c | 17 +++++++++++++++--
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1 file changed, 15 insertions(+), 2 deletions(-)
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--- a/drivers/gpu/drm/i915/i915_gem.c
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+++ b/drivers/gpu/drm/i915/i915_gem.c
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@@ -35,6 +35,7 @@
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#include <linux/swap.h>
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#include <linux/pci.h>
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#include <linux/dma-buf.h>
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+#include <linux/module.h>
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static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
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static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj);
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@@ -2713,6 +2714,10 @@ static inline int fence_number(struct dr
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return fence - dev_priv->fence_regs;
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}
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+static bool do_wbinvd = true;
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+module_param(do_wbinvd, bool, 0644);
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+MODULE_PARM_DESC(do_wbinvd, "Do expensive synchronization. Say no after you pin each GPU process to the same CPU in order to lower the latency.");
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+
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static void i915_gem_write_fence__ipi(void *data)
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{
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wbinvd();
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@@ -2736,8 +2741,16 @@ static void i915_gem_object_update_fence
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* on each processor in order to manually flush all memory
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* transactions before updating the fence register.
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*/
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- if (HAS_LLC(obj->base.dev))
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- on_each_cpu(i915_gem_write_fence__ipi, NULL, 1);
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+ if (HAS_LLC(obj->base.dev)) {
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+ if (do_wbinvd) {
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+#ifdef CONFIG_PREEMPT_RT_FULL
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+ pr_err_once("WARNING! The i915 invalidates all caches which increases the latency.");
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+ pr_err_once("As a workaround use 'i915.do_wbinvd=no' and PIN each process doing ");
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+ pr_err_once("any kind of GPU activity to the same CPU to avoid problems.");
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+#endif
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+ on_each_cpu(i915_gem_write_fence__ipi, NULL, 1);
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+ }
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+ }
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i915_gem_write_fence(dev, fence_reg, enable ? obj : NULL);
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if (enable) {
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