59 lines
2.0 KiB
Diff
59 lines
2.0 KiB
Diff
From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Mon, 19 Aug 2019 17:24:07 +0200
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Subject: KVM: x86: use Intel speculation bugs and features as derived in
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generic x86 code
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commit 0c54914d0c52a15db9954a76ce80fee32cf318f4 upstream
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Similar to AMD bits, set the Intel bits from the vendor-independent
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feature and bug flags, because KVM_GET_SUPPORTED_CPUID does not care
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about the vendor and they should be set on AMD processors as well.
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Suggested-by: Jim Mattson <jmattson@google.com>
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Reviewed-by: Jim Mattson <jmattson@google.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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---
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arch/x86/kvm/cpuid.c | 8 ++++++++
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arch/x86/kvm/x86.c | 8 ++++++++
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2 files changed, 16 insertions(+)
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--- a/arch/x86/kvm/cpuid.c
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+++ b/arch/x86/kvm/cpuid.c
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@@ -501,8 +501,16 @@ static inline int __do_cpuid_ent(struct
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/* PKU is not yet implemented for shadow paging. */
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if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
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entry->ecx &= ~F(PKU);
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+
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entry->edx &= kvm_cpuid_7_0_edx_x86_features;
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cpuid_mask(&entry->edx, CPUID_7_EDX);
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+ if (boot_cpu_has(X86_FEATURE_IBPB) &&
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+ boot_cpu_has(X86_FEATURE_IBRS))
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+ entry->edx |= F(SPEC_CTRL);
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+ if (boot_cpu_has(X86_FEATURE_STIBP))
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+ entry->edx |= F(INTEL_STIBP);
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+ if (boot_cpu_has(X86_FEATURE_SSBD))
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+ entry->edx |= F(SPEC_CTRL_SSBD);
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/*
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* We emulate ARCH_CAPABILITIES in software even
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* if the host doesn't support it.
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--- a/arch/x86/kvm/x86.c
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+++ b/arch/x86/kvm/x86.c
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@@ -1127,8 +1127,16 @@ u64 kvm_get_arch_capabilities(void)
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if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
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data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
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+ if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
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+ data |= ARCH_CAP_RDCL_NO;
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+ if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
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+ data |= ARCH_CAP_SSB_NO;
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+ if (!boot_cpu_has_bug(X86_BUG_MDS))
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+ data |= ARCH_CAP_MDS_NO;
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+
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return data;
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}
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+
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EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities);
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static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
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