68 lines
2.2 KiB
Diff
68 lines
2.2 KiB
Diff
From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Sun, 27 Oct 2019 09:36:37 +0100
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Subject: KVM: vmx, svm: always run with EFER.NXE=1 when shadow paging is
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active
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commit 9167ab79936206118cc60e47dcb926c3489f3bd5 upstream
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VMX already does so if the host has SMEP, in order to support the combination of
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CR0.WP=1 and CR4.SMEP=1. However, it is perfectly safe to always do so, and in
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fact VMX also ends up running with EFER.NXE=1 on old processors that lack the
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"load EFER" controls, because it may help avoiding a slow MSR write.
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SVM does not have similar code, but it should since recent AMD processors do
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support SMEP. So this patch makes the code for the two vendors simpler and
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more similar, while fixing an issue with CR0.WP=1 and CR4.SMEP=1 on AMD.
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Cc: Joerg Roedel <jroedel@suse.de>
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Cc: stable@vger.kernel.org
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---
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arch/x86/kvm/svm.c | 10 ++++++++--
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arch/x86/kvm/vmx.c | 14 +++-----------
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2 files changed, 11 insertions(+), 13 deletions(-)
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--- a/arch/x86/kvm/svm.c
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+++ b/arch/x86/kvm/svm.c
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@@ -736,8 +736,14 @@ static int get_npt_level(struct kvm_vcpu
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static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
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{
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vcpu->arch.efer = efer;
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- if (!npt_enabled && !(efer & EFER_LMA))
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- efer &= ~EFER_LME;
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+
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+ if (!npt_enabled) {
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+ /* Shadow paging assumes NX to be available. */
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+ efer |= EFER_NX;
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+
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+ if (!(efer & EFER_LMA))
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+ efer &= ~EFER_LME;
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+ }
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to_svm(vcpu)->vmcb->save.efer = efer | EFER_SVME;
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mark_dirty(to_svm(vcpu)->vmcb, VMCB_CR);
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--- a/arch/x86/kvm/vmx.c
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+++ b/arch/x86/kvm/vmx.c
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@@ -2785,17 +2785,9 @@ static bool update_transition_efer(struc
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u64 guest_efer = vmx->vcpu.arch.efer;
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u64 ignore_bits = 0;
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- if (!enable_ept) {
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- /*
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- * NX is needed to handle CR0.WP=1, CR4.SMEP=1. Testing
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- * host CPUID is more efficient than testing guest CPUID
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- * or CR4. Host SMEP is anyway a requirement for guest SMEP.
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- */
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- if (boot_cpu_has(X86_FEATURE_SMEP))
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- guest_efer |= EFER_NX;
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- else if (!(guest_efer & EFER_NX))
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- ignore_bits |= EFER_NX;
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- }
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+ /* Shadow paging assumes NX to be available. */
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+ if (!enable_ept)
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+ guest_efer |= EFER_NX;
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/*
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* LMA and LME handled by hardware; SCE meaningless outside long mode.
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