68 lines
2.1 KiB
Diff
68 lines
2.1 KiB
Diff
From foo@baz Mon May 21 21:56:07 CEST 2018
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From: Linus Torvalds <torvalds@linux-foundation.org>
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Date: Tue, 1 May 2018 15:55:51 +0200
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Subject: x86/nospec: Simplify alternative_msr_write()
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From: Linus Torvalds <torvalds@linux-foundation.org>
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commit 1aa7a5735a41418d8e01fa7c9565eb2657e2ea3f upstream
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The macro is not type safe and I did look for why that "g" constraint for
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the asm doesn't work: it's because the asm is more fundamentally wrong.
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It does
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movl %[val], %%eax
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but "val" isn't a 32-bit value, so then gcc will pass it in a register,
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and generate code like
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movl %rsi, %eax
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and gas will complain about a nonsensical 'mov' instruction (it's moving a
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64-bit register to a 32-bit one).
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Passing it through memory will just hide the real bug - gcc still thinks
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the memory location is 64-bit, but the "movl" will only load the first 32
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bits and it all happens to work because x86 is little-endian.
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Convert it to a type safe inline function with a little trick which hands
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the feature into the ALTERNATIVE macro.
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Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Reviewed-by: Ingo Molnar <mingo@kernel.org>
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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arch/x86/include/asm/nospec-branch.h | 19 ++++++++++---------
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1 file changed, 10 insertions(+), 9 deletions(-)
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--- a/arch/x86/include/asm/nospec-branch.h
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+++ b/arch/x86/include/asm/nospec-branch.h
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@@ -241,15 +241,16 @@ static inline void vmexit_fill_RSB(void)
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#endif
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}
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-#define alternative_msr_write(_msr, _val, _feature) \
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- asm volatile(ALTERNATIVE("", \
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- "movl %[msr], %%ecx\n\t" \
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- "movl %[val], %%eax\n\t" \
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- "movl $0, %%edx\n\t" \
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- "wrmsr", \
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- _feature) \
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- : : [msr] "i" (_msr), [val] "i" (_val) \
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- : "eax", "ecx", "edx", "memory")
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+static __always_inline
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+void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)
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+{
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+ asm volatile(ALTERNATIVE("", "wrmsr", %c[feature])
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+ : : "c" (msr),
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+ "a" (val),
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+ "d" (val >> 32),
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+ [feature] "i" (feature)
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+ : "memory");
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+}
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static inline void indirect_branch_prediction_barrier(void)
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{
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