34 lines
1.4 KiB
Diff
34 lines
1.4 KiB
Diff
From: Jesse Barnes <jbarnes@virtuousgeek.org>
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Date: Thu, 21 Jun 2012 15:13:50 -0700
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Subject: drm/i915: prefer wide & slow to fast & narrow in DP configs
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commit 2514bc510d0c3aadcc5204056bb440fa36845147 upstream.
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High frequency link configurations have the potential to cause trouble
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with long and/or cheap cables, so prefer slow and wide configurations
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instead. This patch has the potential to cause trouble for eDP
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configurations that lie about available lanes, so if we run into that we
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can make it conditional on eDP.
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45801
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Tested-by: peter@colberg.org
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Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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---
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drivers/gpu/drm/i915/intel_dp.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/drivers/gpu/drm/i915/intel_dp.c
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+++ b/drivers/gpu/drm/i915/intel_dp.c
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@@ -708,8 +708,8 @@ intel_dp_mode_fixup(struct drm_encoder *
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bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;
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- for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
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- for (clock = 0; clock <= max_clock; clock++) {
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+ for (clock = 0; clock <= max_clock; clock++) {
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+ for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
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int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
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if (intel_dp_link_required(mode->clock, bpp)
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