43 lines
1.6 KiB
Diff
43 lines
1.6 KiB
Diff
From: Rob Kendrick <rob.kendrick@codethink.co.uk>
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Date: Wed, 23 Jul 2014 13:41:58 +0100
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Subject: MIPS: math-emu: cp1emu: Fix typo when returning to register file
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Origin: https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=8476cba1198d0869467d1d7bf0d5f8808a724986
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The commit 08a07904e182 (MIPS: math-emu: Remove most ifdefery) in
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v3.16-rc1 switched from build time to runtime detection for the CPU ISA
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level.
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However, along the way, a typo was introduced in the code path
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to return the value to the register file. Previously, the
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MIPSInst_FD macro was used but the above commit switched to
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MIPSInst_RT leading to regressions.
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Link: http://www.linux-mips.org/archives/linux-mips/2014-07/msg00484.html
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Reported-by: Rob Kendrick <rob.kendrick@codethink.co.uk>
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Reviewed-by: Paul Burton <paul.burton@imgtec.com>
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Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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Signed-off-by: Rob Kendrick <rob.kendrick@codethink.co.uk>
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Tested-by: Aurelien Jarno <aurelien@aurel32.net>
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Patchwork: http://patchwork.linux-mips.org/patch/7448/
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Signed-off-by: James Hogan <james.hogan@imgtec.com>
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---
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arch/mips/math-emu/cp1emu.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
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index 736c17a..bf0fc6b 100644
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--- a/arch/mips/math-emu/cp1emu.c
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+++ b/arch/mips/math-emu/cp1emu.c
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@@ -1827,7 +1827,7 @@ dcopuop:
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case -1:
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if (cpu_has_mips_4_5_r)
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- cbit = fpucondbit[MIPSInst_RT(ir) >> 2];
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+ cbit = fpucondbit[MIPSInst_FD(ir) >> 2];
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else
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cbit = FPU_CSR_COND;
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if (rv.w)
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--
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1.7.10.4
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