271 lines
9.9 KiB
Diff
271 lines
9.9 KiB
Diff
From: Sameeh Jubran <sameehj@amazon.com>
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Date: Tue, 11 Jun 2019 14:58:06 +0300
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Subject: [PATCH] net: ena: enable negotiating larger Rx ring size
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Origin: https://git.kernel.org/linus/31aa9857f1733403f2eb12d51c1cec20a22483d9
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Bug-Debian: https://bugs.debian.org/941291
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Use MAX_QUEUES_EXT get feature capability to query the device.
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Signed-off-by: Netanel Belgazal <netanel@amazon.com>
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Signed-off-by: Sameeh Jubran <sameehj@amazon.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/amazon/ena/ena_netdev.c | 144 ++++++++++++-------
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drivers/net/ethernet/amazon/ena/ena_netdev.h | 15 ++
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2 files changed, 110 insertions(+), 49 deletions(-)
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Index: linux/drivers/net/ethernet/amazon/ena/ena_netdev.c
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===================================================================
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--- linux.orig/drivers/net/ethernet/amazon/ena/ena_netdev.c
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+++ linux/drivers/net/ethernet/amazon/ena/ena_netdev.c
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@@ -2455,13 +2455,6 @@ static int ena_device_validate_params(st
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return -EINVAL;
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}
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- if ((get_feat_ctx->max_queues.max_cq_num < adapter->num_queues) ||
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- (get_feat_ctx->max_queues.max_sq_num < adapter->num_queues)) {
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- netif_err(adapter, drv, netdev,
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- "Error, device doesn't support enough queues\n");
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- return -EINVAL;
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- }
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-
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if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
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netif_err(adapter, drv, netdev,
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"Error, device max mtu is smaller than netdev MTU\n");
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@@ -3035,18 +3028,32 @@ static int ena_calc_io_queue_num(struct
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struct ena_com_dev *ena_dev,
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struct ena_com_dev_get_features_ctx *get_feat_ctx)
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{
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- int io_sq_num, io_queue_num;
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+ int io_tx_sq_num, io_tx_cq_num, io_rx_num, io_queue_num;
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+
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+ if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
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+ struct ena_admin_queue_ext_feature_fields *max_queue_ext =
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+ &get_feat_ctx->max_queue_ext.max_queue_ext;
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+ io_rx_num = min_t(int, max_queue_ext->max_rx_sq_num,
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+ max_queue_ext->max_rx_cq_num);
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- /* In case of LLQ use the llq number in the get feature cmd */
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+ io_tx_sq_num = max_queue_ext->max_tx_sq_num;
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+ io_tx_cq_num = max_queue_ext->max_tx_cq_num;
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+ } else {
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+ struct ena_admin_queue_feature_desc *max_queues =
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+ &get_feat_ctx->max_queues;
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+ io_tx_sq_num = max_queues->max_sq_num;
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+ io_tx_cq_num = max_queues->max_cq_num;
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+ io_rx_num = min_t(int, io_tx_sq_num, io_tx_cq_num);
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+ }
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+
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+ /* In case of LLQ use the llq fields for the tx SQ/CQ */
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if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
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- io_sq_num = get_feat_ctx->llq.max_llq_num;
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- else
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- io_sq_num = get_feat_ctx->max_queues.max_sq_num;
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+ io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
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io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
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- io_queue_num = min_t(int, io_queue_num, io_sq_num);
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- io_queue_num = min_t(int, io_queue_num,
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- get_feat_ctx->max_queues.max_cq_num);
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+ io_queue_num = min_t(int, io_queue_num, io_rx_num);
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+ io_queue_num = min_t(int, io_queue_num, io_tx_sq_num);
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+ io_queue_num = min_t(int, io_queue_num, io_tx_cq_num);
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/* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
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io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1);
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if (unlikely(!io_queue_num)) {
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@@ -3229,36 +3236,73 @@ static inline void set_default_llq_confi
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llq_config->llq_ring_entry_size_value = 128;
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}
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-static int ena_calc_queue_size(struct pci_dev *pdev,
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- struct ena_com_dev *ena_dev,
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- u16 *max_tx_sgl_size,
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- u16 *max_rx_sgl_size,
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- struct ena_com_dev_get_features_ctx *get_feat_ctx)
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-{
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- u32 queue_size = ENA_DEFAULT_RING_SIZE;
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-
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- queue_size = min_t(u32, queue_size,
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- get_feat_ctx->max_queues.max_cq_depth);
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- queue_size = min_t(u32, queue_size,
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- get_feat_ctx->max_queues.max_sq_depth);
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+static int ena_calc_queue_size(struct ena_calc_queue_size_ctx *ctx)
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+{
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+ struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
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+ struct ena_com_dev *ena_dev = ctx->ena_dev;
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+ u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
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+ u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
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+ u32 max_tx_queue_size;
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+ u32 max_rx_queue_size;
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+
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+ if (ctx->ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
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+ struct ena_admin_queue_ext_feature_fields *max_queue_ext =
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+ &ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
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+ max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
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+ max_queue_ext->max_rx_sq_depth);
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+ max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
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+
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+ if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
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+ max_tx_queue_size = min_t(u32, max_tx_queue_size,
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+ llq->max_llq_depth);
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+ else
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+ max_tx_queue_size = min_t(u32, max_tx_queue_size,
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+ max_queue_ext->max_tx_sq_depth);
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+
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+ ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
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+ max_queue_ext->max_per_packet_tx_descs);
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+ ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
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+ max_queue_ext->max_per_packet_rx_descs);
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+ } else {
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+ struct ena_admin_queue_feature_desc *max_queues =
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+ &ctx->get_feat_ctx->max_queues;
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+ max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
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+ max_queues->max_sq_depth);
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+ max_tx_queue_size = max_queues->max_cq_depth;
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+
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+ if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
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+ max_tx_queue_size = min_t(u32, max_tx_queue_size,
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+ llq->max_llq_depth);
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+ else
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+ max_tx_queue_size = min_t(u32, max_tx_queue_size,
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+ max_queues->max_sq_depth);
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- if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
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- queue_size = min_t(u32, queue_size,
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- get_feat_ctx->llq.max_llq_depth);
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+ ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
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+ max_queues->max_packet_tx_descs);
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+ ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
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+ max_queues->max_packet_rx_descs);
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+ }
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- queue_size = rounddown_pow_of_two(queue_size);
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+ max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
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+ max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
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- if (unlikely(!queue_size)) {
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- dev_err(&pdev->dev, "Invalid queue size\n");
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+ tx_queue_size = min_t(u32, tx_queue_size, max_tx_queue_size);
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+ rx_queue_size = min_t(u32, rx_queue_size, max_rx_queue_size);
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+
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+ tx_queue_size = rounddown_pow_of_two(tx_queue_size);
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+ rx_queue_size = rounddown_pow_of_two(rx_queue_size);
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+
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+ if (unlikely(!rx_queue_size || !tx_queue_size)) {
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+ dev_err(&ctx->pdev->dev, "Invalid queue size\n");
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return -EFAULT;
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}
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- *max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
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- get_feat_ctx->max_queues.max_packet_tx_descs);
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- *max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
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- get_feat_ctx->max_queues.max_packet_rx_descs);
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+ ctx->max_tx_queue_size = max_tx_queue_size;
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+ ctx->max_rx_queue_size = max_rx_queue_size;
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+ ctx->tx_queue_size = tx_queue_size;
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+ ctx->rx_queue_size = rx_queue_size;
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- return queue_size;
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+ return 0;
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}
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/* ena_probe - Device Initialization Routine
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@@ -3274,6 +3318,7 @@ static int ena_calc_queue_size(struct pc
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static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct ena_com_dev_get_features_ctx get_feat_ctx;
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+ struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
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struct ena_llq_configurations llq_config;
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struct ena_com_dev *ena_dev = NULL;
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struct ena_adapter *adapter;
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@@ -3281,9 +3326,6 @@ static int ena_probe(struct pci_dev *pde
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struct net_device *netdev;
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static int adapters_found;
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char *queue_type_str;
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- u16 tx_sgl_size = 0;
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- u16 rx_sgl_size = 0;
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- int queue_size;
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bool wd_state;
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dev_dbg(&pdev->dev, "%s\n", __func__);
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@@ -3340,20 +3382,25 @@ static int ena_probe(struct pci_dev *pde
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goto err_device_destroy;
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}
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+ calc_queue_ctx.ena_dev = ena_dev;
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+ calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
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+ calc_queue_ctx.pdev = pdev;
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+
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/* initial Tx interrupt delay, Assumes 1 usec granularity.
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* Updated during device initialization with the real granularity
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*/
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ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
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io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx);
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- queue_size = ena_calc_queue_size(pdev, ena_dev, &tx_sgl_size,
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- &rx_sgl_size, &get_feat_ctx);
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- if ((queue_size <= 0) || (io_queue_num <= 0)) {
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+ rc = ena_calc_queue_size(&calc_queue_ctx);
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+ if (rc || io_queue_num <= 0) {
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rc = -EFAULT;
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goto err_device_destroy;
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}
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- dev_info(&pdev->dev, "creating %d io queues. queue size: %d. LLQ is %s\n",
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- io_queue_num, queue_size,
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+ dev_info(&pdev->dev, "creating %d io queues. rx queue size: %d tx queue size. %d LLQ is %s\n",
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+ io_queue_num,
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+ calc_queue_ctx.rx_queue_size,
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+ calc_queue_ctx.tx_queue_size,
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(ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) ?
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"ENABLED" : "DISABLED");
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@@ -3379,11 +3426,10 @@ static int ena_probe(struct pci_dev *pde
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adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
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adapter->reset_reason = ENA_REGS_RESET_NORMAL;
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- adapter->tx_ring_size = queue_size;
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- adapter->rx_ring_size = queue_size;
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-
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- adapter->max_tx_sgl_size = tx_sgl_size;
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- adapter->max_rx_sgl_size = rx_sgl_size;
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+ adapter->tx_ring_size = calc_queue_ctx.tx_queue_size;
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+ adapter->rx_ring_size = calc_queue_ctx.rx_queue_size;
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+ adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
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+ adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
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adapter->num_queues = io_queue_num;
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adapter->last_monitored_tx_qid = 0;
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Index: linux/drivers/net/ethernet/amazon/ena/ena_netdev.h
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===================================================================
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--- linux.orig/drivers/net/ethernet/amazon/ena/ena_netdev.h
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+++ linux/drivers/net/ethernet/amazon/ena/ena_netdev.h
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@@ -154,6 +154,18 @@ struct ena_napi {
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u32 qid;
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};
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+struct ena_calc_queue_size_ctx {
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+ struct ena_com_dev_get_features_ctx *get_feat_ctx;
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+ struct ena_com_dev *ena_dev;
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+ struct pci_dev *pdev;
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+ u16 tx_queue_size;
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+ u16 rx_queue_size;
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+ u16 max_tx_queue_size;
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+ u16 max_rx_queue_size;
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+ u16 max_tx_sgl_size;
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+ u16 max_rx_sgl_size;
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+};
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+
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struct ena_tx_buffer {
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struct sk_buff *skb;
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/* num of ena desc for this specific skb
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@@ -321,6 +333,9 @@ struct ena_adapter {
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u32 tx_ring_size;
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u32 rx_ring_size;
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+ u32 max_tx_ring_size;
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+ u32 max_rx_ring_size;
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+
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u32 msg_enable;
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u16 max_tx_sgl_size;
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