118 lines
3.8 KiB
Diff
118 lines
3.8 KiB
Diff
From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Sat, 5 Sep 2015 17:02:59 +0200
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Subject: [2/2] MIPS: BPF: Fix build on pre-R2 little endian CPUs
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Origin: https://git.kernel.org/linus/b259e51f2e29390518021f9b8df55a3de42f371b
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The rotr, seh and wsbh instructions have been introduced with the R2
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ISA. Thus the current BPF code fails to build on pre-R2 little endian
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CPUs:
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CC arch/mips/net/bpf_jit.o
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AS arch/mips/net/bpf_jit_asm.o
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/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S: Assembler messages:
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/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:67: Error: opcode not supported on this processor: mips32 (mips32) `wsbh $8,$19'
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/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:68: Error: opcode not supported on this processor: mips32 (mips32) `rotr $19,$8,16'
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/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:83: Error: opcode not supported on this processor: mips32 (mips32) `wsbh $8,$19'
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/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:84: Error: opcode not supported on this processor: mips32 (mips32) `seh $19,$8'
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/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:151: Error: opcode not supported on this processor: mips32 (mips32) `wsbh $8,$12'
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/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:153: Error: opcode not supported on this processor: mips32 (mips32) `rotr $19,$8,16'
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/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:164: Error: opcode not supported on this processor: mips32 (mips32) `wsbh $19,$12'
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/home/aurel32/linux-4.2/scripts/Makefile.build:294: recipe for target 'arch/mips/net/bpf_jit_asm.o' failed
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Fix that by providing equivalent code for these CPUs.
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Cc: Ralf Baechle <ralf@linux-mips.org>
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Cc: Markos Chandras <markos.chandras@imgtec.com>
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Cc: stable@vger.kernel.org # v4.2+
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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---
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arch/mips/net/bpf_jit_asm.S | 42 ++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 42 insertions(+)
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diff --git a/arch/mips/net/bpf_jit_asm.S b/arch/mips/net/bpf_jit_asm.S
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index 4f54cb1..dabf417 100644
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--- a/arch/mips/net/bpf_jit_asm.S
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+++ b/arch/mips/net/bpf_jit_asm.S
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@@ -64,8 +64,20 @@ sk_load_word_positive:
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PTR_ADDU t1, $r_skb_data, offset
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lw $r_A, 0(t1)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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+# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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wsbh t0, $r_A
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rotr $r_A, t0, 16
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+# else
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+ sll t0, $r_A, 24
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+ srl t1, $r_A, 24
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+ srl t2, $r_A, 8
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+ or t0, t0, t1
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+ andi t2, t2, 0xff00
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+ andi t1, $r_A, 0xff00
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+ or t0, t0, t2
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+ sll t1, t1, 8
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+ or $r_A, t0, t1
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+# endif
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#endif
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jr $r_ra
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move $r_ret, zero
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@@ -80,8 +92,16 @@ sk_load_half_positive:
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PTR_ADDU t1, $r_skb_data, offset
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lh $r_A, 0(t1)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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+# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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wsbh t0, $r_A
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seh $r_A, t0
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+# else
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+ sll t0, $r_A, 24
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+ andi t1, $r_A, 0xff00
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+ sra t0, t0, 16
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+ srl t1, t1, 8
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+ or $r_A, t0, t1
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+# endif
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#endif
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jr $r_ra
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move $r_ret, zero
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@@ -148,9 +168,22 @@ sk_load_byte_positive:
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NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
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bpf_slow_path_common(4)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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+# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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wsbh t0, $r_s0
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jr $r_ra
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rotr $r_A, t0, 16
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+# else
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+ sll t0, $r_s0, 24
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+ srl t1, $r_s0, 24
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+ srl t2, $r_s0, 8
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+ or t0, t0, t1
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+ andi t2, t2, 0xff00
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+ andi t1, $r_s0, 0xff00
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+ or t0, t0, t2
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+ sll t1, t1, 8
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+ jr $r_ra
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+ or $r_A, t0, t1
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+# endif
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#else
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jr $r_ra
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move $r_A, $r_s0
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@@ -161,8 +194,17 @@ NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
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NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
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bpf_slow_path_common(2)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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+# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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jr $r_ra
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wsbh $r_A, $r_s0
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+# else
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+ sll t0, $r_s0, 8
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+ andi t1, $r_s0, 0xff00
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+ andi t0, t0, 0xff00
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+ srl t1, t1, 8
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+ jr $r_ra
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+ or $r_A, t0, t1
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+# endif
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#else
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jr $r_ra
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move $r_A, $r_s0
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--
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2.1.4
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