146 lines
4.9 KiB
Diff
146 lines
4.9 KiB
Diff
From: Huacai Chen <chenhc@lemote.com>
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Date: Thu, 26 Jun 2014 11:41:26 +0800
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Subject: [2/8] MIPS: Support CPU topology files in sysfs
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Origin: https://git.kernel.org/linus/bda4584cd943d7bb6cf677a8d694700c1984cf3e
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This patch is prepared for Loongson's NUMA support, it offer meaningful
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sysfs files such as physical_package_id, core_id, core_siblings and
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thread_siblings in /sys/devices/system/cpu/cpu?/topology.
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Signed-off-by: Huacai Chen <chenhc@lemote.com>
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Reviewed-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
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Cc: John Crispin <john@phrozen.org>
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Cc: Steven J. Hill <Steven.Hill@imgtec.com>
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Cc: Aurelien Jarno <aurelien@aurel32.net>
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Cc: linux-mips@linux-mips.org
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Cc: Fuxin Zhang <zhangfx@lemote.com>
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Cc: Zhangjin Wu <wuzhangjin@gmail.com>
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Patchwork: https://patchwork.linux-mips.org/patch/7184/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/include/asm/cpu-info.h | 1 +
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arch/mips/include/asm/smp.h | 6 ++++++
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arch/mips/kernel/proc.c | 1 +
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arch/mips/kernel/smp.c | 26 +++++++++++++++++++++++++-
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4 files changed, 33 insertions(+), 1 deletion(-)
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diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
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index a28e3de..6690d7a 100644
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--- a/arch/mips/include/asm/cpu-info.h
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+++ b/arch/mips/include/asm/cpu-info.h
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@@ -61,6 +61,7 @@ struct cpuinfo_mips {
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struct cache_desc scache; /* Secondary cache */
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struct cache_desc tcache; /* Tertiary/split secondary cache */
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int srsets; /* Shadow register sets */
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+ int package;/* physical package number */
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int core; /* physical core number */
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#ifdef CONFIG_64BIT
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int vmbits; /* Virtual memory size in bits */
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diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
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index b037334..1e0f20a 100644
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--- a/arch/mips/include/asm/smp.h
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+++ b/arch/mips/include/asm/smp.h
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@@ -22,6 +22,7 @@
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extern int smp_num_siblings;
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extern cpumask_t cpu_sibling_map[];
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+extern cpumask_t cpu_core_map[];
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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@@ -36,6 +37,11 @@ extern int __cpu_logical_map[NR_CPUS];
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#define NO_PROC_ID (-1)
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+#define topology_physical_package_id(cpu) (cpu_data[cpu].package)
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+#define topology_core_id(cpu) (cpu_data[cpu].core)
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+#define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
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+#define topology_thread_cpumask(cpu) (&cpu_sibling_map[cpu])
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+
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#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */
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#define SMP_CALL_FUNCTION 0x2
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/* Octeon - Tell another core to flush its icache */
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diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
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index 037a44d..62c4439 100644
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--- a/arch/mips/kernel/proc.c
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+++ b/arch/mips/kernel/proc.c
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@@ -123,6 +123,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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cpu_data[n].srsets);
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seq_printf(m, "kscratch registers\t: %d\n",
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hweight8(cpu_data[n].kscratch_mask));
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+ seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package);
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seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
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sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
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diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
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index 9bad52e..c94c4e9 100644
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--- a/arch/mips/kernel/smp.c
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+++ b/arch/mips/kernel/smp.c
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@@ -59,9 +59,16 @@ EXPORT_SYMBOL(smp_num_siblings);
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cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
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EXPORT_SYMBOL(cpu_sibling_map);
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+/* representing the core map of multi-core chips of each logical CPU */
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+cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
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+EXPORT_SYMBOL(cpu_core_map);
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+
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/* representing cpus for which sibling maps can be computed */
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static cpumask_t cpu_sibling_setup_map;
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+/* representing cpus for which core maps can be computed */
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+static cpumask_t cpu_core_setup_map;
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+
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cpumask_t cpu_coherent_mask;
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static inline void set_cpu_sibling_map(int cpu)
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@@ -72,7 +79,8 @@ static inline void set_cpu_sibling_map(int cpu)
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if (smp_num_siblings > 1) {
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for_each_cpu_mask(i, cpu_sibling_setup_map) {
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- if (cpu_data[cpu].core == cpu_data[i].core) {
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+ if (cpu_data[cpu].package == cpu_data[i].package &&
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+ cpu_data[cpu].core == cpu_data[i].core) {
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cpu_set(i, cpu_sibling_map[cpu]);
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cpu_set(cpu, cpu_sibling_map[i]);
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}
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@@ -81,6 +89,20 @@ static inline void set_cpu_sibling_map(int cpu)
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cpu_set(cpu, cpu_sibling_map[cpu]);
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}
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+static inline void set_cpu_core_map(int cpu)
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+{
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+ int i;
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+
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+ cpu_set(cpu, cpu_core_setup_map);
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+
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+ for_each_cpu_mask(i, cpu_core_setup_map) {
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+ if (cpu_data[cpu].package == cpu_data[i].package) {
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+ cpu_set(i, cpu_core_map[cpu]);
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+ cpu_set(cpu, cpu_core_map[i]);
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+ }
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+ }
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+}
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+
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struct plat_smp_ops *mp_ops;
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EXPORT_SYMBOL(mp_ops);
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@@ -122,6 +144,7 @@ asmlinkage void start_secondary(void)
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set_cpu_online(cpu, true);
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set_cpu_sibling_map(cpu);
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+ set_cpu_core_map(cpu);
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cpu_set(cpu, cpu_callin_map);
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@@ -175,6 +198,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
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current_thread_info()->cpu = 0;
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mp_ops->prepare_cpus(max_cpus);
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set_cpu_sibling_map(0);
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+ set_cpu_core_map(0);
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#ifndef CONFIG_HOTPLUG_CPU
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init_cpu_present(cpu_possible_mask);
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#endif
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--
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1.7.10.4
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