147 lines
3.1 KiB
Diff
147 lines
3.1 KiB
Diff
To: linus, alan
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Cc: lkml
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Subject: [PATCH] MC68681 DUART
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From: Linux/m68k legacy
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MC68681 DUART register definitions for the Amiga MultiFace III serial driver.
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---
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drivers/char/mc68681.h | 131 +++++++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 131 insertions(+)
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--- /dev/null
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+++ linux-m68k-2.6.21/drivers/char/mc68681.h
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@@ -0,0 +1,131 @@
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+#ifndef _MC68681_H_
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+#define _MC68681_H_
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+
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+/*
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+ * This describes an MC68681 DUART. It has almost only overlayed registers, which
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+ * the structure very ugly.
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+ * Note that the ri-register isn't really a register of the duart but a kludge of bsc
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+ * to make the ring indicator available.
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+ *
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+ * The data came from the MFC-31-Developer Kit (from Ralph Seidel,
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+ * zodiac@darkness.gun.de) and the data sheet of Phillip's clone device (SCN68681)
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+ * (from Richard Hirst, srh@gpt.co.uk)
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+ *
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+ * 11.11.95 copyright Joerg Dorchain (dorchain@mpi-sb.mpg.de)
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+ *
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+ */
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+
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+struct duarthalf {
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+union {
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+volatile u_char mr1; /* rw */
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+volatile u_char mr2; /* rw */
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+} mr;
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+volatile u_char ri; /* special, read */
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+union {
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+volatile u_char sr; /* read */
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+volatile u_char csr; /* write */
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+} sr_csr;
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+u_char pad1;
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+volatile u_char cr; /* write */
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+u_char pad2;
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+union {
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+volatile u_char rhr; /* read */
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+volatile u_char thr; /* write */
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+} hr;
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+u_char pad3;
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+};
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+
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+struct duart {
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+struct duarthalf pa;
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+union {
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+volatile u_char ipcr; /* read */
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+volatile u_char acr; /* write */
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+} ipcr_acr;
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+u_char pad1;
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+union {
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+volatile u_char isr; /* read */
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+volatile u_char imr; /* write */
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+} ir;
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+u_char pad2;
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+volatile u_char ctu;
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+u_char pad3;
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+volatile u_char ctl;
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+u_char pad4;
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+struct duarthalf pb;
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+volatile u_char ivr;
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+u_char pad5;
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+union {
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+volatile u_char ipr; /* read */
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+volatile u_char opcr; /* write */
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+} ipr_opcr;
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+u_char pad6;
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+union {
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+volatile u_char start; /* read */
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+volatile u_char sopc; /* write */
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+} start_sopc;
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+u_char pad7;
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+union {
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+volatile u_char stop; /* read */
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+volatile u_char ropc; /* write */
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+} stop_ropc;
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+u_char pad8;
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+};
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+
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+#define MR1_BITS 3
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+#define MR1_5BITS 0
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+#define MR1_6BITS 1
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+#define MR1_7BITS 2
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+#define MR1_8BITS 3
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+
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+#define MR1_PARITY_ODD 4
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+
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+#define MR1_PARITY 24
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+#define MR1_PARITY_WITH 0
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+#define MR1_PARITY_FORCE 8
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+#define MR1_PARITY_NO 16
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+#define MR1_PARITY_MULTIDROP 24
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+
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+#define MR1_ERROR_BLOCK 32
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+#define MR1_FFULL_IRQ 64
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+#define MR1_RxRTS_ON 128
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+
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+#define MR2_STOPS 15
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+#define MR2_1STOP 7
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+#define MR2_2STOP 15
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+
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+#define MR2_CTS_ON 16
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+#define MR2_TxRTS_ON 32
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+
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+#define MR2_MODE 192
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+#define MR2_NORMAL 0
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+#define MR2_ECHO 64
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+#define MR2_LOCALLOOP 128
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+#define MR2_REMOTELOOP 192
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+
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+#define CR_RXCOMMAND 3
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+#define CR_NONE 0
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+#define CR_RX_ON 1
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+#define CR_RX_OFF 2
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+#define CR_TXCOMMAND 12
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+#define CR_TX_ON 4
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+#define CR_TX_OFF 8
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+#define CR_MISC 112
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+#define CR_RESET_MR 16
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+#define CR_RESET_RX 32
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+#define CR_RESET_TX 48
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+#define CR_RESET_ERR 64
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+#define CR_RESET_BREAK 80
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+#define CR_START_BREAK 96
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+#define CR_STOP_BREAK 112
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+
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+#define SR_RXRDY 1
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+#define SR_FFULL 2
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+#define SR_TXRDY 4
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+#define SR_TXEMPT 8
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+#define SR_OVERRUN 16
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+#define SR_PARITY 32
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+#define SR_FRAMING 64
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+#define SR_BREAK 128
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+
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+
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+#endif
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