57 lines
2.1 KiB
Diff
57 lines
2.1 KiB
Diff
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
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Date: Mon, 23 Jun 2014 15:29:40 +0200
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Subject: s390/ptrace: fix PSW mask check
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Origin: https://git.kernel.org/linus/dab6cf55f81a6e16b8147aed9a843e1691dcd318
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The PSW mask check of the PTRACE_POKEUSR_AREA command is incorrect.
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The PSW_MASK_USER define contains the PSW_MASK_ASC bits, the ptrace
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interface accepts all combinations for the address-space-control
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bits. To protect the kernel space the PSW mask check in ptrace needs
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to reject the address-space-control bit combination for home space.
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Fixes CVE-2014-3534
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Cc: stable@vger.kernel.org
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Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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---
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arch/s390/kernel/ptrace.c | 12 ++++++++++--
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1 file changed, 10 insertions(+), 2 deletions(-)
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diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
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index 2d716734..5dc7ad9 100644
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--- a/arch/s390/kernel/ptrace.c
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+++ b/arch/s390/kernel/ptrace.c
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@@ -334,9 +334,14 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
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unsigned long mask = PSW_MASK_USER;
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mask |= is_ri_task(child) ? PSW_MASK_RI : 0;
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- if ((data & ~mask) != PSW_USER_BITS)
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+ if ((data ^ PSW_USER_BITS) & ~mask)
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+ /* Invalid psw mask. */
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+ return -EINVAL;
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+ if ((data & PSW_MASK_ASC) == PSW_ASC_HOME)
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+ /* Invalid address-space-control bits */
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return -EINVAL;
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if ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA))
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+ /* Invalid addressing mode bits */
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return -EINVAL;
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}
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*(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data;
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@@ -672,9 +677,12 @@ static int __poke_user_compat(struct task_struct *child,
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mask |= is_ri_task(child) ? PSW32_MASK_RI : 0;
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/* Build a 64 bit psw mask from 31 bit mask. */
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- if ((tmp & ~mask) != PSW32_USER_BITS)
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+ if ((tmp ^ PSW32_USER_BITS) & ~mask)
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/* Invalid psw mask. */
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return -EINVAL;
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+ if ((data & PSW32_MASK_ASC) == PSW32_ASC_HOME)
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+ /* Invalid address-space-control bits */
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+ return -EINVAL;
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regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
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(regs->psw.mask & PSW_MASK_BA) |
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(__u64)(tmp & mask) << 32;
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--
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2.0.0
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