68 lines
2.3 KiB
Diff
68 lines
2.3 KiB
Diff
From: Paul Burton <paul.burton@imgtec.com>
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Date: Fri, 21 Mar 2014 15:20:31 +0000
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Subject: MIPS: Malta: Setup PM I/O region on boot
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Origin: https://git.kernel.org/linus/fa12b773b7fb5830469086d36eb5be9f6b512f4d
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This patch ensures that the kernel sets a sane base address for the
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PIIX4 PM I/O register region during boot. Without this the kernel may
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not successfully claim the region as a resource if the bootloader didn't
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configure the region. With this patch the kernel will always succeed
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with:
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pci 0000:00:0a.3: quirk: [io 0x1000-0x103f] claimed by PIIX4 ACPI
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The lack of the resource claiming is easily reproducible without this
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patch using current versions of QEMU.
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Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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Tested-by: James Hogan <james.hogan@imgtec.com>
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/6641/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/include/asm/mips-boards/piix4.h | 5 +++++
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arch/mips/pci/fixup-malta.c | 13 +++++++++++++
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2 files changed, 18 insertions(+)
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diff --git a/arch/mips/include/asm/mips-boards/piix4.h b/arch/mips/include/asm/mips-boards/piix4.h
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index 836e2ed..9cf5404 100644
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--- a/arch/mips/include/asm/mips-boards/piix4.h
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+++ b/arch/mips/include/asm/mips-boards/piix4.h
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@@ -50,4 +50,9 @@
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#define PIIX4_FUNC1_IDETIM_SECONDARY_HI 0x43
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#define PIIX4_FUNC1_IDETIM_SECONDARY_HI_IDE_DECODE_EN (1 << 7)
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+/* Power Management Configuration Space */
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+#define PIIX4_FUNC3_PMBA 0x40
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+#define PIIX4_FUNC3_PMREGMISC 0x80
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+#define PIIX4_FUNC3_PMREGMISC_EN (1 << 0)
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+
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#endif /* __ASM_MIPS_BOARDS_PIIX4_H */
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diff --git a/arch/mips/pci/fixup-malta.c b/arch/mips/pci/fixup-malta.c
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index 7a0eda7..2f9e52a 100644
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--- a/arch/mips/pci/fixup-malta.c
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+++ b/arch/mips/pci/fixup-malta.c
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@@ -51,6 +51,19 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
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return 0;
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}
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+static void malta_piix_func3_base_fixup(struct pci_dev *dev)
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+{
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+ /* Set a sane PM I/O base address */
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+ pci_write_config_word(dev, PIIX4_FUNC3_PMBA, 0x1000);
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+
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+ /* Enable access to the PM I/O region */
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+ pci_write_config_byte(dev, PIIX4_FUNC3_PMREGMISC,
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+ PIIX4_FUNC3_PMREGMISC_EN);
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+}
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+
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3,
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+ malta_piix_func3_base_fixup);
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+
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static void malta_piix_func0_fixup(struct pci_dev *pdev)
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{
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unsigned char reg_val;
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--
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2.0.0
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