46 lines
1.7 KiB
Diff
46 lines
1.7 KiB
Diff
From: Paul Burton <paul.burton@imgtec.com>
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Date: Wed, 7 May 2014 12:20:58 +0100
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Subject: [3/5] MIPS: Malta: Let PIIX4 respond to PCI special cycles
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Origin: https://git.kernel.org/linus/9e53481eea26891011ef7aa28e7990769fb6cf50
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This patch enables the PIIX4 to respond to special cycles on the PCI
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bus. One such special cycle must be used in order to enter a suspend
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state, and if response to it is not enabled then the suspend state will
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never be entered.
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Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/6904/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/pci/fixup-malta.c | 6 ++++++
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1 file changed, 6 insertions(+)
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diff --git a/arch/mips/pci/fixup-malta.c b/arch/mips/pci/fixup-malta.c
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index 2f9e52a..40e920c 100644
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--- a/arch/mips/pci/fixup-malta.c
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+++ b/arch/mips/pci/fixup-malta.c
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@@ -68,6 +68,7 @@ static void malta_piix_func0_fixup(struct pci_dev *pdev)
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{
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unsigned char reg_val;
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u32 reg_val32;
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+ u16 reg_val16;
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/* PIIX PIRQC[A:D] irq mappings */
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static int piixirqmap[PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_MAX] = {
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0, 0, 0, 3,
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@@ -107,6 +108,11 @@ static void malta_piix_func0_fixup(struct pci_dev *pdev)
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pci_read_config_byte(pdev, PIIX4_FUNC0_SERIRQC, ®_val);
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reg_val |= PIIX4_FUNC0_SERIRQC_EN | PIIX4_FUNC0_SERIRQC_CONT;
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pci_write_config_byte(pdev, PIIX4_FUNC0_SERIRQC, reg_val);
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+
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+ /* Enable response to special cycles */
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+ pci_read_config_word(pdev, PCI_COMMAND, ®_val16);
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+ pci_write_config_word(pdev, PCI_COMMAND,
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+ reg_val16 | PCI_COMMAND_SPECIAL);
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
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--
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2.0.0
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