212 lines
4.7 KiB
Diff
212 lines
4.7 KiB
Diff
From: Stefan Wahren <stefan.wahren@i2se.com>
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Date: Fri, 28 Dec 2018 23:09:26 +0100
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Subject: ARM: dts: add Raspberry Pi 3 A+
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Origin: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/patch/?id=bd80be88e05792db948bf3567a216743fdea5027
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The Raspberry Pi 3 A+ is similar to the Pi 3 B+ but has only 512 MB RAM,
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1 USB 2.0 port and no Ethernet.
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Compared to the Raspberry Pi 3 B it isn't possible to control BT_ON and
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WL_ON separately.
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Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
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Acked-by: Eric Anholt <eric@anholt.net>
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---
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arch/arm/boot/dts/Makefile | 1 +
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arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts | 175 +++++++++++++++++++++
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2 files changed, 176 insertions(+)
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create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
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Index: debian-kernel/arch/arm/boot/dts/Makefile
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===================================================================
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--- debian-kernel.orig/arch/arm/boot/dts/Makefile
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+++ debian-kernel/arch/arm/boot/dts/Makefile
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@@ -79,6 +79,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
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bcm2835-rpi-a-plus.dtb \
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bcm2835-rpi-cm1-io1.dtb \
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bcm2836-rpi-2-b.dtb \
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+ bcm2837-rpi-3-a-plus.dtb \
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bcm2837-rpi-3-b.dtb \
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bcm2837-rpi-3-b-plus.dtb \
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bcm2837-rpi-cm3-io3.dtb \
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Index: debian-kernel/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
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===================================================================
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--- /dev/null
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+++ debian-kernel/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
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@@ -0,0 +1,175 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/dts-v1/;
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+#include "bcm2837.dtsi"
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+#include "bcm2836-rpi.dtsi"
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+#include "bcm283x-rpi-usb-host.dtsi"
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+
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+/ {
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+ compatible = "raspberrypi,3-model-a-plus", "brcm,bcm2837";
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+ model = "Raspberry Pi 3 Model A+";
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+
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+ chosen {
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+ /* 8250 auxiliary UART instead of pl011 */
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+ stdout-path = "serial1:115200n8";
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+ };
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+
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+ memory {
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+ reg = <0 0x20000000>;
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+ };
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+
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+ leds {
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+ act {
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+ gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ pwr {
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+ label = "PWR";
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+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+};
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+
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+&firmware {
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+ expgpio: gpio {
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+ compatible = "raspberrypi,firmware-gpio";
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ gpio-line-names = "",
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+ "BT_WL_ON",
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+ "STATUS_LED_R",
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+ "",
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+ "",
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+ "CAM_GPIO0",
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+ "CAM_GPIO1",
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+ "";
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+ status = "okay";
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+ };
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+};
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+
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+&gpio {
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+ /*
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+ * This is mostly based on the official GPU firmware DT blob.
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+ *
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+ * Legend:
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+ * "NC" = not connected (no rail from the SoC)
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+ * "FOO" = GPIO line named "FOO" on the schematic
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+ * "FOO_N" = GPIO line named "FOO" on schematic, active low
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+ */
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+ gpio-line-names = "ID_SDA",
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+ "ID_SCL",
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+ "SDA1",
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+ "SCL1",
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+ "GPIO_GCLK",
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+ "GPIO5",
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+ "GPIO6",
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+ "SPI_CE1_N",
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+ "SPI_CE0_N",
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+ "SPI_MISO",
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+ "SPI_MOSI",
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+ "SPI_SCLK",
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+ "GPIO12",
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+ "GPIO13",
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+ /* Serial port */
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+ "TXD1",
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+ "RXD1",
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+ "GPIO16",
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+ "GPIO17",
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+ "GPIO18",
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+ "GPIO19",
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+ "GPIO20",
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+ "GPIO21",
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+ "GPIO22",
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+ "GPIO23",
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+ "GPIO24",
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+ "GPIO25",
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+ "GPIO26",
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+ "GPIO27",
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+ "HDMI_HPD_N",
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+ "STATUS_LED_G",
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+ /* Used by BT module */
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+ "CTS0",
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+ "RTS0",
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+ "TXD0",
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+ "RXD0",
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+ /* Used by Wifi */
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+ "SD1_CLK",
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+ "SD1_CMD",
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+ "SD1_DATA0",
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+ "SD1_DATA1",
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+ "SD1_DATA2",
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+ "SD1_DATA3",
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+ "PWM0_OUT",
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+ "PWM1_OUT",
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+ "", /* GPIO42 */
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+ "WIFI_CLK",
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+ "SDA0",
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+ "SCL0",
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+ "SMPS_SCL",
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+ "SMPS_SDA",
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+ /* Used by SD Card */
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+ "SD_CLK_R",
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+ "SD_CMD_R",
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+ "SD_DATA0_R",
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+ "SD_DATA1_R",
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+ "SD_DATA2_R",
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+ "SD_DATA3_R";
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+};
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+
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+&hdmi {
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+ hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
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+};
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+
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+&pwm {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>;
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+ status = "okay";
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+};
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+
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+/*
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+ * SDHCI is used to control the SDIO for wireless
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+ *
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+ * WL_REG_ON and BT_REG_ON of the CYW43455 Wifi/BT module are driven
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+ * by a single GPIO. We can't give GPIO control to one of the drivers,
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+ * otherwise the other part would get unexpectedly disturbed.
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+ */
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+&sdhci {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emmc_gpio34>;
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+ status = "okay";
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+ bus-width = <4>;
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+ non-removable;
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+
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+ brcmf: wifi@1 {
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+ reg = <1>;
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+ compatible = "brcm,bcm4329-fmac";
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+ };
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+};
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+
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+/* SDHOST is used to drive the SD card */
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+&sdhost {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdhost_gpio48>;
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+ status = "okay";
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+ bus-width = <4>;
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+};
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+
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+/* uart0 communicates with the BT module */
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32 &gpclk2_gpio43>;
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+ status = "okay";
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+
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+ bluetooth {
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+ compatible = "brcm,bcm43438-bt";
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+ max-speed = <2000000>;
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+ };
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+};
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+
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+/* uart1 is mapped to the pin header */
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+&uart1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart1_gpio14>;
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+ status = "okay";
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+};
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