Added amd64-tlb-flush-sigsegv-fix.patch: backport from git to fix random segfaults on smp systems
svn path=/dists/trunk/linux-2.6/; revision=4236
This commit is contained in:
parent
2a41624a11
commit
cf81e0dc0a
|
@ -17,7 +17,9 @@ linux-2.6 (2.6.13-1) UNRELEASED; urgency=low
|
|||
- md, dm updates (closes: #317787)
|
||||
|
||||
[ Frederik Schüler ]
|
||||
* Added class and longclass descriptions for amd64 flavours.
|
||||
* [amd64] Added class and longclass descriptions for amd64 flavours.
|
||||
* [amd64] add amd64-tlb-flush-sigsegv-fix.patch: disable tlb flush
|
||||
filtering on smp systems to workaround processor errata.
|
||||
* Added patch-2.6.13.1:
|
||||
- raw_sendmsg DoS (CAN-2005-2492)
|
||||
- 32bit sendmsg() flaw (CAN-2005-2490)
|
||||
|
|
|
@ -0,0 +1,47 @@
|
|||
From: Linus Torvalds <torvalds@g5.osdl.org>
|
||||
Date: Sat, 17 Sep 2005 22:41:04 +0000 (-0700)
|
||||
Subject: x86-64/smp: fix random SIGSEGV issues
|
||||
X-Git-Url: http://www.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=bc5e8fdfc622b03acf5ac974a1b8b26da6511c99
|
||||
|
||||
x86-64/smp: fix random SIGSEGV issues
|
||||
|
||||
They seem to have been due to AMD errata 63/122; the fix is to disable
|
||||
TLB flush filtering in SMP configurations.
|
||||
|
||||
Confirmed to fix the problem by Andrew Walrond <andrew@walrond.org>
|
||||
|
||||
[ Let's see if we'll have a better fix eventually, this is the Q&D
|
||||
"let's get this fixed and out there" version ]
|
||||
|
||||
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
||||
---
|
||||
|
||||
--- a/arch/x86_64/kernel/setup.c
|
||||
+++ b/arch/x86_64/kernel/setup.c
|
||||
@@ -793,11 +793,26 @@
|
||||
#endif
|
||||
}
|
||||
|
||||
+#define HWCR 0xc0010015
|
||||
+
|
||||
static int __init init_amd(struct cpuinfo_x86 *c)
|
||||
{
|
||||
int r;
|
||||
int level;
|
||||
|
||||
+#ifdef CONFIG_SMP
|
||||
+ unsigned long value;
|
||||
+
|
||||
+ // Disable TLB flush filter by setting HWCR.FFDIS:
|
||||
+ // bit 6 of msr C001_0015
|
||||
+ //
|
||||
+ // Errata 63 for SH-B3 steppings
|
||||
+ // Errata 122 for all(?) steppings
|
||||
+ rdmsrl(HWCR, value);
|
||||
+ value |= 1 << 6;
|
||||
+ wrmsrl(HWCR, value);
|
||||
+#endif
|
||||
+
|
||||
/* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
|
||||
3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
|
||||
clear_bit(0*32+31, &c->x86_capability);
|
|
@ -22,3 +22,4 @@
|
|||
+ version.patch
|
||||
+ powerpc-mv643xx-hotplug-support.patch
|
||||
+ patch-2.6.13.2
|
||||
+ amd64-tlb-flush-sigsegv-fix.patch
|
||||
|
|
Loading…
Reference in New Issue