[hppa] apply upstream patch for ldcw.h

svn path=/dists/trunk/linux/; revision=22282

debian/changelog

@@ -20,6 +20,7 @@ linux (3.18.3-1~exp1) experimental; urgency=medium
     (Closes: #770102)
   * [hppa] Create build-dependencies on binutils-hppa64 and gcc-4.9-hppa64
   * [hppa] Enable CONFIG_PPDEV to avoid CUPS complaining
+  * [hppa] apply upstream patch for ldcw.h which is needed with gcc-4.9
 
   [ Ben Hutchings ]
   * [sh4] ftrace: Remove -m32 option from recordmcount.pl (Closes: #775611)

debian/patches/bugfix/parisc/hppa-fix_ldcw.patch

@@ -0,0 +1,42 @@
+upstream commit 45db07382a5c78b0c43b3b0002b63757fb60e873
+Author: John David Anglin <dave.anglin@bell.net>
+Date:   Sun Dec 14 10:49:11 2014 -0500
+
+    parisc: fix out-of-register compiler error in ldcw inline assembler function
+    
+    The __ldcw macro has a problem when its argument needs to be reloaded from
+    memory. The output memory operand and the input register operand both need to
+    be reloaded using a register in class R1_REGS when generating 64-bit code.
+    This fails because there's only a single register in the class. Instead, use a
+    memory clobber. This also makes the __ldcw macro a compiler memory barrier.
+    
+    Signed-off-by: John David Anglin <dave.anglin@bell.net>
+    Cc: <stable@vger.kernel.org>        [3.13+]
+    Signed-off-by: Helge Deller <deller@gmx.de>
+
+diff --git a/arch/parisc/include/asm/ldcw.h b/arch/parisc/include/asm/ldcw.h
+index d2d11b7..8121aa6 100644
+--- a/arch/parisc/include/asm/ldcw.h
++++ b/arch/parisc/include/asm/ldcw.h
+@@ -33,11 +33,18 @@
+ 
+ #endif /*!CONFIG_PA20*/
+ 
+-/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*.  */
++/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*.
++   We don't explicitly expose that "*a" may be written as reload
++   fails to find a register in class R1_REGS when "a" needs to be
++   reloaded when generating 64-bit PIC code.  Instead, we clobber
++   memory to indicate to the compiler that the assembly code reads
++   or writes to items other than those listed in the input and output
++   operands.  This may pessimize the code somewhat but __ldcw is
++   usually used within code blocks surrounded by memory barriors.  */
+ #define __ldcw(a) ({						\
+ 	unsigned __ret;						\
+-	__asm__ __volatile__(__LDCW " 0(%2),%0"			\
+-		: "=r" (__ret), "+m" (*(a)) : "r" (a));		\
++	__asm__ __volatile__(__LDCW " 0(%1),%0"			\
++		: "=r" (__ret) : "r" (a) : "memory");		\
+ 	__ret;							\
+ })
+ 

debian/patches/series

@@ -43,6 +43,7 @@ bugfix/m68k/ethernat-kconfig.patch
 bugfix/arm64/arm64-add-missing-dts-entry-for-X-Gene-platform.patch
 bugfix/arm64/arm64-removed-using-of-the-mask-attribute-in-the-dts.patch
 bugfix/x86/acpi-video-run-_bcl-before-deciding-registering-back.patch
+bugfix/parisc/hppa-fix_ldcw.patch
 
 # Arch features
 features/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch