[x86] drm/i915: do not enable RC6p on Sandy Bridge (Closes: #660265)

svn path=/dists/sid/linux-2.6/; revision=18737
This commit is contained in:
Ben Hutchings 2012-02-26 15:53:11 +00:00
parent 845b47d382
commit b1f4b69f5e
4 changed files with 78 additions and 0 deletions

1
debian/changelog vendored
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@ -22,6 +22,7 @@ linux-2.6 (3.2.7-1) UNRELEASED; urgency=low
* [i386] Re-enable INTEL_IOMMU, IRQ_REMAP
* [mips/r5k-ip32] Enable INPUT_SGI_BTNS (previously INPUT_SGIO2_BTNS)
* [powerpc/powerpc64] Enable IBM_EMAC (previously IBM_NEW_EMAC)
* [x86] drm/i915: do not enable RC6p on Sandy Bridge (Closes: #660265)
[ Bastian Blank ]
* Don't advertise Xen support for rt images. (closes: #659988)

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@ -0,0 +1,45 @@
From: Eugeni Dodonov <eugeni.dodonov@intel.com>
Date: Tue, 14 Feb 2012 11:44:48 -0200
Subject: [PATCH] drm/i915: do not enable RC6p on Sandy Bridge
commit 1c8ecf80fdee4e7b23a9e7da7ff9bd59ba2dcf96 upstream.
With base on latest findings, RC6p seems to be respondible for RC6-related
issues on Sandy Bridge platform. To work-around those issues, the previous
solution was to completely disable RC6 on Sandy Bridge for the past few
releases, even if plain RC6 was not giving any issues.
What this patch does is preventing RC6p from being enabled on Sandy Bridge
even if users enable RC6 via a kernel parameter. So it won't change the
defaults in any way, but will ensure that if users do enable RC6 manually
it won't break their machines by enabling this extra state.
Proper fix for this (enabling specific RC6 states according to the GPU
generation) were proposed for the -next kernel, but we are too late in the
release process now to pick such changes.
Acked-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d9b042b..049804e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8182,8 +8182,8 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
if (intel_enable_rc6(dev_priv->dev))
- rc6_mask = GEN6_RC_CTL_RC6p_ENABLE |
- GEN6_RC_CTL_RC6_ENABLE;
+ rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
+ (IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;
I915_WRITE(GEN6_RC_CONTROL,
rc6_mask |
--
1.7.9.1

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@ -0,0 +1,30 @@
From: Eugeni Dodonov <eugeni.dodonov@intel.com>
Date: Thu, 23 Feb 2012 17:57:06 -0800
Subject: [PATCH 1/1] drm/i915: fix operator precedence when enabling RC6p
As noticed by Torsten Kaiser, the operator precedence can play tricks with
us here.
CC: Dave Airlie <airlied at redhat.com>
CC: Jesse Barnes <jbarnes at virtuousgeek.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e654f32..4871ba0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8194,7 +8194,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
if (intel_enable_rc6(dev_priv->dev))
rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
- (IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;
+ ((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0);
I915_WRITE(GEN6_RC_CONTROL,
rc6_mask |
--
1.7.8.4

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@ -78,3 +78,5 @@
+ bugfix/arm/ARM-ixp4xx-mtd-oops.patch
+ bugfix/all/builddeb-Don-t-create-files-in-tmp-with-predictable-.patch
+ bugfix/x86/drm-i915-do-not-enable-RC6p-on-Sandy-Bridge.patch
+ bugfix/x86/drm-i915-fix-operator-precedence-when-enabling-RC6p.patch