* debian/patches/debian/dfsg/drivers-net-bnx2-request_firmware-1.patch: Fix.
* debian/patches/series/1~experimental.1: Fix. svn path=/dists/trunk/linux-2.6/; revision=12013
This commit is contained in:
parent
bebd42376b
commit
ac5e820387
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@ -1,27 +1,29 @@
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diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
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index 8b552c6..ec72b56 100644
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index 5ebde67..5401dab 100644
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--- a/drivers/net/bnx2.c
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+++ b/drivers/net/bnx2.c
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@@ -46,11 +46,10 @@
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@@ -46,12 +46,12 @@
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#include <linux/crc32.h>
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#include <linux/prefetch.h>
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#include <linux/cache.h>
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-#include <linux/zlib.h>
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+#include <linux/firmware.h>
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#include <linux/log2.h>
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#include "bnx2.h"
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-#include "bnx2_fw.h"
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-#include "bnx2_fw2.h"
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+#include "bnx2_cpu.h"
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+#include "bnx2_fw_file.h"
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#define FW_BUF_SIZE 0x10000
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@@ -58,12 +57,20 @@
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@@ -59,12 +59,20 @@
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#define PFX DRV_MODULE_NAME ": "
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#define DRV_MODULE_VERSION "1.7.5"
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#define DRV_MODULE_RELDATE "April 29, 2008"
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+#define FW_FILE_06 "bnx2-06-4.0.5.fw"
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+#define FW_FILE_09 "bnx2-09-4.0.5.fw"
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#define DRV_MODULE_VERSION "1.7.9"
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#define DRV_MODULE_RELDATE "July 18, 2008"
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+#define FW_FILE_06 "bnx2-06-4.4.1.fw"
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+#define FW_FILE_09 "bnx2-09-4.4.26.fw"
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#define RUN_AT(x) (jiffies + (x))
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@ -37,8 +39,8 @@ index 8b552c6..ec72b56 100644
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static char version[] __devinitdata =
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"Broadcom NetXtreme II Gigabit Ethernet Driver " DRV_MODULE_NAME " v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
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@@ -71,6 +78,8 @@ MODULE_AUTHOR("Michael Chan <mchan@broadcom.com>");
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MODULE_DESCRIPTION("Broadcom NetXtreme II BCM5706/5708 Driver");
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@@ -72,6 +80,8 @@ MODULE_AUTHOR("Michael Chan <mchan@broadcom.com>");
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MODULE_DESCRIPTION("Broadcom NetXtreme II BCM5706/5708/5709 Driver");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(DRV_MODULE_VERSION);
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+MODULE_FIRMWARE(FW_FILE_06);
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@ -46,7 +48,7 @@ index 8b552c6..ec72b56 100644
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static int disable_msi = 0;
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@@ -3161,32 +3170,32 @@ bnx2_set_rx_mode(struct net_device *dev)
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@@ -3315,32 +3325,32 @@ bnx2_set_rx_mode(struct net_device *dev)
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spin_unlock_bh(&bp->phy_lock);
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}
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@ -61,26 +63,26 @@ index 8b552c6..ec72b56 100644
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+ u32 *data;
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u32 val;
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+ len = be32_to_cpu(fw_section->len);
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+ offset = be32_to_cpu(fw_section->offset);
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+
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+ if (!len || !offset || len + offset > bp->firmware->size)
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+ return -EINVAL;
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+ DPRINTK("load rv2p firmware with length %u from file offset %u\n", len, offset);
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+
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+ data = (u32 *)(bp->firmware->data + offset);
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- if (rv2p_proc == RV2P_PROC2 && CHIP_NUM(bp) == CHIP_NUM_5709) {
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- val = le32_to_cpu(rv2p_code[XI_RV2P_PROC2_MAX_BD_PAGE_LOC]);
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- val &= ~XI_RV2P_PROC2_BD_PAGE_SIZE_MSK;
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- val |= XI_RV2P_PROC2_BD_PAGE_SIZE;
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- rv2p_code[XI_RV2P_PROC2_MAX_BD_PAGE_LOC] = cpu_to_le32(val);
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- }
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+ len = be32_to_cpu(fw_section->len);
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+ offset = be32_to_cpu(fw_section->offset);
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+
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+ if (!len || !offset || len + offset > bp->firmware->size)
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+ return -EINVAL;
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+ DPRINTK("load rv2p firmware with length %u from file offset %u\n", len, offset);
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- for (i = 0; i < rv2p_code_len; i += 8) {
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- REG_WR(bp, BNX2_RV2P_INSTR_HIGH, le32_to_cpu(*rv2p_code));
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- rv2p_code++;
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- REG_WR(bp, BNX2_RV2P_INSTR_LOW, le32_to_cpu(*rv2p_code));
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- rv2p_code++;
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+ data = (u32 *)(bp->firmware->data + offset);
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+
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+ for (i = 0; i < (len / 4); i += 2) {
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+ REG_WR(bp, BNX2_RV2P_INSTR_HIGH, be32_to_cpu(data[i]));
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+ REG_WR(bp, BNX2_RV2P_INSTR_LOW, be32_to_cpu(data[i+1]));
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@ -96,7 +98,7 @@ index 8b552c6..ec72b56 100644
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REG_WR(bp, BNX2_RV2P_PROC2_ADDR_CMD, val);
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}
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}
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@@ -3192,14 +3207,18 @@ load_rv2p_fw(struct bnx2 *bp, __le32 *rv2p_code, u32 rv2p_code_len,
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@@ -3352,14 +3362,18 @@ load_rv2p_fw(struct bnx2 *bp, __le32 *rv2p_code, u32 rv2p_code_len,
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else {
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REG_WR(bp, BNX2_RV2P_COMMAND, BNX2_RV2P_COMMAND_PROC2_RESET);
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}
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@ -105,8 +107,8 @@ index 8b552c6..ec72b56 100644
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}
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static int
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-load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
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+load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg,
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-load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, struct fw_info *fw)
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+load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg,
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+ const struct bnx2_fw_file_entry *fw_entry)
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{
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+ u32 addr, len, file_offset;
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@ -117,7 +119,7 @@ index 8b552c6..ec72b56 100644
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/* Halt the CPU. */
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val = bnx2_reg_rd_ind(bp, cpu_reg->mode);
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@@ -3208,64 +3227,87 @@ load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
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@@ -3368,64 +3382,87 @@ load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, struct fw_info *fw)
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bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear);
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/* Load the Text area. */
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@ -230,10 +232,10 @@ index 8b552c6..ec72b56 100644
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/* Start the CPU. */
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val = bnx2_reg_rd_ind(bp, cpu_reg->mode);
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@@ -3280,39 +3322,14 @@ static int
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@@ -3439,92 +3476,37 @@ load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, struct fw_info *fw)
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static int
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bnx2_init_cpus(struct bnx2 *bp)
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{
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struct cpu_reg cpu_reg;
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- struct fw_info *fw;
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- int rc, rv2p_len;
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- void *text, *rv2p;
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@ -252,12 +254,11 @@ index 8b552c6..ec72b56 100644
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- rc = zlib_inflate_blob(text, FW_BUF_SIZE, rv2p, rv2p_len);
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- if (rc < 0)
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- goto init_cpu_err;
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-
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- load_rv2p_fw(bp, text, rc /* == len */, RV2P_PROC1);
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+ const struct bnx2_fw_file *fw = NULL;
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+ int rc;
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- load_rv2p_fw(bp, text, rc /* == len */, RV2P_PROC1);
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+ fw = (struct bnx2_fw_file *)bp->firmware->data;
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- if (CHIP_NUM(bp) == CHIP_NUM_5709) {
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- rv2p = bnx2_xi_rv2p_proc2;
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- rv2p_len = sizeof(bnx2_xi_rv2p_proc2);
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@ -268,106 +269,74 @@ index 8b552c6..ec72b56 100644
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- rc = zlib_inflate_blob(text, FW_BUF_SIZE, rv2p, rv2p_len);
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- if (rc < 0)
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- goto init_cpu_err;
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-
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+ fw = (struct bnx2_fw_file *)bp->firmware->data;
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- load_rv2p_fw(bp, text, rc /* == len */, RV2P_PROC2);
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+ /* Initialize the RV2P processor. */
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+ load_rv2p_fw(bp, RV2P_PROC1, &fw->rv2p_proc1);
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+ load_rv2p_fw(bp, RV2P_PROC2, &fw->rv2p_proc2);
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/* Initialize the RX Processor. */
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cpu_reg.mode = BNX2_RXP_CPU_MODE;
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@@ -3328,15 +3345,9 @@ bnx2_init_cpus(struct bnx2 *bp)
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cpu_reg.spad_base = BNX2_RXP_SCRATCH;
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cpu_reg.mips_view_base = 0x8000000;
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- if (CHIP_NUM(bp) == CHIP_NUM_5709)
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- fw = &bnx2_rxp_fw_09;
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- else
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- fw = &bnx2_rxp_fw_06;
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-
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- fw->text = text;
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- rc = load_cpu_fw(bp, &cpu_reg, fw);
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+ rc = load_cpu_fw(bp, &cpu_reg, &fw->rxp);
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- rc = load_cpu_fw(bp, &cpu_reg_rxp, fw);
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+ rc = load_cpu_fw(bp, &cpu_reg_rxp, &fw->rxp);
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if (rc)
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- goto init_cpu_err;
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+ return rc;
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goto init_cpu_err;
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/* Initialize the TX Processor. */
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cpu_reg.mode = BNX2_TXP_CPU_MODE;
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@@ -3352,15 +3363,9 @@ bnx2_init_cpus(struct bnx2 *bp)
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cpu_reg.spad_base = BNX2_TXP_SCRATCH;
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cpu_reg.mips_view_base = 0x8000000;
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- if (CHIP_NUM(bp) == CHIP_NUM_5709)
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- fw = &bnx2_txp_fw_09;
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- else
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- fw = &bnx2_txp_fw_06;
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-
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- fw->text = text;
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- rc = load_cpu_fw(bp, &cpu_reg, fw);
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+ rc = load_cpu_fw(bp, &cpu_reg, &fw->txp);
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- rc = load_cpu_fw(bp, &cpu_reg_txp, fw);
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+ rc = load_cpu_fw(bp, &cpu_reg_txp, &fw->txp);
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if (rc)
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- goto init_cpu_err;
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+ return rc;
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goto init_cpu_err;
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/* Initialize the TX Patch-up Processor. */
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cpu_reg.mode = BNX2_TPAT_CPU_MODE;
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@@ -3376,15 +3381,9 @@ bnx2_init_cpus(struct bnx2 *bp)
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cpu_reg.spad_base = BNX2_TPAT_SCRATCH;
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cpu_reg.mips_view_base = 0x8000000;
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- if (CHIP_NUM(bp) == CHIP_NUM_5709)
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- fw = &bnx2_tpat_fw_09;
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- else
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- fw = &bnx2_tpat_fw_06;
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-
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- fw->text = text;
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- rc = load_cpu_fw(bp, &cpu_reg, fw);
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+ rc = load_cpu_fw(bp, &cpu_reg, &fw->tpat);
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- rc = load_cpu_fw(bp, &cpu_reg_tpat, fw);
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+ rc = load_cpu_fw(bp, &cpu_reg_tpat, &fw->tpat);
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if (rc)
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- goto init_cpu_err;
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+ return rc;
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goto init_cpu_err;
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/* Initialize the Completion Processor. */
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cpu_reg.mode = BNX2_COM_CPU_MODE;
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@@ -3400,15 +3399,9 @@ bnx2_init_cpus(struct bnx2 *bp)
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cpu_reg.spad_base = BNX2_COM_SCRATCH;
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cpu_reg.mips_view_base = 0x8000000;
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- if (CHIP_NUM(bp) == CHIP_NUM_5709)
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- fw = &bnx2_com_fw_09;
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- else
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- fw = &bnx2_com_fw_06;
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-
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- fw->text = text;
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- rc = load_cpu_fw(bp, &cpu_reg, fw);
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+ rc = load_cpu_fw(bp, &cpu_reg, &fw->com);
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- rc = load_cpu_fw(bp, &cpu_reg_com, fw);
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+ rc = load_cpu_fw(bp, &cpu_reg_com, &fw->com);
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if (rc)
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- goto init_cpu_err;
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+ return rc;
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goto init_cpu_err;
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/* Initialize the Command Processor. */
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cpu_reg.mode = BNX2_CP_CPU_MODE;
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@@ -3424,17 +3417,7 @@ bnx2_init_cpus(struct bnx2 *bp)
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cpu_reg.spad_base = BNX2_CP_SCRATCH;
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cpu_reg.mips_view_base = 0x8000000;
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- if (CHIP_NUM(bp) == CHIP_NUM_5709)
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- fw = &bnx2_cp_fw_09;
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- else
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- fw = &bnx2_cp_fw_06;
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-
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- fw->text = text;
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- rc = load_cpu_fw(bp, &cpu_reg, fw);
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-
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-init_cpu_err:
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- vfree(text);
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- return rc;
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+ return load_cpu_fw(bp, &cpu_reg, &fw->cp);
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}
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- rc = load_cpu_fw(bp, &cpu_reg_cp, fw);
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+ rc = load_cpu_fw(bp, &cpu_reg_cp, &fw->cp);
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static int
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@@ -7456,6 +7439,7 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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init_cpu_err:
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vfree(text);
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@@ -7656,6 +7638,7 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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struct bnx2 *bp;
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int rc;
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char str[40];
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|
@ -375,7 +344,7 @@ index 8b552c6..ec72b56 100644
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DECLARE_MAC_BUF(mac);
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if (version_printed++ == 0)
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@@ -7497,6 +7481,23 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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@@ -7697,6 +7680,23 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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pci_set_drvdata(pdev, dev);
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|
@ -399,7 +368,7 @@ index 8b552c6..ec72b56 100644
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memcpy(dev->dev_addr, bp->mac_addr, 6);
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memcpy(dev->perm_addr, bp->mac_addr, 6);
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bp->name = board_info[ent->driver_data].name;
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@@ -7514,13 +7515,7 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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@@ -7714,13 +7714,7 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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if ((rc = register_netdev(dev))) {
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dev_err(&pdev->dev, "Cannot register net device\n");
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|
@ -414,7 +383,7 @@ index 8b552c6..ec72b56 100644
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}
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printk(KERN_INFO "%s: %s (%c%d) %s found at mem %lx, "
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@@ -7534,6 +7529,15 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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@@ -7734,6 +7728,15 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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bp->pdev->irq, print_mac(mac, dev->dev_addr));
|
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|
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return 0;
|
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|
@ -430,7 +399,7 @@ index 8b552c6..ec72b56 100644
|
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}
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static void __devexit
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@@ -7549,6 +7553,8 @@ bnx2_remove_one(struct pci_dev *pdev)
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@@ -7749,6 +7752,8 @@ bnx2_remove_one(struct pci_dev *pdev)
|
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if (bp->regview)
|
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iounmap(bp->regview);
|
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|
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|
@ -440,19 +409,19 @@ index 8b552c6..ec72b56 100644
|
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pci_release_regions(pdev);
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pci_disable_device(pdev);
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diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
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index 3aa0364..b9a052f 100644
|
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index c3c579f..15e837e 100644
|
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--- a/drivers/net/bnx2.h
|
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+++ b/drivers/net/bnx2.h
|
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@@ -6812,6 +6812,8 @@ struct bnx2 {
|
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@@ -6860,6 +6860,8 @@ struct bnx2 {
|
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|
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struct bnx2_irq irq_tbl[BNX2_MAX_MSIX_VEC];
|
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int irq_nvecs;
|
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u8 num_tx_rings;
|
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u8 num_rx_rings;
|
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+
|
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+ const struct firmware *firmware;
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};
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#define REG_RD(bp, offset) \
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@@ -6842,44 +6844,6 @@ struct cpu_reg {
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@@ -6890,44 +6892,6 @@ struct cpu_reg {
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u32 mips_view_base;
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};
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|
@ -497,6 +466,100 @@ index 3aa0364..b9a052f 100644
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#define RV2P_PROC1 0
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#define RV2P_PROC2 1
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diff --git a/drivers/net/bnx2_cpu.h b/drivers/net/bnx2_cpu.h
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new file mode 100644
|
||||
index 0000000..940eb91
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--- /dev/null
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+++ b/drivers/net/bnx2_cpu.h
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@@ -0,0 +1,88 @@
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+/* bnx2_fw.h: Broadcom NX2 network driver.
|
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+ *
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+ * Copyright (c) 2004, 2005, 2006, 2007 Broadcom Corporation
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+ *
|
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
|
||||
+ * the Free Software Foundation.
|
||||
+ */
|
||||
+
|
||||
+/* Initialized Values for the Completion Processor. */
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||||
+static const struct cpu_reg cpu_reg_com = {
|
||||
+ .mode = BNX2_COM_CPU_MODE,
|
||||
+ .mode_value_halt = BNX2_COM_CPU_MODE_SOFT_HALT,
|
||||
+ .mode_value_sstep = BNX2_COM_CPU_MODE_STEP_ENA,
|
||||
+ .state = BNX2_COM_CPU_STATE,
|
||||
+ .state_value_clear = 0xffffff,
|
||||
+ .gpr0 = BNX2_COM_CPU_REG_FILE,
|
||||
+ .evmask = BNX2_COM_CPU_EVENT_MASK,
|
||||
+ .pc = BNX2_COM_CPU_PROGRAM_COUNTER,
|
||||
+ .inst = BNX2_COM_CPU_INSTRUCTION,
|
||||
+ .bp = BNX2_COM_CPU_HW_BREAKPOINT,
|
||||
+ .spad_base = BNX2_COM_SCRATCH,
|
||||
+ .mips_view_base = 0x8000000,
|
||||
+};
|
||||
+
|
||||
+/* Initialized Values the Command Processor. */
|
||||
+static const struct cpu_reg cpu_reg_cp = {
|
||||
+ .mode = BNX2_CP_CPU_MODE,
|
||||
+ .mode_value_halt = BNX2_CP_CPU_MODE_SOFT_HALT,
|
||||
+ .mode_value_sstep = BNX2_CP_CPU_MODE_STEP_ENA,
|
||||
+ .state = BNX2_CP_CPU_STATE,
|
||||
+ .state_value_clear = 0xffffff,
|
||||
+ .gpr0 = BNX2_CP_CPU_REG_FILE,
|
||||
+ .evmask = BNX2_CP_CPU_EVENT_MASK,
|
||||
+ .pc = BNX2_CP_CPU_PROGRAM_COUNTER,
|
||||
+ .inst = BNX2_CP_CPU_INSTRUCTION,
|
||||
+ .bp = BNX2_CP_CPU_HW_BREAKPOINT,
|
||||
+ .spad_base = BNX2_CP_SCRATCH,
|
||||
+ .mips_view_base = 0x8000000,
|
||||
+};
|
||||
+
|
||||
+/* Initialized Values for the RX Processor. */
|
||||
+static const struct cpu_reg cpu_reg_rxp = {
|
||||
+ .mode = BNX2_RXP_CPU_MODE,
|
||||
+ .mode_value_halt = BNX2_RXP_CPU_MODE_SOFT_HALT,
|
||||
+ .mode_value_sstep = BNX2_RXP_CPU_MODE_STEP_ENA,
|
||||
+ .state = BNX2_RXP_CPU_STATE,
|
||||
+ .state_value_clear = 0xffffff,
|
||||
+ .gpr0 = BNX2_RXP_CPU_REG_FILE,
|
||||
+ .evmask = BNX2_RXP_CPU_EVENT_MASK,
|
||||
+ .pc = BNX2_RXP_CPU_PROGRAM_COUNTER,
|
||||
+ .inst = BNX2_RXP_CPU_INSTRUCTION,
|
||||
+ .bp = BNX2_RXP_CPU_HW_BREAKPOINT,
|
||||
+ .spad_base = BNX2_RXP_SCRATCH,
|
||||
+ .mips_view_base = 0x8000000,
|
||||
+};
|
||||
+
|
||||
+/* Initialized Values for the TX Patch-up Processor. */
|
||||
+static const struct cpu_reg cpu_reg_tpat = {
|
||||
+ .mode = BNX2_TPAT_CPU_MODE,
|
||||
+ .mode_value_halt = BNX2_TPAT_CPU_MODE_SOFT_HALT,
|
||||
+ .mode_value_sstep = BNX2_TPAT_CPU_MODE_STEP_ENA,
|
||||
+ .state = BNX2_TPAT_CPU_STATE,
|
||||
+ .state_value_clear = 0xffffff,
|
||||
+ .gpr0 = BNX2_TPAT_CPU_REG_FILE,
|
||||
+ .evmask = BNX2_TPAT_CPU_EVENT_MASK,
|
||||
+ .pc = BNX2_TPAT_CPU_PROGRAM_COUNTER,
|
||||
+ .inst = BNX2_TPAT_CPU_INSTRUCTION,
|
||||
+ .bp = BNX2_TPAT_CPU_HW_BREAKPOINT,
|
||||
+ .spad_base = BNX2_TPAT_SCRATCH,
|
||||
+ .mips_view_base = 0x8000000,
|
||||
+};
|
||||
+
|
||||
+/* Initialized Values for the TX Processor. */
|
||||
+static const struct cpu_reg cpu_reg_txp = {
|
||||
+ .mode = BNX2_TXP_CPU_MODE,
|
||||
+ .mode_value_halt = BNX2_TXP_CPU_MODE_SOFT_HALT,
|
||||
+ .mode_value_sstep = BNX2_TXP_CPU_MODE_STEP_ENA,
|
||||
+ .state = BNX2_TXP_CPU_STATE,
|
||||
+ .state_value_clear = 0xffffff,
|
||||
+ .gpr0 = BNX2_TXP_CPU_REG_FILE,
|
||||
+ .evmask = BNX2_TXP_CPU_EVENT_MASK,
|
||||
+ .pc = BNX2_TXP_CPU_PROGRAM_COUNTER,
|
||||
+ .inst = BNX2_TXP_CPU_INSTRUCTION,
|
||||
+ .bp = BNX2_TXP_CPU_HW_BREAKPOINT,
|
||||
+ .spad_base = BNX2_TXP_SCRATCH,
|
||||
+ .mips_view_base = 0x8000000,
|
||||
+};
|
||||
diff --git a/drivers/net/bnx2_fw_file.h b/drivers/net/bnx2_fw_file.h
|
||||
new file mode 100644
|
||||
index 0000000..06c003c
|
||||
|
|
|
@ -1,13 +1,12 @@
|
|||
+ debian/version.patch
|
||||
#+ debian/kernelvariables.patch
|
||||
+ debian/kernelvariables.patch
|
||||
+ debian/doc-build-parallel.patch
|
||||
#+ debian/scripts-kconfig-reportoldconfig.patch
|
||||
#+ debian/powerpc-mkvmlinuz-support-ppc.patch
|
||||
+ debian/scripts-kconfig-reportoldconfig.patch
|
||||
|
||||
+ debian/drivers-ata-ata_piix-postpone-pata.patch
|
||||
|
||||
#+ debian/dfsg/drivers-net-tg3-fix-simple.patch
|
||||
#+ debian/dfsg/drivers-net-bnx2-request_firmware-1.patch
|
||||
+ debian/dfsg/drivers-net-tg3-fix-simple.patch
|
||||
+ debian/dfsg/drivers-net-bnx2-request_firmware-1.patch
|
||||
#+ features/all/drivers-net-acenic-firmwar_request.patch
|
||||
+ features/all/export-gfs2-locking-symbols.patch
|
||||
+ features/all/export-unionfs-symbols.patch
|
||||
|
|
Loading…
Reference in New Issue