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better fix 

svn path=/dists/trunk/linux-2.6/; revision=16490
This commit is contained in:
Martin Michlmayr 2010-10-25 18:28:57 +00:00
parent 4a8d5b5a2c
commit a79d62b473
4 changed files with 92 additions and 73 deletions
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3
debian/changelog vendored
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@ -23,8 +23,7 @@ linux-2.6 (2.6.36-1~experimental.1) UNRELEASED; urgency=low
* [x86] Disable DRM_I830; the i915 driver is now used instead
[ Martin Michlmayr ]
* Revert "orion/kirkwood: reset PCIe unit on boot" since it breaks
the QNAP TS-209.
* Kirkwood: restrict the scope of the PCIe reset workaround
-- Ben Hutchings <ben@decadent.org.uk> Thu, 07 Oct 2010 03:24:21 +0100

90
debian/patches/bugfix/arm/kirkwood-restrict-pcie-reset.patch vendored Normal file
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@ -0,0 +1,90 @@
From: Nicolas Pitre <nico@fluxnic.net>
Date: Thu, 21 Oct 2010 19:48:33 +0000 (-0400)
Subject: [ARM] Kirkwood: restrict the scope of the PCIe reset workaround
X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Fnico%2Forion.git;a=commitdiff_plain;h=3924996bab2845bdf9a9d16ff7c20445de1ab55d
[ARM] Kirkwood: restrict the scope of the PCIe reset workaround
Commit 21f0ba90a447 "orion/kirkwood: reset PCIe unit on boot" made the
reset of the PCIe unit unconditional. While this may fix problems on some
targets, this also causes problems on other targets.
Saeed Bishara <saeed@marvell.com> said about the original problem: "We
couln't pinpoint the root cause of this issue, actually we failed to
reproduce that issue."
So let's restrict the reset of the PCIe unit only to the target where
the original problem was observed.
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
---
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c
index 2e14afe..6995199 100644
--- a/arch/arm/mach-kirkwood/ts41x-setup.c
+++ b/arch/arm/mach-kirkwood/ts41x-setup.c
@@ -27,6 +27,10 @@
#include "mpp.h"
#include "tsx1x-common.h"
+/* for the PCIe reset workaround */
+#include <plat/pcie.h>
+
+
#define QNAP_TS41X_JUMPER_JP1 45
static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = {
@@ -140,8 +144,16 @@ static void __init qnap_ts41x_init(void)
static int __init ts41x_pci_init(void)
{
- if (machine_is_ts41x())
+ if (machine_is_ts41x()) {
+ /*
+ * Without this explicit reset, the PCIe SATA controller
+ * (Marvell 88sx7042/sata_mv) is known to stop working
+ * after a few minutes.
+ */
+ orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE);
+
kirkwood_pcie_init(KW_PCIE0);
+ }
return 0;
}
diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h
index 3ebfef7..cc99163 100644
--- a/arch/arm/plat-orion/include/plat/pcie.h
+++ b/arch/arm/plat-orion/include/plat/pcie.h
@@ -11,12 +11,15 @@
#ifndef __PLAT_PCIE_H
#define __PLAT_PCIE_H
+struct pci_bus;
+
u32 orion_pcie_dev_id(void __iomem *base);
u32 orion_pcie_rev(void __iomem *base);
int orion_pcie_link_up(void __iomem *base);
int orion_pcie_x4_mode(void __iomem *base);
int orion_pcie_get_local_bus_nr(void __iomem *base);
void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
+void orion_pcie_reset(void __iomem *base);
void orion_pcie_setup(void __iomem *base,
struct mbus_dram_target_info *dram);
int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index 779553a..af2d733 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -182,11 +182,6 @@ void __init orion_pcie_setup(void __iomem *base,
u32 mask;
/*
- * soft reset PCIe unit
- */
- orion_pcie_reset(base);
-
- /*
* Point PCIe unit MBUS decode windows to DRAM space.
*/
orion_pcie_setup_wins(base, dram);

70
debian/patches/bugfix/arm/kirkwood-revert-pcie-reset.patch vendored
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@ -1,70 +0,0 @@
Revert "orion/kirkwood: reset PCIe unit on boot"
(21f0ba90a447090153edeaf2f14f9f7e8bd9bc80) since it breaks
QNAP TS-209.
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index 779553a..54c84a4 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -13,7 +13,6 @@
#include <linux/mbus.h>
#include <asm/mach/pci.h>
#include <plat/pcie.h>
-#include <linux/delay.h>
/*
* PCIe unit register offsets.
@@ -47,8 +46,6 @@
#define PCIE_STAT_BUS_OFFS 8
#define PCIE_STAT_BUS_MASK 0xff
#define PCIE_STAT_LINK_DOWN 1
-#define PCIE_DEBUG_CTRL 0x1a60
-#define PCIE_DEBUG_SOFT_RESET (1<<20)
u32 __init orion_pcie_dev_id(void __iomem *base)
@@ -88,32 +85,6 @@ void __init orion_pcie_set_local_bus_nr(void __iomem *base, int nr)
writel(stat, base + PCIE_STAT_OFF);
}
-void __init orion_pcie_reset(void __iomem *base)
-{
- u32 reg;
- int i;
-
- /*
- * MV-S104860-U0, Rev. C:
- * PCI Express Unit Soft Reset
- * When set, generates an internal reset in the PCI Express unit.
- * This bit should be cleared after the link is re-established.
- */
- reg = readl(base + PCIE_DEBUG_CTRL);
- reg |= PCIE_DEBUG_SOFT_RESET;
- writel(reg, base + PCIE_DEBUG_CTRL);
-
- for (i = 0; i < 20; i++) {
- mdelay(10);
-
- if (orion_pcie_link_up(base))
- break;
- }
-
- reg &= ~(PCIE_DEBUG_SOFT_RESET);
- writel(reg, base + PCIE_DEBUG_CTRL);
-}
-
/*
* Setup PCIE BARs and Address Decode Wins:
* BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks
@@ -182,11 +153,6 @@ void __init orion_pcie_setup(void __iomem *base,
u32 mask;
/*
- * soft reset PCIe unit
- */
- orion_pcie_reset(base);
-
- /*
* Point PCIe unit MBUS decode windows to DRAM space.
*/
orion_pcie_setup_wins(base, dram);

2
debian/patches/series/base vendored
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@ -48,4 +48,4 @@
+ bugfix/all/perf-Fix-detection-of-script-extension.patch
+ bugfix/x86/Skip-looking-for-ioapic-overrides-when-ioapics-are-not-present.patch
+ features/x86/ata_piix-Add-device-ID-for-ICH4-L.patch
+ bugfix/arm/kirkwood-revert-pcie-reset.patch
+ bugfix/arm/kirkwood-restrict-pcie-reset.patch