Add performance patches from git.marvell.com
svn path=/dists/sid/linux-2.6/; revision=13510
This commit is contained in:
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e50705cb22
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@ -7,6 +7,10 @@ linux-2.6 (2.6.29-4) UNRELEASED; urgency=low
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* Extend erase timeout in M25P80 SPI Flash driver (Peter Horton).
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* Add driver for GMT G760A fan speed PWM controller chip.
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* [arm/orion5x] Enable SENSORS_G760A.
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* Add patches from git.marvell.com:
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- allow for alternative __copy_to_user/__clear_user implementations
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- alternative copy_to_user/clear_user implementation copy_user
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* [arm/orion5x, armel/kirkwood] Enable UACCESS_WITH_MEMCPY.
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[ dann frazier ]
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* [parisc] Fix macro expansion in atomic.h fixing PHONET compilation issue
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@ -609,3 +609,5 @@ CONFIG_X25=m
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CONFIG_SENSORS_G760A=m
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CONFIG_UACCESS_WITH_MEMCPY=y
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@ -631,3 +631,5 @@ CONFIG_SPI_ORION=y
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##
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CONFIG_MTD_M25P80=y
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CONFIG_UACCESS_WITH_MEMCPY=y
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@ -0,0 +1,63 @@
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From: Nicolas Pitre <nico@cam.org>
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Date: Mon, 9 Mar 2009 02:34:45 +0000 (-0400)
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Subject: [ARM] allow for alternative __copy_to_user/__clear_user implementations
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X-Git-Url: http://git.marvell.com/?p=orion.git;a=commitdiff_plain;h=3e4bd7ea3a16ec3a6f93f62a0d206df5b7f900e9
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[ARM] allow for alternative __copy_to_user/__clear_user implementations
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This allows for optional alternative implementations of __copy_to_user
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and __clear_user, with a possible runtime fallback to the standard
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version when the alternative provides no gain over that standard
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version. This is done by making the standard __copy_to_user into a weak
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alias for the symbol __copy_to_user_std. Same thing for __clear_user.
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Those two functions are particularly good candidates to have alternative
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implementations for, since they rely on the STRT instruction which has
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lower performances than STM instructions on some CPU cores such as
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the ARM1176 and Marvell Feroceon.
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Signed-off-by: Nicolas Pitre <nico@marvell.com>
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---
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diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
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index 7897464..0da9bc9 100644
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--- a/arch/arm/include/asm/uaccess.h
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+++ b/arch/arm/include/asm/uaccess.h
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@@ -386,7 +386,9 @@ do { \
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#ifdef CONFIG_MMU
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extern unsigned long __must_check __copy_from_user(void *to, const void __user *from, unsigned long n);
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extern unsigned long __must_check __copy_to_user(void __user *to, const void *from, unsigned long n);
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+extern unsigned long __must_check __copy_to_user_std(void __user *to, const void *from, unsigned long n);
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extern unsigned long __must_check __clear_user(void __user *addr, unsigned long n);
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+extern unsigned long __must_check __clear_user_std(void __user *addr, unsigned long n);
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#else
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#define __copy_from_user(to,from,n) (memcpy(to, (void __force *)from, n), 0)
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#define __copy_to_user(to,from,n) (memcpy((void __force *)to, from, n), 0)
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diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S
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index 4d6bc71..844f567 100644
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--- a/arch/arm/lib/clear_user.S
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+++ b/arch/arm/lib/clear_user.S
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@@ -18,7 +18,8 @@
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* : sz - number of bytes to clear
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* Returns : number of bytes NOT cleared
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*/
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-ENTRY(__clear_user)
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+ENTRY(__clear_user_std)
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+WEAK(__clear_user)
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stmfd sp!, {r1, lr}
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mov r2, #0
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cmp r1, #4
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diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S
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index 22f968b..878820f 100644
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--- a/arch/arm/lib/copy_to_user.S
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+++ b/arch/arm/lib/copy_to_user.S
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@@ -86,7 +86,8 @@
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.text
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-ENTRY(__copy_to_user)
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+ENTRY(__copy_to_user_std)
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+WEAK(__copy_to_user)
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#include "copy_template.S"
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@ -0,0 +1,229 @@
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From: Lennert Buytenhek <buytenh@marvell.com>
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Date: Mon, 9 Mar 2009 18:30:09 +0000 (-0400)
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Subject: [ARM] alternative copy_to_user/clear_user implementation
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X-Git-Url: http://git.marvell.com/?p=orion.git;a=commitdiff_plain;h=2d6c3846a588b82d1d6e13ef1afcbef8667ad272
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[ARM] alternative copy_to_user/clear_user implementation
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This implements {copy_to,clear}_user() by faulting in the userland
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pages and then using the regular kernel mem{cpy,set}() to copy the
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data (while holding the page table lock). This is a win if the regular
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mem{cpy,set}() implementations are faster than the user copy functions,
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which is the case e.g. on Feroceon, where 8-word STMs (which memcpy()
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uses under the right conditions) give significantly higher memory write
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throughput than a sequence of individual 32bit stores.
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Here are numbers for page sized buffers on some Feroceon cores:
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- copy_to_user on Orion5x goes from 51 MB/s to 83 MB/s
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- clear_user on Orion5x goes from 89MB/s to 314MB/s
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- copy_to_user on Kirkwood goes from 240 MB/s to 356 MB/s
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- clear_user on Kirkwood goes from 367 MB/s to 1108 MB/s
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- copy_to_user on Disco-Duo goes from 248 MB/s to 398 MB/s
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- clear_user on Disco-Duo goes from 328 MB/s to 1741 MB/s
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Because the setup cost is non negligible, this is worthwhile only if
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the amount of data to copy is large enough. The operation falls back
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to the standard implementation when the amount of data is below a certain
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treshold. This treshold was determined empirically, however some targets
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could benefit from a lower runtime determined value for optimal results
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eventually.
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In the copy_from_user() case, this technique does not provide any
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worthwhile performance gain due to the fact that any kind of read access
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allocates the cache and subsequent 32bit loads are just as fast as the
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equivalent 8-word LDM.
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[ Nicolas Pitre came with the idea, Lennert Buytenhek wrote the code. ]
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Tested-by: Martin Michlmayr <tbm@cyrius.com>
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Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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Signed-off-by: Nicolas Pitre <nico@marvell.com>
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---
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diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
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index dbfdf87..0d1c72b 100644
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -983,6 +983,22 @@ config ALIGNMENT_TRAP
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correct operation of some network protocols. With an IP-only
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configuration it is safe to say N, otherwise say Y.
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+config UACCESS_WITH_MEMCPY
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+ bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
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+ depends on MMU && EXPERIMENTAL
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+ default y if CPU_FEROCEON
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+ help
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+ Implement faster copy_to_user and clear_user methods for CPU
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+ cores where a 8-word STM instruction give significantly higher
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+ memory write throughput than a sequence of individual 32bit stores.
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+
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+ A possible side effect is a slight increase in scheduling latency
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+ between threads sharing the same address space if they invoke
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+ such copy operations with large buffers.
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+
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+ However, if the CPU data cache is using a write-allocate mode,
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+ this option is unlikely to provide any performance gain.
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+
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endmenu
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menu "Boot options"
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diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
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index 866f84a..030ba72 100644
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--- a/arch/arm/lib/Makefile
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+++ b/arch/arm/lib/Makefile
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@@ -29,6 +29,9 @@ else
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endif
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endif
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+# using lib_ here won't override already available weak symbols
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+obj-$(CONFIG_UACCESS_WITH_MEMCPY) += uaccess_with_memcpy.o
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+
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lib-$(CONFIG_MMU) += $(mmu-y)
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ifeq ($(CONFIG_CPU_32v3),y)
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diff --git a/arch/arm/lib/uaccess_with_memcpy.c b/arch/arm/lib/uaccess_with_memcpy.c
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new file mode 100644
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index 0000000..8bd9fc7
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--- /dev/null
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+++ b/arch/arm/lib/uaccess_with_memcpy.c
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@@ -0,0 +1,139 @@
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+/*
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+ * linux/arch/arm/lib/uaccess_with_memcpy.c
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+ *
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+ * Copyright (C) 2009 Lennert Buytenhek <buytenh@wantstofly.org>
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+ * Copyright (C) 2009 Marvell Semiconductor
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/ctype.h>
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+#include <linux/uaccess.h>
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+#include <linux/rwsem.h>
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+#include <linux/mm.h>
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+#include <linux/sched.h>
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+#include <linux/hardirq.h> /* for in_atomic() */
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+#include <asm/current.h>
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+#include <asm/page.h>
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+
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+static int
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+pin_page_for_write(const void __user *_addr, pte_t **ptep, spinlock_t **ptlp)
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+{
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+ unsigned long addr = (unsigned long)_addr;
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+ pgd_t *pgd;
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+ pmd_t *pmd;
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+ pte_t *pte;
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+ spinlock_t *ptl;
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+
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+ pgd = pgd_offset(current->mm, addr);
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+ if (unlikely(pgd_none(*pgd) || pgd_bad(*pgd)))
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+ return 0;
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+
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+ pmd = pmd_offset(pgd, addr);
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+ if (unlikely(pmd_none(*pmd) || pmd_bad(*pmd)))
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+ return 0;
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+
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+ pte = pte_offset_map_lock(current->mm, pmd, addr, &ptl);
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+ if (unlikely(!pte_present(*pte) || !pte_young(*pte) ||
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+ !pte_write(*pte) || !pte_dirty(*pte))) {
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+ pte_unmap_unlock(pte, ptl);
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+ return 0;
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+ }
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+
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+ *ptep = pte;
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+ *ptlp = ptl;
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+
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+ return 1;
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+}
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+
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+unsigned long
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+__copy_to_user(void __user *to, const void *from, unsigned long n)
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+{
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+ int atomic;
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+
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+ if (n < 1024)
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+ return __copy_to_user_std(to, from, n);
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+
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+ if (unlikely(segment_eq(get_fs(), KERNEL_DS))) {
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+ memcpy((void *)to, from, n);
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+ return 0;
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+ }
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+
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+ /* the mmap semaphore is taken only if not in an atomic context */
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+ atomic = in_atomic();
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+
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+ if (!atomic)
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+ down_read(¤t->mm->mmap_sem);
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+ while (n) {
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+ pte_t *pte;
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+ spinlock_t *ptl;
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+ int tocopy;
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+
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+ while (!pin_page_for_write(to, &pte, &ptl)) {
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+ if (!atomic)
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+ up_read(¤t->mm->mmap_sem);
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+ if (__put_user(0, (char __user *)to))
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+ goto out;
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+ if (!atomic)
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+ down_read(¤t->mm->mmap_sem);
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+ }
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+
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+ tocopy = (~(unsigned long)to & ~PAGE_MASK) + 1;
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+ if (tocopy > n)
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+ tocopy = n;
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+
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+ memcpy((void *)to, from, tocopy);
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+ to += tocopy;
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+ from += tocopy;
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+ n -= tocopy;
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+
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+ pte_unmap_unlock(pte, ptl);
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+ }
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+ if (!atomic)
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+ up_read(¤t->mm->mmap_sem);
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+
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+out:
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+ return n;
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+}
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+
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+unsigned long __clear_user(void __user *addr, unsigned long n)
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+{
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+ if (n < 256)
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+ return __clear_user_std(addr, n);
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+
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+ if (unlikely(segment_eq(get_fs(), KERNEL_DS))) {
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+ memset((void *)addr, 0, n);
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+ return 0;
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+ }
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+
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+ down_read(¤t->mm->mmap_sem);
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+ while (n) {
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+ pte_t *pte;
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+ spinlock_t *ptl;
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+ int tocopy;
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+
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+ while (!pin_page_for_write(addr, &pte, &ptl)) {
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+ up_read(¤t->mm->mmap_sem);
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+ if (__put_user(0, (char __user *)addr))
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+ goto out;
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+ down_read(¤t->mm->mmap_sem);
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+ }
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+
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+ tocopy = (~(unsigned long)addr & ~PAGE_MASK) + 1;
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+ if (tocopy > n)
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+ tocopy = n;
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+
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+ memset((void *)addr, 0, tocopy);
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+ addr += tocopy;
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+ n -= tocopy;
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+
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+ pte_unmap_unlock(pte, ptl);
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+ }
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+ up_read(¤t->mm->mmap_sem);
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+
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+out:
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+ return n;
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+}
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@ -3,3 +3,5 @@
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+ bugfix/parisc/fix-macro-expansion-in-atomic.h.patch
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+ bugfix/all/btrfs-fix-__ucmpdi2-compile-bug.patch
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+ features/arm/g760a.patch
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+ features/arm/allow-alternative-copy-user.patch
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+ features/arm/alternative-copy-user.patch
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