[arm] Fix mvebu-mbus for non-io-coherent platforms.
svn path=/dists/sid/linux/; revision=22729
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@ -7,6 +7,8 @@ linux (4.0.4-2) UNRELEASED; urgency=medium
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* [armhf] Enable PCIe support for IMX6 boards. Patch from Vagrant
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Cascadian (Closes: #787029)
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* [armhf] Add stmmac-platform module to nic-modules udeb. (Closes: #786716)
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* [arm] Fix mvebu-mbus for non-io-coherent platforms. In particular
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armel/{orion5x,kirkwood}.
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-- Ben Hutchings <ben@decadent.org.uk> Wed, 27 May 2015 21:36:56 +0100
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50
debian/patches/bugfix/armel/bus-mvebu-mbus-do-not-set-WIN_CTRL_SYNCBARRIER-on-no.patch
vendored
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debian/patches/bugfix/armel/bus-mvebu-mbus-do-not-set-WIN_CTRL_SYNCBARRIER-on-no.patch
vendored
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@ -0,0 +1,50 @@
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From f16b8208c320e4f8433a03acb7756d90f1b57981 Mon Sep 17 00:00:00 2001
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From: Nicolas Schichan <nschichan@freebox.fr>
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Date: Thu, 28 May 2015 10:40:12 +0200
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Subject: [PATCH] bus: mvebu-mbus: do not set WIN_CTRL_SYNCBARRIER on non
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io-coherent platforms.
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Origin: http://article.gmane.org/gmane.linux.kernel.stable/137371
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Commit a0b5cd4ac2d6 ("bus: mvebu-mbus: use automatic I/O
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synchronization barriers") enabled the usage of automatic I/O
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synchronization barriers by enabling bit WIN_CTRL_SYNCBARRIER in the
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control registers of MBus windows, but on non io-coherent platforms
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(orion5x, kirkwood and dove) the WIN_CTRL_SYNCBARRIER bit in
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the window control register is either reserved (all windows except 6
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and 7) or enables read-only protection (windows 6 and 7).
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Signed-off-by: Nicolas Schichan <nschichan@freebox.fr>
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Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Cc: <stable@vger.kernel.org> # v4.0+
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Fixes: a0b5cd4ac2d6 ("bus: mvebu-mbus: use automatic I/O synchronization barriers")
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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---
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drivers/bus/mvebu-mbus.c | 4 +++-
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1 file changed, 3 insertions(+), 1 deletion(-)
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diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c
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index fb9ec62..7fa4510 100644
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--- a/drivers/bus/mvebu-mbus.c
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+++ b/drivers/bus/mvebu-mbus.c
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@@ -70,6 +70,7 @@
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*/
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#define WIN_CTRL_OFF 0x0000
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#define WIN_CTRL_ENABLE BIT(0)
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+/* Only on HW I/O coherency capable platforms */
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#define WIN_CTRL_SYNCBARRIER BIT(1)
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#define WIN_CTRL_TGT_MASK 0xf0
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#define WIN_CTRL_TGT_SHIFT 4
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@@ -323,8 +324,9 @@ static int mvebu_mbus_setup_window(struct mvebu_mbus_state *mbus,
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ctrl = ((size - 1) & WIN_CTRL_SIZE_MASK) |
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(attr << WIN_CTRL_ATTR_SHIFT) |
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(target << WIN_CTRL_TGT_SHIFT) |
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- WIN_CTRL_SYNCBARRIER |
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WIN_CTRL_ENABLE;
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+ if (mbus->hw_io_coherency)
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+ ctrl |= WIN_CTRL_SYNCBARRIER;
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writel(base & WIN_BASE_LOW, addr + WIN_BASE_OFF);
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writel(ctrl, addr + WIN_CTRL_OFF);
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--
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2.1.4
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@ -42,6 +42,7 @@ bugfix/mips/disable-advansys.patch
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bugfix/arm64/arm64-add-missing-dts-entry-for-X-Gene-platform.patch
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bugfix/arm64/arm64-removed-using-of-the-mask-attribute-in-the-dts.patch
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bugfix/x86/config-enable-need_dma_map_state-by-default-when-swi.patch
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bugfix/armel/bus-mvebu-mbus-do-not-set-WIN_CTRL_SYNCBARRIER-on-no.patch
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# Arch features
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features/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch
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