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[armhf] Add device-tree patches from linux-next to support USB and 

Ethernet on meson8b.
This commit is contained in:
Vagrant Cascadian 2018-03-19 19:27:39 -07:00
parent 75177c7c40
commit 6b6dc95db7
8 changed files with 315 additions and 0 deletions
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2
debian/changelog vendored
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@ -27,6 +27,8 @@ linux (4.16~rc5-1~exp2) UNRELEASED; urgency=medium
[ Vagrant Cascadian ]
* [armhf] Enable ARCH_MESON and related drivers.
* [armhf] Add device-tree patches from linux-next to support USB and
Ethernet on meson8b.
-- Ben Hutchings <ben@decadent.org.uk> Tue, 13 Mar 2018 16:12:54 +0000

37
debian/patches/features/armhf/meson8/0001-ARM-dts-meson8b-grow-the-reset-controller-memory-zon.patch vendored Normal file
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@ -0,0 +1,37 @@
From a2730ed3e0f39c528014673cb96807bb16a8ce35 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sun, 21 Jan 2018 23:14:12 +0100
Subject: [PATCH 1/6] ARM: dts: meson8b: grow the reset controller memory zone
The reset controller in the Meson8b SoCs also supports level resets.
These use the same defines (from
dt-bindings/reset/amlogic,meson8b-reset.h) as the reset pulses.
The reset-meson driver internally handles the difference if a consumer
requests a reset pulse or a level reset. However, for this to work we
must extend the memory zone of the reset controller.
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
---
arch/arm/boot/dts/meson8b.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 7cd03ed3742e..4c1ac3a44357 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -152,7 +152,7 @@
reset: reset-controller@4404 {
compatible = "amlogic,meson8b-reset";
- reg = <0x4404 0x20>;
+ reg = <0x4404 0x9c>;
#reset-cells = <1>;
};
--
2.11.0

44
debian/patches/features/armhf/meson8/0002-ARM-dts-meson8-add-the-reset-controller.patch vendored Normal file
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@ -0,0 +1,44 @@
From e3087187e5f18231e48450e602220eb65c409b59 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sun, 21 Jan 2018 23:14:13 +0100
Subject: [PATCH 2/6] ARM: dts: meson8: add the reset controller
Meson8 uses the same reset controller as Meson8b. Add the node along
with the #include for the reset lines to meson8.dtsi so we can use it
from there as well.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
---
arch/arm/boot/dts/meson8.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index d2e3eeaa1a5f..f48e89a7f7b4 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -46,6 +46,7 @@
#include <dt-bindings/clock/meson8b-clkc.h>
#include <dt-bindings/gpio/meson8-gpio.h>
#include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
+#include <dt-bindings/reset/amlogic,meson8b-reset.h>
#include "meson.dtsi"
/ {
@@ -187,6 +188,12 @@
reg = <0x8000 0x4>, <0x4000 0x460>;
};
+ reset: reset-controller@4404 {
+ compatible = "amlogic,meson8b-reset";
+ reg = <0x4404 0x9c>;
+ #reset-cells = <1>;
+ };
+
analog_top: analog-top@81a8 {
compatible = "amlogic,meson8-analog-top", "syscon";
reg = <0x81a8 0x14>;
--
2.11.0

35
debian/patches/features/armhf/meson8/0003-ARM-dts-meson8-add-the-USB-reset-line.patch vendored Normal file
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@ -0,0 +1,35 @@
From e1fa57dfd7e28b30d6419b7c309b4a890ff4410a Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sun, 21 Jan 2018 23:14:14 +0100
Subject: [PATCH 3/6] ARM: dts: meson8: add the USB reset line
Now that we support the reset controller on Meson8 we can add the reset
line to the USB PHYs (just like on Meson8b).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
---
arch/arm/boot/dts/meson8.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index f48e89a7f7b4..dcc9292d2ffa 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -390,10 +390,12 @@
compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy";
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
clock-names = "usb_general", "usb";
+ resets = <&reset RESET_USB_OTG>;
};
&usb1_phy {
compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy";
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
clock-names = "usb_general", "usb";
+ resets = <&reset RESET_USB_OTG>;
};
--
2.11.0

83
debian/patches/features/armhf/meson8/0004-ARM-dts-meson8b-extend-ethernet-controller-descripti.patch vendored Normal file
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@ -0,0 +1,83 @@
From b96446541d8390ec22e6dc579282770453ec98a4 Mon Sep 17 00:00:00 2001
From: Emiliano Ingrassia <ingrassia@epigenesys.com>
Date: Fri, 19 Jan 2018 02:48:00 +0100
Subject: [PATCH 4/6] ARM: dts: meson8b: extend ethernet controller description
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Enable S805 (aka Meson8b) ethernet pin multiplexing and
extend the controller description.
The programmable ethernet (PRG_ETHERNET) register address
value (0xc1108108), contained in meson.dtsi, is overridden
according to the value found in S805 SoC manual.
This also required to switch to "amlogic,meson8b-dwmac" compatible
to correctly configure that register.
The two clock sources "clkin0" and "clkin1" are both equals
to MPLL2 because, as reported in bit 9-7 register description,
that is the only Meson8b ethernet clock source.
Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
Tested-by: Linus Lüssing <linus.luessing@c0d3.blue>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
---
arch/arm/boot/dts/meson8b.dtsi | 35 +++++++++++++++++++++++++++++++++--
1 file changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 4c1ac3a44357..1a7c16640ea5 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -185,6 +185,27 @@
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_cbus 0 0 130>;
};
+
+ eth_rgmii_pins: eth-rgmii {
+ mux {
+ groups = "eth_tx_clk",
+ "eth_tx_en",
+ "eth_txd1_0",
+ "eth_txd1_1",
+ "eth_txd0_0",
+ "eth_txd0_1",
+ "eth_rx_clk",
+ "eth_rx_dv",
+ "eth_rxd1",
+ "eth_rxd0",
+ "eth_mdio_en",
+ "eth_mdc",
+ "eth_ref_clk",
+ "eth_txd2",
+ "eth_txd3";
+ function = "ethernet";
+ };
+ };
};
};
@@ -203,8 +224,18 @@
};
&ethmac {
- clocks = <&clkc CLKID_ETH>;
- clock-names = "stmmaceth";
+ compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
+
+ reg = <0xc9410000 0x10000
+ 0xc1108140 0x4>;
+
+ clocks = <&clkc CLKID_ETH>,
+ <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL2>;
+ clock-names = "stmmaceth", "clkin0", "clkin1";
+
+ resets = <&reset RESET_ETHERNET>;
+ reset-names = "stmmaceth";
};
&gpio_intc {
--
2.11.0

65
debian/patches/features/armhf/meson8/0005-ARM-dts-meson8b-odroidc1-ethernet-support.patch vendored Normal file
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@ -0,0 +1,65 @@
From 9c15795a4f96cb4f82a0e1503b46621251644bc2 Mon Sep 17 00:00:00 2001
From: Emiliano Ingrassia <ingrassia@epigenesys.com>
Date: Fri, 19 Jan 2018 02:49:17 +0100
Subject: [PATCH 5/6] ARM: dts: meson8b-odroidc1: ethernet support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY
which supports 10/100/1000 Mbps ethernet.
The PHY reset and interrupt lines are controlled by the SoC via
two GPIO lines (GPIOH_4 and GPIOH_3 respectively).
The PHY energy efficient ethernet (eee) mode is marked as broken
using "eee-broken-1000t" because, during tests, high packet losses
were experienced without it.
Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
Tested-by: Linus Lüssing <linus.luessing@c0d3.blue>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
---
arch/arm/boot/dts/meson8b-odroidc1.dts | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 9ff6ca4e20d0..d5e83051bb54 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -99,3 +99,33 @@
&usb1 {
status = "okay";
};
+
+&ethmac {
+ status = "okay";
+
+ snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 30000>;
+
+ pinctrl-0 = <&eth_rgmii_pins>;
+ pinctrl-names = "default";
+
+ phy-mode = "rgmii";
+ phy-handle = <&eth_phy>;
+ amlogic,tx-delay-ns = <4>;
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Realtek RTL8211F (0x001cc916) */
+ eth_phy: ethernet-phy@0 {
+ reg = <0>;
+ eee-broken-1000t;
+ interrupt-parent = <&gpio_intc>;
+ /* GPIOH_3 */
+ interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
+ };
+ };
+};
--
2.11.0

42
debian/patches/features/armhf/meson8/0006-ARM-dts-meson8b-add-the-I2C-clocks.patch vendored Normal file
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@ -0,0 +1,42 @@
From 7a6cc8be3938c322964065312d57439a92584488 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 17 Feb 2018 17:06:50 +0100
Subject: [PATCH 6/6] ARM: dts: meson8b: add the I2C clocks
Add the I2C clocks so the I2C busses can be used. The clock input is not
device specific (the AO I2C bus uses clk81 as input, while the two I2C
busses in CBUS have a separate "CLKID_I2C" gate, provided by the clock
controller.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
---
arch/arm/boot/dts/meson8b.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 1a7c16640ea5..5f7841b2d163 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -250,6 +250,18 @@
clock-names = "core";
};
+&i2c_AO {
+ clocks = <&clkc CLKID_CLK81>;
+};
+
+&i2c_A {
+ clocks = <&clkc CLKID_I2C>;
+};
+
+&i2c_B {
+ clocks = <&clkc CLKID_I2C>;
+};
+
&L2 {
arm,data-latency = <3 3 3>;
arm,tag-latency = <2 2 2>;
--
2.11.0

7
debian/patches/series vendored
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@ -71,6 +71,13 @@ features/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch
features/mips/MIPS-Loongson-3-Add-Loongson-LS3A-RS780E-1-way-machi.patch
features/x86/x86-memtest-WARN-if-bad-RAM-found.patch
features/x86/x86-make-x32-syscall-support-conditional.patch
# meson8b device-tree updates from next-20180316 to enable USB and Ethernet.
features/armhf/meson8/0001-ARM-dts-meson8b-grow-the-reset-controller-memory-zon.patch
features/armhf/meson8/0002-ARM-dts-meson8-add-the-reset-controller.patch
features/armhf/meson8/0003-ARM-dts-meson8-add-the-USB-reset-line.patch
features/armhf/meson8/0004-ARM-dts-meson8b-extend-ethernet-controller-descripti.patch
features/armhf/meson8/0005-ARM-dts-meson8b-odroidc1-ethernet-support.patch
features/armhf/meson8/0006-ARM-dts-meson8b-add-the-I2C-clocks.patch
# Miscellaneous bug fixes
bugfix/all/kbuild-use-nostdinc-in-compile-tests.patch