diff --git a/debian/changelog b/debian/changelog index 369811a07..6a2124951 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,9 @@ +linux-2.6 (2.6.34~rc6-1~experimental.1) UNRELEASED; urgency=low + + * New upstream release + + -- maximilian attems Wed, 05 May 2010 22:57:24 +0200 + linux-2.6 (2.6.33-1~experimental.5) experimental; urgency=low [ Ian Campbell ] diff --git a/debian/config/defines b/debian/config/defines index b7ecb2044..c69bd92e0 100644 --- a/debian/config/defines +++ b/debian/config/defines @@ -1,5 +1,5 @@ [abi] -abiname: 2 +abiname: 1 [base] arches: diff --git a/debian/patches/bugfix/all/block-blk_abort_request-lock-fix.patch b/debian/patches/bugfix/all/block-blk_abort_request-lock-fix.patch deleted file mode 100644 index a0b32ee43..000000000 --- a/debian/patches/bugfix/all/block-blk_abort_request-lock-fix.patch +++ /dev/null @@ -1,84 +0,0 @@ -From: Tejun Heo -Subject: libata/SCSI: fix locking around blk_abort_request() -References: bnc#585927 -Patch-mainline: submitted for 2.6.34-rc5 and stable (as two patches) - -blk_abort_request() expects queue lock to be held by the caller. -Grab it before calling the function. - -Lack of this synchronization led to infinite loop on corrupt -q->timeout_list. - -Signed-off-by: Tejun Heo ---- - drivers/ata/libata-eh.c | 4 ++++ - drivers/scsi/libsas/sas_ata.c | 4 ++++ - drivers/scsi/libsas/sas_scsi_host.c | 4 ++++ - 3 files changed, 12 insertions(+) - -Index: linux-2.6.32-SLE11-SP1/drivers/ata/libata-eh.c -=================================================================== ---- linux-2.6.32-SLE11-SP1.orig/drivers/ata/libata-eh.c -+++ linux-2.6.32-SLE11-SP1/drivers/ata/libata-eh.c -@@ -870,6 +870,8 @@ static void ata_eh_set_pending(struct at - void ata_qc_schedule_eh(struct ata_queued_cmd *qc) - { - struct ata_port *ap = qc->ap; -+ struct request_queue *q = qc->scsicmd->device->request_queue; -+ unsigned long flags; - - WARN_ON(!ap->ops->error_handler); - -@@ -881,7 +883,9 @@ void ata_qc_schedule_eh(struct ata_queue - * Note that ATA_QCFLAG_FAILED is unconditionally set after - * this function completes. - */ -+ spin_lock_irqsave(q->queue_lock, flags); - blk_abort_request(qc->scsicmd->request); -+ spin_unlock_irqrestore(q->queue_lock, flags); - } - - /** -Index: linux-2.6.32-SLE11-SP1/drivers/scsi/libsas/sas_ata.c -=================================================================== ---- linux-2.6.32-SLE11-SP1.orig/drivers/scsi/libsas/sas_ata.c -+++ linux-2.6.32-SLE11-SP1/drivers/scsi/libsas/sas_ata.c -@@ -394,11 +394,15 @@ int sas_ata_init_host_and_port(struct do - void sas_ata_task_abort(struct sas_task *task) - { - struct ata_queued_cmd *qc = task->uldd_task; -+ struct request_queue *q = qc->scsicmd->device->request_queue; - struct completion *waiting; -+ unsigned long flags; - - /* Bounce SCSI-initiated commands to the SCSI EH */ - if (qc->scsicmd) { -+ spin_lock_irqsave(q->queue_lock, flags); - blk_abort_request(qc->scsicmd->request); -+ spin_unlock_irqrestore(q->queue_lock, flags); - scsi_schedule_eh(qc->scsicmd->device->host); - return; - } -Index: linux-2.6.32-SLE11-SP1/drivers/scsi/libsas/sas_scsi_host.c -=================================================================== ---- linux-2.6.32-SLE11-SP1.orig/drivers/scsi/libsas/sas_scsi_host.c -+++ linux-2.6.32-SLE11-SP1/drivers/scsi/libsas/sas_scsi_host.c -@@ -1029,6 +1029,8 @@ int __sas_task_abort(struct sas_task *ta - void sas_task_abort(struct sas_task *task) - { - struct scsi_cmnd *sc = task->uldd_task; -+ struct request_queue *q = sc->device->request_queue; -+ unsigned long flags; - - /* Escape for libsas internal commands */ - if (!sc) { -@@ -1043,7 +1045,9 @@ void sas_task_abort(struct sas_task *tas - return; - } - -+ spin_lock_irqsave(q->queue_lock, flags); - blk_abort_request(sc->request); -+ spin_unlock_irqrestore(q->queue_lock, flags); - scsi_schedule_eh(sc->device->host); - } - diff --git a/debian/patches/bugfix/all/drivers-net-wireless-p54-txrx.c-Fix-off-by-one-error.patch b/debian/patches/bugfix/all/drivers-net-wireless-p54-txrx.c-Fix-off-by-one-error.patch deleted file mode 100644 index aa3f0b2ac..000000000 --- a/debian/patches/bugfix/all/drivers-net-wireless-p54-txrx.c-Fix-off-by-one-error.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 088ea189c4c75cdf211146faa4b341a0f7476be6 Mon Sep 17 00:00:00 2001 -From: Darren Jenkins -Date: Wed, 17 Feb 2010 23:40:15 +1100 -Subject: [PATCH] drivers/net/wireless/p54/txrx.c Fix off by one error - -fix off by one error in the queue size check of p54_tx_qos_accounting_alloc() - -Coverity CID: 13314 - -Signed-off-by: Darren Jenkins -Signed-off-by: John W. Linville ---- - drivers/net/wireless/p54/txrx.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/net/wireless/p54/txrx.c b/drivers/net/wireless/p54/txrx.c -index 0e8f694..6605799 100644 ---- a/drivers/net/wireless/p54/txrx.c -+++ b/drivers/net/wireless/p54/txrx.c -@@ -186,7 +186,7 @@ static int p54_tx_qos_accounting_alloc(struct p54_common *priv, - struct p54_tx_queue_stats *queue; - unsigned long flags; - -- if (WARN_ON(p54_queue > P54_QUEUE_NUM)) -+ if (WARN_ON(p54_queue >= P54_QUEUE_NUM)) - return -EINVAL; - - queue = &priv->tx_stats[p54_queue]; --- -1.6.5 - diff --git a/debian/patches/bugfix/all/drm-i915-Stop-trying-to-use-ACPI-lid-status-to-deter.patch b/debian/patches/bugfix/all/drm-i915-Stop-trying-to-use-ACPI-lid-status-to-deter.patch deleted file mode 100644 index 3283d2f55..000000000 --- a/debian/patches/bugfix/all/drm-i915-Stop-trying-to-use-ACPI-lid-status-to-deter.patch +++ /dev/null @@ -1,100 +0,0 @@ -From: Eric Anholt -Date: Wed, 17 Mar 2010 13:48:06 -0700 -Subject: [PATCH] drm/i915: Stop trying to use ACPI lid status to determine LVDS connection. - -I've been getting more and more quirk reports about this. It seems -clear at this point that other OSes are not using this for determining -whether the integrated panel should be turned on, and it is not -reliable for doing so. Better to light up an unintended panel than to -not light up the only usable output on the system. - -Signed-off-by: Eric Anholt -Acked-by: Jesse Barnes -[bwh: Backport to drm-2.6.33] - ---- a/drivers/gpu/drm/i915/i915_drv.h -+++ b/drivers/gpu/drm/i915/i915_drv.h -@@ -1045,6 +1045,13 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); - #define IS_I9XX(dev) (INTEL_INFO(dev)->is_i9xx) - #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) - -+#define IS_GEN3(dev) (IS_I915G(dev) || \ -+ IS_I915GM(dev) || \ -+ IS_I945G(dev) || \ -+ IS_I945GM(dev) || \ -+ IS_G33(dev) || \ -+ IS_PINEVIEW(dev)) -+ - #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) - - /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte ---- a/drivers/gpu/drm/i915/intel_lvds.c -+++ b/drivers/gpu/drm/i915/intel_lvds.c -@@ -599,53 +599,6 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder, - I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control); - } - --/* Some lid devices report incorrect lid status, assume they're connected */ --static const struct dmi_system_id bad_lid_status[] = { -- { -- .ident = "Compaq nx9020", -- .matches = { -- DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), -- DMI_MATCH(DMI_BOARD_NAME, "3084"), -- }, -- }, -- { -- .ident = "Samsung SX20S", -- .matches = { -- DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"), -- DMI_MATCH(DMI_BOARD_NAME, "SX20S"), -- }, -- }, -- { -- .ident = "Aspire One", -- .matches = { -- DMI_MATCH(DMI_SYS_VENDOR, "Acer"), -- DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"), -- }, -- }, -- { -- .ident = "Aspire 1810T", -- .matches = { -- DMI_MATCH(DMI_SYS_VENDOR, "Acer"), -- DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 1810T"), -- }, -- }, -- { -- .ident = "PC-81005", -- .matches = { -- DMI_MATCH(DMI_SYS_VENDOR, "MALATA"), -- DMI_MATCH(DMI_PRODUCT_NAME, "PC-81005"), -- }, -- }, -- { -- .ident = "Clevo M5x0N", -- .matches = { -- DMI_MATCH(DMI_SYS_VENDOR, "CLEVO Co."), -- DMI_MATCH(DMI_BOARD_NAME, "M5x0N"), -- }, -- }, -- { } --}; -- - /** - * Detect the LVDS connection. - * -@@ -661,12 +614,9 @@ static enum drm_connector_status intel_lvds_detect(struct drm_connector *connect - /* ACPI lid methods were generally unreliable in this generation, so - * don't even bother. - */ -- if (IS_I8XX(dev)) -+ if (IS_I8XX(dev) || IS_GEN3(dev)) - return connector_status_connected; - -- if (!dmi_check_system(bad_lid_status) && !acpi_lid_open()) -- status = connector_status_disconnected; -- - return status; - } - diff --git a/debian/patches/bugfix/all/drm-radeon-kms-further-spread-spectrum-fixes.patch b/debian/patches/bugfix/all/drm-radeon-kms-further-spread-spectrum-fixes.patch deleted file mode 100644 index ae081aa09..000000000 --- a/debian/patches/bugfix/all/drm-radeon-kms-further-spread-spectrum-fixes.patch +++ /dev/null @@ -1,97 +0,0 @@ -From 7aac5b711ff4c64bad5a6027cf6d38f1bbd53efe Mon Sep 17 00:00:00 2001 -From: Dave Airlie -Date: Tue, 20 Apr 2010 18:30:37 +1000 -Subject: [PATCH] drm/radeon/kms: further spread spectrum fixes - -Adjust modeset ordering to fix spread spectrum. -The spread spectrum command table relies on the -crtc routing to already be set in order to work -properly on some asics. - -Should fix fdo bug 25741. - -Signed-off-by: Alex Deucher -Signed-off-by: Dave Airlie - -Conflicts: - - drivers/gpu/drm/radeon/atombios_crtc.c ---- - drivers/gpu/drm/radeon/atombios_crtc.c | 5 +++++ - drivers/gpu/drm/radeon/radeon_encoders.c | 25 +++++++++++++++---------- - 2 files changed, 20 insertions(+), 10 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c -index c076eac..e70b575 100644 ---- a/drivers/gpu/drm/radeon/atombios_crtc.c -+++ b/drivers/gpu/drm/radeon/atombios_crtc.c -@@ -1115,6 +1115,11 @@ static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc, - - static void atombios_crtc_prepare(struct drm_crtc *crtc) - { -+ struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); -+ -+ /* pick pll */ -+ radeon_crtc->pll_id = radeon_atom_pick_pll(crtc); -+ - atombios_lock_crtc(crtc, ATOM_ENABLE); - atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); - } -diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c -index cac9e06..ff28ad8 100644 ---- a/drivers/gpu/drm/radeon/radeon_encoders.c -+++ b/drivers/gpu/drm/radeon/radeon_encoders.c -@@ -1207,6 +1207,9 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder) - } - - atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); -+ -+ /* update scratch regs with new routing */ -+ radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); - } - - static void -@@ -1317,19 +1320,9 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, - struct drm_device *dev = encoder->dev; - struct radeon_device *rdev = dev->dev_private; - struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); -- struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); - -- if (radeon_encoder->active_device & -- (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) { -- struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; -- if (dig) -- dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder); -- } - radeon_encoder->pixel_clock = adjusted_mode->clock; - -- radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); -- atombios_set_encoder_crtc_source(encoder); -- - if (ASIC_IS_AVIVO(rdev)) { - if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT)) - atombios_yuv_setup(encoder, true); -@@ -1483,8 +1476,20 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec - - static void radeon_atom_encoder_prepare(struct drm_encoder *encoder) - { -+ struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); -+ -+ if (radeon_encoder->active_device & -+ (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) { -+ struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; -+ if (dig) -+ dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder); -+ } -+ - radeon_atom_output_lock(encoder, true); - radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); -+ -+ /* this is needed for the pll/ss setup to work correctly in some cases */ -+ atombios_set_encoder_crtc_source(encoder); - } - - static void radeon_atom_encoder_commit(struct drm_encoder *encoder) --- -1.6.5.2 - diff --git a/debian/patches/bugfix/all/ext4-issue-discard-operation-before-releasing-blocks.patch b/debian/patches/bugfix/all/ext4-issue-discard-operation-before-releasing-blocks.patch deleted file mode 100644 index aa103bdda..000000000 --- a/debian/patches/bugfix/all/ext4-issue-discard-operation-before-releasing-blocks.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: Theodore Ts'o -Date: Tue, 20 Apr 2010 20:51:59 +0000 (-0400) -Subject: ext4: Issue the discard operation *before* releasing the blocks to be reused -X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftorvalds%2Flinux-2.6.git;a=commitdiff_plain;h=b90f687018e6d6c77d981b09203780f7001407e5 - -ext4: Issue the discard operation *before* releasing the blocks to be reused - -[ backported to 2.6.3[23] ] - -Otherwise, we can end up having data corruption because the blocks -could get reused and then discarded! - -https://bugzilla.kernel.org/show_bug.cgi?id=15579 - -Signed-off-by: "Theodore Ts'o" ---- - -diff --git a/fs/ext4/mballoc.c b/fs/ext4/mballoc.c -index 54df209..e5ab41b 100644 ---- a/fs/ext4/mballoc.c -+++ b/fs/ext4/mballoc.c -@@ -2534,6 +2534,20 @@ static void release_blocks_on_commit(journal_t *journal, transaction_t *txn) - mb_debug(1, "gonna free %u blocks in group %u (0x%p):", - entry->count, entry->group, entry); - -+ if (test_opt(sb, DISCARD)) { -+ ext4_fsblk_t discard_block; -+ struct ext4_super_block *es = EXT4_SB(sb)->s_es; -+ -+ discard_block = (ext4_fsblk_t)entry->group * -+ EXT4_BLOCKS_PER_GROUP(sb) -+ + entry->start_blk -+ + le32_to_cpu(es->s_first_data_block); -+ trace_ext4_discard_blocks(sb, -+ (unsigned long long)discard_block, -+ entry->count); -+ sb_issue_discard(sb, discard_block, entry->count); -+ } -+ - err = ext4_mb_load_buddy(sb, entry->group, &e4b); - /* we expect to find existing buddy because it's pinned */ - BUG_ON(err != 0); -@@ -2555,19 +2566,6 @@ static void release_blocks_on_commit(journal_t *journal, transaction_t *txn) - page_cache_release(e4b.bd_bitmap_page); - } - ext4_unlock_group(sb, entry->group); -- if (test_opt(sb, DISCARD)) { -- ext4_fsblk_t discard_block; -- struct ext4_super_block *es = EXT4_SB(sb)->s_es; -- -- discard_block = (ext4_fsblk_t)entry->group * -- EXT4_BLOCKS_PER_GROUP(sb) -- + entry->start_blk -- + le32_to_cpu(es->s_first_data_block); -- trace_ext4_discard_blocks(sb, -- (unsigned long long)discard_block, -- entry->count); -- sb_issue_discard(sb, discard_block, entry->count); -- } - kmem_cache_free(ext4_free_ext_cachep, entry); - ext4_mb_release_desc(&e4b); - } diff --git a/debian/patches/bugfix/all/forcedeth-fix-tx-limit2-flag-check.patch b/debian/patches/bugfix/all/forcedeth-fix-tx-limit2-flag-check.patch deleted file mode 100644 index 4b9ef1e8b..000000000 --- a/debian/patches/bugfix/all/forcedeth-fix-tx-limit2-flag-check.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 5c659322a904a7cc0265e7b183372b9bdebec6db Mon Sep 17 00:00:00 2001 -From: Ayaz Abdulla -Date: Tue, 13 Apr 2010 18:49:51 -0700 -Subject: [PATCH] forcedeth: fix tx limit2 flag check - -This is a fix for bug 572201 @ bugs.debian.org - -This patch fixes the TX_LIMIT feature flag. The previous logic check -for TX_LIMIT2 also took into account a device that only had TX_LIMIT -set. - -Reported-by: Stephen Mulcahu -Reported-by: Ben Huchings -Signed-off-by: Ayaz Abdulla -Signed-off-by: David S. Miller ---- - drivers/net/forcedeth.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c -index 73b260c..5c98f7c 100644 ---- a/drivers/net/forcedeth.c -+++ b/drivers/net/forcedeth.c -@@ -5899,7 +5899,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i - /* Limit the number of tx's outstanding for hw bug */ - if (id->driver_data & DEV_NEED_TX_LIMIT) { - np->tx_limit = 1; -- if ((id->driver_data & DEV_NEED_TX_LIMIT2) && -+ if (((id->driver_data & DEV_NEED_TX_LIMIT2) == DEV_NEED_TX_LIMIT2) && - pci_dev->revision >= 0xA2) - np->tx_limit = 0; - } --- -1.7.0.3 - diff --git a/debian/patches/bugfix/all/hugetlb-fix-infinite-loop-in-get_futex_key-when-backed-by-huge-pages.patch b/debian/patches/bugfix/all/hugetlb-fix-infinite-loop-in-get_futex_key-when-backed-by-huge-pages.patch deleted file mode 100644 index 8dc7a9a6f..000000000 --- a/debian/patches/bugfix/all/hugetlb-fix-infinite-loop-in-get_futex_key-when-backed-by-huge-pages.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 23be7468e8802a2ac1de6ee3eecb3ec7f14dc703 Mon Sep 17 00:00:00 2001 -From: Mel Gorman -Date: Fri, 23 Apr 2010 13:17:56 -0400 -Subject: hugetlb: fix infinite loop in get_futex_key() when backed by huge pages - -From: Mel Gorman - -commit 23be7468e8802a2ac1de6ee3eecb3ec7f14dc703 upstream. - -If a futex key happens to be located within a huge page mapped -MAP_PRIVATE, get_futex_key() can go into an infinite loop waiting for a -page->mapping that will never exist. - -See https://bugzilla.redhat.com/show_bug.cgi?id=552257 for more details -about the problem. - -This patch makes page->mapping a poisoned value that includes -PAGE_MAPPING_ANON mapped MAP_PRIVATE. This is enough for futex to -continue but because of PAGE_MAPPING_ANON, the poisoned value is not -dereferenced or used by futex. No other part of the VM should be -dereferencing the page->mapping of a hugetlbfs page as its page cache is -not on the LRU. - -This patch fixes the problem with the test case described in the bugzilla. - -[akpm@linux-foundation.org: mel cant spel] -Signed-off-by: Mel Gorman -Acked-by: Peter Zijlstra -Acked-by: Darren Hart -Signed-off-by: Andrew Morton -Signed-off-by: Linus Torvalds -Signed-off-by: Greg Kroah-Hartman - ---- - include/linux/poison.h | 9 +++++++++ - mm/hugetlb.c | 5 ++++- - 2 files changed, 13 insertions(+), 1 deletion(-) - ---- a/include/linux/poison.h -+++ b/include/linux/poison.h -@@ -48,6 +48,15 @@ - #define POISON_FREE 0x6b /* for use-after-free poisoning */ - #define POISON_END 0xa5 /* end-byte of poisoning */ - -+/********** mm/hugetlb.c **********/ -+/* -+ * Private mappings of hugetlb pages use this poisoned value for -+ * page->mapping. The core VM should not be doing anything with this mapping -+ * but futex requires the existence of some page->mapping value even though it -+ * is unused if PAGE_MAPPING_ANON is set. -+ */ -+#define HUGETLB_POISON ((void *)(0x00300300 + POISON_POINTER_DELTA + PAGE_MAPPING_ANON)) -+ - /********** arch/$ARCH/mm/init.c **********/ - #define POISON_FREE_INITMEM 0xcc - ---- a/mm/hugetlb.c -+++ b/mm/hugetlb.c -@@ -545,6 +545,7 @@ static void free_huge_page(struct page * - - mapping = (struct address_space *) page_private(page); - set_page_private(page, 0); -+ page->mapping = NULL; - BUG_ON(page_count(page)); - INIT_LIST_HEAD(&page->lru); - -@@ -2095,8 +2096,10 @@ retry: - spin_lock(&inode->i_lock); - inode->i_blocks += blocks_per_huge_page(h); - spin_unlock(&inode->i_lock); -- } else -+ } else { - lock_page(page); -+ page->mapping = HUGETLB_POISON; -+ } - } - - /* diff --git a/debian/patches/bugfix/all/ipheth-potential-null-dereferences-on-error-path.patch b/debian/patches/bugfix/all/ipheth-potential-null-dereferences-on-error-path.patch deleted file mode 100644 index 5d5023ad7..000000000 --- a/debian/patches/bugfix/all/ipheth-potential-null-dereferences-on-error-path.patch +++ /dev/null @@ -1,73 +0,0 @@ -From d87ff58fda926fe5cb01214cccf1c72422ac776d Mon Sep 17 00:00:00 2001 -From: Dan Carpenter -Date: Mon, 26 Apr 2010 23:20:12 +0000 -Subject: [PATCH] ipheth: potential null dereferences on error path -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The calls to usb_free_buffer() dereference rx_urb and tx_urb in the -parameter list but those could be NULL. - -Signed-off-by: Dan Carpenter -Acked-by: L. Alberto Giménez -Signed-off-by: David S. Miller ---- - drivers/net/usb/ipheth.c | 15 ++++++++------- - 1 files changed, 8 insertions(+), 7 deletions(-) - -diff --git a/drivers/net/usb/ipheth.c b/drivers/net/usb/ipheth.c -index fd10331..418825d 100644 ---- a/drivers/net/usb/ipheth.c -+++ b/drivers/net/usb/ipheth.c -@@ -122,25 +122,25 @@ static int ipheth_alloc_urbs(struct ipheth_device *iphone) - - tx_urb = usb_alloc_urb(0, GFP_KERNEL); - if (tx_urb == NULL) -- goto error; -+ goto error_nomem; - - rx_urb = usb_alloc_urb(0, GFP_KERNEL); - if (rx_urb == NULL) -- goto error; -+ goto free_tx_urb; - - tx_buf = usb_buffer_alloc(iphone->udev, - IPHETH_BUF_SIZE, - GFP_KERNEL, - &tx_urb->transfer_dma); - if (tx_buf == NULL) -- goto error; -+ goto free_rx_urb; - - rx_buf = usb_buffer_alloc(iphone->udev, - IPHETH_BUF_SIZE, - GFP_KERNEL, - &rx_urb->transfer_dma); - if (rx_buf == NULL) -- goto error; -+ goto free_tx_buf; - - - iphone->tx_urb = tx_urb; -@@ -149,13 +149,14 @@ static int ipheth_alloc_urbs(struct ipheth_device *iphone) - iphone->rx_buf = rx_buf; - return 0; - --error: -- usb_buffer_free(iphone->udev, IPHETH_BUF_SIZE, rx_buf, -- rx_urb->transfer_dma); -+free_tx_buf: - usb_buffer_free(iphone->udev, IPHETH_BUF_SIZE, tx_buf, - tx_urb->transfer_dma); -+free_rx_urb: - usb_free_urb(rx_urb); -+free_tx_urb: - usb_free_urb(tx_urb); -+error_nomem: - return -ENOMEM; - } - --- -1.7.0.3 - diff --git a/debian/patches/bugfix/all/libata-ata_piix-clear-spurious-IRQ.patch b/debian/patches/bugfix/all/libata-ata_piix-clear-spurious-IRQ.patch deleted file mode 100644 index 2940473f1..000000000 --- a/debian/patches/bugfix/all/libata-ata_piix-clear-spurious-IRQ.patch +++ /dev/null @@ -1,148 +0,0 @@ -From: Tejun Heo -Subject: libata,ata_piix: detect and clear spurious IRQs -Patch-Mainline: Backported from changes pending for 2.6.34 -References: bnc#445872, bnc#589449 - -Backport spurious IRQ handling from 2.6.34. It isn't exactly the same -form in that it doesn't use callbacks but implements custom -piix_interrupt() but should function the same. This protects ata_piix -against nobody-cared which gets reported not so rarely. - -Signed-off-by: Tejun Heo -Signed-off-by: Tejun Heo ---- - drivers/ata/ata_piix.c | 76 ++++++++++++++++++++++++++++++++++++++++++++++- - drivers/ata/libata-sff.c | 12 ++++++- - 2 files changed, 85 insertions(+), 3 deletions(-) - -Index: linux-2.6.32-SLE11-SP1/drivers/ata/ata_piix.c -=================================================================== ---- linux-2.6.32-SLE11-SP1.orig/drivers/ata/ata_piix.c -+++ linux-2.6.32-SLE11-SP1/drivers/ata/ata_piix.c -@@ -949,6 +949,80 @@ static int piix_sidpr_scr_read(struct at - return 0; - } - -+static irqreturn_t piix_interrupt(int irq, void *dev_instance) -+{ -+ struct ata_host *host = dev_instance; -+ bool retried = false; -+ unsigned int i; -+ unsigned int handled = 0, polling = 0, idle = 0; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&host->lock, flags); -+retry: -+ handled = idle = polling = 0; -+ for (i = 0; i < host->n_ports; i++) { -+ struct ata_port *ap = host->ports[i]; -+ struct ata_queued_cmd *qc; -+ -+ if (ata_port_is_dummy(ap)) -+ continue; -+ -+ qc = ata_qc_from_tag(ap, ap->link.active_tag); -+ if (qc) { -+ if (!(qc->tf.flags & ATA_TFLAG_POLLING)) -+ handled |= ata_sff_host_intr(ap, qc); -+ else -+ polling |= 1 << i; -+ } else -+ idle |= 1 << i; -+ } -+ -+ /* -+ * If no port was expecting IRQ but the controller is actually -+ * asserting IRQ line, nobody cared will ensue. Check IRQ -+ * pending status if available and clear spurious IRQ. -+ */ -+ if (!handled && !retried) { -+ bool retry = false; -+ -+ for (i = 0; i < host->n_ports; i++) { -+ struct ata_port *ap = host->ports[i]; -+ u8 host_stat; -+ -+ if (polling & (1 << i)) -+ continue; -+ -+ if (unlikely(!ap->ioaddr.bmdma_addr)) -+ continue; -+ -+ host_stat = ap->ops->bmdma_status(ap); -+ if (!(host_stat & ATA_DMA_INTR)) -+ continue; -+ -+ if (idle & (1 << i)) { -+ ap->ops->sff_check_status(ap); -+ ap->ops->sff_irq_clear(ap); -+ } else { -+ /* clear INTRQ and check if BUSY cleared */ -+ if (!(ap->ops->sff_check_status(ap) & ATA_BUSY)) -+ retry |= true; -+ /* -+ * With command in flight, we can't do -+ * sff_irq_clear() w/o racing with completion. -+ */ -+ } -+ } -+ if (retry) { -+ retried = true; -+ goto retry; -+ } -+ } -+ -+ spin_unlock_irqrestore(&host->lock, flags); -+ -+ return IRQ_RETVAL(handled); -+} -+ - static int piix_sidpr_scr_write(struct ata_link *link, - unsigned int reg, u32 val) - { -@@ -1607,7 +1681,7 @@ static int __devinit piix_init_one(struc - host->flags |= ATA_HOST_PARALLEL_SCAN; - - pci_set_master(pdev); -- return ata_pci_sff_activate_host(host, ata_sff_interrupt, &piix_sht); -+ return ata_pci_sff_activate_host(host, piix_interrupt, &piix_sht); - } - - static void piix_remove_one(struct pci_dev *pdev) -Index: linux-2.6.32-SLE11-SP1/drivers/ata/libata-sff.c -=================================================================== ---- linux-2.6.32-SLE11-SP1.orig/drivers/ata/libata-sff.c -+++ linux-2.6.32-SLE11-SP1/drivers/ata/libata-sff.c -@@ -1667,6 +1667,7 @@ unsigned int ata_sff_host_intr(struct at - { - struct ata_eh_info *ehi = &ap->link.eh_info; - u8 status, host_stat = 0; -+ bool bmdma_stopped = false; - - VPRINTK("ata%u: protocol %d task_state %d\n", - ap->print_id, qc->tf.protocol, ap->hsm_task_state); -@@ -1699,6 +1700,7 @@ unsigned int ata_sff_host_intr(struct at - - /* before we do anything else, clear DMA-Start bit */ - ap->ops->bmdma_stop(qc); -+ bmdma_stopped = true; - - if (unlikely(host_stat & ATA_DMA_ERR)) { - /* error when transfering data to/from memory */ -@@ -1716,8 +1718,14 @@ unsigned int ata_sff_host_intr(struct at - - /* check main status, clearing INTRQ if needed */ - status = ata_sff_irq_status(ap); -- if (status & ATA_BUSY) -- goto idle_irq; -+ if (status & ATA_BUSY) { -+ if (bmdma_stopped) { -+ /* BMDMA engine is already stopped, we're screwed */ -+ qc->err_mask |= AC_ERR_HSM; -+ ap->hsm_task_state = HSM_ST_ERR; -+ } else -+ goto idle_irq; -+ } - - /* ack bmdma irq events */ - ap->ops->sff_irq_clear(ap); diff --git a/debian/patches/bugfix/all/libata-fix-accesses-at-LBA28-boundary.patch b/debian/patches/bugfix/all/libata-fix-accesses-at-LBA28-boundary.patch deleted file mode 100644 index 87036a31d..000000000 --- a/debian/patches/bugfix/all/libata-fix-accesses-at-LBA28-boundary.patch +++ /dev/null @@ -1,35 +0,0 @@ -From: Mark Lord -Date: Wed, 7 Apr 2010 17:52:08 +0000 (-0400) -Subject: libata: Fix accesses at LBA28 boundary (old bug, but nasty) (v2) -X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftorvalds%2Flinux-2.6.git;a=commitdiff_plain;h=45c4d015a92f72ec47acd0c7557abdc0c8a6499d - -libata: Fix accesses at LBA28 boundary (old bug, but nasty) (v2) - -Most drives from Seagate, Hitachi, and possibly other brands, -do not allow LBA28 access to sector number 0x0fffffff (2^28 - 1). -So instead use LBA48 for such accesses. - -This bug could bite a lot of systems, especially when the user has -taken care to align partitions to 4KB boundaries. On misaligned systems, -it is less likely to be encountered, since a 4KB read would end at -0x10000000 rather than at 0x0fffffff. - -Signed-off-by: Mark Lord -Signed-off-by: Jeff Garzik ---- - -diff --git a/include/linux/ata.h b/include/linux/ata.h -index b4c85e2..700c5b9 100644 ---- a/include/linux/ata.h -+++ b/include/linux/ata.h -@@ -1025,8 +1025,8 @@ static inline int ata_ok(u8 status) - - static inline int lba_28_ok(u64 block, u32 n_block) - { -- /* check the ending block number */ -- return ((block + n_block) < ((u64)1 << 28)) && (n_block <= 256); -+ /* check the ending block number: must be LESS THAN 0x0fffffff */ -+ return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= 256); - } - - static inline int lba_48_ok(u64 block, u32 n_block) diff --git a/debian/patches/bugfix/all/p54pci-move-tx-cleanup-into-tasklet.patch b/debian/patches/bugfix/all/p54pci-move-tx-cleanup-into-tasklet.patch deleted file mode 100644 index ec556a98f..000000000 --- a/debian/patches/bugfix/all/p54pci-move-tx-cleanup-into-tasklet.patch +++ /dev/null @@ -1,180 +0,0 @@ -From d713804c6032b95cd3035014e16fadebb9655c6f Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sun, 17 Jan 2010 23:19:25 +0100 -Subject: [PATCH] p54pci: move tx cleanup into tasklet - -This patch moves the tx cleanup routines out of the critical -interrupt context and into the (previously known as rx) tasklet. - -The main goal of this operation is to remove the extensive -usage of spin_lock_irqsaves in the generic p54common library. - -The next step would be to modify p54usb to do the -rx processing inside a tasklet (just like usbnet). - -Signed-off-by: Christian Lamparter -Signed-off-by: John W. Linville ---- - drivers/net/wireless/p54/p54pci.c | 56 +++++++++++++++++++------------------ - drivers/net/wireless/p54/p54pci.h | 6 ++-- - 2 files changed, 32 insertions(+), 30 deletions(-) - -diff --git a/drivers/net/wireless/p54/p54pci.c b/drivers/net/wireless/p54/p54pci.c -index 4bf4c21..48cae48 100644 ---- a/drivers/net/wireless/p54/p54pci.c -+++ b/drivers/net/wireless/p54/p54pci.c -@@ -234,25 +234,26 @@ static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index, - p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf); - } - --/* caller must hold priv->lock */ - static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index, - int ring_index, struct p54p_desc *ring, u32 ring_limit, -- void **tx_buf) -+ struct sk_buff **tx_buf) - { -+ unsigned long flags; - struct p54p_priv *priv = dev->priv; - struct p54p_ring_control *ring_control = priv->ring_control; - struct p54p_desc *desc; -+ struct sk_buff *skb; - u32 idx, i; - - i = (*index) % ring_limit; - (*index) = idx = le32_to_cpu(ring_control->device_idx[1]); - idx %= ring_limit; - -+ spin_lock_irqsave(&priv->lock, flags); - while (i != idx) { - desc = &ring[i]; -- if (tx_buf[i]) -- if (FREE_AFTER_TX((struct sk_buff *) tx_buf[i])) -- p54_free_skb(dev, tx_buf[i]); -+ -+ skb = tx_buf[i]; - tx_buf[i] = NULL; - - pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr), -@@ -263,17 +264,32 @@ static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index, - desc->len = 0; - desc->flags = 0; - -+ if (skb && FREE_AFTER_TX(skb)) { -+ spin_unlock_irqrestore(&priv->lock, flags); -+ p54_free_skb(dev, skb); -+ spin_lock_irqsave(&priv->lock, flags); -+ } -+ - i++; - i %= ring_limit; - } -+ spin_unlock_irqrestore(&priv->lock, flags); - } - --static void p54p_rx_tasklet(unsigned long dev_id) -+static void p54p_tasklet(unsigned long dev_id) - { - struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id; - struct p54p_priv *priv = dev->priv; - struct p54p_ring_control *ring_control = priv->ring_control; - -+ p54p_check_tx_ring(dev, &priv->tx_idx_mgmt, 3, ring_control->tx_mgmt, -+ ARRAY_SIZE(ring_control->tx_mgmt), -+ priv->tx_buf_mgmt); -+ -+ p54p_check_tx_ring(dev, &priv->tx_idx_data, 1, ring_control->tx_data, -+ ARRAY_SIZE(ring_control->tx_data), -+ priv->tx_buf_data); -+ - p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt, - ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt); - -@@ -288,38 +304,24 @@ static irqreturn_t p54p_interrupt(int irq, void *dev_id) - { - struct ieee80211_hw *dev = dev_id; - struct p54p_priv *priv = dev->priv; -- struct p54p_ring_control *ring_control = priv->ring_control; - __le32 reg; - - spin_lock(&priv->lock); - reg = P54P_READ(int_ident); - if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) { -- spin_unlock(&priv->lock); -- return IRQ_HANDLED; -+ goto out; - } -- - P54P_WRITE(int_ack, reg); - - reg &= P54P_READ(int_enable); - -- if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) { -- p54p_check_tx_ring(dev, &priv->tx_idx_mgmt, -- 3, ring_control->tx_mgmt, -- ARRAY_SIZE(ring_control->tx_mgmt), -- priv->tx_buf_mgmt); -- -- p54p_check_tx_ring(dev, &priv->tx_idx_data, -- 1, ring_control->tx_data, -- ARRAY_SIZE(ring_control->tx_data), -- priv->tx_buf_data); -- -- tasklet_schedule(&priv->rx_tasklet); -- -- } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT)) -+ if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) -+ tasklet_schedule(&priv->tasklet); -+ else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT)) - complete(&priv->boot_comp); - -+out: - spin_unlock(&priv->lock); -- - return reg ? IRQ_HANDLED : IRQ_NONE; - } - -@@ -368,7 +370,7 @@ static void p54p_stop(struct ieee80211_hw *dev) - unsigned int i; - struct p54p_desc *desc; - -- tasklet_kill(&priv->rx_tasklet); -+ tasklet_kill(&priv->tasklet); - - P54P_WRITE(int_enable, cpu_to_le32(0)); - P54P_READ(int_enable); -@@ -559,7 +561,7 @@ static int __devinit p54p_probe(struct pci_dev *pdev, - priv->common.tx = p54p_tx; - - spin_lock_init(&priv->lock); -- tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev); -+ tasklet_init(&priv->tasklet, p54p_tasklet, (unsigned long)dev); - - err = request_firmware(&priv->firmware, "isl3886pci", - &priv->pdev->dev); -diff --git a/drivers/net/wireless/p54/p54pci.h b/drivers/net/wireless/p54/p54pci.h -index fbb6839..2feead6 100644 ---- a/drivers/net/wireless/p54/p54pci.h -+++ b/drivers/net/wireless/p54/p54pci.h -@@ -92,7 +92,7 @@ struct p54p_priv { - struct p54_common common; - struct pci_dev *pdev; - struct p54p_csr __iomem *map; -- struct tasklet_struct rx_tasklet; -+ struct tasklet_struct tasklet; - const struct firmware *firmware; - spinlock_t lock; - struct p54p_ring_control *ring_control; -@@ -101,8 +101,8 @@ struct p54p_priv { - u32 rx_idx_mgmt, tx_idx_mgmt; - struct sk_buff *rx_buf_data[8]; - struct sk_buff *rx_buf_mgmt[4]; -- void *tx_buf_data[32]; -- void *tx_buf_mgmt[4]; -+ struct sk_buff *tx_buf_data[32]; -+ struct sk_buff *tx_buf_mgmt[4]; - struct completion boot_comp; - }; - --- -1.6.5 - diff --git a/debian/patches/bugfix/all/p54pci-revise-tx-locking.patch b/debian/patches/bugfix/all/p54pci-revise-tx-locking.patch deleted file mode 100644 index 5c3b77efd..000000000 --- a/debian/patches/bugfix/all/p54pci-revise-tx-locking.patch +++ /dev/null @@ -1,100 +0,0 @@ -From b92f7d30830a319148df2943b7565989494e5ad1 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Fri, 22 Jan 2010 08:01:11 +0100 -Subject: [PATCH] p54pci: revise tx locking - -This patch continues the effort which began with: -"[PATCH] p54pci: move tx cleanup into tasklet". - -Thanks to these changes, p54pci's interrupt & tx -cleanup routines can be made lock-less. - -Signed-off-by: Christian Lamparter -Signed-off-by: John W. Linville ---- - drivers/net/wireless/p54/p54pci.c | 16 ++++------------ - 1 files changed, 4 insertions(+), 12 deletions(-) - -diff --git a/drivers/net/wireless/p54/p54pci.c b/drivers/net/wireless/p54/p54pci.c -index 48cae48..bda29c0 100644 ---- a/drivers/net/wireless/p54/p54pci.c -+++ b/drivers/net/wireless/p54/p54pci.c -@@ -238,7 +238,6 @@ static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index, - int ring_index, struct p54p_desc *ring, u32 ring_limit, - struct sk_buff **tx_buf) - { -- unsigned long flags; - struct p54p_priv *priv = dev->priv; - struct p54p_ring_control *ring_control = priv->ring_control; - struct p54p_desc *desc; -@@ -249,7 +248,6 @@ static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index, - (*index) = idx = le32_to_cpu(ring_control->device_idx[1]); - idx %= ring_limit; - -- spin_lock_irqsave(&priv->lock, flags); - while (i != idx) { - desc = &ring[i]; - -@@ -264,16 +262,12 @@ static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index, - desc->len = 0; - desc->flags = 0; - -- if (skb && FREE_AFTER_TX(skb)) { -- spin_unlock_irqrestore(&priv->lock, flags); -+ if (skb && FREE_AFTER_TX(skb)) - p54_free_skb(dev, skb); -- spin_lock_irqsave(&priv->lock, flags); -- } - - i++; - i %= ring_limit; - } -- spin_unlock_irqrestore(&priv->lock, flags); - } - - static void p54p_tasklet(unsigned long dev_id) -@@ -306,7 +300,6 @@ static irqreturn_t p54p_interrupt(int irq, void *dev_id) - struct p54p_priv *priv = dev->priv; - __le32 reg; - -- spin_lock(&priv->lock); - reg = P54P_READ(int_ident); - if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) { - goto out; -@@ -321,15 +314,14 @@ static irqreturn_t p54p_interrupt(int irq, void *dev_id) - complete(&priv->boot_comp); - - out: -- spin_unlock(&priv->lock); - return reg ? IRQ_HANDLED : IRQ_NONE; - } - - static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb) - { -+ unsigned long flags; - struct p54p_priv *priv = dev->priv; - struct p54p_ring_control *ring_control = priv->ring_control; -- unsigned long flags; - struct p54p_desc *desc; - dma_addr_t mapping; - u32 device_idx, idx, i; -@@ -370,14 +362,14 @@ static void p54p_stop(struct ieee80211_hw *dev) - unsigned int i; - struct p54p_desc *desc; - -- tasklet_kill(&priv->tasklet); -- - P54P_WRITE(int_enable, cpu_to_le32(0)); - P54P_READ(int_enable); - udelay(10); - - free_irq(priv->pdev->irq, dev); - -+ tasklet_kill(&priv->tasklet); -+ - P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET)); - - for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) { --- -1.6.5 - diff --git a/debian/patches/bugfix/all/p54usb-Add-usbid-for-Corega-CG-WLUSB2GT.patch b/debian/patches/bugfix/all/p54usb-Add-usbid-for-Corega-CG-WLUSB2GT.patch deleted file mode 100644 index 42f6ff778..000000000 --- a/debian/patches/bugfix/all/p54usb-Add-usbid-for-Corega-CG-WLUSB2GT.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 15a69a81731d337a3d9db51692ff8704c1114f43 Mon Sep 17 00:00:00 2001 -From: Shimada Hirofumi -Date: Sun, 14 Feb 2010 04:16:16 +0900 -Subject: [PATCH] p54usb: Add usbid for Corega CG-WLUSB2GT. - -Signed-off-by: Shimada Hirofumi -Signed-off-by: YOSHIFUJI Hideaki -Signed-off-by: John W. Linville ---- - drivers/net/wireless/p54/p54usb.c | 1 + - 1 files changed, 1 insertions(+), 0 deletions(-) - -diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c -index 92af9b9..dcb484b 100644 ---- a/drivers/net/wireless/p54/p54usb.c -+++ b/drivers/net/wireless/p54/p54usb.c -@@ -36,6 +36,7 @@ static struct usb_device_id p54u_table[] __devinitdata = { - /* Version 1 devices (pci chip + net2280) */ - {USB_DEVICE(0x0506, 0x0a11)}, /* 3COM 3CRWE254G72 */ - {USB_DEVICE(0x0707, 0xee06)}, /* SMC 2862W-G */ -+ {USB_DEVICE(0x07aa, 0x001c)}, /* Corega CG-WLUSB2GT */ - {USB_DEVICE(0x083a, 0x4501)}, /* Accton 802.11g WN4501 USB */ - {USB_DEVICE(0x083a, 0x4502)}, /* Siemens Gigaset USB Adapter */ - {USB_DEVICE(0x083a, 0x5501)}, /* Phillips CPWUA054 */ --- -1.6.5 - diff --git a/debian/patches/bugfix/all/reiserfs-fix-permissions-on-reiserfs_priv.patch b/debian/patches/bugfix/all/reiserfs-fix-permissions-on-reiserfs_priv.patch deleted file mode 100644 index 4a2257b10..000000000 --- a/debian/patches/bugfix/all/reiserfs-fix-permissions-on-reiserfs_priv.patch +++ /dev/null @@ -1,79 +0,0 @@ -From: Jeff Mahoney -Subject: [PATCH] reiserfs: Fix permissions on .reiserfs_priv -References: bnc#593906 CVE-2010-1146 -Patch-mainline: Submitted 8 Apr 2010 - - Commit 677c9b2e393a0cd203bd54e9c18b012b2c73305a removed the magic - from the lookup code to hide the .reiserfs_priv directory since it - was getting loaded at mount-time instead. The intent was that the - entry would be hidden from the user via a poisoned d_compare, but - this was faulty. - - This introduced a security issue where unpriviledged users could - access and modify extended attributes or ACLs belonging to other - users, including root. - - This patch resolves the issue by properly hiding .reiserfs_priv. This - was the intent of the xattr poisoning code, but it appears to have - never worked as expected. This is fixed by using d_revalidate instead - of d_compare. - - This patch makes -oexpose_privroot a no-op. I'm fine leaving it this - way. The effort involved in working out the corner cases wrt permissions - and caching outweigh the benefit of the feature. - -Signed-off-by: Jeff Mahoney ---- - - fs/reiserfs/dir.c | 2 -- - fs/reiserfs/xattr.c | 17 ++++------------- - 2 files changed, 4 insertions(+), 15 deletions(-) - ---- a/fs/reiserfs/dir.c -+++ b/fs/reiserfs/dir.c -@@ -45,8 +45,6 @@ static inline bool is_privroot_deh(struc - struct reiserfs_de_head *deh) - { - struct dentry *privroot = REISERFS_SB(dir->d_sb)->priv_root; -- if (reiserfs_expose_privroot(dir->d_sb)) -- return 0; - return (dir == dir->d_parent && privroot->d_inode && - deh->deh_objectid == INODE_PKEY(privroot->d_inode)->k_objectid); - } ---- a/fs/reiserfs/xattr.c -+++ b/fs/reiserfs/xattr.c -@@ -972,21 +972,13 @@ int reiserfs_permission(struct inode *in - return generic_permission(inode, mask, NULL); - } - --/* This will catch lookups from the fs root to .reiserfs_priv */ --static int --xattr_lookup_poison(struct dentry *dentry, struct qstr *q1, struct qstr *name) -+static int xattr_hide_revalidate(struct dentry *dentry, struct nameidata *nd) - { -- struct dentry *priv_root = REISERFS_SB(dentry->d_sb)->priv_root; -- if (container_of(q1, struct dentry, d_name) == priv_root) -- return -ENOENT; -- if (q1->len == name->len && -- !memcmp(q1->name, name->name, name->len)) -- return 0; -- return 1; -+ return -EPERM; - } - - static const struct dentry_operations xattr_lookup_poison_ops = { -- .d_compare = xattr_lookup_poison, -+ .d_revalidate = xattr_hide_revalidate, - }; - - int reiserfs_lookup_privroot(struct super_block *s) -@@ -1000,8 +992,7 @@ int reiserfs_lookup_privroot(struct supe - strlen(PRIVROOT_NAME)); - if (!IS_ERR(dentry)) { - REISERFS_SB(s)->priv_root = dentry; -- if (!reiserfs_expose_privroot(s)) -- s->s_root->d_op = &xattr_lookup_poison_ops; -+ dentry->d_op = &xattr_lookup_poison_ops; - if (dentry->d_inode) - dentry->d_inode->i_flags |= S_PRIVATE; - } else diff --git a/debian/patches/bugfix/all/stable/2.6.33.1.patch b/debian/patches/bugfix/all/stable/2.6.33.1.patch deleted file mode 100644 index 88543cbda..000000000 --- a/debian/patches/bugfix/all/stable/2.6.33.1.patch +++ /dev/null @@ -1,5513 +0,0 @@ -diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt -index e7848a0..e2c7487 100644 ---- a/Documentation/kernel-parameters.txt -+++ b/Documentation/kernel-parameters.txt -@@ -2703,6 +2703,13 @@ and is between 256 and 4096 characters. It is defined in the file - medium is write-protected). - Example: quirks=0419:aaf5:rl,0421:0433:rc - -+ userpte= -+ [X86] Flags controlling user PTE allocations. -+ -+ nohigh = do not allocate PTE pages in -+ HIGHMEM regardless of setting -+ of CONFIG_HIGHPTE. -+ - vdso= [X86,SH] - vdso=2: enable compat VDSO (default with COMPAT_VDSO) - vdso=1: enable VDSO (default) -diff --git a/Documentation/laptops/thinkpad-acpi.txt b/Documentation/laptops/thinkpad-acpi.txt -index 75afa12..39c0a09 100644 ---- a/Documentation/laptops/thinkpad-acpi.txt -+++ b/Documentation/laptops/thinkpad-acpi.txt -@@ -650,6 +650,10 @@ LCD, CRT or DVI (if available). The following commands are available: - echo expand_toggle > /proc/acpi/ibm/video - echo video_switch > /proc/acpi/ibm/video - -+NOTE: Access to this feature is restricted to processes owning the -+CAP_SYS_ADMIN capability for safety reasons, as it can interact badly -+enough with some versions of X.org to crash it. -+ - Each video output device can be enabled or disabled individually. - Reading /proc/acpi/ibm/video shows the status of each device. - -diff --git a/arch/Kconfig b/arch/Kconfig -index 9d055b4..25e69f7 100644 ---- a/arch/Kconfig -+++ b/arch/Kconfig -@@ -6,8 +6,6 @@ config OPROFILE - tristate "OProfile system profiling (EXPERIMENTAL)" - depends on PROFILING - depends on HAVE_OPROFILE -- depends on TRACING_SUPPORT -- select TRACING - select RING_BUFFER - select RING_BUFFER_ALLOW_SWAP - help -diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c -index f9f4724..14531ab 100644 ---- a/arch/x86/ia32/ia32_aout.c -+++ b/arch/x86/ia32/ia32_aout.c -@@ -327,7 +327,6 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs) - current->mm->free_area_cache = TASK_UNMAPPED_BASE; - current->mm->cached_hole_size = 0; - -- current->mm->mmap = NULL; - install_exec_creds(bprm); - current->flags &= ~PF_FORKNOEXEC; - -diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h -index 7c7c16c..5f61f6e 100644 ---- a/arch/x86/include/asm/io_apic.h -+++ b/arch/x86/include/asm/io_apic.h -@@ -160,6 +160,7 @@ extern int io_apic_get_redir_entries(int ioapic); - struct io_apic_irq_attr; - extern int io_apic_set_pci_routing(struct device *dev, int irq, - struct io_apic_irq_attr *irq_attr); -+void setup_IO_APIC_irq_extra(u32 gsi); - extern int (*ioapic_renumber_irq)(int ioapic, int irq); - extern void ioapic_init_mappings(void); - extern void ioapic_insert_resources(void); -diff --git a/arch/x86/include/asm/pgalloc.h b/arch/x86/include/asm/pgalloc.h -index 0e8c2a0..271de94 100644 ---- a/arch/x86/include/asm/pgalloc.h -+++ b/arch/x86/include/asm/pgalloc.h -@@ -23,6 +23,11 @@ static inline void paravirt_release_pud(unsigned long pfn) {} - #endif - - /* -+ * Flags to use when allocating a user page table page. -+ */ -+extern gfp_t __userpte_alloc_gfp; -+ -+/* - * Allocate and free page tables. - */ - extern pgd_t *pgd_alloc(struct mm_struct *); -diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h -index 40be813..14cc74b 100644 ---- a/arch/x86/include/asm/uv/uv_hub.h -+++ b/arch/x86/include/asm/uv/uv_hub.h -@@ -329,7 +329,8 @@ static inline unsigned long uv_read_global_mmr64(int pnode, unsigned long offset - */ - static inline unsigned long uv_global_gru_mmr_address(int pnode, unsigned long offset) - { -- return UV_GLOBAL_GRU_MMR_BASE | offset | (pnode << uv_hub_info->m_val); -+ return UV_GLOBAL_GRU_MMR_BASE | offset | -+ ((unsigned long)pnode << uv_hub_info->m_val); - } - - static inline void uv_write_global_mmr8(int pnode, unsigned long offset, unsigned char val) -diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h -index 2b49454..8f6b011 100644 ---- a/arch/x86/include/asm/vmx.h -+++ b/arch/x86/include/asm/vmx.h -@@ -251,6 +251,7 @@ enum vmcs_field { - #define EXIT_REASON_MSR_READ 31 - #define EXIT_REASON_MSR_WRITE 32 - #define EXIT_REASON_MWAIT_INSTRUCTION 36 -+#define EXIT_REASON_MONITOR_INSTRUCTION 39 - #define EXIT_REASON_PAUSE_INSTRUCTION 40 - #define EXIT_REASON_MCE_DURING_VMENTRY 41 - #define EXIT_REASON_TPR_BELOW_THRESHOLD 43 -diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c -index af1c583..0a2b21a 100644 ---- a/arch/x86/kernel/acpi/boot.c -+++ b/arch/x86/kernel/acpi/boot.c -@@ -446,6 +446,12 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) - int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) - { - *irq = gsi; -+ -+#ifdef CONFIG_X86_IO_APIC -+ if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) -+ setup_IO_APIC_irq_extra(gsi); -+#endif -+ - return 0; - } - -@@ -473,7 +479,8 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) - plat_gsi = mp_register_gsi(dev, gsi, trigger, polarity); - } - #endif -- acpi_gsi_to_irq(plat_gsi, &irq); -+ irq = plat_gsi; -+ - return irq; - } - -diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c -index 53243ca..be37059 100644 ---- a/arch/x86/kernel/apic/io_apic.c -+++ b/arch/x86/kernel/apic/io_apic.c -@@ -1539,6 +1539,56 @@ static void __init setup_IO_APIC_irqs(void) - } - - /* -+ * for the gsit that is not in first ioapic -+ * but could not use acpi_register_gsi() -+ * like some special sci in IBM x3330 -+ */ -+void setup_IO_APIC_irq_extra(u32 gsi) -+{ -+ int apic_id = 0, pin, idx, irq; -+ int node = cpu_to_node(boot_cpu_id); -+ struct irq_desc *desc; -+ struct irq_cfg *cfg; -+ -+ /* -+ * Convert 'gsi' to 'ioapic.pin'. -+ */ -+ apic_id = mp_find_ioapic(gsi); -+ if (apic_id < 0) -+ return; -+ -+ pin = mp_find_ioapic_pin(apic_id, gsi); -+ idx = find_irq_entry(apic_id, pin, mp_INT); -+ if (idx == -1) -+ return; -+ -+ irq = pin_2_irq(idx, apic_id, pin); -+#ifdef CONFIG_SPARSE_IRQ -+ desc = irq_to_desc(irq); -+ if (desc) -+ return; -+#endif -+ desc = irq_to_desc_alloc_node(irq, node); -+ if (!desc) { -+ printk(KERN_INFO "can not get irq_desc for %d\n", irq); -+ return; -+ } -+ -+ cfg = desc->chip_data; -+ add_pin_to_irq_node(cfg, node, apic_id, pin); -+ -+ if (test_bit(pin, mp_ioapic_routing[apic_id].pin_programmed)) { -+ pr_debug("Pin %d-%d already programmed\n", -+ mp_ioapics[apic_id].apicid, pin); -+ return; -+ } -+ set_bit(pin, mp_ioapic_routing[apic_id].pin_programmed); -+ -+ setup_IO_APIC_irq(apic_id, pin, irq, desc, -+ irq_trigger(idx), irq_polarity(idx)); -+} -+ -+/* - * Set up the timer pin, possibly with the 8259A-master behind. - */ - static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin, -@@ -3228,12 +3278,9 @@ unsigned int create_irq_nr(unsigned int irq_want, int node) - } - spin_unlock_irqrestore(&vector_lock, flags); - -- if (irq > 0) { -- dynamic_irq_init(irq); -- /* restore it, in case dynamic_irq_init clear it */ -- if (desc_new) -- desc_new->chip_data = cfg_new; -- } -+ if (irq > 0) -+ dynamic_irq_init_keep_chip_data(irq); -+ - return irq; - } - -@@ -3256,17 +3303,12 @@ void destroy_irq(unsigned int irq) - { - unsigned long flags; - struct irq_cfg *cfg; -- struct irq_desc *desc; - -- /* store it, in case dynamic_irq_cleanup clear it */ -- desc = irq_to_desc(irq); -- cfg = desc->chip_data; -- dynamic_irq_cleanup(irq); -- /* connect back irq_cfg */ -- desc->chip_data = cfg; -+ dynamic_irq_cleanup_keep_chip_data(irq); - - free_irte(irq); - spin_lock_irqsave(&vector_lock, flags); -+ cfg = irq_to_desc(irq)->chip_data; - __clear_irq_vector(irq, cfg); - spin_unlock_irqrestore(&vector_lock, flags); - } -diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c -index 704bddc..8e1aac8 100644 ---- a/arch/x86/kernel/reboot.c -+++ b/arch/x86/kernel/reboot.c -@@ -461,6 +461,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { - DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"), - }, - }, -+ { /* Handle problems with rebooting on the iMac9,1. */ -+ .callback = set_pci_reboot, -+ .ident = "Apple iMac9,1", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), -+ DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1"), -+ }, -+ }, - { } - }; - -diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c -index 7e8faea..c998d27 100644 ---- a/arch/x86/kvm/emulate.c -+++ b/arch/x86/kvm/emulate.c -@@ -76,6 +76,7 @@ - #define GroupDual (1<<15) /* Alternate decoding of mod == 3 */ - #define GroupMask 0xff /* Group number stored in bits 0:7 */ - /* Misc flags */ -+#define Priv (1<<27) /* instruction generates #GP if current CPL != 0 */ - #define No64 (1<<28) - /* Source 2 operand type */ - #define Src2None (0<<29) -@@ -88,6 +89,7 @@ - enum { - Group1_80, Group1_81, Group1_82, Group1_83, - Group1A, Group3_Byte, Group3, Group4, Group5, Group7, -+ Group8, Group9, - }; - - static u32 opcode_table[256] = { -@@ -210,7 +212,7 @@ static u32 opcode_table[256] = { - SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps, - /* 0xF0 - 0xF7 */ - 0, 0, 0, 0, -- ImplicitOps, ImplicitOps, Group | Group3_Byte, Group | Group3, -+ ImplicitOps | Priv, ImplicitOps, Group | Group3_Byte, Group | Group3, - /* 0xF8 - 0xFF */ - ImplicitOps, 0, ImplicitOps, ImplicitOps, - ImplicitOps, ImplicitOps, Group | Group4, Group | Group5, -@@ -218,16 +220,20 @@ static u32 opcode_table[256] = { - - static u32 twobyte_table[256] = { - /* 0x00 - 0x0F */ -- 0, Group | GroupDual | Group7, 0, 0, 0, ImplicitOps, ImplicitOps, 0, -- ImplicitOps, ImplicitOps, 0, 0, 0, ImplicitOps | ModRM, 0, 0, -+ 0, Group | GroupDual | Group7, 0, 0, -+ 0, ImplicitOps, ImplicitOps | Priv, 0, -+ ImplicitOps | Priv, ImplicitOps | Priv, 0, 0, -+ 0, ImplicitOps | ModRM, 0, 0, - /* 0x10 - 0x1F */ - 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, 0, - /* 0x20 - 0x2F */ -- ModRM | ImplicitOps, ModRM, ModRM | ImplicitOps, ModRM, 0, 0, 0, 0, -+ ModRM | ImplicitOps | Priv, ModRM | Priv, -+ ModRM | ImplicitOps | Priv, ModRM | Priv, -+ 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - /* 0x30 - 0x3F */ -- ImplicitOps, 0, ImplicitOps, 0, -- ImplicitOps, ImplicitOps, 0, 0, -+ ImplicitOps | Priv, 0, ImplicitOps | Priv, 0, -+ ImplicitOps, ImplicitOps | Priv, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - /* 0x40 - 0x47 */ - DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov, -@@ -267,11 +273,12 @@ static u32 twobyte_table[256] = { - 0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov, - DstReg | SrcMem16 | ModRM | Mov, - /* 0xB8 - 0xBF */ -- 0, 0, DstMem | SrcImmByte | ModRM, DstMem | SrcReg | ModRM | BitOp, -+ 0, 0, Group | Group8, DstMem | SrcReg | ModRM | BitOp, - 0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov, - DstReg | SrcMem16 | ModRM | Mov, - /* 0xC0 - 0xCF */ -- 0, 0, 0, DstMem | SrcReg | ModRM | Mov, 0, 0, 0, ImplicitOps | ModRM, -+ 0, 0, 0, DstMem | SrcReg | ModRM | Mov, -+ 0, 0, 0, Group | GroupDual | Group9, - 0, 0, 0, 0, 0, 0, 0, 0, - /* 0xD0 - 0xDF */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -@@ -320,16 +327,24 @@ static u32 group_table[] = { - SrcMem | ModRM | Stack, 0, - SrcMem | ModRM | Stack, 0, SrcMem | ModRM | Stack, 0, - [Group7*8] = -- 0, 0, ModRM | SrcMem, ModRM | SrcMem, -+ 0, 0, ModRM | SrcMem | Priv, ModRM | SrcMem | Priv, - SrcNone | ModRM | DstMem | Mov, 0, -- SrcMem16 | ModRM | Mov, SrcMem | ModRM | ByteOp, -+ SrcMem16 | ModRM | Mov | Priv, SrcMem | ModRM | ByteOp | Priv, -+ [Group8*8] = -+ 0, 0, 0, 0, -+ DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM, -+ DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM, -+ [Group9*8] = -+ 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, - }; - - static u32 group2_table[] = { - [Group7*8] = -- SrcNone | ModRM, 0, 0, SrcNone | ModRM, -+ SrcNone | ModRM | Priv, 0, 0, SrcNone | ModRM, - SrcNone | ModRM | DstMem | Mov, 0, - SrcMem16 | ModRM | Mov, 0, -+ [Group9*8] = -+ 0, 0, 0, 0, 0, 0, 0, 0, - }; - - /* EFLAGS bit definitions. */ -@@ -1640,12 +1655,6 @@ emulate_sysexit(struct x86_emulate_ctxt *ctxt) - return -1; - } - -- /* sysexit must be called from CPL 0 */ -- if (kvm_x86_ops->get_cpl(ctxt->vcpu) != 0) { -- kvm_inject_gp(ctxt->vcpu, 0); -- return -1; -- } -- - setup_syscalls_segments(ctxt, &cs, &ss); - - if ((c->rex_prefix & 0x8) != 0x0) -@@ -1709,6 +1718,12 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) - memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs); - saved_eip = c->eip; - -+ /* Privileged instruction can be executed only in CPL=0 */ -+ if ((c->d & Priv) && kvm_x86_ops->get_cpl(ctxt->vcpu)) { -+ kvm_inject_gp(ctxt->vcpu, 0); -+ goto done; -+ } -+ - if (((c->d & ModRM) && (c->modrm_mod != 3)) || (c->d & MemAbs)) - memop = c->modrm_ea; - -@@ -1982,6 +1997,12 @@ special_insn: - int err; - - sel = c->src.val; -+ -+ if (c->modrm_reg == VCPU_SREG_CS) { -+ kvm_queue_exception(ctxt->vcpu, UD_VECTOR); -+ goto done; -+ } -+ - if (c->modrm_reg == VCPU_SREG_SS) - toggle_interruptibility(ctxt, X86_SHADOW_INT_MOV_SS); - -diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c -index d4918d6..8a8e139 100644 ---- a/arch/x86/kvm/vmx.c -+++ b/arch/x86/kvm/vmx.c -@@ -1224,6 +1224,8 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf) - CPU_BASED_USE_IO_BITMAPS | - CPU_BASED_MOV_DR_EXITING | - CPU_BASED_USE_TSC_OFFSETING | -+ CPU_BASED_MWAIT_EXITING | -+ CPU_BASED_MONITOR_EXITING | - CPU_BASED_INVLPG_EXITING; - opt = CPU_BASED_TPR_SHADOW | - CPU_BASED_USE_MSR_BITMAPS | -@@ -3416,6 +3418,12 @@ static int handle_pause(struct kvm_vcpu *vcpu) - return 1; - } - -+static int handle_invalid_op(struct kvm_vcpu *vcpu) -+{ -+ kvm_queue_exception(vcpu, UD_VECTOR); -+ return 1; -+} -+ - /* - * The exit handlers return 1 if the exit was handled fully and guest execution - * may resume. Otherwise they set the kvm_run parameter to indicate what needs -@@ -3453,6 +3461,8 @@ static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu) = { - [EXIT_REASON_EPT_VIOLATION] = handle_ept_violation, - [EXIT_REASON_EPT_MISCONFIG] = handle_ept_misconfig, - [EXIT_REASON_PAUSE_INSTRUCTION] = handle_pause, -+ [EXIT_REASON_MWAIT_INSTRUCTION] = handle_invalid_op, -+ [EXIT_REASON_MONITOR_INSTRUCTION] = handle_invalid_op, - }; - - static const int kvm_vmx_max_exit_handlers = -diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c -index ed34f5e..c9ba9de 100644 ---- a/arch/x86/mm/pgtable.c -+++ b/arch/x86/mm/pgtable.c -@@ -6,6 +6,14 @@ - - #define PGALLOC_GFP GFP_KERNEL | __GFP_NOTRACK | __GFP_REPEAT | __GFP_ZERO - -+#ifdef CONFIG_HIGHPTE -+#define PGALLOC_USER_GFP __GFP_HIGHMEM -+#else -+#define PGALLOC_USER_GFP 0 -+#endif -+ -+gfp_t __userpte_alloc_gfp = PGALLOC_GFP | PGALLOC_USER_GFP; -+ - pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) - { - return (pte_t *)__get_free_page(PGALLOC_GFP); -@@ -15,16 +23,29 @@ pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address) - { - struct page *pte; - --#ifdef CONFIG_HIGHPTE -- pte = alloc_pages(PGALLOC_GFP | __GFP_HIGHMEM, 0); --#else -- pte = alloc_pages(PGALLOC_GFP, 0); --#endif -+ pte = alloc_pages(__userpte_alloc_gfp, 0); - if (pte) - pgtable_page_ctor(pte); - return pte; - } - -+static int __init setup_userpte(char *arg) -+{ -+ if (!arg) -+ return -EINVAL; -+ -+ /* -+ * "userpte=nohigh" disables allocation of user pagetables in -+ * high memory. -+ */ -+ if (strcmp(arg, "nohigh") == 0) -+ __userpte_alloc_gfp &= ~__GFP_HIGHMEM; -+ else -+ return -EINVAL; -+ return 0; -+} -+early_param("userpte", setup_userpte); -+ - void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte) - { - pgtable_page_dtor(pte); -diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c -index 3347f69..2c505ee 100644 ---- a/arch/x86/oprofile/nmi_int.c -+++ b/arch/x86/oprofile/nmi_int.c -@@ -159,7 +159,7 @@ static int nmi_setup_mux(void) - - for_each_possible_cpu(i) { - per_cpu(cpu_msrs, i).multiplex = -- kmalloc(multiplex_size, GFP_KERNEL); -+ kzalloc(multiplex_size, GFP_KERNEL); - if (!per_cpu(cpu_msrs, i).multiplex) - return 0; - } -@@ -179,7 +179,6 @@ static void nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs) - if (counter_config[i].enabled) { - multiplex[i].saved = -(u64)counter_config[i].count; - } else { -- multiplex[i].addr = 0; - multiplex[i].saved = 0; - } - } -@@ -189,25 +188,27 @@ static void nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs) - - static void nmi_cpu_save_mpx_registers(struct op_msrs *msrs) - { -+ struct op_msr *counters = msrs->counters; - struct op_msr *multiplex = msrs->multiplex; - int i; - - for (i = 0; i < model->num_counters; ++i) { - int virt = op_x86_phys_to_virt(i); -- if (multiplex[virt].addr) -- rdmsrl(multiplex[virt].addr, multiplex[virt].saved); -+ if (counters[i].addr) -+ rdmsrl(counters[i].addr, multiplex[virt].saved); - } - } - - static void nmi_cpu_restore_mpx_registers(struct op_msrs *msrs) - { -+ struct op_msr *counters = msrs->counters; - struct op_msr *multiplex = msrs->multiplex; - int i; - - for (i = 0; i < model->num_counters; ++i) { - int virt = op_x86_phys_to_virt(i); -- if (multiplex[virt].addr) -- wrmsrl(multiplex[virt].addr, multiplex[virt].saved); -+ if (counters[i].addr) -+ wrmsrl(counters[i].addr, multiplex[virt].saved); - } - } - -@@ -303,11 +304,11 @@ static int allocate_msrs(void) - - int i; - for_each_possible_cpu(i) { -- per_cpu(cpu_msrs, i).counters = kmalloc(counters_size, -+ per_cpu(cpu_msrs, i).counters = kzalloc(counters_size, - GFP_KERNEL); - if (!per_cpu(cpu_msrs, i).counters) - return 0; -- per_cpu(cpu_msrs, i).controls = kmalloc(controls_size, -+ per_cpu(cpu_msrs, i).controls = kzalloc(controls_size, - GFP_KERNEL); - if (!per_cpu(cpu_msrs, i).controls) - return 0; -diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c -index 39686c2..1ed963d 100644 ---- a/arch/x86/oprofile/op_model_amd.c -+++ b/arch/x86/oprofile/op_model_amd.c -@@ -76,19 +76,6 @@ static struct op_ibs_config ibs_config; - - #ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX - --static void op_mux_fill_in_addresses(struct op_msrs * const msrs) --{ -- int i; -- -- for (i = 0; i < NUM_VIRT_COUNTERS; i++) { -- int hw_counter = op_x86_virt_to_phys(i); -- if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i)) -- msrs->multiplex[i].addr = MSR_K7_PERFCTR0 + hw_counter; -- else -- msrs->multiplex[i].addr = 0; -- } --} -- - static void op_mux_switch_ctrl(struct op_x86_model_spec const *model, - struct op_msrs const * const msrs) - { -@@ -98,7 +85,7 @@ static void op_mux_switch_ctrl(struct op_x86_model_spec const *model, - /* enable active counters */ - for (i = 0; i < NUM_COUNTERS; ++i) { - int virt = op_x86_phys_to_virt(i); -- if (!counter_config[virt].enabled) -+ if (!reset_value[virt]) - continue; - rdmsrl(msrs->controls[i].addr, val); - val &= model->reserved; -@@ -107,10 +94,6 @@ static void op_mux_switch_ctrl(struct op_x86_model_spec const *model, - } - } - --#else -- --static inline void op_mux_fill_in_addresses(struct op_msrs * const msrs) { } -- - #endif - - /* functions for op_amd_spec */ -@@ -122,18 +105,12 @@ static void op_amd_fill_in_addresses(struct op_msrs * const msrs) - for (i = 0; i < NUM_COUNTERS; i++) { - if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i)) - msrs->counters[i].addr = MSR_K7_PERFCTR0 + i; -- else -- msrs->counters[i].addr = 0; - } - - for (i = 0; i < NUM_CONTROLS; i++) { - if (reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i)) - msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i; -- else -- msrs->controls[i].addr = 0; - } -- -- op_mux_fill_in_addresses(msrs); - } - - static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, -@@ -144,7 +121,8 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, - - /* setup reset_value */ - for (i = 0; i < NUM_VIRT_COUNTERS; ++i) { -- if (counter_config[i].enabled) -+ if (counter_config[i].enabled -+ && msrs->counters[op_x86_virt_to_phys(i)].addr) - reset_value[i] = counter_config[i].count; - else - reset_value[i] = 0; -@@ -169,9 +147,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, - /* enable active counters */ - for (i = 0; i < NUM_COUNTERS; ++i) { - int virt = op_x86_phys_to_virt(i); -- if (!counter_config[virt].enabled) -- continue; -- if (!msrs->counters[i].addr) -+ if (!reset_value[virt]) - continue; - - /* setup counter registers */ -@@ -405,16 +381,6 @@ static int init_ibs_nmi(void) - return 1; - } - --#ifdef CONFIG_NUMA -- /* Sanity check */ -- /* Works only for 64bit with proper numa implementation. */ -- if (nodes != num_possible_nodes()) { -- printk(KERN_DEBUG "Failed to setup CPU node(s) for IBS, " -- "found: %d, expected %d", -- nodes, num_possible_nodes()); -- return 1; -- } --#endif - return 0; - } - -diff --git a/arch/x86/oprofile/op_model_p4.c b/arch/x86/oprofile/op_model_p4.c -index ac6b354..e6a160a 100644 ---- a/arch/x86/oprofile/op_model_p4.c -+++ b/arch/x86/oprofile/op_model_p4.c -@@ -394,12 +394,6 @@ static void p4_fill_in_addresses(struct op_msrs * const msrs) - setup_num_counters(); - stag = get_stagger(); - -- /* initialize some registers */ -- for (i = 0; i < num_counters; ++i) -- msrs->counters[i].addr = 0; -- for (i = 0; i < num_controls; ++i) -- msrs->controls[i].addr = 0; -- - /* the counter & cccr registers we pay attention to */ - for (i = 0; i < num_counters; ++i) { - addr = p4_counters[VIRT_CTR(stag, i)].counter_address; -diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c -index 8eb0587..2873c00 100644 ---- a/arch/x86/oprofile/op_model_ppro.c -+++ b/arch/x86/oprofile/op_model_ppro.c -@@ -37,15 +37,11 @@ static void ppro_fill_in_addresses(struct op_msrs * const msrs) - for (i = 0; i < num_counters; i++) { - if (reserve_perfctr_nmi(MSR_P6_PERFCTR0 + i)) - msrs->counters[i].addr = MSR_P6_PERFCTR0 + i; -- else -- msrs->counters[i].addr = 0; - } - - for (i = 0; i < num_counters; i++) { - if (reserve_evntsel_nmi(MSR_P6_EVNTSEL0 + i)) - msrs->controls[i].addr = MSR_P6_EVNTSEL0 + i; -- else -- msrs->controls[i].addr = 0; - } - } - -@@ -57,7 +53,7 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model, - int i; - - if (!reset_value) { -- reset_value = kmalloc(sizeof(reset_value[0]) * num_counters, -+ reset_value = kzalloc(sizeof(reset_value[0]) * num_counters, - GFP_ATOMIC); - if (!reset_value) - return; -diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c -index b19d1e5..8f3f9a5 100644 ---- a/arch/x86/pci/mmconfig-shared.c -+++ b/arch/x86/pci/mmconfig-shared.c -@@ -303,22 +303,17 @@ static void __init pci_mmcfg_check_end_bus_number(void) - { - struct pci_mmcfg_region *cfg, *cfgx; - -- /* last one*/ -- cfg = list_entry(pci_mmcfg_list.prev, typeof(*cfg), list); -- if (cfg) -- if (cfg->end_bus < cfg->start_bus) -- cfg->end_bus = 255; -- -- if (list_is_singular(&pci_mmcfg_list)) -- return; -- -- /* don't overlap please */ -+ /* Fixup overlaps */ - list_for_each_entry(cfg, &pci_mmcfg_list, list) { - if (cfg->end_bus < cfg->start_bus) - cfg->end_bus = 255; - -+ /* Don't access the list head ! */ -+ if (cfg->list.next == &pci_mmcfg_list) -+ break; -+ - cfgx = list_entry(cfg->list.next, typeof(*cfg), list); -- if (cfg != cfgx && cfg->end_bus >= cfgx->start_bus) -+ if (cfg->end_bus >= cfgx->start_bus) - cfg->end_bus = cfgx->start_bus - 1; - } - } -diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c -index 36daccb..b607239 100644 ---- a/arch/x86/xen/enlighten.c -+++ b/arch/x86/xen/enlighten.c -@@ -50,6 +50,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1094,6 +1095,12 @@ asmlinkage void __init xen_start_kernel(void) - - __supported_pte_mask |= _PAGE_IOMAP; - -+ /* -+ * Prevent page tables from being allocated in highmem, even -+ * if CONFIG_HIGHPTE is enabled. -+ */ -+ __userpte_alloc_gfp &= ~__GFP_HIGHMEM; -+ - /* Work out if we support NX */ - x86_configure_nx(); - -diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c -index bf4cd6b..350a3de 100644 ---- a/arch/x86/xen/mmu.c -+++ b/arch/x86/xen/mmu.c -@@ -1432,14 +1432,15 @@ static void *xen_kmap_atomic_pte(struct page *page, enum km_type type) - { - pgprot_t prot = PAGE_KERNEL; - -+ /* -+ * We disable highmem allocations for page tables so we should never -+ * see any calls to kmap_atomic_pte on a highmem page. -+ */ -+ BUG_ON(PageHighMem(page)); -+ - if (PagePinned(page)) - prot = PAGE_KERNEL_RO; - -- if (0 && PageHighMem(page)) -- printk("mapping highpte %lx type %d prot %s\n", -- page_to_pfn(page), type, -- (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ"); -- - return kmap_atomic_prot(page, type, prot); - } - #endif -diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c -index b343903..a6a736a 100644 ---- a/drivers/ata/ahci.c -+++ b/drivers/ata/ahci.c -@@ -3082,8 +3082,16 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) - ahci_save_initial_config(pdev, hpriv); - - /* prepare host */ -- if (hpriv->cap & HOST_CAP_NCQ) -- pi.flags |= ATA_FLAG_NCQ | ATA_FLAG_FPDMA_AA; -+ if (hpriv->cap & HOST_CAP_NCQ) { -+ pi.flags |= ATA_FLAG_NCQ; -+ /* Auto-activate optimization is supposed to be supported on -+ all AHCI controllers indicating NCQ support, but it seems -+ to be broken at least on some NVIDIA MCP79 chipsets. -+ Until we get info on which NVIDIA chipsets don't have this -+ issue, if any, disable AA on all NVIDIA AHCIs. */ -+ if (pdev->vendor != PCI_VENDOR_ID_NVIDIA) -+ pi.flags |= ATA_FLAG_FPDMA_AA; -+ } - - if (hpriv->cap & HOST_CAP_PMP) - pi.flags |= ATA_FLAG_PMP; -diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c -index dd26bc7..269b5db 100644 ---- a/drivers/ata/pata_hpt3x2n.c -+++ b/drivers/ata/pata_hpt3x2n.c -@@ -25,7 +25,7 @@ - #include - - #define DRV_NAME "pata_hpt3x2n" --#define DRV_VERSION "0.3.8" -+#define DRV_VERSION "0.3.9" - - enum { - HPT_PCI_FAST = (1 << 31), -@@ -544,16 +544,16 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) - pci_mhz); - /* Set our private data up. We only need a few flags so we use - it directly */ -- if (pci_mhz > 60) { -+ if (pci_mhz > 60) - hpriv = (void *)(PCI66 | USE_DPLL); -- /* -- * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in -- * the MISC. register to stretch the UltraDMA Tss timing. -- * NOTE: This register is only writeable via I/O space. -- */ -- if (dev->device == PCI_DEVICE_ID_TTI_HPT371) -- outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c); -- } -+ -+ /* -+ * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in -+ * the MISC. register to stretch the UltraDMA Tss timing. -+ * NOTE: This register is only writeable via I/O space. -+ */ -+ if (dev->device == PCI_DEVICE_ID_TTI_HPT371) -+ outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c); - - /* Now kick off ATA set up */ - return ata_pci_sff_init_one(dev, ppi, &hpt3x2n_sht, hpriv); -diff --git a/drivers/base/core.c b/drivers/base/core.c -index 2820257..fb4bc4f 100644 ---- a/drivers/base/core.c -+++ b/drivers/base/core.c -@@ -607,6 +607,7 @@ static struct kobject *get_device_parent(struct device *dev, - int retval; - - if (dev->class) { -+ static DEFINE_MUTEX(gdp_mutex); - struct kobject *kobj = NULL; - struct kobject *parent_kobj; - struct kobject *k; -@@ -623,6 +624,8 @@ static struct kobject *get_device_parent(struct device *dev, - else - parent_kobj = &parent->kobj; - -+ mutex_lock(&gdp_mutex); -+ - /* find our class-directory at the parent and reference it */ - spin_lock(&dev->class->p->class_dirs.list_lock); - list_for_each_entry(k, &dev->class->p->class_dirs.list, entry) -@@ -631,20 +634,26 @@ static struct kobject *get_device_parent(struct device *dev, - break; - } - spin_unlock(&dev->class->p->class_dirs.list_lock); -- if (kobj) -+ if (kobj) { -+ mutex_unlock(&gdp_mutex); - return kobj; -+ } - - /* or create a new class-directory at the parent device */ - k = kobject_create(); -- if (!k) -+ if (!k) { -+ mutex_unlock(&gdp_mutex); - return NULL; -+ } - k->kset = &dev->class->p->class_dirs; - retval = kobject_add(k, parent_kobj, "%s", dev->class->name); - if (retval < 0) { -+ mutex_unlock(&gdp_mutex); - kobject_put(k); - return NULL; - } - /* do not emit an uevent for this simple "glue" directory */ -+ mutex_unlock(&gdp_mutex); - return k; - } - -diff --git a/drivers/base/devtmpfs.c b/drivers/base/devtmpfs.c -index 42ae452..dac478c 100644 ---- a/drivers/base/devtmpfs.c -+++ b/drivers/base/devtmpfs.c -@@ -301,6 +301,19 @@ int devtmpfs_delete_node(struct device *dev) - if (dentry->d_inode) { - err = vfs_getattr(nd.path.mnt, dentry, &stat); - if (!err && dev_mynode(dev, dentry->d_inode, &stat)) { -+ struct iattr newattrs; -+ /* -+ * before unlinking this node, reset permissions -+ * of possible references like hardlinks -+ */ -+ newattrs.ia_uid = 0; -+ newattrs.ia_gid = 0; -+ newattrs.ia_mode = stat.mode & ~0777; -+ newattrs.ia_valid = -+ ATTR_UID|ATTR_GID|ATTR_MODE; -+ mutex_lock(&dentry->d_inode->i_mutex); -+ notify_change(dentry, &newattrs); -+ mutex_unlock(&dentry->d_inode->i_mutex); - err = vfs_unlink(nd.path.dentry->d_inode, - dentry); - if (!err || err == -ENOENT) -diff --git a/drivers/char/tty_ldisc.c b/drivers/char/tty_ldisc.c -index 3f653f7..500e740 100644 ---- a/drivers/char/tty_ldisc.c -+++ b/drivers/char/tty_ldisc.c -@@ -706,12 +706,13 @@ static void tty_reset_termios(struct tty_struct *tty) - /** - * tty_ldisc_reinit - reinitialise the tty ldisc - * @tty: tty to reinit -+ * @ldisc: line discipline to reinitialize - * -- * Switch the tty back to N_TTY line discipline and leave the -- * ldisc state closed -+ * Switch the tty to a line discipline and leave the ldisc -+ * state closed - */ - --static void tty_ldisc_reinit(struct tty_struct *tty) -+static void tty_ldisc_reinit(struct tty_struct *tty, int ldisc) - { - struct tty_ldisc *ld; - -@@ -721,10 +722,10 @@ static void tty_ldisc_reinit(struct tty_struct *tty) - /* - * Switch the line discipline back - */ -- ld = tty_ldisc_get(N_TTY); -+ ld = tty_ldisc_get(ldisc); - BUG_ON(IS_ERR(ld)); - tty_ldisc_assign(tty, ld); -- tty_set_termios_ldisc(tty, N_TTY); -+ tty_set_termios_ldisc(tty, ldisc); - } - - /** -@@ -745,6 +746,8 @@ static void tty_ldisc_reinit(struct tty_struct *tty) - void tty_ldisc_hangup(struct tty_struct *tty) - { - struct tty_ldisc *ld; -+ int reset = tty->driver->flags & TTY_DRIVER_RESET_TERMIOS; -+ int err = 0; - - /* - * FIXME! What are the locking issues here? This may me overdoing -@@ -772,25 +775,32 @@ void tty_ldisc_hangup(struct tty_struct *tty) - wake_up_interruptible_poll(&tty->read_wait, POLLIN); - /* - * Shutdown the current line discipline, and reset it to -- * N_TTY. -+ * N_TTY if need be. -+ * -+ * Avoid racing set_ldisc or tty_ldisc_release - */ -- if (tty->driver->flags & TTY_DRIVER_RESET_TERMIOS) { -- /* Avoid racing set_ldisc or tty_ldisc_release */ -- mutex_lock(&tty->ldisc_mutex); -- tty_ldisc_halt(tty); -- if (tty->ldisc) { /* Not yet closed */ -- /* Switch back to N_TTY */ -- tty_ldisc_reinit(tty); -- /* At this point we have a closed ldisc and we want to -- reopen it. We could defer this to the next open but -- it means auditing a lot of other paths so this is -- a FIXME */ -+ mutex_lock(&tty->ldisc_mutex); -+ tty_ldisc_halt(tty); -+ /* At this point we have a closed ldisc and we want to -+ reopen it. We could defer this to the next open but -+ it means auditing a lot of other paths so this is -+ a FIXME */ -+ if (tty->ldisc) { /* Not yet closed */ -+ if (reset == 0) { -+ tty_ldisc_reinit(tty, tty->termios->c_line); -+ err = tty_ldisc_open(tty, tty->ldisc); -+ } -+ /* If the re-open fails or we reset then go to N_TTY. The -+ N_TTY open cannot fail */ -+ if (reset || err) { -+ tty_ldisc_reinit(tty, N_TTY); - WARN_ON(tty_ldisc_open(tty, tty->ldisc)); -- tty_ldisc_enable(tty); - } -- mutex_unlock(&tty->ldisc_mutex); -- tty_reset_termios(tty); -+ tty_ldisc_enable(tty); - } -+ mutex_unlock(&tty->ldisc_mutex); -+ if (reset) -+ tty_reset_termios(tty); - } - - /** -diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c -index 6b3e0c2..6fe4f77 100644 ---- a/drivers/clocksource/sh_cmt.c -+++ b/drivers/clocksource/sh_cmt.c -@@ -603,18 +603,13 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev) - p->irqaction.handler = sh_cmt_interrupt; - p->irqaction.dev_id = p; - p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; -- ret = setup_irq(irq, &p->irqaction); -- if (ret) { -- pr_err("sh_cmt: failed to request irq %d\n", irq); -- goto err1; -- } - - /* get hold of clock */ - p->clk = clk_get(&p->pdev->dev, cfg->clk); - if (IS_ERR(p->clk)) { - pr_err("sh_cmt: cannot get clock \"%s\"\n", cfg->clk); - ret = PTR_ERR(p->clk); -- goto err2; -+ goto err1; - } - - if (resource_size(res) == 6) { -@@ -627,14 +622,25 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev) - p->clear_bits = ~0xc000; - } - -- return sh_cmt_register(p, cfg->name, -- cfg->clockevent_rating, -- cfg->clocksource_rating); -- err2: -- remove_irq(irq, &p->irqaction); -- err1: -+ ret = sh_cmt_register(p, cfg->name, -+ cfg->clockevent_rating, -+ cfg->clocksource_rating); -+ if (ret) { -+ pr_err("sh_cmt: registration failed\n"); -+ goto err1; -+ } -+ -+ ret = setup_irq(irq, &p->irqaction); -+ if (ret) { -+ pr_err("sh_cmt: failed to request irq %d\n", irq); -+ goto err1; -+ } -+ -+ return 0; -+ -+err1: - iounmap(p->mapbase); -- err0: -+err0: - return ret; - } - -diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c -index 973e714..4c8a759 100644 ---- a/drivers/clocksource/sh_mtu2.c -+++ b/drivers/clocksource/sh_mtu2.c -@@ -221,15 +221,15 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_priv *p, - ced->cpumask = cpumask_of(0); - ced->set_mode = sh_mtu2_clock_event_mode; - -+ pr_info("sh_mtu2: %s used for clock events\n", ced->name); -+ clockevents_register_device(ced); -+ - ret = setup_irq(p->irqaction.irq, &p->irqaction); - if (ret) { - pr_err("sh_mtu2: failed to request irq %d\n", - p->irqaction.irq); - return; - } -- -- pr_info("sh_mtu2: %s used for clock events\n", ced->name); -- clockevents_register_device(ced); - } - - static int sh_mtu2_register(struct sh_mtu2_priv *p, char *name, -diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c -index 93c2322..961f5b5 100644 ---- a/drivers/clocksource/sh_tmu.c -+++ b/drivers/clocksource/sh_tmu.c -@@ -323,15 +323,15 @@ static void sh_tmu_register_clockevent(struct sh_tmu_priv *p, - ced->set_next_event = sh_tmu_clock_event_next; - ced->set_mode = sh_tmu_clock_event_mode; - -+ pr_info("sh_tmu: %s used for clock events\n", ced->name); -+ clockevents_register_device(ced); -+ - ret = setup_irq(p->irqaction.irq, &p->irqaction); - if (ret) { - pr_err("sh_tmu: failed to request irq %d\n", - p->irqaction.irq); - return; - } -- -- pr_info("sh_tmu: %s used for clock events\n", ced->name); -- clockevents_register_device(ced); - } - - static int sh_tmu_register(struct sh_tmu_priv *p, char *name, -diff --git a/drivers/gpio/cs5535-gpio.c b/drivers/gpio/cs5535-gpio.c -index 0fdbe94..0c3c498 100644 ---- a/drivers/gpio/cs5535-gpio.c -+++ b/drivers/gpio/cs5535-gpio.c -@@ -154,7 +154,7 @@ static int chip_gpio_request(struct gpio_chip *c, unsigned offset) - - static int chip_gpio_get(struct gpio_chip *chip, unsigned offset) - { -- return cs5535_gpio_isset(offset, GPIO_OUTPUT_VAL); -+ return cs5535_gpio_isset(offset, GPIO_READ_BACK); - } - - static void chip_gpio_set(struct gpio_chip *chip, unsigned offset, int val) -@@ -172,6 +172,7 @@ static int chip_direction_input(struct gpio_chip *c, unsigned offset) - - spin_lock_irqsave(&chip->lock, flags); - __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE); -+ __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_ENABLE); - spin_unlock_irqrestore(&chip->lock, flags); - - return 0; -@@ -184,6 +185,7 @@ static int chip_direction_output(struct gpio_chip *c, unsigned offset, int val) - - spin_lock_irqsave(&chip->lock, flags); - -+ __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE); - __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_ENABLE); - if (val) - __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_VAL); -diff --git a/drivers/gpio/wm831x-gpio.c b/drivers/gpio/wm831x-gpio.c -index b4468b6..c5a00f7 100644 ---- a/drivers/gpio/wm831x-gpio.c -+++ b/drivers/gpio/wm831x-gpio.c -@@ -60,23 +60,31 @@ static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset) - return 0; - } - --static int wm831x_gpio_direction_out(struct gpio_chip *chip, -- unsigned offset, int value) -+static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) - { - struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); - struct wm831x *wm831x = wm831x_gpio->wm831x; - -- return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset, -- WM831X_GPN_DIR | WM831X_GPN_TRI, 0); -+ wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset, -+ value << offset); - } - --static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) -+static int wm831x_gpio_direction_out(struct gpio_chip *chip, -+ unsigned offset, int value) - { - struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); - struct wm831x *wm831x = wm831x_gpio->wm831x; -+ int ret; - -- wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset, -- value << offset); -+ ret = wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset, -+ WM831X_GPN_DIR | WM831X_GPN_TRI, 0); -+ if (ret < 0) -+ return ret; -+ -+ /* Can only set GPIO state once it's in output mode */ -+ wm831x_gpio_set(chip, offset, value); -+ -+ return 0; - } - - static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) -diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c -index c2e8a45..93031a7 100644 ---- a/drivers/gpu/drm/i915/intel_lvds.c -+++ b/drivers/gpu/drm/i915/intel_lvds.c -@@ -655,8 +655,15 @@ static const struct dmi_system_id bad_lid_status[] = { - */ - static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector) - { -+ struct drm_device *dev = connector->dev; - enum drm_connector_status status = connector_status_connected; - -+ /* ACPI lid methods were generally unreliable in this generation, so -+ * don't even bother. -+ */ -+ if (IS_I8XX(dev)) -+ return connector_status_connected; -+ - if (!dmi_check_system(bad_lid_status) && !acpi_lid_open()) - status = connector_status_disconnected; - -diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c -index 82678d3..48daee5 100644 ---- a/drivers/gpu/drm/i915/intel_sdvo.c -+++ b/drivers/gpu/drm/i915/intel_sdvo.c -@@ -35,6 +35,7 @@ - #include "i915_drm.h" - #include "i915_drv.h" - #include "intel_sdvo_regs.h" -+#include - - static char *tv_format_names[] = { - "NTSC_M" , "NTSC_J" , "NTSC_443", -@@ -2283,6 +2284,25 @@ intel_sdvo_get_slave_addr(struct drm_device *dev, int output_device) - return 0x72; - } - -+static int intel_sdvo_bad_tv_callback(const struct dmi_system_id *id) -+{ -+ DRM_DEBUG_KMS("Ignoring bad SDVO TV connector for %s\n", id->ident); -+ return 1; -+} -+ -+static struct dmi_system_id intel_sdvo_bad_tv[] = { -+ { -+ .callback = intel_sdvo_bad_tv_callback, -+ .ident = "IntelG45/ICH10R/DME1737", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "IBM CORPORATION"), -+ DMI_MATCH(DMI_PRODUCT_NAME, "4800784"), -+ }, -+ }, -+ -+ { } /* terminating entry */ -+}; -+ - static bool - intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) - { -@@ -2323,7 +2343,8 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) - (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | - (1 << INTEL_ANALOG_CLONE_BIT); - } -- } else if (flags & SDVO_OUTPUT_SVID0) { -+ } else if ((flags & SDVO_OUTPUT_SVID0) && -+ !dmi_check_system(intel_sdvo_bad_tv)) { - - sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0; - encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; -diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c -index 7f152f6..d75788f 100644 ---- a/drivers/gpu/drm/radeon/atom.c -+++ b/drivers/gpu/drm/radeon/atom.c -@@ -881,8 +881,6 @@ static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg) - uint8_t attr = U8((*ptr)++), shift; - uint32_t saved, dst; - int dptr = *ptr; -- attr &= 0x38; -- attr |= atom_def_dst[attr >> 3] << 6; - SDEBUG(" dst: "); - dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); - shift = atom_get_src(ctx, attr, ptr); -@@ -897,8 +895,6 @@ static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg) - uint8_t attr = U8((*ptr)++), shift; - uint32_t saved, dst; - int dptr = *ptr; -- attr &= 0x38; -- attr |= atom_def_dst[attr >> 3] << 6; - SDEBUG(" dst: "); - dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); - shift = atom_get_src(ctx, attr, ptr); -diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c -index 3d47a2c..a759170 100644 ---- a/drivers/gpu/drm/ttm/ttm_tt.c -+++ b/drivers/gpu/drm/ttm/ttm_tt.c -@@ -480,7 +480,7 @@ static int ttm_tt_swapin(struct ttm_tt *ttm) - void *from_virtual; - void *to_virtual; - int i; -- int ret; -+ int ret = -ENOMEM; - - if (ttm->page_flags & TTM_PAGE_FLAG_USER) { - ret = ttm_tt_set_user(ttm, ttm->tsk, ttm->start, -@@ -499,8 +499,10 @@ static int ttm_tt_swapin(struct ttm_tt *ttm) - - for (i = 0; i < ttm->num_pages; ++i) { - from_page = read_mapping_page(swap_space, i, NULL); -- if (IS_ERR(from_page)) -+ if (IS_ERR(from_page)) { -+ ret = PTR_ERR(from_page); - goto out_err; -+ } - to_page = __ttm_tt_get_page(ttm, i); - if (unlikely(to_page == NULL)) - goto out_err; -@@ -523,7 +525,7 @@ static int ttm_tt_swapin(struct ttm_tt *ttm) - return 0; - out_err: - ttm_tt_free_alloced_pages(ttm); -- return -ENOMEM; -+ return ret; - } - - int ttm_tt_swapout(struct ttm_tt *ttm, struct file *persistant_swap_storage) -@@ -535,6 +537,7 @@ int ttm_tt_swapout(struct ttm_tt *ttm, struct file *persistant_swap_storage) - void *from_virtual; - void *to_virtual; - int i; -+ int ret = -ENOMEM; - - BUG_ON(ttm->state != tt_unbound && ttm->state != tt_unpopulated); - BUG_ON(ttm->caching_state != tt_cached); -@@ -557,7 +560,7 @@ int ttm_tt_swapout(struct ttm_tt *ttm, struct file *persistant_swap_storage) - 0); - if (unlikely(IS_ERR(swap_storage))) { - printk(KERN_ERR "Failed allocating swap storage.\n"); -- return -ENOMEM; -+ return PTR_ERR(swap_storage); - } - } else - swap_storage = persistant_swap_storage; -@@ -569,9 +572,10 @@ int ttm_tt_swapout(struct ttm_tt *ttm, struct file *persistant_swap_storage) - if (unlikely(from_page == NULL)) - continue; - to_page = read_mapping_page(swap_space, i, NULL); -- if (unlikely(to_page == NULL)) -+ if (unlikely(IS_ERR(to_page))) { -+ ret = PTR_ERR(to_page); - goto out_err; -- -+ } - preempt_disable(); - from_virtual = kmap_atomic(from_page, KM_USER0); - to_virtual = kmap_atomic(to_page, KM_USER1); -@@ -595,5 +599,5 @@ out_err: - if (!persistant_swap_storage) - fput(swap_storage); - -- return -ENOMEM; -+ return ret; - } -diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c -index eabe5f8..8455f3d 100644 ---- a/drivers/hid/hid-core.c -+++ b/drivers/hid/hid-core.c -@@ -1661,8 +1661,6 @@ static const struct hid_device_id hid_ignore_list[] = { - { HID_USB_DEVICE(USB_VENDOR_ID_PANJIT, 0x0004) }, - { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS, USB_DEVICE_ID_PHILIPS_IEEE802154_DONGLE) }, - { HID_USB_DEVICE(USB_VENDOR_ID_POWERCOM, USB_DEVICE_ID_POWERCOM_UPS) }, -- { HID_USB_DEVICE(USB_VENDOR_ID_TENX, USB_DEVICE_ID_TENX_IBUDDY1) }, -- { HID_USB_DEVICE(USB_VENDOR_ID_TENX, USB_DEVICE_ID_TENX_IBUDDY2) }, - { HID_USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_LABPRO) }, - { HID_USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_GOTEMP) }, - { HID_USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_SKIP) }, -diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h -index 010368e..793691f 100644 ---- a/drivers/hid/hid-ids.h -+++ b/drivers/hid/hid-ids.h -@@ -402,10 +402,6 @@ - #define USB_VENDOR_ID_SUNPLUS 0x04fc - #define USB_DEVICE_ID_SUNPLUS_WDESKTOP 0x05d8 - --#define USB_VENDOR_ID_TENX 0x1130 --#define USB_DEVICE_ID_TENX_IBUDDY1 0x0001 --#define USB_DEVICE_ID_TENX_IBUDDY2 0x0002 -- - #define USB_VENDOR_ID_THRUSTMASTER 0x044f - - #define USB_VENDOR_ID_TOPMAX 0x0663 -diff --git a/drivers/hid/usbhid/hid-core.c b/drivers/hid/usbhid/hid-core.c -index e2997a8..2f84237 100644 ---- a/drivers/hid/usbhid/hid-core.c -+++ b/drivers/hid/usbhid/hid-core.c -@@ -316,6 +316,7 @@ static int hid_submit_out(struct hid_device *hid) - err_hid("usb_submit_urb(out) failed"); - return -1; - } -+ usbhid->last_out = jiffies; - } else { - /* - * queue work to wake up the device. -@@ -377,6 +378,7 @@ static int hid_submit_ctrl(struct hid_device *hid) - err_hid("usb_submit_urb(ctrl) failed"); - return -1; - } -+ usbhid->last_ctrl = jiffies; - } else { - /* - * queue work to wake up the device. -@@ -512,9 +514,20 @@ static void __usbhid_submit_report(struct hid_device *hid, struct hid_report *re - usbhid->out[usbhid->outhead].report = report; - usbhid->outhead = head; - -- if (!test_and_set_bit(HID_OUT_RUNNING, &usbhid->iofl)) -+ if (!test_and_set_bit(HID_OUT_RUNNING, &usbhid->iofl)) { - if (hid_submit_out(hid)) - clear_bit(HID_OUT_RUNNING, &usbhid->iofl); -+ } else { -+ /* -+ * the queue is known to run -+ * but an earlier request may be stuck -+ * we may need to time out -+ * no race because this is called under -+ * spinlock -+ */ -+ if (time_after(jiffies, usbhid->last_out + HZ * 5)) -+ usb_unlink_urb(usbhid->urbout); -+ } - return; - } - -@@ -535,9 +548,20 @@ static void __usbhid_submit_report(struct hid_device *hid, struct hid_report *re - usbhid->ctrl[usbhid->ctrlhead].dir = dir; - usbhid->ctrlhead = head; - -- if (!test_and_set_bit(HID_CTRL_RUNNING, &usbhid->iofl)) -+ if (!test_and_set_bit(HID_CTRL_RUNNING, &usbhid->iofl)) { - if (hid_submit_ctrl(hid)) - clear_bit(HID_CTRL_RUNNING, &usbhid->iofl); -+ } else { -+ /* -+ * the queue is known to run -+ * but an earlier request may be stuck -+ * we may need to time out -+ * no race because this is called under -+ * spinlock -+ */ -+ if (time_after(jiffies, usbhid->last_ctrl + HZ * 5)) -+ usb_unlink_urb(usbhid->urbctrl); -+ } - } - - void usbhid_submit_report(struct hid_device *hid, struct hid_report *report, unsigned char dir) -diff --git a/drivers/hid/usbhid/usbhid.h b/drivers/hid/usbhid/usbhid.h -index 08f505c..ec20400 100644 ---- a/drivers/hid/usbhid/usbhid.h -+++ b/drivers/hid/usbhid/usbhid.h -@@ -80,12 +80,14 @@ struct usbhid_device { - unsigned char ctrlhead, ctrltail; /* Control fifo head & tail */ - char *ctrlbuf; /* Control buffer */ - dma_addr_t ctrlbuf_dma; /* Control buffer dma */ -+ unsigned long last_ctrl; /* record of last output for timeouts */ - - struct urb *urbout; /* Output URB */ - struct hid_output_fifo out[HID_CONTROL_FIFO_SIZE]; /* Output pipe fifo */ - unsigned char outhead, outtail; /* Output pipe fifo head & tail */ - char *outbuf; /* Output buffer */ - dma_addr_t outbuf_dma; /* Output buffer dma */ -+ unsigned long last_out; /* record of last output for timeouts */ - - spinlock_t lock; /* fifo spinlock */ - unsigned long iofl; /* I/O flags (CTRL_RUNNING, OUT_RUNNING) */ -diff --git a/drivers/hwmon/ams/ams-core.c b/drivers/hwmon/ams/ams-core.c -index 6c9ace1..2ad62c3 100644 ---- a/drivers/hwmon/ams/ams-core.c -+++ b/drivers/hwmon/ams/ams-core.c -@@ -213,7 +213,7 @@ int __init ams_init(void) - return -ENODEV; - } - --void ams_exit(void) -+void ams_sensor_detach(void) - { - /* Remove input device */ - ams_input_exit(); -@@ -221,9 +221,6 @@ void ams_exit(void) - /* Remove attributes */ - device_remove_file(&ams_info.of_dev->dev, &dev_attr_current); - -- /* Shut down implementation */ -- ams_info.exit(); -- - /* Flush interrupt worker - * - * We do this after ams_info.exit(), because an interrupt might -@@ -239,6 +236,12 @@ void ams_exit(void) - pmf_unregister_irq_client(&ams_freefall_client); - } - -+static void __exit ams_exit(void) -+{ -+ /* Shut down implementation */ -+ ams_info.exit(); -+} -+ - MODULE_AUTHOR("Stelian Pop, Michael Hanselmann"); - MODULE_DESCRIPTION("Apple Motion Sensor driver"); - MODULE_LICENSE("GPL"); -diff --git a/drivers/hwmon/ams/ams-i2c.c b/drivers/hwmon/ams/ams-i2c.c -index 2cbf8a6..abeecd2 100644 ---- a/drivers/hwmon/ams/ams-i2c.c -+++ b/drivers/hwmon/ams/ams-i2c.c -@@ -238,6 +238,8 @@ static int ams_i2c_probe(struct i2c_client *client, - static int ams_i2c_remove(struct i2c_client *client) - { - if (ams_info.has_device) { -+ ams_sensor_detach(); -+ - /* Disable interrupts */ - ams_i2c_set_irq(AMS_IRQ_ALL, 0); - -diff --git a/drivers/hwmon/ams/ams-pmu.c b/drivers/hwmon/ams/ams-pmu.c -index fb18b3d..4f61b3e 100644 ---- a/drivers/hwmon/ams/ams-pmu.c -+++ b/drivers/hwmon/ams/ams-pmu.c -@@ -133,6 +133,8 @@ static void ams_pmu_get_xyz(s8 *x, s8 *y, s8 *z) - - static void ams_pmu_exit(void) - { -+ ams_sensor_detach(); -+ - /* Disable interrupts */ - ams_pmu_set_irq(AMS_IRQ_ALL, 0); - -diff --git a/drivers/hwmon/ams/ams.h b/drivers/hwmon/ams/ams.h -index 5ed387b..b28d7e2 100644 ---- a/drivers/hwmon/ams/ams.h -+++ b/drivers/hwmon/ams/ams.h -@@ -61,6 +61,7 @@ extern struct ams ams_info; - - extern void ams_sensors(s8 *x, s8 *y, s8 *z); - extern int ams_sensor_attach(void); -+extern void ams_sensor_detach(void); - - extern int ams_pmu_init(struct device_node *np); - extern int ams_i2c_init(struct device_node *np); -diff --git a/drivers/hwmon/fschmd.c b/drivers/hwmon/fschmd.c -index fa07282..0627f7a 100644 ---- a/drivers/hwmon/fschmd.c -+++ b/drivers/hwmon/fschmd.c -@@ -267,7 +267,7 @@ struct fschmd_data { - struct list_head list; /* member of the watchdog_data_list */ - struct kref kref; - struct miscdevice watchdog_miscdev; -- int kind; -+ enum chips kind; - unsigned long watchdog_is_open; - char watchdog_expect_close; - char watchdog_name[10]; /* must be unique to avoid sysfs conflict */ -@@ -325,8 +325,7 @@ static ssize_t show_in_value(struct device *dev, - int index = to_sensor_dev_attr(devattr)->index; - struct fschmd_data *data = fschmd_update_device(dev); - -- /* fscher / fschrc - 1 as data->kind is an array index, not a chips */ -- if (data->kind == (fscher - 1) || data->kind >= (fschrc - 1)) -+ if (data->kind == fscher || data->kind >= fschrc) - return sprintf(buf, "%d\n", (data->volt[index] * dmi_vref * - dmi_mult[index]) / 255 + dmi_offset[index]); - else -@@ -492,7 +491,7 @@ static ssize_t show_pwm_auto_point1_pwm(struct device *dev, - int val = data->fan_min[index]; - - /* 0 = allow turning off (except on the syl), 1-255 = 50-100% */ -- if (val || data->kind == fscsyl - 1) -+ if (val || data->kind == fscsyl) - val = val / 2 + 128; - - return sprintf(buf, "%d\n", val); -@@ -506,7 +505,7 @@ static ssize_t store_pwm_auto_point1_pwm(struct device *dev, - unsigned long v = simple_strtoul(buf, NULL, 10); - - /* reg: 0 = allow turning off (except on the syl), 1-255 = 50-100% */ -- if (v || data->kind == fscsyl - 1) { -+ if (v || data->kind == fscsyl) { - v = SENSORS_LIMIT(v, 128, 255); - v = (v - 128) * 2 + 1; - } -@@ -1037,7 +1036,7 @@ static int fschmd_detect(struct i2c_client *client, - else - return -ENODEV; - -- strlcpy(info->type, fschmd_id[kind - 1].name, I2C_NAME_SIZE); -+ strlcpy(info->type, fschmd_id[kind].name, I2C_NAME_SIZE); - - return 0; - } -@@ -1065,6 +1064,7 @@ static int fschmd_probe(struct i2c_client *client, - (where the client is found through a data ptr instead of the - otherway around) */ - data->client = client; -+ data->kind = kind; - - if (kind == fscpos) { - /* The Poseidon has hardwired temp limits, fill these -@@ -1085,9 +1085,6 @@ static int fschmd_probe(struct i2c_client *client, - } - } - -- /* i2c kind goes from 1-6, we want from 0-5 to address arrays */ -- data->kind = kind - 1; -- - /* Read in some never changing registers */ - data->revision = i2c_smbus_read_byte_data(client, FSCHMD_REG_REVISION); - data->global_control = i2c_smbus_read_byte_data(client, -diff --git a/drivers/hwmon/tmp401.c b/drivers/hwmon/tmp401.c -index a13b30e..d14a1af 100644 ---- a/drivers/hwmon/tmp401.c -+++ b/drivers/hwmon/tmp401.c -@@ -134,7 +134,7 @@ struct tmp401_data { - struct mutex update_lock; - char valid; /* zero until following fields are valid */ - unsigned long last_updated; /* in jiffies */ -- int kind; -+ enum chips kind; - - /* register values */ - u8 status; -@@ -524,7 +524,7 @@ static int tmp401_detect(struct i2c_client *client, - if (reg > 15) - return -ENODEV; - -- strlcpy(info->type, tmp401_id[kind - 1].name, I2C_NAME_SIZE); -+ strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE); - - return 0; - } -@@ -572,8 +572,7 @@ static int tmp401_probe(struct i2c_client *client, - goto exit_remove; - } - -- dev_info(&client->dev, "Detected TI %s chip\n", -- names[data->kind - 1]); -+ dev_info(&client->dev, "Detected TI %s chip\n", names[data->kind]); - - return 0; - -diff --git a/drivers/hwmon/tmp421.c b/drivers/hwmon/tmp421.c -index 4f7c051..738c472 100644 ---- a/drivers/hwmon/tmp421.c -+++ b/drivers/hwmon/tmp421.c -@@ -61,9 +61,9 @@ static const u8 TMP421_TEMP_LSB[4] = { 0x10, 0x11, 0x12, 0x13 }; - #define TMP423_DEVICE_ID 0x23 - - static const struct i2c_device_id tmp421_id[] = { -- { "tmp421", tmp421 }, -- { "tmp422", tmp422 }, -- { "tmp423", tmp423 }, -+ { "tmp421", 2 }, -+ { "tmp422", 3 }, -+ { "tmp423", 4 }, - { } - }; - MODULE_DEVICE_TABLE(i2c, tmp421_id); -@@ -73,21 +73,23 @@ struct tmp421_data { - struct mutex update_lock; - char valid; - unsigned long last_updated; -- int kind; -+ int channels; - u8 config; - s16 temp[4]; - }; - - static int temp_from_s16(s16 reg) - { -- int temp = reg; -+ /* Mask out status bits */ -+ int temp = reg & ~0xf; - - return (temp * 1000 + 128) / 256; - } - - static int temp_from_u16(u16 reg) - { -- int temp = reg; -+ /* Mask out status bits */ -+ int temp = reg & ~0xf; - - /* Add offset for extended temperature range. */ - temp -= 64 * 256; -@@ -107,7 +109,7 @@ static struct tmp421_data *tmp421_update_device(struct device *dev) - data->config = i2c_smbus_read_byte_data(client, - TMP421_CONFIG_REG_1); - -- for (i = 0; i <= data->kind; i++) { -+ for (i = 0; i < data->channels; i++) { - data->temp[i] = i2c_smbus_read_byte_data(client, - TMP421_TEMP_MSB[i]) << 8; - data->temp[i] |= i2c_smbus_read_byte_data(client, -@@ -166,7 +168,7 @@ static mode_t tmp421_is_visible(struct kobject *kobj, struct attribute *a, - devattr = container_of(a, struct device_attribute, attr); - index = to_sensor_dev_attr(devattr)->index; - -- if (data->kind > index) -+ if (index < data->channels) - return a->mode; - - return 0; -@@ -252,9 +254,9 @@ static int tmp421_detect(struct i2c_client *client, - return -ENODEV; - } - -- strlcpy(info->type, tmp421_id[kind - 1].name, I2C_NAME_SIZE); -+ strlcpy(info->type, tmp421_id[kind].name, I2C_NAME_SIZE); - dev_info(&adapter->dev, "Detected TI %s chip at 0x%02x\n", -- names[kind - 1], client->addr); -+ names[kind], client->addr); - - return 0; - } -@@ -271,7 +273,7 @@ static int tmp421_probe(struct i2c_client *client, - - i2c_set_clientdata(client, data); - mutex_init(&data->update_lock); -- data->kind = id->driver_data; -+ data->channels = id->driver_data; - - err = tmp421_init_client(client); - if (err) -diff --git a/drivers/macintosh/therm_adt746x.c b/drivers/macintosh/therm_adt746x.c -index 5ff47ba..58809b0 100644 ---- a/drivers/macintosh/therm_adt746x.c -+++ b/drivers/macintosh/therm_adt746x.c -@@ -90,6 +90,8 @@ static struct task_struct *thread_therm = NULL; - - static void write_both_fan_speed(struct thermostat *th, int speed); - static void write_fan_speed(struct thermostat *th, int speed, int fan); -+static void thermostat_create_files(void); -+static void thermostat_remove_files(void); - - static int - write_reg(struct thermostat* th, int reg, u8 data) -@@ -161,6 +163,8 @@ remove_thermostat(struct i2c_client *client) - struct thermostat *th = i2c_get_clientdata(client); - int i; - -+ thermostat_remove_files(); -+ - if (thread_therm != NULL) { - kthread_stop(thread_therm); - } -@@ -449,6 +453,8 @@ static int probe_thermostat(struct i2c_client *client, - return -ENOMEM; - } - -+ thermostat_create_files(); -+ - return 0; - } - -@@ -566,7 +572,6 @@ thermostat_init(void) - struct device_node* np; - const u32 *prop; - int i = 0, offset = 0; -- int err; - - np = of_find_node_by_name(NULL, "fan"); - if (!np) -@@ -633,6 +638,17 @@ thermostat_init(void) - return -ENODEV; - } - -+#ifndef CONFIG_I2C_POWERMAC -+ request_module("i2c-powermac"); -+#endif -+ -+ return i2c_add_driver(&thermostat_driver); -+} -+ -+static void thermostat_create_files(void) -+{ -+ int err; -+ - err = device_create_file(&of_dev->dev, &dev_attr_sensor1_temperature); - err |= device_create_file(&of_dev->dev, &dev_attr_sensor2_temperature); - err |= device_create_file(&of_dev->dev, &dev_attr_sensor1_limit); -@@ -647,16 +663,9 @@ thermostat_init(void) - if (err) - printk(KERN_WARNING - "Failed to create tempertaure attribute file(s).\n"); -- --#ifndef CONFIG_I2C_POWERMAC -- request_module("i2c-powermac"); --#endif -- -- return i2c_add_driver(&thermostat_driver); - } - --static void __exit --thermostat_exit(void) -+static void thermostat_remove_files(void) - { - if (of_dev) { - device_remove_file(&of_dev->dev, &dev_attr_sensor1_temperature); -@@ -673,9 +682,14 @@ thermostat_exit(void) - device_remove_file(&of_dev->dev, - &dev_attr_sensor2_fan_speed); - -- of_device_unregister(of_dev); - } -+} -+ -+static void __exit -+thermostat_exit(void) -+{ - i2c_del_driver(&thermostat_driver); -+ of_device_unregister(of_dev); - } - - module_init(thermostat_init); -diff --git a/drivers/md/dm-ioctl.c b/drivers/md/dm-ioctl.c -index 1d66932..e3cf568 100644 ---- a/drivers/md/dm-ioctl.c -+++ b/drivers/md/dm-ioctl.c -@@ -897,16 +897,17 @@ static int do_resume(struct dm_ioctl *param) - set_disk_ro(dm_disk(md), 1); - } - -- if (dm_suspended_md(md)) -+ if (dm_suspended_md(md)) { - r = dm_resume(md); -+ if (!r) -+ dm_kobject_uevent(md, KOBJ_CHANGE, param->event_nr); -+ } - - if (old_map) - dm_table_destroy(old_map); - -- if (!r) { -- dm_kobject_uevent(md, KOBJ_CHANGE, param->event_nr); -+ if (!r) - r = __dev_status(md, param); -- } - - dm_put(md); - return r; -diff --git a/drivers/md/dm.c b/drivers/md/dm.c -index aa4e2aa..fa786b9 100644 ---- a/drivers/md/dm.c -+++ b/drivers/md/dm.c -@@ -635,8 +635,10 @@ static void dec_pending(struct dm_io *io, int error) - if (!md->barrier_error && io_error != -EOPNOTSUPP) - md->barrier_error = io_error; - end_io_acct(io); -+ free_io(md, io); - } else { - end_io_acct(io); -+ free_io(md, io); - - if (io_error != DM_ENDIO_REQUEUE) { - trace_block_bio_complete(md->queue, bio); -@@ -644,8 +646,6 @@ static void dec_pending(struct dm_io *io, int error) - bio_endio(bio, io_error); - } - } -- -- free_io(md, io); - } - } - -diff --git a/drivers/media/dvb/dvb-core/dvb_net.c b/drivers/media/dvb/dvb-core/dvb_net.c -index 8b8558f..b11533f 100644 ---- a/drivers/media/dvb/dvb-core/dvb_net.c -+++ b/drivers/media/dvb/dvb-core/dvb_net.c -@@ -504,6 +504,7 @@ static void dvb_net_ule( struct net_device *dev, const u8 *buf, size_t buf_len ) - "bytes left in TS. Resyncing.\n", ts_remain); - priv->ule_sndu_len = 0; - priv->need_pusi = 1; -+ ts += TS_SZ; - continue; - } - -diff --git a/drivers/media/video/gspca/mr97310a.c b/drivers/media/video/gspca/mr97310a.c -index 9154870..0493e40 100644 ---- a/drivers/media/video/gspca/mr97310a.c -+++ b/drivers/media/video/gspca/mr97310a.c -@@ -697,6 +697,12 @@ static int start_cif_cam(struct gspca_dev *gspca_dev) - {0x13, 0x00, {0x01}, 1}, - {0, 0, {0}, 0} - }; -+ /* Without this command the cam won't work with USB-UHCI */ -+ gspca_dev->usb_buf[0] = 0x0a; -+ gspca_dev->usb_buf[1] = 0x00; -+ err_code = mr_write(gspca_dev, 2); -+ if (err_code < 0) -+ return err_code; - err_code = sensor_write_regs(gspca_dev, cif_sensor1_init_data, - ARRAY_SIZE(cif_sensor1_init_data)); - } -diff --git a/drivers/media/video/soc_mediabus.c b/drivers/media/video/soc_mediabus.c -index f8d5c87..a4c0ef4 100644 ---- a/drivers/media/video/soc_mediabus.c -+++ b/drivers/media/video/soc_mediabus.c -@@ -134,7 +134,8 @@ EXPORT_SYMBOL(soc_mbus_bytes_per_line); - const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc( - enum v4l2_mbus_pixelcode code) - { -- if ((unsigned int)(code - V4L2_MBUS_FMT_FIXED) > ARRAY_SIZE(mbus_fmt)) -+ if (code - V4L2_MBUS_FMT_FIXED > ARRAY_SIZE(mbus_fmt) || -+ code <= V4L2_MBUS_FMT_FIXED) - return NULL; - return mbus_fmt + code - V4L2_MBUS_FMT_FIXED - 1; - } -diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c -index d96e1ab..2fdf768 100644 ---- a/drivers/mmc/host/s3cmci.c -+++ b/drivers/mmc/host/s3cmci.c -@@ -1179,7 +1179,7 @@ static int s3cmci_card_present(struct mmc_host *mmc) - struct s3c24xx_mci_pdata *pdata = host->pdata; - int ret; - -- if (pdata->gpio_detect == 0) -+ if (pdata->no_detect) - return -ENOSYS; - - ret = gpio_get_value(pdata->gpio_detect) ? 0 : 1; -@@ -1360,6 +1360,8 @@ static struct mmc_host_ops s3cmci_ops = { - static struct s3c24xx_mci_pdata s3cmci_def_pdata = { - /* This is currently here to avoid a number of if (host->pdata) - * checks. Any zero fields to ensure reasonable defaults are picked. */ -+ .no_wprotect = 1, -+ .no_detect = 1, - }; - - #ifdef CONFIG_CPU_FREQ -diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c -index 4331d67..2a9f029 100644 ---- a/drivers/net/wireless/airo.c -+++ b/drivers/net/wireless/airo.c -@@ -5254,11 +5254,7 @@ static int set_wep_key(struct airo_info *ai, u16 index, const char *key, - WepKeyRid wkr; - int rc; - -- if (keylen == 0) { -- airo_print_err(ai->dev->name, "%s: key length to set was zero", -- __func__); -- return -1; -- } -+ WARN_ON(keylen == 0); - - memset(&wkr, 0, sizeof(wkr)); - wkr.len = cpu_to_le16(sizeof(wkr)); -@@ -6405,11 +6401,7 @@ static int airo_set_encode(struct net_device *dev, - if (dwrq->length > MIN_KEY_SIZE) - key.len = MAX_KEY_SIZE; - else -- if (dwrq->length > 0) -- key.len = MIN_KEY_SIZE; -- else -- /* Disable the key */ -- key.len = 0; -+ key.len = MIN_KEY_SIZE; - /* Check if the key is not marked as invalid */ - if(!(dwrq->flags & IW_ENCODE_NOKEY)) { - /* Cleanup */ -@@ -6590,12 +6582,22 @@ static int airo_set_encodeext(struct net_device *dev, - default: - return -EINVAL; - } -- /* Send the key to the card */ -- rc = set_wep_key(local, idx, key.key, key.len, perm, 1); -- if (rc < 0) { -- airo_print_err(local->dev->name, "failed to set WEP key" -- " at index %d: %d.", idx, rc); -- return rc; -+ if (key.len == 0) { -+ rc = set_wep_tx_idx(local, idx, perm, 1); -+ if (rc < 0) { -+ airo_print_err(local->dev->name, -+ "failed to set WEP transmit index to %d: %d.", -+ idx, rc); -+ return rc; -+ } -+ } else { -+ rc = set_wep_key(local, idx, key.key, key.len, perm, 1); -+ if (rc < 0) { -+ airo_print_err(local->dev->name, -+ "failed to set WEP key at index %d: %d.", -+ idx, rc); -+ return rc; -+ } - } - } - -diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h -index 6a2a967..bbd2f31 100644 ---- a/drivers/net/wireless/ath/ath5k/ath5k.h -+++ b/drivers/net/wireless/ath/ath5k/ath5k.h -@@ -541,7 +541,6 @@ struct ath5k_txq_info { - /* - * Transmit packet types. - * used on tx control descriptor -- * TODO: Use them inside base.c corectly - */ - enum ath5k_pkt_type { - AR5K_PKT_TYPE_NORMAL = 0, -diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c -index e63b7c4..d6ee8ac 100644 ---- a/drivers/net/wireless/ath/ath5k/base.c -+++ b/drivers/net/wireless/ath/ath5k/base.c -@@ -1246,6 +1246,29 @@ ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) - return 0; - } - -+static enum ath5k_pkt_type get_hw_packet_type(struct sk_buff *skb) -+{ -+ struct ieee80211_hdr *hdr; -+ enum ath5k_pkt_type htype; -+ __le16 fc; -+ -+ hdr = (struct ieee80211_hdr *)skb->data; -+ fc = hdr->frame_control; -+ -+ if (ieee80211_is_beacon(fc)) -+ htype = AR5K_PKT_TYPE_BEACON; -+ else if (ieee80211_is_probe_resp(fc)) -+ htype = AR5K_PKT_TYPE_PROBE_RESP; -+ else if (ieee80211_is_atim(fc)) -+ htype = AR5K_PKT_TYPE_ATIM; -+ else if (ieee80211_is_pspoll(fc)) -+ htype = AR5K_PKT_TYPE_PSPOLL; -+ else -+ htype = AR5K_PKT_TYPE_NORMAL; -+ -+ return htype; -+} -+ - static int - ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf, - struct ath5k_txq *txq) -@@ -1300,7 +1323,8 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf, - sc->vif, pktlen, info)); - } - ret = ah->ah_setup_tx_desc(ah, ds, pktlen, -- ieee80211_get_hdrlen_from_skb(skb), AR5K_PKT_TYPE_NORMAL, -+ ieee80211_get_hdrlen_from_skb(skb), -+ get_hw_packet_type(skb), - (sc->power_level * 2), - hw_rate, - info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags, -diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c -index 1660ef1..06eaaa9 100644 ---- a/drivers/net/wireless/ath/ath9k/beacon.c -+++ b/drivers/net/wireless/ath/ath9k/beacon.c -@@ -525,16 +525,13 @@ static void ath_beacon_config_ap(struct ath_softc *sc, - { - u32 nexttbtt, intval; - -- /* Configure the timers only when the TSF has to be reset */ -- -- if (!(sc->sc_flags & SC_OP_TSF_RESET)) -- return; -- - /* NB: the beacon interval is kept internally in TU's */ - intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; - intval /= ATH_BCBUF; /* for staggered beacons */ - nexttbtt = intval; -- intval |= ATH9K_BEACON_RESET_TSF; -+ -+ if (sc->sc_flags & SC_OP_TSF_RESET) -+ intval |= ATH9K_BEACON_RESET_TSF; - - /* - * In AP mode we enable the beacon timers and SWBA interrupts to -diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c -index ae37144..7c64aa5 100644 ---- a/drivers/net/wireless/ath/ath9k/hw.c -+++ b/drivers/net/wireless/ath/ath9k/hw.c -@@ -1345,6 +1345,16 @@ static void ath9k_hw_override_ini(struct ath_hw *ah, - * Necessary to avoid issues on AR5416 2.0 - */ - REG_WRITE(ah, 0x9800 + (651 << 2), 0x11); -+ -+ /* -+ * Disable RIFS search on some chips to avoid baseband -+ * hang issues. -+ */ -+ if (AR_SREV_9100(ah) || AR_SREV_9160(ah)) { -+ val = REG_READ(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS); -+ val &= ~AR_PHY_RIFS_INIT_DELAY; -+ REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val); -+ } - } - - static u32 ath9k_hw_def_ini_fixup(struct ath_hw *ah, -diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c -index 643bea3..4faafbd 100644 ---- a/drivers/net/wireless/ath/ath9k/main.c -+++ b/drivers/net/wireless/ath/ath9k/main.c -@@ -928,6 +928,7 @@ static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf - - clear_bit(key->hw_key_idx + 64, common->keymap); - if (common->splitmic) { -+ ath9k_hw_keyreset(ah, key->hw_key_idx + 32); - clear_bit(key->hw_key_idx + 32, common->keymap); - clear_bit(key->hw_key_idx + 64 + 32, common->keymap); - } -@@ -1848,6 +1849,8 @@ bad_free_hw: - - void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw) - { -+ struct ath_hw *ah = sc->sc_ah; -+ - hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | - IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | - IEEE80211_HW_SIGNAL_DBM | -@@ -1865,7 +1868,8 @@ void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw) - BIT(NL80211_IFTYPE_ADHOC) | - BIT(NL80211_IFTYPE_MESH_POINT); - -- hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; -+ if (AR_SREV_5416(ah)) -+ hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; - - hw->queues = 4; - hw->max_rates = 4; -diff --git a/drivers/net/wireless/ath/ath9k/phy.h b/drivers/net/wireless/ath/ath9k/phy.h -index 31de27d..0999a49 100644 ---- a/drivers/net/wireless/ath/ath9k/phy.h -+++ b/drivers/net/wireless/ath/ath9k/phy.h -@@ -384,6 +384,9 @@ bool ath9k_hw_set_rf_regs(struct ath_hw *ah, - - #define AR_PHY_HEAVY_CLIP_ENABLE 0x99E0 - -+#define AR_PHY_HEAVY_CLIP_FACTOR_RIFS 0x99EC -+#define AR_PHY_RIFS_INIT_DELAY 0x03ff0000 -+ - #define AR_PHY_M_SLEEP 0x99f0 - #define AR_PHY_REFCLKDLY 0x99f4 - #define AR_PHY_REFCLKPD 0x99f8 -diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c -index 70fdb9d..1d6cf7d 100644 ---- a/drivers/net/wireless/ath/ath9k/rc.c -+++ b/drivers/net/wireless/ath/ath9k/rc.c -@@ -668,7 +668,7 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta, - struct ieee80211_tx_rate *rates = tx_info->control.rates; - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; - __le16 fc = hdr->frame_control; -- u8 try_per_rate, i = 0, rix, nrix; -+ u8 try_per_rate, i = 0, rix; - int is_probe = 0; - - if (rate_control_send_low(sta, priv_sta, txrc)) -@@ -688,26 +688,25 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta, - - rate_table = sc->cur_rate_table; - rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, &is_probe); -- nrix = rix; - - if (is_probe) { - /* set one try for probe rates. For the - * probes don't enable rts */ - ath_rc_rate_set_series(rate_table, &rates[i++], txrc, -- 1, nrix, 0); -+ 1, rix, 0); - - /* Get the next tried/allowed rate. No RTS for the next series - * after the probe rate - */ -- ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &nrix); -+ ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix); - ath_rc_rate_set_series(rate_table, &rates[i++], txrc, -- try_per_rate, nrix, 0); -+ try_per_rate, rix, 0); - - tx_info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE; - } else { - /* Set the choosen rate. No RTS for first series entry. */ - ath_rc_rate_set_series(rate_table, &rates[i++], txrc, -- try_per_rate, nrix, 0); -+ try_per_rate, rix, 0); - } - - /* Fill in the other rates for multirate retry */ -@@ -716,10 +715,10 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta, - if (i + 1 == 4) - try_per_rate = 4; - -- ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &nrix); -+ ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix); - /* All other rates in the series have RTS enabled */ - ath_rc_rate_set_series(rate_table, &rates[i], txrc, -- try_per_rate, nrix, 1); -+ try_per_rate, rix, 1); - } - - /* -diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c -index 490fb45..b59166c 100644 ---- a/drivers/net/wireless/b43/main.c -+++ b/drivers/net/wireless/b43/main.c -@@ -3970,6 +3970,7 @@ static int b43_wireless_core_start(struct b43_wldev *dev) - } - - /* We are ready to run. */ -+ ieee80211_wake_queues(dev->wl->hw); - b43_set_status(dev, B43_STAT_STARTED); - - /* Start data flow (TX/RX). */ -@@ -4379,8 +4380,6 @@ static int b43_wireless_core_init(struct b43_wldev *dev) - - ieee80211_wake_queues(dev->wl->hw); - -- ieee80211_wake_queues(dev->wl->hw); -- - b43_set_status(dev, B43_STAT_INITIALIZED); - - out: -diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c -index 4a905b6..6d21b49 100644 ---- a/drivers/net/wireless/b43legacy/main.c -+++ b/drivers/net/wireless/b43legacy/main.c -@@ -2921,6 +2921,7 @@ static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev) - goto out; - } - /* We are ready to run. */ -+ ieee80211_wake_queues(dev->wl->hw); - b43legacy_set_status(dev, B43legacy_STAT_STARTED); - - /* Start data flow (TX/RX) */ -@@ -3341,6 +3342,7 @@ static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev) - b43legacy_security_init(dev); - b43legacy_rng_init(wl); - -+ ieee80211_wake_queues(dev->wl->hw); - b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); - - b43legacy_leds_init(dev); -diff --git a/drivers/net/wireless/p54/p54pci.c b/drivers/net/wireless/p54/p54pci.c -index a72f7c2..4bf4c21 100644 ---- a/drivers/net/wireless/p54/p54pci.c -+++ b/drivers/net/wireless/p54/p54pci.c -@@ -157,6 +157,14 @@ static void p54p_refill_rx_ring(struct ieee80211_hw *dev, - skb_tail_pointer(skb), - priv->common.rx_mtu + 32, - PCI_DMA_FROMDEVICE); -+ -+ if (pci_dma_mapping_error(priv->pdev, mapping)) { -+ dev_kfree_skb_any(skb); -+ dev_err(&priv->pdev->dev, -+ "RX DMA Mapping error\n"); -+ break; -+ } -+ - desc->host_addr = cpu_to_le32(mapping); - desc->device_addr = 0; // FIXME: necessary? - desc->len = cpu_to_le16(priv->common.rx_mtu + 32); -@@ -325,14 +333,20 @@ static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb) - u32 device_idx, idx, i; - - spin_lock_irqsave(&priv->lock, flags); -- - device_idx = le32_to_cpu(ring_control->device_idx[1]); - idx = le32_to_cpu(ring_control->host_idx[1]); - i = idx % ARRAY_SIZE(ring_control->tx_data); - -- priv->tx_buf_data[i] = skb; - mapping = pci_map_single(priv->pdev, skb->data, skb->len, - PCI_DMA_TODEVICE); -+ if (pci_dma_mapping_error(priv->pdev, mapping)) { -+ spin_unlock_irqrestore(&priv->lock, flags); -+ p54_free_skb(dev, skb); -+ dev_err(&priv->pdev->dev, "TX DMA mapping error\n"); -+ return ; -+ } -+ priv->tx_buf_data[i] = skb; -+ - desc = &ring_control->tx_data[i]; - desc->host_addr = cpu_to_le32(mapping); - desc->device_addr = ((struct p54_hdr *)skb->data)->req_id; -diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c -index 92af9b9..8742640 100644 ---- a/drivers/net/wireless/p54/p54usb.c -+++ b/drivers/net/wireless/p54/p54usb.c -@@ -60,6 +60,7 @@ static struct usb_device_id p54u_table[] __devinitdata = { - {USB_DEVICE(0x06b9, 0x0121)}, /* Thomson SpeedTouch 121g */ - {USB_DEVICE(0x0707, 0xee13)}, /* SMC 2862W-G version 2 */ - {USB_DEVICE(0x083a, 0x4521)}, /* Siemens Gigaset USB Adapter 54 version 2 */ -+ {USB_DEVICE(0x083a, 0xf503)}, /* Accton FD7050E ver 1010ec */ - {USB_DEVICE(0x0846, 0x4240)}, /* Netgear WG111 (v2) */ - {USB_DEVICE(0x0915, 0x2000)}, /* Cohiba Proto board */ - {USB_DEVICE(0x0915, 0x2002)}, /* Cohiba Proto board */ -diff --git a/drivers/pci/hotplug/ibmphp_ebda.c b/drivers/pci/hotplug/ibmphp_ebda.c -index c1abac8..5becbde 100644 ---- a/drivers/pci/hotplug/ibmphp_ebda.c -+++ b/drivers/pci/hotplug/ibmphp_ebda.c -@@ -245,7 +245,7 @@ static void __init print_ebda_hpc (void) - - int __init ibmphp_access_ebda (void) - { -- u8 format, num_ctlrs, rio_complete, hs_complete; -+ u8 format, num_ctlrs, rio_complete, hs_complete, ebda_sz; - u16 ebda_seg, num_entries, next_offset, offset, blk_id, sub_addr, re, rc_id, re_id, base; - int rc = 0; - -@@ -260,7 +260,16 @@ int __init ibmphp_access_ebda (void) - iounmap (io_mem); - debug ("returned ebda segment: %x\n", ebda_seg); - -- io_mem = ioremap(ebda_seg<<4, 1024); -+ io_mem = ioremap(ebda_seg<<4, 1); -+ if (!io_mem) -+ return -ENOMEM; -+ ebda_sz = readb(io_mem); -+ iounmap(io_mem); -+ debug("ebda size: %d(KiB)\n", ebda_sz); -+ if (ebda_sz == 0) -+ return -ENOMEM; -+ -+ io_mem = ioremap(ebda_seg<<4, (ebda_sz * 1024)); - if (!io_mem ) - return -ENOMEM; - next_offset = 0x180; -diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig -index f526e73..11fce79 100644 ---- a/drivers/platform/x86/Kconfig -+++ b/drivers/platform/x86/Kconfig -@@ -319,9 +319,15 @@ config THINKPAD_ACPI_VIDEO - server running, phase of the moon, and the current mood of - Schroedinger's cat. If you can use X.org's RandR to control - your ThinkPad's video output ports instead of this feature, -- don't think twice: do it and say N here to save some memory. -+ don't think twice: do it and say N here to save memory and avoid -+ bad interactions with X.org. - -- If you are not sure, say Y here. -+ NOTE: access to this feature is limited to processes with the -+ CAP_SYS_ADMIN capability, to avoid local DoS issues in platforms -+ where it interacts badly with X.org. -+ -+ If you are not sure, say Y here but do try to check if you could -+ be using X.org RandR instead. - - config THINKPAD_ACPI_HOTKEY_POLL - bool "Support NVRAM polling for hot keys" -diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c -index e2be6bb..6a47bb7 100644 ---- a/drivers/platform/x86/eeepc-laptop.c -+++ b/drivers/platform/x86/eeepc-laptop.c -@@ -1277,7 +1277,8 @@ static void eeepc_dmi_check(struct eeepc_laptop *eeepc) - * hotplug code. In fact, current hotplug code seems to unplug another - * device... - */ -- if (strcmp(model, "1005HA") == 0 || strcmp(model, "1201N") == 0) { -+ if (strcmp(model, "1005HA") == 0 || strcmp(model, "1201N") == 0 || -+ strcmp(model, "1005PE") == 0) { - eeepc->hotplug_disabled = true; - pr_info("wlan hotplug disabled\n"); - } -diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c -index eb603f1..e7b0c3b 100644 ---- a/drivers/platform/x86/thinkpad_acpi.c -+++ b/drivers/platform/x86/thinkpad_acpi.c -@@ -286,6 +286,7 @@ struct ibm_init_struct { - char param[32]; - - int (*init) (struct ibm_init_struct *); -+ mode_t base_procfs_mode; - struct ibm_struct *data; - }; - -@@ -2082,6 +2083,7 @@ static struct attribute_set *hotkey_dev_attributes; - - static void tpacpi_driver_event(const unsigned int hkey_event); - static void hotkey_driver_event(const unsigned int scancode); -+static void hotkey_poll_setup(const bool may_warn); - - /* HKEY.MHKG() return bits */ - #define TP_HOTKEY_TABLET_MASK (1 << 3) -@@ -2264,6 +2266,8 @@ static int tpacpi_hotkey_driver_mask_set(const u32 mask) - - rc = hotkey_mask_set((hotkey_acpi_mask | hotkey_driver_mask) & - ~hotkey_source_mask); -+ hotkey_poll_setup(true); -+ - mutex_unlock(&hotkey_mutex); - - return rc; -@@ -2548,7 +2552,7 @@ static void hotkey_poll_stop_sync(void) - } - - /* call with hotkey_mutex held */ --static void hotkey_poll_setup(bool may_warn) -+static void hotkey_poll_setup(const bool may_warn) - { - const u32 poll_driver_mask = hotkey_driver_mask & hotkey_source_mask; - const u32 poll_user_mask = hotkey_user_mask & hotkey_source_mask; -@@ -2579,7 +2583,7 @@ static void hotkey_poll_setup(bool may_warn) - } - } - --static void hotkey_poll_setup_safe(bool may_warn) -+static void hotkey_poll_setup_safe(const bool may_warn) - { - mutex_lock(&hotkey_mutex); - hotkey_poll_setup(may_warn); -@@ -2597,7 +2601,11 @@ static void hotkey_poll_set_freq(unsigned int freq) - - #else /* CONFIG_THINKPAD_ACPI_HOTKEY_POLL */ - --static void hotkey_poll_setup_safe(bool __unused) -+static void hotkey_poll_setup(const bool __unused) -+{ -+} -+ -+static void hotkey_poll_setup_safe(const bool __unused) - { - } - -@@ -2607,16 +2615,11 @@ static int hotkey_inputdev_open(struct input_dev *dev) - { - switch (tpacpi_lifecycle) { - case TPACPI_LIFE_INIT: -- /* -- * hotkey_init will call hotkey_poll_setup_safe -- * at the appropriate moment -- */ -- return 0; -- case TPACPI_LIFE_EXITING: -- return -EBUSY; - case TPACPI_LIFE_RUNNING: - hotkey_poll_setup_safe(false); - return 0; -+ case TPACPI_LIFE_EXITING: -+ return -EBUSY; - } - - /* Should only happen if tpacpi_lifecycle is corrupt */ -@@ -2627,7 +2630,7 @@ static int hotkey_inputdev_open(struct input_dev *dev) - static void hotkey_inputdev_close(struct input_dev *dev) - { - /* disable hotkey polling when possible */ -- if (tpacpi_lifecycle == TPACPI_LIFE_RUNNING && -+ if (tpacpi_lifecycle != TPACPI_LIFE_EXITING && - !(hotkey_source_mask & hotkey_driver_mask)) - hotkey_poll_setup_safe(false); - } -@@ -3655,13 +3658,19 @@ static void hotkey_notify(struct ibm_struct *ibm, u32 event) - break; - case 3: - /* 0x3000-0x3FFF: bay-related wakeups */ -- if (hkey == TP_HKEY_EV_BAYEJ_ACK) { -+ switch (hkey) { -+ case TP_HKEY_EV_BAYEJ_ACK: - hotkey_autosleep_ack = 1; - printk(TPACPI_INFO - "bay ejected\n"); - hotkey_wakeup_hotunplug_complete_notify_change(); - known_ev = true; -- } else { -+ break; -+ case TP_HKEY_EV_OPTDRV_EJ: -+ /* FIXME: kick libata if SATA link offline */ -+ known_ev = true; -+ break; -+ default: - known_ev = false; - } - break; -@@ -3870,7 +3879,7 @@ enum { - TP_ACPI_BLUETOOTH_HWPRESENT = 0x01, /* Bluetooth hw available */ - TP_ACPI_BLUETOOTH_RADIOSSW = 0x02, /* Bluetooth radio enabled */ - TP_ACPI_BLUETOOTH_RESUMECTRL = 0x04, /* Bluetooth state at resume: -- off / last state */ -+ 0 = disable, 1 = enable */ - }; - - enum { -@@ -3916,10 +3925,11 @@ static int bluetooth_set_status(enum tpacpi_rfkill_state state) - } - #endif - -- /* We make sure to keep TP_ACPI_BLUETOOTH_RESUMECTRL off */ -- status = TP_ACPI_BLUETOOTH_RESUMECTRL; - if (state == TPACPI_RFK_RADIO_ON) -- status |= TP_ACPI_BLUETOOTH_RADIOSSW; -+ status = TP_ACPI_BLUETOOTH_RADIOSSW -+ | TP_ACPI_BLUETOOTH_RESUMECTRL; -+ else -+ status = 0; - - if (!acpi_evalf(hkey_handle, NULL, "SBDC", "vd", status)) - return -EIO; -@@ -4070,7 +4080,7 @@ enum { - TP_ACPI_WANCARD_HWPRESENT = 0x01, /* Wan hw available */ - TP_ACPI_WANCARD_RADIOSSW = 0x02, /* Wan radio enabled */ - TP_ACPI_WANCARD_RESUMECTRL = 0x04, /* Wan state at resume: -- off / last state */ -+ 0 = disable, 1 = enable */ - }; - - #define TPACPI_RFK_WWAN_SW_NAME "tpacpi_wwan_sw" -@@ -4107,10 +4117,11 @@ static int wan_set_status(enum tpacpi_rfkill_state state) - } - #endif - -- /* We make sure to set TP_ACPI_WANCARD_RESUMECTRL */ -- status = TP_ACPI_WANCARD_RESUMECTRL; - if (state == TPACPI_RFK_RADIO_ON) -- status |= TP_ACPI_WANCARD_RADIOSSW; -+ status = TP_ACPI_WANCARD_RADIOSSW -+ | TP_ACPI_WANCARD_RESUMECTRL; -+ else -+ status = 0; - - if (!acpi_evalf(hkey_handle, NULL, "SWAN", "vd", status)) - return -EIO; -@@ -4619,6 +4630,10 @@ static int video_read(struct seq_file *m) - return 0; - } - -+ /* Even reads can crash X.org, so... */ -+ if (!capable(CAP_SYS_ADMIN)) -+ return -EPERM; -+ - status = video_outputsw_get(); - if (status < 0) - return status; -@@ -4652,6 +4667,10 @@ static int video_write(char *buf) - if (video_supported == TPACPI_VIDEO_NONE) - return -ENODEV; - -+ /* Even reads can crash X.org, let alone writes... */ -+ if (!capable(CAP_SYS_ADMIN)) -+ return -EPERM; -+ - enable = 0; - disable = 0; - -@@ -6133,13 +6152,13 @@ static const struct tpacpi_quirk brightness_quirk_table[] __initconst = { - TPACPI_Q_IBM('1', 'Y', TPACPI_BRGHT_Q_EC), /* T43/p ATI */ - - /* Models with ATI GPUs that can use ECNVRAM */ -- TPACPI_Q_IBM('1', 'R', TPACPI_BRGHT_Q_EC), -+ TPACPI_Q_IBM('1', 'R', TPACPI_BRGHT_Q_EC), /* R50,51 T40-42 */ - TPACPI_Q_IBM('1', 'Q', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), -- TPACPI_Q_IBM('7', '6', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), -+ TPACPI_Q_IBM('7', '6', TPACPI_BRGHT_Q_EC), /* R52 */ - TPACPI_Q_IBM('7', '8', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), - - /* Models with Intel Extreme Graphics 2 */ -- TPACPI_Q_IBM('1', 'U', TPACPI_BRGHT_Q_NOEC), -+ TPACPI_Q_IBM('1', 'U', TPACPI_BRGHT_Q_NOEC), /* X40 */ - TPACPI_Q_IBM('1', 'V', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), - TPACPI_Q_IBM('1', 'W', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), - -@@ -6522,7 +6541,8 @@ static int volume_set_status(const u8 status) - return volume_set_status_ec(status); - } - --static int volume_set_mute_ec(const bool mute) -+/* returns < 0 on error, 0 on no change, 1 on change */ -+static int __volume_set_mute_ec(const bool mute) - { - int rc; - u8 s, n; -@@ -6537,22 +6557,37 @@ static int volume_set_mute_ec(const bool mute) - n = (mute) ? s | TP_EC_AUDIO_MUTESW_MSK : - s & ~TP_EC_AUDIO_MUTESW_MSK; - -- if (n != s) -+ if (n != s) { - rc = volume_set_status_ec(n); -+ if (!rc) -+ rc = 1; -+ } - - unlock: - mutex_unlock(&volume_mutex); - return rc; - } - -+static int volume_alsa_set_mute(const bool mute) -+{ -+ dbg_printk(TPACPI_DBG_MIXER, "ALSA: trying to %smute\n", -+ (mute) ? "" : "un"); -+ return __volume_set_mute_ec(mute); -+} -+ - static int volume_set_mute(const bool mute) - { -+ int rc; -+ - dbg_printk(TPACPI_DBG_MIXER, "trying to %smute\n", - (mute) ? "" : "un"); -- return volume_set_mute_ec(mute); -+ -+ rc = __volume_set_mute_ec(mute); -+ return (rc < 0) ? rc : 0; - } - --static int volume_set_volume_ec(const u8 vol) -+/* returns < 0 on error, 0 on no change, 1 on change */ -+static int __volume_set_volume_ec(const u8 vol) - { - int rc; - u8 s, n; -@@ -6569,19 +6604,22 @@ static int volume_set_volume_ec(const u8 vol) - - n = (s & ~TP_EC_AUDIO_LVL_MSK) | vol; - -- if (n != s) -+ if (n != s) { - rc = volume_set_status_ec(n); -+ if (!rc) -+ rc = 1; -+ } - - unlock: - mutex_unlock(&volume_mutex); - return rc; - } - --static int volume_set_volume(const u8 vol) -+static int volume_alsa_set_volume(const u8 vol) - { - dbg_printk(TPACPI_DBG_MIXER, -- "trying to set volume level to %hu\n", vol); -- return volume_set_volume_ec(vol); -+ "ALSA: trying to set volume level to %hu\n", vol); -+ return __volume_set_volume_ec(vol); - } - - static void volume_alsa_notify_change(void) -@@ -6628,7 +6666,7 @@ static int volume_alsa_vol_get(struct snd_kcontrol *kcontrol, - static int volume_alsa_vol_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) - { -- return volume_set_volume(ucontrol->value.integer.value[0]); -+ return volume_alsa_set_volume(ucontrol->value.integer.value[0]); - } - - #define volume_alsa_mute_info snd_ctl_boolean_mono_info -@@ -6651,7 +6689,7 @@ static int volume_alsa_mute_get(struct snd_kcontrol *kcontrol, - static int volume_alsa_mute_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) - { -- return volume_set_mute(!ucontrol->value.integer.value[0]); -+ return volume_alsa_set_mute(!ucontrol->value.integer.value[0]); - } - - static struct snd_kcontrol_new volume_alsa_control_vol __devinitdata = { -@@ -8477,9 +8515,10 @@ static int __init ibm_init(struct ibm_init_struct *iibm) - "%s installed\n", ibm->name); - - if (ibm->read) { -- mode_t mode; -+ mode_t mode = iibm->base_procfs_mode; - -- mode = S_IRUGO; -+ if (!mode) -+ mode = S_IRUGO; - if (ibm->write) - mode |= S_IWUSR; - entry = proc_create_data(ibm->name, mode, proc_dir, -@@ -8670,6 +8709,7 @@ static struct ibm_init_struct ibms_init[] __initdata = { - #ifdef CONFIG_THINKPAD_ACPI_VIDEO - { - .init = video_init, -+ .base_procfs_mode = S_IRUSR, - .data = &video_driver_data, - }, - #endif -@@ -9032,6 +9072,9 @@ static int __init thinkpad_acpi_module_init(void) - return ret; - } - } -+ -+ tpacpi_lifecycle = TPACPI_LIFE_RUNNING; -+ - ret = input_register_device(tpacpi_inputdev); - if (ret < 0) { - printk(TPACPI_ERR "unable to register input device\n"); -@@ -9041,7 +9084,6 @@ static int __init thinkpad_acpi_module_init(void) - tp_features.input_device_registered = 1; - } - -- tpacpi_lifecycle = TPACPI_LIFE_RUNNING; - return 0; - } - -diff --git a/drivers/rtc/class.c b/drivers/rtc/class.c -index be5a6b7..40845c7 100644 ---- a/drivers/rtc/class.c -+++ b/drivers/rtc/class.c -@@ -226,6 +226,7 @@ static void __exit rtc_exit(void) - { - rtc_dev_exit(); - class_destroy(rtc_class); -+ idr_destroy(&rtc_idr); - } - - subsys_initcall(rtc_init); -diff --git a/drivers/rtc/rtc-coh901331.c b/drivers/rtc/rtc-coh901331.c -index 03ea530..44c4399 100644 ---- a/drivers/rtc/rtc-coh901331.c -+++ b/drivers/rtc/rtc-coh901331.c -@@ -271,12 +271,13 @@ static int coh901331_resume(struct platform_device *pdev) - { - struct coh901331_port *rtap = dev_get_drvdata(&pdev->dev); - -- if (device_may_wakeup(&pdev->dev)) -+ if (device_may_wakeup(&pdev->dev)) { - disable_irq_wake(rtap->irq); -- else -+ } else { - clk_enable(rtap->clk); - writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK); - clk_disable(rtap->clk); -+ } - return 0; - } - #else -diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c -index efabea1..cd55176 100644 ---- a/drivers/scsi/mpt2sas/mpt2sas_scsih.c -+++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c -@@ -5998,6 +5998,8 @@ _scsih_remove(struct pci_dev *pdev) - struct _sas_port *mpt2sas_port; - struct _sas_device *sas_device; - struct _sas_node *expander_sibling; -+ struct _raid_device *raid_device, *next; -+ struct MPT2SAS_TARGET *sas_target_priv_data; - struct workqueue_struct *wq; - unsigned long flags; - -@@ -6011,6 +6013,21 @@ _scsih_remove(struct pci_dev *pdev) - if (wq) - destroy_workqueue(wq); - -+ /* release all the volumes */ -+ list_for_each_entry_safe(raid_device, next, &ioc->raid_device_list, -+ list) { -+ if (raid_device->starget) { -+ sas_target_priv_data = -+ raid_device->starget->hostdata; -+ sas_target_priv_data->deleted = 1; -+ scsi_remove_target(&raid_device->starget->dev); -+ } -+ printk(MPT2SAS_INFO_FMT "removing handle(0x%04x), wwid" -+ "(0x%016llx)\n", ioc->name, raid_device->handle, -+ (unsigned long long) raid_device->wwid); -+ _scsih_raid_device_remove(ioc, raid_device); -+ } -+ - /* free ports attached to the sas_host */ - retry_again: - list_for_each_entry(mpt2sas_port, -diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c -index 8371d91..49ac414 100644 ---- a/drivers/scsi/qla1280.c -+++ b/drivers/scsi/qla1280.c -@@ -1640,8 +1640,10 @@ qla1280_load_firmware_pio(struct scsi_qla_host *ha) - uint16_t mb[MAILBOX_REGISTER_COUNT], i; - int err; - -+ spin_unlock_irq(ha->host->host_lock); - err = request_firmware(&fw, ql1280_board_tbl[ha->devnum].fwname, - &ha->pdev->dev); -+ spin_lock_irq(ha->host->host_lock); - if (err) { - printk(KERN_ERR "Failed to load image \"%s\" err %d\n", - ql1280_board_tbl[ha->devnum].fwname, err); -@@ -1699,8 +1701,10 @@ qla1280_load_firmware_dma(struct scsi_qla_host *ha) - return -ENOMEM; - #endif - -+ spin_unlock_irq(ha->host->host_lock); - err = request_firmware(&fw, ql1280_board_tbl[ha->devnum].fwname, - &ha->pdev->dev); -+ spin_lock_irq(ha->host->host_lock); - if (err) { - printk(KERN_ERR "Failed to load image \"%s\" err %d\n", - ql1280_board_tbl[ha->devnum].fwname, err); -diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c -index 60d665a..d00fcf8 100644 ---- a/drivers/serial/imx.c -+++ b/drivers/serial/imx.c -@@ -1279,7 +1279,7 @@ static int serial_imx_probe(struct platform_device *pdev) - sport->use_irda = 1; - #endif - -- if (pdata->init) { -+ if (pdata && pdata->init) { - ret = pdata->init(pdev); - if (ret) - goto clkput; -@@ -1292,7 +1292,7 @@ static int serial_imx_probe(struct platform_device *pdev) - - return 0; - deinit: -- if (pdata->exit) -+ if (pdata && pdata->exit) - pdata->exit(pdev); - clkput: - clk_put(sport->clk); -@@ -1321,7 +1321,7 @@ static int serial_imx_remove(struct platform_device *pdev) - - clk_disable(sport->clk); - -- if (pdata->exit) -+ if (pdata && pdata->exit) - pdata->exit(pdev); - - iounmap(sport->port.membase); -diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig -index fc2e963..ed77d88 100644 ---- a/drivers/staging/Kconfig -+++ b/drivers/staging/Kconfig -@@ -81,8 +81,6 @@ source "drivers/staging/rtl8192u/Kconfig" - - source "drivers/staging/rtl8192e/Kconfig" - --source "drivers/staging/mimio/Kconfig" -- - source "drivers/staging/frontier/Kconfig" - - source "drivers/staging/dream/Kconfig" -diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile -index b5e67b8..6035bff 100644 ---- a/drivers/staging/Makefile -+++ b/drivers/staging/Makefile -@@ -23,7 +23,6 @@ obj-$(CONFIG_R8187SE) += rtl8187se/ - obj-$(CONFIG_RTL8192SU) += rtl8192su/ - obj-$(CONFIG_RTL8192U) += rtl8192u/ - obj-$(CONFIG_RTL8192E) += rtl8192e/ --obj-$(CONFIG_INPUT_MIMIO) += mimio/ - obj-$(CONFIG_TRANZPORT) += frontier/ - obj-$(CONFIG_DREAM) += dream/ - obj-$(CONFIG_POHMELFS) += pohmelfs/ -diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c -index 894eecf..6acc49a 100644 ---- a/drivers/staging/hv/vmbus_drv.c -+++ b/drivers/staging/hv/vmbus_drv.c -@@ -24,6 +24,8 @@ - #include - #include - #include -+#include -+#include - #include "osd.h" - #include "logging.h" - #include "vmbus.h" -@@ -946,6 +948,19 @@ static irqreturn_t vmbus_isr(int irq, void *dev_id) - } - } - -+static struct dmi_system_id __initdata microsoft_hv_dmi_table[] = { -+ { -+ .ident = "Hyper-V", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), -+ DMI_MATCH(DMI_PRODUCT_NAME, "Virtual Machine"), -+ DMI_MATCH(DMI_BOARD_NAME, "Virtual Machine"), -+ }, -+ }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(dmi, microsoft_hv_dmi_table); -+ - static int __init vmbus_init(void) - { - int ret = 0; -@@ -957,6 +972,9 @@ static int __init vmbus_init(void) - vmbus_loglevel, HIWORD(vmbus_loglevel), LOWORD(vmbus_loglevel)); - /* Todo: it is used for loglevel, to be ported to new kernel. */ - -+ if (!dmi_check_system(microsoft_hv_dmi_table)) -+ return -ENODEV; -+ - ret = vmbus_bus_init(VmbusInitialize); - - DPRINT_EXIT(VMBUS_DRV); -@@ -973,6 +991,18 @@ static void __exit vmbus_exit(void) - return; - } - -+/* -+ * We use a PCI table to determine if we should autoload this driver This is -+ * needed by distro tools to determine if the hyperv drivers should be -+ * installed and/or configured. We don't do anything else with the table, but -+ * it needs to be present. -+ */ -+const static struct pci_device_id microsoft_hv_pci_table[] = { -+ { PCI_DEVICE(0x1414, 0x5353) }, /* VGA compatible controller */ -+ { 0 } -+}; -+MODULE_DEVICE_TABLE(pci, microsoft_hv_pci_table); -+ - MODULE_LICENSE("GPL"); - module_param(vmbus_irq, int, S_IRUGO); - module_param(vmbus_loglevel, int, S_IRUGO); -diff --git a/drivers/staging/mimio/Kconfig b/drivers/staging/mimio/Kconfig -deleted file mode 100644 -index 505dcb2..0000000 ---- a/drivers/staging/mimio/Kconfig -+++ /dev/null -@@ -1,10 +0,0 @@ --config INPUT_MIMIO -- tristate "Mimio Xi interactive whiteboard support" -- depends on USB && INPUT -- default N -- help -- Say Y here if you want to use a Mimio Xi interactive -- whiteboard device. -- -- To compile this driver as a module, choose M here: the -- module will be called mimio. -diff --git a/drivers/staging/mimio/Makefile b/drivers/staging/mimio/Makefile -deleted file mode 100644 -index 77807ee..0000000 ---- a/drivers/staging/mimio/Makefile -+++ /dev/null -@@ -1 +0,0 @@ --obj-$(CONFIG_INPUT_MIMIO) += mimio.o -diff --git a/drivers/staging/mimio/mimio.c b/drivers/staging/mimio/mimio.c -deleted file mode 100644 -index 1ba8103..0000000 ---- a/drivers/staging/mimio/mimio.c -+++ /dev/null -@@ -1,914 +0,0 @@ --/* -- * Hardware event => input event mapping: -- * -- * -- * -- input.h:#define BTN_TOOL_PEN 0x140 black -- input.h:#define BTN_TOOL_RUBBER 0x141 blue -- input.h:#define BTN_TOOL_BRUSH 0x142 green -- input.h:#define BTN_TOOL_PENCIL 0x143 red -- input.h:#define BTN_TOOL_AIRBRUSH 0x144 eraser -- input.h:#define BTN_TOOL_FINGER 0x145 small eraser -- input.h:#define BTN_TOOL_MOUSE 0x146 mimio interactive -- input.h:#define BTN_TOOL_LENS 0x147 mimio interactive but1 -- input.h:#define LOCALBTN_TOOL_EXTRA1 0x14a mimio interactive but2 == BTN_TOUCH -- input.h:#define LOCALBTN_TOOL_EXTRA2 0x14b mimio extra pens (orange, brown, yellow, purple) == BTN_STYLUS -- input.h:#define LOCALBTN_TOOL_EXTRA3 0x14c unused == BTN_STYLUS2 -- input.h:#define BTN_TOOL_DOUBLETAP 0x14d unused -- input.h:#define BTN_TOOL_TRIPLETAP 0x14e unused -- * -- * MIMIO_EV_PENDOWN(MIMIO_PEN_K) => EV_KEY BIT(BTN_TOOL_PEN) -- * MIMIO_EV_PENDOWN(MIMIO_PEN_B) => EV_KEY BIT(BTN_TOOL_RUBBER) -- * MIMIO_EV_PENDOWN(MIMIO_PEN_G) => EV_KEY BIT(BTN_TOOL_BRUSH) -- * MIMIO_EV_PENDOWN(MIMIO_PEN_R) => EV_KEY BIT(BTN_TOOL_PENCIL) -- * MIMIO_EV_PENDOWN(MIMIO_PEN_E) => EV_KEY BIT(BTN_TOOL_AIRBRUSH) -- * MIMIO_EV_PENDOWN(MIMIO_PEN_ES) => EV_KEY BIT(BTN_TOOL_FINGER) -- * MIMIO_EV_PENDOWN(MIMIO_PEN_I) => EV_KEY BIT(BTN_TOOL_MOUSE) -- * MIMIO_EV_PENDOWN(MIMIO_PEN_IL) => EV_KEY BIT(BTN_TOOL_LENS) -- * MIMIO_EV_PENDOWN(MIMIO_PEN_IR) => EV_KEY BIT(BTN_TOOL_DOUBLETAP) -- * MIMIO_EV_PENDOWN(MIMIO_PEN_EX) => EV_KEY BIT(BTN_TOOL_TRIPLETAP) -- * MIMIO_EV_PENDATA => EV_ABS BIT(ABS_X), BIT(ABS_Y) -- * MIMIO_EV_MEMRESET => EV_KEY BIT(BTN_0) -- * MIMIO_EV_ACC(ACC_NEWPAGE) => EV_KEY BIT(BTN_1) -- * MIMIO_EV_ACC(ACC_TAGPAGE) => EV_KEY BIT(BTN_2) -- * MIMIO_EV_ACC(ACC_PRINTPAGE) => EV_KEY BIT(BTN_3) -- * MIMIO_EV_ACC(ACC_MAXIMIZE) => EV_KEY BIT(BTN_4) -- * MIMIO_EV_ACC(ACC_FINDCTLPNL) => EV_KEY BIT(BTN_5) -- * -- * -- * open issues: -- * - cold-load of data captured when mimio in standalone mode not yet -- * supported; need to snoop Win32 box to see datastream for this. -- * - mimio mouse not yet supported; need to snoop Win32 box to see the -- * datastream for this. -- */ --#include --#include --#include --#include --#include --#include -- --#define DRIVER_VERSION "v0.031" --#define DRIVER_AUTHOR "mwilder@cs.nmsu.edu" --#define DRIVER_DESC "USB mimio-xi driver" -- --enum {UPVALUE, DOWNVALUE, MOVEVALUE}; -- --#define MIMIO_XRANGE_MAX 9600 --#define MIMIO_YRANGE_MAX 4800 -- --#define LOCALBTN_TOOL_EXTRA1 BTN_TOUCH --#define LOCALBTN_TOOL_EXTRA2 BTN_STYLUS --#define LOCALBTN_TOOL_EXTRA3 BTN_STYLUS2 -- --#define MIMIO_VENDOR_ID 0x08d3 --#define MIMIO_PRODUCT_ID 0x0001 --#define MIMIO_MAXPAYLOAD (8) --#define MIMIO_MAXNAMELEN (64) --#define MIMIO_TXWAIT (1) --#define MIMIO_TXDONE (2) -- --#define MIMIO_EV_PENDOWN (0x22) --#define MIMIO_EV_PENDATA (0x24) --#define MIMIO_EV_PENUP (0x51) --#define MIMIO_EV_MEMRESET (0x45) --#define MIMIO_EV_ACC (0xb2) -- --#define MIMIO_PEN_K (1) /* black pen */ --#define MIMIO_PEN_B (2) /* blue pen */ --#define MIMIO_PEN_G (3) /* green pen */ --#define MIMIO_PEN_R (4) /* red pen */ --/* 5, 6, 7, 8 are extra pens */ --#define MIMIO_PEN_E (9) /* big eraser */ --#define MIMIO_PEN_ES (10) /* lil eraser */ --#define MIMIO_PENJUMP_START (10) --#define MIMIO_PENJUMP (6) --#define MIMIO_PEN_I (17) /* mimio interactive */ --#define MIMIO_PEN_IL (18) /* mimio interactive button 1 */ --#define MIMIO_PEN_IR (19) /* mimio interactive button 2 */ -- --#define MIMIO_PEN_MAX (MIMIO_PEN_IR) -- --#define ACC_DONE (0) --#define ACC_NEWPAGE (1) --#define ACC_TAGPAGE (2) --#define ACC_PRINTPAGE (4) --#define ACC_MAXIMIZE (8) --#define ACC_FINDCTLPNL (16) -- --#define isvalidtxsize(n) ((n) > 0 && (n) <= MIMIO_MAXPAYLOAD) -- -- --struct pktbuf { -- unsigned char instr; -- unsigned char buf[16]; -- unsigned char *p; -- unsigned char *q; --}; -- --struct usbintendpt { -- dma_addr_t dma; -- struct urb *urb; -- unsigned char *buf; -- struct usb_endpoint_descriptor *desc; --}; -- --struct mimio { -- struct input_dev *idev; -- struct usb_device *udev; -- struct usb_interface *uifc; -- int open; -- int present; -- int greeted; -- int txflags; -- char phys[MIMIO_MAXNAMELEN]; -- struct usbintendpt in; -- struct usbintendpt out; -- struct pktbuf pktbuf; -- unsigned char minor; -- wait_queue_head_t waitq; -- spinlock_t txlock; -- void (*rxhandler)(struct mimio *, unsigned char *, unsigned int); -- int last_pen_down; --}; -- --static void mimio_close(struct input_dev *); --static void mimio_dealloc(struct mimio *); --static void mimio_disconnect(struct usb_interface *); --static int mimio_greet(struct mimio *); --static void mimio_irq_in(struct urb *); --static void mimio_irq_out(struct urb *); --static int mimio_open(struct input_dev *); --static int mimio_probe(struct usb_interface *, const struct usb_device_id *); --static void mimio_rx_handler(struct mimio *, unsigned char *, unsigned int); --static int mimio_tx(struct mimio *, const char *, int); -- --static char mimio_name[] = "VirtualInk mimio-Xi"; --static struct usb_device_id mimio_table [] = { -- { USB_DEVICE(MIMIO_VENDOR_ID, MIMIO_PRODUCT_ID) }, -- { USB_DEVICE(0x0525, 0xa4a0) }, /* gadget zero firmware */ -- { } --}; -- --MODULE_DEVICE_TABLE(usb, mimio_table); -- --static struct usb_driver mimio_driver = { -- .name = "mimio", -- .probe = mimio_probe, -- .disconnect = mimio_disconnect, -- .id_table = mimio_table, --}; -- --static DECLARE_MUTEX(disconnect_sem); -- --static void mimio_close(struct input_dev *idev) --{ -- struct mimio *mimio; -- -- mimio = input_get_drvdata(idev); -- if (!mimio) { -- dev_err(&idev->dev, "null mimio attached to input device\n"); -- return; -- } -- -- if (mimio->open <= 0) -- dev_err(&idev->dev, "mimio not open.\n"); -- else -- mimio->open--; -- -- if (mimio->present == 0 && mimio->open == 0) -- mimio_dealloc(mimio); --} -- --static void mimio_dealloc(struct mimio *mimio) --{ -- if (mimio == NULL) -- return; -- -- usb_kill_urb(mimio->in.urb); -- -- usb_kill_urb(mimio->out.urb); -- -- if (mimio->idev) { -- input_unregister_device(mimio->idev); -- if (mimio->idev->grab) -- input_close_device(mimio->idev->grab); -- else -- dev_dbg(&mimio->idev->dev, "mimio->idev->grab == NULL" -- " -- didn't call input_close_device\n"); -- } -- -- usb_free_urb(mimio->in.urb); -- -- usb_free_urb(mimio->out.urb); -- -- if (mimio->in.buf) { -- usb_buffer_free(mimio->udev, MIMIO_MAXPAYLOAD, mimio->in.buf, -- mimio->in.dma); -- } -- -- if (mimio->out.buf) -- usb_buffer_free(mimio->udev, MIMIO_MAXPAYLOAD, mimio->out.buf, -- mimio->out.dma); -- -- if (mimio->idev) -- input_free_device(mimio->idev); -- -- kfree(mimio); --} -- --static void mimio_disconnect(struct usb_interface *ifc) --{ -- struct mimio *mimio; -- -- down(&disconnect_sem); -- -- mimio = usb_get_intfdata(ifc); -- usb_set_intfdata(ifc, NULL); -- dev_dbg(&mimio->idev->dev, "disconnect\n"); -- -- if (mimio) { -- mimio->present = 0; -- -- if (mimio->open <= 0) -- mimio_dealloc(mimio); -- } -- -- up(&disconnect_sem); --} -- --static int mimio_greet(struct mimio *mimio) --{ -- const struct grtpkt { -- int nbytes; -- unsigned delay; -- char data[8]; -- } grtpkts[] = { -- { 3, 0, { 0x11, 0x55, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00 } }, -- { 5, 0, { 0x53, 0x55, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00 } }, -- { 5, 0, { 0x43, 0x55, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00 } }, -- { 5, 0, { 0x33, 0x55, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00 } }, -- { 5, 0, { 0x13, 0x00, 0x5e, 0x02, 0x4f, 0x00, 0x00, 0x00 } }, -- { 5, 0, { 0x13, 0x00, 0x04, 0x03, 0x14, 0x00, 0x00, 0x00 } }, -- { 5, 2, { 0x13, 0x00, 0x00, 0x04, 0x17, 0x00, 0x00, 0x00 } }, -- { 5, 0, { 0x13, 0x00, 0x0d, 0x08, 0x16, 0x00, 0x00, 0x00 } }, -- { 5, 0, { 0x13, 0x00, 0x4d, 0x01, 0x5f, 0x00, 0x00, 0x00 } }, -- { 3, 0, { 0xf1, 0x55, 0xa4, 0x00, 0x00, 0x00, 0x00, 0x00 } }, -- { 7, 2, { 0x52, 0x55, 0x00, 0x07, 0x31, 0x55, 0x64, 0x00 } }, -- { 0, 0, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }, -- }; -- int rslt; -- const struct grtpkt *pkt; -- -- for (pkt = grtpkts; pkt->nbytes; pkt++) { -- rslt = mimio_tx(mimio, pkt->data, pkt->nbytes); -- if (rslt) -- return rslt; -- if (pkt->delay) -- msleep(pkt->delay); -- } -- -- return 0; --} -- --static void mimio_irq_in(struct urb *urb) --{ -- int rslt; -- char *data; -- const char *reason = "going down"; -- struct mimio *mimio; -- -- mimio = urb->context; -- -- if (mimio == NULL) -- /* paranoia */ -- return; -- -- switch (urb->status) { -- case 0: -- /* success */ -- break; -- case -ETIMEDOUT: -- reason = "timeout -- unplugged?"; -- case -ECONNRESET: -- case -ENOENT: -- case -ESHUTDOWN: -- dev_dbg(&mimio->idev->dev, "%s.\n", reason); -- return; -- default: -- dev_dbg(&mimio->idev->dev, "unknown urb-status: %d.\n", -- urb->status); -- goto exit; -- } -- data = mimio->in.buf; -- -- if (mimio->rxhandler) -- mimio->rxhandler(mimio, data, urb->actual_length); --exit: -- /* -- * Keep listening to device on same urb. -- */ -- rslt = usb_submit_urb(urb, GFP_ATOMIC); -- if (rslt) -- dev_err(&mimio->idev->dev, "usb_submit_urb failure: %d.\n", -- rslt); --} -- --static void mimio_irq_out(struct urb *urb) --{ -- unsigned long flags; -- struct mimio *mimio; -- -- mimio = urb->context; -- -- if (urb->status) -- dev_dbg(&mimio->idev->dev, "urb-status: %d.\n", urb->status); -- -- spin_lock_irqsave(&mimio->txlock, flags); -- mimio->txflags |= MIMIO_TXDONE; -- spin_unlock_irqrestore(&mimio->txlock, flags); -- wmb(); -- wake_up(&mimio->waitq); --} -- --static int mimio_open(struct input_dev *idev) --{ -- int rslt; -- struct mimio *mimio; -- -- rslt = 0; -- down(&disconnect_sem); -- mimio = input_get_drvdata(idev); -- dev_dbg(&idev->dev, "mimio_open\n"); -- -- if (mimio == NULL) { -- dev_err(&idev->dev, "null mimio.\n"); -- rslt = -ENODEV; -- goto exit; -- } -- -- if (mimio->open++) -- goto exit; -- -- if (mimio->present && !mimio->greeted) { -- struct urb *urb = mimio->in.urb; -- mimio->in.urb->dev = mimio->udev; -- rslt = usb_submit_urb(mimio->in.urb, GFP_KERNEL); -- if (rslt) { -- dev_err(&idev->dev, "usb_submit_urb failure " -- "(res = %d: %s). Not greeting.\n", -- rslt, -- (!urb ? "urb is NULL" : -- (urb->hcpriv ? "urb->hcpriv is non-NULL" : -- (!urb->complete ? "urb is not complete" : -- (urb->number_of_packets <= 0 ? "urb has no packets" : -- (urb->interval <= 0 ? "urb interval too small" : -- "urb interval too large or some other error")))))); -- rslt = -EIO; -- goto exit; -- } -- rslt = mimio_greet(mimio); -- if (rslt == 0) { -- dev_dbg(&idev->dev, "Mimio greeted OK.\n"); -- mimio->greeted = 1; -- } else { -- dev_dbg(&idev->dev, "Mimio greet Failure (%d)\n", -- rslt); -- } -- } -- --exit: -- up(&disconnect_sem); -- return rslt; --} -- --static int mimio_probe(struct usb_interface *ifc, -- const struct usb_device_id *id) --{ -- char path[64]; -- int pipe, maxp; -- struct mimio *mimio; -- struct usb_device *udev; -- struct usb_host_interface *hostifc; -- struct input_dev *input_dev; -- int res = 0; -- int i; -- -- udev = interface_to_usbdev(ifc); -- -- mimio = kzalloc(sizeof(struct mimio), GFP_KERNEL); -- if (!mimio) -- return -ENOMEM; -- -- input_dev = input_allocate_device(); -- if (!input_dev) { -- mimio_dealloc(mimio); -- return -ENOMEM; -- } -- -- mimio->uifc = ifc; -- mimio->udev = udev; -- mimio->pktbuf.p = mimio->pktbuf.buf; -- mimio->pktbuf.q = mimio->pktbuf.buf; -- /* init_input_dev(mimio->idev); */ -- mimio->idev = input_dev; -- init_waitqueue_head(&mimio->waitq); -- spin_lock_init(&mimio->txlock); -- hostifc = ifc->cur_altsetting; -- -- if (hostifc->desc.bNumEndpoints != 2) { -- dev_err(&udev->dev, "Unexpected endpoint count: %d.\n", -- hostifc->desc.bNumEndpoints); -- mimio_dealloc(mimio); -- return -ENODEV; -- } -- -- mimio->in.desc = &(hostifc->endpoint[0].desc); -- mimio->out.desc = &(hostifc->endpoint[1].desc); -- -- mimio->in.buf = usb_buffer_alloc(udev, MIMIO_MAXPAYLOAD, GFP_KERNEL, -- &mimio->in.dma); -- mimio->out.buf = usb_buffer_alloc(udev, MIMIO_MAXPAYLOAD, GFP_KERNEL, -- &mimio->out.dma); -- -- if (mimio->in.buf == NULL || mimio->out.buf == NULL) { -- dev_err(&udev->dev, "usb_buffer_alloc failure.\n"); -- mimio_dealloc(mimio); -- return -ENOMEM; -- } -- -- mimio->in.urb = usb_alloc_urb(0, GFP_KERNEL); -- mimio->out.urb = usb_alloc_urb(0, GFP_KERNEL); -- -- if (mimio->in.urb == NULL || mimio->out.urb == NULL) { -- dev_err(&udev->dev, "usb_alloc_urb failure.\n"); -- mimio_dealloc(mimio); -- return -ENOMEM; -- } -- -- /* -- * Build the input urb. -- */ -- pipe = usb_rcvintpipe(udev, mimio->in.desc->bEndpointAddress); -- maxp = usb_maxpacket(udev, pipe, usb_pipeout(pipe)); -- if (maxp > MIMIO_MAXPAYLOAD) -- maxp = MIMIO_MAXPAYLOAD; -- usb_fill_int_urb(mimio->in.urb, udev, pipe, mimio->in.buf, maxp, -- mimio_irq_in, mimio, mimio->in.desc->bInterval); -- mimio->in.urb->transfer_dma = mimio->in.dma; -- mimio->in.urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; -- -- /* -- * Build the output urb. -- */ -- pipe = usb_sndintpipe(udev, mimio->out.desc->bEndpointAddress); -- maxp = usb_maxpacket(udev, pipe, usb_pipeout(pipe)); -- if (maxp > MIMIO_MAXPAYLOAD) -- maxp = MIMIO_MAXPAYLOAD; -- usb_fill_int_urb(mimio->out.urb, udev, pipe, mimio->out.buf, maxp, -- mimio_irq_out, mimio, mimio->out.desc->bInterval); -- mimio->out.urb->transfer_dma = mimio->out.dma; -- mimio->out.urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; -- -- /* -- * Build input device info -- */ -- usb_make_path(udev, path, 64); -- snprintf(mimio->phys, MIMIO_MAXNAMELEN, "%s/input0", path); -- input_set_drvdata(input_dev, mimio); -- /* input_dev->dev = &ifc->dev; */ -- input_dev->open = mimio_open; -- input_dev->close = mimio_close; -- input_dev->name = mimio_name; -- input_dev->phys = mimio->phys; -- input_dev->dev.parent = &ifc->dev; -- -- input_dev->id.bustype = BUS_USB; -- input_dev->id.vendor = le16_to_cpu(udev->descriptor.idVendor); -- input_dev->id.product = le16_to_cpu(udev->descriptor.idProduct); -- input_dev->id.version = le16_to_cpu(udev->descriptor.bcdDevice); -- -- input_dev->evbit[0] |= BIT(EV_KEY) | BIT(EV_ABS); -- for (i = BTN_TOOL_PEN; i <= LOCALBTN_TOOL_EXTRA2; ++i) -- set_bit(i, input_dev->keybit); -- -- input_dev->keybit[BIT_WORD(BTN_MISC)] |= BIT_MASK(BTN_0) | -- BIT_MASK(BTN_1) | -- BIT_MASK(BTN_2) | -- BIT_MASK(BTN_3) | -- BIT_MASK(BTN_4) | -- BIT_MASK(BTN_5); -- /* input_dev->keybit[BTN_MOUSE] |= BIT(BTN_LEFT); */ -- input_dev->absbit[0] |= BIT_MASK(ABS_X) | BIT_MASK(ABS_Y); -- input_set_abs_params(input_dev, ABS_X, 0, MIMIO_XRANGE_MAX, 0, 0); -- input_set_abs_params(input_dev, ABS_Y, 0, MIMIO_YRANGE_MAX, 0, 0); -- input_dev->absbit[BIT_WORD(ABS_MISC)] |= BIT_MASK(ABS_MISC); -- --#if 0 -- input_dev->absmin[ABS_X] = 0; -- input_dev->absmin[ABS_Y] = 0; -- input_dev->absmax[ABS_X] = 9600; -- input_dev->absmax[ABS_Y] = 4800; -- input_dev->absfuzz[ABS_X] = 0; -- input_dev->absfuzz[ABS_Y] = 0; -- input_dev->absflat[ABS_X] = 0; -- input_dev->absflat[ABS_Y] = 0; --#endif -- --#if 0 -- /* this will just reduce the precision */ -- input_dev->absfuzz[ABS_X] = 8; /* experimental; may need to change */ -- input_dev->absfuzz[ABS_Y] = 8; /* experimental; may need to change */ --#endif -- -- /* -- * Register the input device. -- */ -- res = input_register_device(mimio->idev); -- if (res) { -- dev_err(&udev->dev, "input_register_device failure (%d)\n", -- res); -- mimio_dealloc(mimio); -- return -EIO; -- } -- dev_dbg(&mimio->idev->dev, "input: %s on %s (res = %d).\n", -- input_dev->name, input_dev->phys, res); -- -- usb_set_intfdata(ifc, mimio); -- mimio->present = 1; -- -- /* -- * Submit the input urb to the usb subsystem. -- */ -- mimio->in.urb->dev = mimio->udev; -- res = usb_submit_urb(mimio->in.urb, GFP_KERNEL); -- if (res) { -- dev_err(&mimio->idev->dev, "usb_submit_urb failure (%d)\n", -- res); -- mimio_dealloc(mimio); -- return -EIO; -- } -- -- /* -- * Attempt to greet the mimio after giving -- * it some post-init settling time. -- * -- * note: sometimes this sleep interval isn't -- * long enough to permit the device to re-init -- * after a hot-swap; maybe need to bump it up. -- * -- * As it is, this probably breaks module unloading support! -- */ -- msleep(1024); -- -- res = mimio_greet(mimio); -- if (res == 0) { -- dev_dbg(&mimio->idev->dev, "Mimio greeted OK.\n"); -- mimio->greeted = 1; -- mimio->rxhandler = mimio_rx_handler; -- } else { -- dev_dbg(&mimio->idev->dev, "Mimio greet Failure (%d)\n", res); -- } -- -- return 0; --} -- --static int handle_mimio_rx_penupdown(struct mimio *mimio, -- int down, -- const char *const instr[], -- const int instr_ofst[]) --{ -- int penid, x; -- if (mimio->pktbuf.q - mimio->pktbuf.p < (down ? 4 : 3)) -- return 1; /* partial pkt */ -- -- if (down) { -- x = *mimio->pktbuf.p ^ *(mimio->pktbuf.p + 1) ^ -- *(mimio->pktbuf.p + 2); -- if (x != *(mimio->pktbuf.p + 3)) { -- dev_dbg(&mimio->idev->dev, "EV_PEN%s: bad xsum.\n", -- down ? "DOWN":"UP"); -- /* skip this event data */ -- mimio->pktbuf.p += 4; -- /* decode any remaining events */ -- return 0; -- } -- penid = mimio->pktbuf.instr = *(mimio->pktbuf.p + 2); -- if (penid > MIMIO_PEN_MAX) { -- dev_dbg(&mimio->idev->dev, -- "Unmapped penID (not in [0, %d]): %d\n", -- MIMIO_PEN_MAX, (int)mimio->pktbuf.instr); -- penid = mimio->pktbuf.instr = 0; -- } -- mimio->last_pen_down = penid; -- } else { -- penid = mimio->last_pen_down; -- } -- dev_dbg(&mimio->idev->dev, "%s (id %d, code %d) %s.\n", instr[penid], -- instr_ofst[penid], penid, down ? "down" : "up"); -- -- if (instr_ofst[penid] >= 0) { -- int code = BTN_TOOL_PEN + instr_ofst[penid]; -- int value = down ? DOWNVALUE : UPVALUE; -- if (code > KEY_MAX) -- dev_dbg(&mimio->idev->dev, "input_event will ignore " -- "-- code (%d) > KEY_MAX\n", code); -- if (!test_bit(code, mimio->idev->keybit)) -- dev_dbg(&mimio->idev->dev, "input_event will ignore " -- "-- bit for code (%d) not enabled\n", code); -- if (!!test_bit(code, mimio->idev->key) == value) -- dev_dbg(&mimio->idev->dev, "input_event will ignore " -- "-- bit for code (%d) already set to %d\n", -- code, value); -- if (value != DOWNVALUE) { -- /* input_regs(mimio->idev, regs); */ -- input_report_key(mimio->idev, code, value); -- input_sync(mimio->idev); -- } else { -- /* wait until we get some coordinates */ -- } -- } else { -- dev_dbg(&mimio->idev->dev, "penID offset[%d] == %d is < 0 " -- "- not sending\n", penid, instr_ofst[penid]); -- } -- mimio->pktbuf.p += down ? 4 : 3; /* 3 for up, 4 for down */ -- return 0; --} -- --/* -- * Stay tuned for partial-packet excitement. -- * -- * This routine buffers data packets received from the mimio device -- * in the mimio's data space. This buffering is necessary because -- * the mimio's in endpoint can serve us partial packets of data, and -- * we want the driver to support the servicing of multiple mimios. -- * Empirical evidence gathered so far suggests that the method of -- * buffering packet data in the mimio's data space works. Previous -- * versions of this driver did not buffer packet data in each mimio's -- * data-space, and were therefore not able to service multiple mimios. -- * Note that since the caller of this routine is running in interrupt -- * context, care needs to be taken to ensure that this routine does not -- * become bloated, and it may be that another spinlock is needed in each -- * mimio to guard the buffered packet data properly. -- */ --static void mimio_rx_handler(struct mimio *mimio, -- unsigned char *data, -- unsigned int nbytes) --{ -- struct device *dev = &mimio->idev->dev; -- unsigned int x; -- unsigned int y; -- static const char * const instr[] = { -- "?0", -- "black pen", "blue pen", "green pen", "red pen", -- "brown pen", "orange pen", "purple pen", "yellow pen", -- "big eraser", "lil eraser", -- "?11", "?12", "?13", "?14", "?15", "?16", -- "mimio interactive", "interactive button1", -- "interactive button2" -- }; -- -- /* Mimio Interactive gives: -- * down: [0x22 0x01 0x11 0x32 0x24] -- * b1 : [0x22 0x01 0x12 0x31 0x24] -- * b2 : [0x22 0x01 0x13 0x30 0x24] -- */ -- static const int instr_ofst[] = { -- -1, -- 0, 1, 2, 3, -- 9, 9, 9, 9, -- 4, 5, -- -1, -1, -1, -1, -1, -1, -- 6, 7, 8, -- }; -- -- memcpy(mimio->pktbuf.q, data, nbytes); -- mimio->pktbuf.q += nbytes; -- -- while (mimio->pktbuf.p < mimio->pktbuf.q) { -- int t = *mimio->pktbuf.p; -- switch (t) { -- case MIMIO_EV_PENUP: -- case MIMIO_EV_PENDOWN: -- if (handle_mimio_rx_penupdown(mimio, -- t == MIMIO_EV_PENDOWN, -- instr, instr_ofst)) -- return; /* partial packet */ -- break; -- -- case MIMIO_EV_PENDATA: -- if (mimio->pktbuf.q - mimio->pktbuf.p < 6) -- /* partial pkt */ -- return; -- x = *mimio->pktbuf.p ^ *(mimio->pktbuf.p + 1) ^ -- *(mimio->pktbuf.p + 2) ^ -- *(mimio->pktbuf.p + 3) ^ -- *(mimio->pktbuf.p + 4); -- if (x != *(mimio->pktbuf.p + 5)) { -- dev_dbg(dev, "EV_PENDATA: bad xsum.\n"); -- mimio->pktbuf.p += 6; /* skip this event data */ -- break; /* decode any remaining events */ -- } -- x = *(mimio->pktbuf.p + 1); -- x <<= 8; -- x |= *(mimio->pktbuf.p + 2); -- y = *(mimio->pktbuf.p + 3); -- y <<= 8; -- y |= *(mimio->pktbuf.p + 4); -- dev_dbg(dev, "coord: (%d, %d)\n", x, y); -- if (instr_ofst[mimio->pktbuf.instr] >= 0) { -- int code = BTN_TOOL_PEN + -- instr_ofst[mimio->last_pen_down]; --#if 0 -- /* Utter hack to ensure we get forwarded _AND_ -- * so we can identify when a complete signal is -- * received */ -- mimio->idev->abs[ABS_Y] = -1; -- mimio->idev->abs[ABS_X] = -1; --#endif -- /* input_regs(mimio->idev, regs); */ -- input_report_abs(mimio->idev, ABS_X, x); -- input_report_abs(mimio->idev, ABS_Y, y); -- /* fake a penup */ -- change_bit(code, mimio->idev->key); -- input_report_key(mimio->idev, -- code, -- DOWNVALUE); -- /* always sync here */ -- mimio->idev->sync = 0; -- input_sync(mimio->idev); -- } -- mimio->pktbuf.p += 6; -- break; -- case MIMIO_EV_MEMRESET: -- if (mimio->pktbuf.q - mimio->pktbuf.p < 7) -- /* partial pkt */ -- return; -- dev_dbg(dev, "mem-reset.\n"); -- /* input_regs(mimio->idev, regs); */ -- input_event(mimio->idev, EV_KEY, BTN_0, 1); -- input_event(mimio->idev, EV_KEY, BTN_0, 0); -- input_sync(mimio->idev); -- mimio->pktbuf.p += 7; -- break; -- case MIMIO_EV_ACC: -- if (mimio->pktbuf.q - mimio->pktbuf.p < 4) -- /* partial pkt */ -- return; -- x = *mimio->pktbuf.p ^ *(mimio->pktbuf.p + 1) ^ -- *(mimio->pktbuf.p + 2); -- if (x != *(mimio->pktbuf.p + 3)) { -- dev_dbg(dev, "EV_ACC: bad xsum.\n"); -- mimio->pktbuf.p += 4; /* skip this event data */ -- break; /* decode any remaining events */ -- } -- switch (*(mimio->pktbuf.p + 2)) { -- case ACC_NEWPAGE: -- dev_dbg(&mimio->idev->dev, "new-page.\n"); -- /* input_regs(mimio->idev, regs); */ -- input_event(mimio->idev, EV_KEY, BTN_1, 1); -- input_event(mimio->idev, EV_KEY, BTN_1, 0); -- input_sync(mimio->idev); -- break; -- case ACC_TAGPAGE: -- dev_dbg(&mimio->idev->dev, "tag-page.\n"); -- /* input_regs(mimio->idev, regs); */ -- input_event(mimio->idev, EV_KEY, BTN_2, 1); -- input_event(mimio->idev, EV_KEY, BTN_2, 0); -- input_sync(mimio->idev); -- break; -- case ACC_PRINTPAGE: -- dev_dbg(&mimio->idev->dev, "print-page.\n"); -- /* input_regs(mimio->idev, regs);*/ -- input_event(mimio->idev, EV_KEY, BTN_3, 1); -- input_event(mimio->idev, EV_KEY, BTN_3, 0); -- input_sync(mimio->idev); -- break; -- case ACC_MAXIMIZE: -- dev_dbg(&mimio->idev->dev, -- "maximize-window.\n"); -- /* input_regs(mimio->idev, regs); */ -- input_event(mimio->idev, EV_KEY, BTN_4, 1); -- input_event(mimio->idev, EV_KEY, BTN_4, 0); -- input_sync(mimio->idev); -- break; -- case ACC_FINDCTLPNL: -- dev_dbg(&mimio->idev->dev, "find-ctl-panel.\n"); -- /* input_regs(mimio->idev, regs); */ -- input_event(mimio->idev, EV_KEY, BTN_5, 1); -- input_event(mimio->idev, EV_KEY, BTN_5, 0); -- input_sync(mimio->idev); -- break; -- case ACC_DONE: -- dev_dbg(&mimio->idev->dev, "acc-done.\n"); -- /* no event is dispatched to the input -- * subsystem for this device event. -- */ -- break; -- default: -- dev_dbg(dev, "unknown acc event.\n"); -- break; -- } -- mimio->pktbuf.p += 4; -- break; -- default: -- mimio->pktbuf.p++; -- break; -- } -- } -- -- /* -- * No partial event was received, so reset mimio's pktbuf ptrs. -- */ -- mimio->pktbuf.p = mimio->pktbuf.q = mimio->pktbuf.buf; --} -- --static int mimio_tx(struct mimio *mimio, const char *buf, int nbytes) --{ -- int rslt; -- int timeout; -- unsigned long flags; -- DECLARE_WAITQUEUE(wait, current); -- -- if (!(isvalidtxsize(nbytes))) { -- dev_err(&mimio->idev->dev, "invalid arg: nbytes: %d.\n", -- nbytes); -- return -EINVAL; -- } -- -- /* -- * Init the out urb and copy the data to send. -- */ -- mimio->out.urb->dev = mimio->udev; -- mimio->out.urb->transfer_buffer_length = nbytes; -- memcpy(mimio->out.urb->transfer_buffer, buf, nbytes); -- -- /* -- * Send the data. -- */ -- spin_lock_irqsave(&mimio->txlock, flags); -- mimio->txflags = MIMIO_TXWAIT; -- rslt = usb_submit_urb(mimio->out.urb, GFP_ATOMIC); -- spin_unlock_irqrestore(&mimio->txlock, flags); -- dev_dbg(&mimio->idev->dev, "rslt: %d.\n", rslt); -- -- if (rslt) { -- dev_err(&mimio->idev->dev, "usb_submit_urb failure: %d.\n", -- rslt); -- return rslt; -- } -- -- /* -- * Wait for completion to be signalled (the mimio_irq_out -- * completion routine will or MIMIO_TXDONE in with txflags). -- */ -- timeout = HZ; -- set_current_state(TASK_INTERRUPTIBLE); -- add_wait_queue(&mimio->waitq, &wait); -- -- while (timeout && ((mimio->txflags & MIMIO_TXDONE) == 0)) { -- timeout = schedule_timeout(timeout); -- rmb(); -- } -- -- if ((mimio->txflags & MIMIO_TXDONE) == 0) -- dev_dbg(&mimio->idev->dev, "tx timed out.\n"); -- -- /* -- * Now that completion has been signalled, -- * unlink the urb so that it can be recycled. -- */ -- set_current_state(TASK_RUNNING); -- remove_wait_queue(&mimio->waitq, &wait); -- usb_unlink_urb(mimio->out.urb); -- -- return rslt; --} -- --static int __init mimio_init(void) --{ -- int rslt; -- -- rslt = usb_register(&mimio_driver); -- if (rslt != 0) { -- err("%s: usb_register failure: %d", __func__, rslt); -- return rslt; -- } -- -- printk(KERN_INFO KBUILD_MODNAME ":" -- DRIVER_DESC " " DRIVER_VERSION "\n"); -- return rslt; --} -- --static void __exit mimio_exit(void) --{ -- usb_deregister(&mimio_driver); --} -- --module_init(mimio_init); --module_exit(mimio_exit); -- --MODULE_AUTHOR(DRIVER_AUTHOR); --MODULE_DESCRIPTION(DRIVER_DESC); --MODULE_LICENSE("GPL"); -diff --git a/drivers/staging/pohmelfs/inode.c b/drivers/staging/pohmelfs/inode.c -index f69b778..cd25811 100644 ---- a/drivers/staging/pohmelfs/inode.c -+++ b/drivers/staging/pohmelfs/inode.c -@@ -36,6 +36,7 @@ - #define POHMELFS_MAGIC_NUM 0x504f482e - - static struct kmem_cache *pohmelfs_inode_cache; -+static atomic_t psb_bdi_num = ATOMIC_INIT(0); - - /* - * Removes inode from all trees, drops local name cache and removes all queued -@@ -1331,6 +1332,8 @@ static void pohmelfs_put_super(struct super_block *sb) - pohmelfs_crypto_exit(psb); - pohmelfs_state_exit(psb); - -+ bdi_destroy(&psb->bdi); -+ - kfree(psb); - sb->s_fs_info = NULL; - } -@@ -1815,11 +1818,22 @@ static int pohmelfs_fill_super(struct super_block *sb, void *data, int silent) - if (!psb) - goto err_out_exit; - -+ err = bdi_init(&psb->bdi); -+ if (err) -+ goto err_out_free_sb; -+ -+ err = bdi_register(&psb->bdi, NULL, "pfs-%d", atomic_inc_return(&psb_bdi_num)); -+ if (err) { -+ bdi_destroy(&psb->bdi); -+ goto err_out_free_sb; -+ } -+ - sb->s_fs_info = psb; - sb->s_op = &pohmelfs_sb_ops; - sb->s_magic = POHMELFS_MAGIC_NUM; - sb->s_maxbytes = MAX_LFS_FILESIZE; - sb->s_blocksize = PAGE_SIZE; -+ sb->s_bdi = &psb->bdi; - - psb->sb = sb; - -@@ -1863,11 +1877,11 @@ static int pohmelfs_fill_super(struct super_block *sb, void *data, int silent) - - err = pohmelfs_parse_options((char *) data, psb, 0); - if (err) -- goto err_out_free_sb; -+ goto err_out_free_bdi; - - err = pohmelfs_copy_crypto(psb); - if (err) -- goto err_out_free_sb; -+ goto err_out_free_bdi; - - err = pohmelfs_state_init(psb); - if (err) -@@ -1916,6 +1930,8 @@ err_out_state_exit: - err_out_free_strings: - kfree(psb->cipher_string); - kfree(psb->hash_string); -+err_out_free_bdi: -+ bdi_destroy(&psb->bdi); - err_out_free_sb: - kfree(psb); - err_out_exit: -diff --git a/drivers/staging/pohmelfs/netfs.h b/drivers/staging/pohmelfs/netfs.h -index 623a07d..01cba00 100644 ---- a/drivers/staging/pohmelfs/netfs.h -+++ b/drivers/staging/pohmelfs/netfs.h -@@ -18,6 +18,7 @@ - - #include - #include -+#include - - #define POHMELFS_CN_IDX 5 - #define POHMELFS_CN_VAL 0 -@@ -624,6 +625,8 @@ struct pohmelfs_sb { - - struct super_block *sb; - -+ struct backing_dev_info bdi; -+ - /* - * Algorithm strings. - */ -diff --git a/drivers/staging/wlan-ng/Kconfig b/drivers/staging/wlan-ng/Kconfig -index f44294b..f1af507 100644 ---- a/drivers/staging/wlan-ng/Kconfig -+++ b/drivers/staging/wlan-ng/Kconfig -@@ -1,6 +1,7 @@ - config PRISM2_USB - tristate "Prism2.5/3 USB driver" - depends on WLAN && USB && WIRELESS_EXT -+ select WEXT_PRIV - default n - ---help--- - This is the wlan-ng prism 2.5/3 USB driver for a wide range of -diff --git a/drivers/usb/core/driver.c b/drivers/usb/core/driver.c -index 60a45f1..ca479a7 100644 ---- a/drivers/usb/core/driver.c -+++ b/drivers/usb/core/driver.c -@@ -691,9 +691,6 @@ static int usb_uevent(struct device *dev, struct kobj_uevent_env *env) - { - struct usb_device *usb_dev; - -- /* driver is often null here; dev_dbg() would oops */ -- pr_debug("usb %s: uevent\n", dev_name(dev)); -- - if (is_usb_device(dev)) { - usb_dev = to_usb_device(dev); - } else if (is_usb_interface(dev)) { -@@ -705,6 +702,7 @@ static int usb_uevent(struct device *dev, struct kobj_uevent_env *env) - } - - if (usb_dev->devnum < 0) { -+ /* driver is often null here; dev_dbg() would oops */ - pr_debug("usb %s: already deleted?\n", dev_name(dev)); - return -ENODEV; - } -diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c -index 80995ef..0477616 100644 ---- a/drivers/usb/core/hcd.c -+++ b/drivers/usb/core/hcd.c -@@ -141,7 +141,7 @@ static const u8 usb3_rh_dev_descriptor[18] = { - 0x09, /* __u8 bMaxPacketSize0; 2^9 = 512 Bytes */ - - 0x6b, 0x1d, /* __le16 idVendor; Linux Foundation */ -- 0x02, 0x00, /* __le16 idProduct; device 0x0002 */ -+ 0x03, 0x00, /* __le16 idProduct; device 0x0003 */ - KERNEL_VER, KERNEL_REL, /* __le16 bcdDevice */ - - 0x03, /* __u8 iManufacturer; */ -diff --git a/drivers/usb/core/hcd.h b/drivers/usb/core/hcd.h -index bbe2b92..89613a7 100644 ---- a/drivers/usb/core/hcd.h -+++ b/drivers/usb/core/hcd.h -@@ -248,7 +248,7 @@ struct hc_driver { - /* xHCI specific functions */ - /* Called by usb_alloc_dev to alloc HC device structures */ - int (*alloc_dev)(struct usb_hcd *, struct usb_device *); -- /* Called by usb_release_dev to free HC device structures */ -+ /* Called by usb_disconnect to free HC device structures */ - void (*free_dev)(struct usb_hcd *, struct usb_device *); - - /* Bandwidth computation functions */ -diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c -index 35cc8b9..9cc0aba 100644 ---- a/drivers/usb/core/hub.c -+++ b/drivers/usb/core/hub.c -@@ -1554,6 +1554,15 @@ static inline void usb_stop_pm(struct usb_device *udev) - - #endif - -+static void hub_free_dev(struct usb_device *udev) -+{ -+ struct usb_hcd *hcd = bus_to_hcd(udev->bus); -+ -+ /* Root hubs aren't real devices, so don't free HCD resources */ -+ if (hcd->driver->free_dev && udev->parent) -+ hcd->driver->free_dev(hcd, udev); -+} -+ - /** - * usb_disconnect - disconnect a device (usbcore-internal) - * @pdev: pointer to device being disconnected -@@ -1624,6 +1633,8 @@ void usb_disconnect(struct usb_device **pdev) - - usb_stop_pm(udev); - -+ hub_free_dev(udev); -+ - put_device(&udev->dev); - } - -@@ -3191,6 +3202,7 @@ loop_disable: - loop: - usb_ep0_reinit(udev); - release_address(udev); -+ hub_free_dev(udev); - usb_put_dev(udev); - if ((status == -ENOTCONN) || (status == -ENOTSUPP)) - break; -diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c -index 0daff0d..ced0776 100644 ---- a/drivers/usb/core/usb.c -+++ b/drivers/usb/core/usb.c -@@ -228,9 +228,6 @@ static void usb_release_dev(struct device *dev) - hcd = bus_to_hcd(udev->bus); - - usb_destroy_configuration(udev); -- /* Root hubs aren't real devices, so don't free HCD resources */ -- if (hcd->driver->free_dev && udev->parent) -- hcd->driver->free_dev(hcd, udev); - usb_put_hcd(hcd); - kfree(udev->product); - kfree(udev->manufacturer); -diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c -index a37640e..73f9bbd 100644 ---- a/drivers/usb/gadget/f_mass_storage.c -+++ b/drivers/usb/gadget/f_mass_storage.c -@@ -2852,7 +2852,6 @@ error_release: - /* Call fsg_common_release() directly, ref might be not - * initialised */ - fsg_common_release(&common->ref); -- complete(&common->thread_notifier); - return ERR_PTR(rc); - } - -diff --git a/drivers/usb/host/ohci-pnx4008.c b/drivers/usb/host/ohci-pnx4008.c -index 2769326..cd74bbd 100644 ---- a/drivers/usb/host/ohci-pnx4008.c -+++ b/drivers/usb/host/ohci-pnx4008.c -@@ -327,7 +327,7 @@ static int __devinit usb_hcd_pnx4008_probe(struct platform_device *pdev) - } - i2c_adap = i2c_get_adapter(2); - memset(&i2c_info, 0, sizeof(struct i2c_board_info)); -- strlcpy(i2c_info.name, "isp1301_pnx", I2C_NAME_SIZE); -+ strlcpy(i2c_info.type, "isp1301_pnx", I2C_NAME_SIZE); - isp1301_i2c_client = i2c_new_probed_device(i2c_adap, &i2c_info, - normal_i2c); - i2c_put_adapter(i2c_adap); -@@ -411,7 +411,7 @@ out3: - out2: - clk_put(usb_clk); - out1: -- i2c_unregister_client(isp1301_i2c_client); -+ i2c_unregister_device(isp1301_i2c_client); - isp1301_i2c_client = NULL; - out_i2c_driver: - i2c_del_driver(&isp1301_driver); -@@ -430,7 +430,7 @@ static int usb_hcd_pnx4008_remove(struct platform_device *pdev) - pnx4008_unset_usb_bits(); - clk_disable(usb_clk); - clk_put(usb_clk); -- i2c_unregister_client(isp1301_i2c_client); -+ i2c_unregister_device(isp1301_i2c_client); - isp1301_i2c_client = NULL; - i2c_del_driver(&isp1301_driver); - -diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c -index 99cd00f..0919706 100644 ---- a/drivers/usb/host/uhci-hcd.c -+++ b/drivers/usb/host/uhci-hcd.c -@@ -735,6 +735,7 @@ static void uhci_stop(struct usb_hcd *hcd) - uhci_hc_died(uhci); - uhci_scan_schedule(uhci); - spin_unlock_irq(&uhci->lock); -+ synchronize_irq(hcd->irq); - - del_timer_sync(&uhci->fsbr_timer); - release_uhci(uhci); -diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h -index ecc131c..78c4eda 100644 ---- a/drivers/usb/host/xhci-ext-caps.h -+++ b/drivers/usb/host/xhci-ext-caps.h -@@ -101,12 +101,15 @@ static inline int xhci_find_next_cap_offset(void __iomem *base, int ext_offset) - - next = readl(base + ext_offset); - -- if (ext_offset == XHCI_HCC_PARAMS_OFFSET) -+ if (ext_offset == XHCI_HCC_PARAMS_OFFSET) { - /* Find the first extended capability */ - next = XHCI_HCC_EXT_CAPS(next); -- else -+ ext_offset = 0; -+ } else { - /* Find the next extended capability */ - next = XHCI_EXT_CAPS_NEXT(next); -+ } -+ - if (!next) - return 0; - /* -diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c -index bd254ec..7d920f2 100644 ---- a/drivers/usb/serial/cp210x.c -+++ b/drivers/usb/serial/cp210x.c -@@ -91,11 +91,12 @@ static struct usb_device_id id_table [] = { - { USB_DEVICE(0x10C4, 0x81C8) }, /* Lipowsky Industrie Elektronik GmbH, Baby-JTAG */ - { USB_DEVICE(0x10C4, 0x81E2) }, /* Lipowsky Industrie Elektronik GmbH, Baby-LIN */ - { USB_DEVICE(0x10C4, 0x81E7) }, /* Aerocomm Radio */ -+ { USB_DEVICE(0x10C4, 0x81E8) }, /* Zephyr Bioharness */ - { USB_DEVICE(0x10C4, 0x81F2) }, /* C1007 HF band RFID controller */ - { USB_DEVICE(0x10C4, 0x8218) }, /* Lipowsky Industrie Elektronik GmbH, HARP-1 */ - { USB_DEVICE(0x10C4, 0x822B) }, /* Modem EDGE(GSM) Comander 2 */ - { USB_DEVICE(0x10C4, 0x826B) }, /* Cygnal Integrated Products, Inc., Fasttrax GPS demostration module */ -- { USB_DEVICE(0x10c4, 0x8293) }, /* Telegesys ETRX2USB */ -+ { USB_DEVICE(0x10C4, 0x8293) }, /* Telegesys ETRX2USB */ - { USB_DEVICE(0x10C4, 0x82F9) }, /* Procyon AVS */ - { USB_DEVICE(0x10C4, 0x8341) }, /* Siemens MC35PU GPRS Modem */ - { USB_DEVICE(0x10C4, 0x8382) }, /* Cygnal Integrated Products, Inc. */ -diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c -index 7638828..34acf6c 100644 ---- a/drivers/usb/serial/ftdi_sio.c -+++ b/drivers/usb/serial/ftdi_sio.c -@@ -614,6 +614,7 @@ static struct usb_device_id id_table_combined [] = { - { USB_DEVICE(FTDI_VID, FTDI_OCEANIC_PID) }, - { USB_DEVICE(TTI_VID, TTI_QL355P_PID) }, - { USB_DEVICE(FTDI_VID, FTDI_RM_CANVIEW_PID) }, -+ { USB_DEVICE(CONTEC_VID, CONTEC_COM1USBH_PID) }, - { USB_DEVICE(BANDB_VID, BANDB_USOTL4_PID) }, - { USB_DEVICE(BANDB_VID, BANDB_USTL4_PID) }, - { USB_DEVICE(BANDB_VID, BANDB_USO9ML2_PID) }, -@@ -737,6 +738,10 @@ static struct usb_device_id id_table_combined [] = { - .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, - { USB_DEVICE(FTDI_VID, HAMEG_HO820_PID) }, - { USB_DEVICE(FTDI_VID, HAMEG_HO870_PID) }, -+ { USB_DEVICE(FTDI_VID, MJSG_GENERIC_PID) }, -+ { USB_DEVICE(FTDI_VID, MJSG_SR_RADIO_PID) }, -+ { USB_DEVICE(FTDI_VID, MJSG_HD_RADIO_PID) }, -+ { USB_DEVICE(FTDI_VID, MJSG_XM_RADIO_PID) }, - { }, /* Optional parameter entry */ - { } /* Terminating entry */ - }; -diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h -index c8951ae..d10b5a8 100644 ---- a/drivers/usb/serial/ftdi_sio_ids.h -+++ b/drivers/usb/serial/ftdi_sio_ids.h -@@ -494,6 +494,13 @@ - #define RATOC_PRODUCT_ID_USB60F 0xb020 - - /* -+ * Contec products (http://www.contec.com) -+ * Submitted by Daniel Sangorrin -+ */ -+#define CONTEC_VID 0x06CE /* Vendor ID */ -+#define CONTEC_COM1USBH_PID 0x8311 /* COM-1(USB)H */ -+ -+/* - * Definitions for B&B Electronics products. - */ - #define BANDB_VID 0x0856 /* B&B Electronics Vendor ID */ -@@ -1002,3 +1009,11 @@ - #define EVO_8U232AM_PID 0x02FF /* Evolution robotics RCM2 (FT232AM)*/ - #define EVO_HYBRID_PID 0x0302 /* Evolution robotics RCM4 PID (FT232BM)*/ - #define EVO_RCM4_PID 0x0303 /* Evolution robotics RCM4 PID */ -+ -+/* -+ * MJS Gadgets HD Radio / XM Radio / Sirius Radio interfaces (using VID 0x0403) -+ */ -+#define MJSG_GENERIC_PID 0x9378 -+#define MJSG_SR_RADIO_PID 0x9379 -+#define MJSG_XM_RADIO_PID 0x937A -+#define MJSG_HD_RADIO_PID 0x937C -diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c -index 3eb6143..0cfd621 100644 ---- a/drivers/usb/serial/sierra.c -+++ b/drivers/usb/serial/sierra.c -@@ -604,14 +604,17 @@ static void sierra_indat_callback(struct urb *urb) - } else { - if (urb->actual_length) { - tty = tty_port_tty_get(&port->port); -- -- tty_buffer_request_room(tty, urb->actual_length); -- tty_insert_flip_string(tty, data, urb->actual_length); -- tty_flip_buffer_push(tty); -- -- tty_kref_put(tty); -- usb_serial_debug_data(debug, &port->dev, __func__, -- urb->actual_length, data); -+ if (tty) { -+ tty_buffer_request_room(tty, -+ urb->actual_length); -+ tty_insert_flip_string(tty, data, -+ urb->actual_length); -+ tty_flip_buffer_push(tty); -+ -+ tty_kref_put(tty); -+ usb_serial_debug_data(debug, &port->dev, -+ __func__, urb->actual_length, data); -+ } - } else { - dev_dbg(&port->dev, "%s: empty read urb" - " received\n", __func__); -diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h -index 49575fb..98b549b 100644 ---- a/drivers/usb/storage/unusual_devs.h -+++ b/drivers/usb/storage/unusual_devs.h -@@ -1147,8 +1147,8 @@ UNUSUAL_DEV( 0x0af0, 0x7401, 0x0000, 0x0000, - 0 ), - - /* Reported by Jan Dumon -- * This device (wrongly) has a vendor-specific device descriptor. -- * The entry is needed so usb-storage can bind to it's mass-storage -+ * These devices (wrongly) have a vendor-specific device descriptor. -+ * These entries are needed so usb-storage can bind to their mass-storage - * interface as an interface driver */ - UNUSUAL_DEV( 0x0af0, 0x7501, 0x0000, 0x0000, - "Option", -@@ -1156,6 +1156,90 @@ UNUSUAL_DEV( 0x0af0, 0x7501, 0x0000, 0x0000, - US_SC_DEVICE, US_PR_DEVICE, NULL, - 0 ), - -+UNUSUAL_DEV( 0x0af0, 0x7701, 0x0000, 0x0000, -+ "Option", -+ "GI 0451 SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0x7706, 0x0000, 0x0000, -+ "Option", -+ "GI 0451 SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0x7901, 0x0000, 0x0000, -+ "Option", -+ "GI 0452 SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0x7A01, 0x0000, 0x0000, -+ "Option", -+ "GI 0461 SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0x7A05, 0x0000, 0x0000, -+ "Option", -+ "GI 0461 SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0x8300, 0x0000, 0x0000, -+ "Option", -+ "GI 033x SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0x8302, 0x0000, 0x0000, -+ "Option", -+ "GI 033x SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0x8304, 0x0000, 0x0000, -+ "Option", -+ "GI 033x SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0xc100, 0x0000, 0x0000, -+ "Option", -+ "GI 070x SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0xd057, 0x0000, 0x0000, -+ "Option", -+ "GI 1505 SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0xd058, 0x0000, 0x0000, -+ "Option", -+ "GI 1509 SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0xd157, 0x0000, 0x0000, -+ "Option", -+ "GI 1515 SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0xd257, 0x0000, 0x0000, -+ "Option", -+ "GI 1215 SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ -+UNUSUAL_DEV( 0x0af0, 0xd357, 0x0000, 0x0000, -+ "Option", -+ "GI 1505 SD-Card", -+ US_SC_DEVICE, US_PR_DEVICE, NULL, -+ 0 ), -+ - /* Reported by Ben Efros */ - UNUSUAL_DEV( 0x0bc2, 0x3010, 0x0000, 0x0000, - "Seagate", -diff --git a/drivers/video/sunxvr500.c b/drivers/video/sunxvr500.c -index 18b9507..4cd5049 100644 ---- a/drivers/video/sunxvr500.c -+++ b/drivers/video/sunxvr500.c -@@ -400,6 +400,7 @@ static void __devexit e3d_pci_unregister(struct pci_dev *pdev) - - static struct pci_device_id e3d_pci_table[] = { - { PCI_DEVICE(PCI_VENDOR_ID_3DLABS, 0x7a0), }, -+ { PCI_DEVICE(0x1091, 0x7a0), }, - { PCI_DEVICE(PCI_VENDOR_ID_3DLABS, 0x7a2), }, - { .vendor = PCI_VENDOR_ID_3DLABS, - .device = PCI_ANY_ID, -diff --git a/fs/file_table.c b/fs/file_table.c -index b98404b..32d12b7 100644 ---- a/fs/file_table.c -+++ b/fs/file_table.c -@@ -393,7 +393,9 @@ retry: - continue; - if (!(f->f_mode & FMODE_WRITE)) - continue; -+ spin_lock(&f->f_lock); - f->f_mode &= ~FMODE_WRITE; -+ spin_unlock(&f->f_lock); - if (file_check_writeable(f) != 0) - continue; - file_release_write(f); -diff --git a/fs/nfs/dns_resolve.c b/fs/nfs/dns_resolve.c -index 95e1ca7..3f0cd4d 100644 ---- a/fs/nfs/dns_resolve.c -+++ b/fs/nfs/dns_resolve.c -@@ -36,6 +36,19 @@ struct nfs_dns_ent { - }; - - -+static void nfs_dns_ent_update(struct cache_head *cnew, -+ struct cache_head *ckey) -+{ -+ struct nfs_dns_ent *new; -+ struct nfs_dns_ent *key; -+ -+ new = container_of(cnew, struct nfs_dns_ent, h); -+ key = container_of(ckey, struct nfs_dns_ent, h); -+ -+ memcpy(&new->addr, &key->addr, key->addrlen); -+ new->addrlen = key->addrlen; -+} -+ - static void nfs_dns_ent_init(struct cache_head *cnew, - struct cache_head *ckey) - { -@@ -49,8 +62,7 @@ static void nfs_dns_ent_init(struct cache_head *cnew, - new->hostname = kstrndup(key->hostname, key->namelen, GFP_KERNEL); - if (new->hostname) { - new->namelen = key->namelen; -- memcpy(&new->addr, &key->addr, key->addrlen); -- new->addrlen = key->addrlen; -+ nfs_dns_ent_update(cnew, ckey); - } else { - new->namelen = 0; - new->addrlen = 0; -@@ -234,7 +246,7 @@ static struct cache_detail nfs_dns_resolve = { - .cache_show = nfs_dns_show, - .match = nfs_dns_match, - .init = nfs_dns_ent_init, -- .update = nfs_dns_ent_init, -+ .update = nfs_dns_ent_update, - .alloc = nfs_dns_ent_alloc, - }; - -diff --git a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c -index f19ed86..fcafe60 100644 ---- a/fs/nfsd/nfs4state.c -+++ b/fs/nfsd/nfs4state.c -@@ -1998,7 +1998,9 @@ nfs4_file_downgrade(struct file *filp, unsigned int share_access) - { - if (share_access & NFS4_SHARE_ACCESS_WRITE) { - drop_file_write_access(filp); -+ spin_lock(&filp->f_lock); - filp->f_mode = (filp->f_mode | FMODE_READ) & ~FMODE_WRITE; -+ spin_unlock(&filp->f_lock); - } - } - -diff --git a/fs/ocfs2/aops.c b/fs/ocfs2/aops.c -index 7e9df11..4c2a6d2 100644 ---- a/fs/ocfs2/aops.c -+++ b/fs/ocfs2/aops.c -@@ -577,8 +577,9 @@ static int ocfs2_direct_IO_get_blocks(struct inode *inode, sector_t iblock, - goto bail; - } - -- /* We should already CoW the refcounted extent. */ -- BUG_ON(ext_flags & OCFS2_EXT_REFCOUNTED); -+ /* We should already CoW the refcounted extent in case of create. */ -+ BUG_ON(create && (ext_flags & OCFS2_EXT_REFCOUNTED)); -+ - /* - * get_more_blocks() expects us to describe a hole by clearing - * the mapped bit on bh_result(). -diff --git a/fs/sysfs/dir.c b/fs/sysfs/dir.c -index 699f371..5c4703d 100644 ---- a/fs/sysfs/dir.c -+++ b/fs/sysfs/dir.c -@@ -837,11 +837,46 @@ static inline unsigned char dt_type(struct sysfs_dirent *sd) - return (sd->s_mode >> 12) & 15; - } - -+static int sysfs_dir_release(struct inode *inode, struct file *filp) -+{ -+ sysfs_put(filp->private_data); -+ return 0; -+} -+ -+static struct sysfs_dirent *sysfs_dir_pos(struct sysfs_dirent *parent_sd, -+ ino_t ino, struct sysfs_dirent *pos) -+{ -+ if (pos) { -+ int valid = !(pos->s_flags & SYSFS_FLAG_REMOVED) && -+ pos->s_parent == parent_sd && -+ ino == pos->s_ino; -+ sysfs_put(pos); -+ if (valid) -+ return pos; -+ } -+ pos = NULL; -+ if ((ino > 1) && (ino < INT_MAX)) { -+ pos = parent_sd->s_dir.children; -+ while (pos && (ino > pos->s_ino)) -+ pos = pos->s_sibling; -+ } -+ return pos; -+} -+ -+static struct sysfs_dirent *sysfs_dir_next_pos(struct sysfs_dirent *parent_sd, -+ ino_t ino, struct sysfs_dirent *pos) -+{ -+ pos = sysfs_dir_pos(parent_sd, ino, pos); -+ if (pos) -+ pos = pos->s_sibling; -+ return pos; -+} -+ - static int sysfs_readdir(struct file * filp, void * dirent, filldir_t filldir) - { - struct dentry *dentry = filp->f_path.dentry; - struct sysfs_dirent * parent_sd = dentry->d_fsdata; -- struct sysfs_dirent *pos; -+ struct sysfs_dirent *pos = filp->private_data; - ino_t ino; - - if (filp->f_pos == 0) { -@@ -857,29 +892,31 @@ static int sysfs_readdir(struct file * filp, void * dirent, filldir_t filldir) - if (filldir(dirent, "..", 2, filp->f_pos, ino, DT_DIR) == 0) - filp->f_pos++; - } -- if ((filp->f_pos > 1) && (filp->f_pos < INT_MAX)) { -- mutex_lock(&sysfs_mutex); -- -- /* Skip the dentries we have already reported */ -- pos = parent_sd->s_dir.children; -- while (pos && (filp->f_pos > pos->s_ino)) -- pos = pos->s_sibling; -- -- for ( ; pos; pos = pos->s_sibling) { -- const char * name; -- int len; -- -- name = pos->s_name; -- len = strlen(name); -- filp->f_pos = ino = pos->s_ino; -+ mutex_lock(&sysfs_mutex); -+ for (pos = sysfs_dir_pos(parent_sd, filp->f_pos, pos); -+ pos; -+ pos = sysfs_dir_next_pos(parent_sd, filp->f_pos, pos)) { -+ const char * name; -+ unsigned int type; -+ int len, ret; -+ -+ name = pos->s_name; -+ len = strlen(name); -+ ino = pos->s_ino; -+ type = dt_type(pos); -+ filp->f_pos = ino; -+ filp->private_data = sysfs_get(pos); - -- if (filldir(dirent, name, len, filp->f_pos, ino, -- dt_type(pos)) < 0) -- break; -- } -- if (!pos) -- filp->f_pos = INT_MAX; - mutex_unlock(&sysfs_mutex); -+ ret = filldir(dirent, name, len, filp->f_pos, ino, type); -+ mutex_lock(&sysfs_mutex); -+ if (ret < 0) -+ break; -+ } -+ mutex_unlock(&sysfs_mutex); -+ if ((filp->f_pos > 1) && !pos) { /* EOF */ -+ filp->f_pos = INT_MAX; -+ filp->private_data = NULL; - } - return 0; - } -@@ -888,5 +925,6 @@ static int sysfs_readdir(struct file * filp, void * dirent, filldir_t filldir) - const struct file_operations sysfs_dir_operations = { - .read = generic_read_dir, - .readdir = sysfs_readdir, -+ .release = sysfs_dir_release, - .llseek = generic_file_llseek, - }; -diff --git a/include/linux/fs.h b/include/linux/fs.h -index ebb1cd5..f2f68ce 100644 ---- a/include/linux/fs.h -+++ b/include/linux/fs.h -@@ -87,6 +87,9 @@ struct inodes_stat_t { - */ - #define FMODE_NOCMTIME ((__force fmode_t)2048) - -+/* Expect random access pattern */ -+#define FMODE_RANDOM ((__force fmode_t)4096) -+ - /* - * The below are the various read and write types that we support. Some of - * them include behavioral modifiers that send information down to the -diff --git a/include/linux/irq.h b/include/linux/irq.h -index 451481c..4d9b26e 100644 ---- a/include/linux/irq.h -+++ b/include/linux/irq.h -@@ -400,7 +400,9 @@ static inline int irq_has_action(unsigned int irq) - - /* Dynamic irq helper functions */ - extern void dynamic_irq_init(unsigned int irq); -+void dynamic_irq_init_keep_chip_data(unsigned int irq); - extern void dynamic_irq_cleanup(unsigned int irq); -+void dynamic_irq_cleanup_keep_chip_data(unsigned int irq); - - /* Set/get chip/data for an IRQ: */ - extern int set_irq_chip(unsigned int irq, struct irq_chip *chip); -diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h -index a3fccc8..99914e6 100644 ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -136,7 +136,7 @@ static inline bool dev_xmit_complete(int rc) - * used. - */ - --#if defined(CONFIG_WLAN_80211) || defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE) -+#if defined(CONFIG_WLAN) || defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE) - # if defined(CONFIG_MAC80211_MESH) - # define LL_MAX_HEADER 128 - # else -diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h -index a177698..c8ea0c7 100644 ---- a/include/linux/perf_event.h -+++ b/include/linux/perf_event.h -@@ -496,9 +496,8 @@ struct hw_perf_event { - atomic64_t period_left; - u64 interrupts; - -- u64 freq_count; -- u64 freq_interrupts; -- u64 freq_stamp; -+ u64 freq_time_stamp; -+ u64 freq_count_stamp; - #endif - }; - -diff --git a/include/linux/sched.h b/include/linux/sched.h -index 78efe7c..1f5fa53 100644 ---- a/include/linux/sched.h -+++ b/include/linux/sched.h -@@ -878,7 +878,10 @@ static inline int sd_balance_for_mc_power(void) - if (sched_smt_power_savings) - return SD_POWERSAVINGS_BALANCE; - -- return SD_PREFER_SIBLING; -+ if (!sched_mc_power_savings) -+ return SD_PREFER_SIBLING; -+ -+ return 0; - } - - static inline int sd_balance_for_package_power(void) -diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h -index ae836fd..ec226a2 100644 ---- a/include/linux/skbuff.h -+++ b/include/linux/skbuff.h -@@ -315,22 +315,23 @@ struct sk_buff { - struct sk_buff *next; - struct sk_buff *prev; - -- struct sock *sk; - ktime_t tstamp; -+ -+ struct sock *sk; - struct net_device *dev; - -- unsigned long _skb_dst; --#ifdef CONFIG_XFRM -- struct sec_path *sp; --#endif - /* - * This is the control buffer. It is free to use for every - * layer. Please put your private variables there. If you - * want to keep them across layers you have to do a skb_clone() - * first. This is owned by whoever has the skb queued ATM. - */ -- char cb[48]; -+ char cb[48] __aligned(8); - -+ unsigned long _skb_dst; -+#ifdef CONFIG_XFRM -+ struct sec_path *sp; -+#endif - unsigned int len, - data_len; - __u16 mac_len, -diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h -index 207466a..2540770 100644 ---- a/include/linux/syscalls.h -+++ b/include/linux/syscalls.h -@@ -132,7 +132,8 @@ struct perf_event_attr; - - #define SYSCALL_TRACE_ENTER_EVENT(sname) \ - static const struct syscall_metadata __syscall_meta_##sname; \ -- static struct ftrace_event_call event_enter_##sname; \ -+ static struct ftrace_event_call \ -+ __attribute__((__aligned__(4))) event_enter_##sname; \ - static struct trace_event enter_syscall_print_##sname = { \ - .trace = print_syscall_enter, \ - }; \ -@@ -154,7 +155,8 @@ struct perf_event_attr; - - #define SYSCALL_TRACE_EXIT_EVENT(sname) \ - static const struct syscall_metadata __syscall_meta_##sname; \ -- static struct ftrace_event_call event_exit_##sname; \ -+ static struct ftrace_event_call \ -+ __attribute__((__aligned__(4))) event_exit_##sname; \ - static struct trace_event exit_syscall_print_##sname = { \ - .trace = print_syscall_exit, \ - }; \ -diff --git a/include/trace/ftrace.h b/include/trace/ftrace.h -index c6fe03e..1ca4990 100644 ---- a/include/trace/ftrace.h -+++ b/include/trace/ftrace.h -@@ -65,7 +65,8 @@ - }; - #undef DEFINE_EVENT - #define DEFINE_EVENT(template, name, proto, args) \ -- static struct ftrace_event_call event_##name -+ static struct ftrace_event_call \ -+ __attribute__((__aligned__(4))) event_##name - - #undef DEFINE_EVENT_PRINT - #define DEFINE_EVENT_PRINT(template, name, proto, args, print) \ -diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c -index ecc3fa2..d70394f 100644 ---- a/kernel/irq/chip.c -+++ b/kernel/irq/chip.c -@@ -18,11 +18,7 @@ - - #include "internals.h" - --/** -- * dynamic_irq_init - initialize a dynamically allocated irq -- * @irq: irq number to initialize -- */ --void dynamic_irq_init(unsigned int irq) -+static void dynamic_irq_init_x(unsigned int irq, bool keep_chip_data) - { - struct irq_desc *desc; - unsigned long flags; -@@ -41,7 +37,8 @@ void dynamic_irq_init(unsigned int irq) - desc->depth = 1; - desc->msi_desc = NULL; - desc->handler_data = NULL; -- desc->chip_data = NULL; -+ if (!keep_chip_data) -+ desc->chip_data = NULL; - desc->action = NULL; - desc->irq_count = 0; - desc->irqs_unhandled = 0; -@@ -55,10 +52,26 @@ void dynamic_irq_init(unsigned int irq) - } - - /** -- * dynamic_irq_cleanup - cleanup a dynamically allocated irq -+ * dynamic_irq_init - initialize a dynamically allocated irq - * @irq: irq number to initialize - */ --void dynamic_irq_cleanup(unsigned int irq) -+void dynamic_irq_init(unsigned int irq) -+{ -+ dynamic_irq_init_x(irq, false); -+} -+ -+/** -+ * dynamic_irq_init_keep_chip_data - initialize a dynamically allocated irq -+ * @irq: irq number to initialize -+ * -+ * does not set irq_to_desc(irq)->chip_data to NULL -+ */ -+void dynamic_irq_init_keep_chip_data(unsigned int irq) -+{ -+ dynamic_irq_init_x(irq, true); -+} -+ -+static void dynamic_irq_cleanup_x(unsigned int irq, bool keep_chip_data) - { - struct irq_desc *desc = irq_to_desc(irq); - unsigned long flags; -@@ -77,7 +90,8 @@ void dynamic_irq_cleanup(unsigned int irq) - } - desc->msi_desc = NULL; - desc->handler_data = NULL; -- desc->chip_data = NULL; -+ if (!keep_chip_data) -+ desc->chip_data = NULL; - desc->handle_irq = handle_bad_irq; - desc->chip = &no_irq_chip; - desc->name = NULL; -@@ -85,6 +99,26 @@ void dynamic_irq_cleanup(unsigned int irq) - raw_spin_unlock_irqrestore(&desc->lock, flags); - } - -+/** -+ * dynamic_irq_cleanup - cleanup a dynamically allocated irq -+ * @irq: irq number to initialize -+ */ -+void dynamic_irq_cleanup(unsigned int irq) -+{ -+ dynamic_irq_cleanup_x(irq, false); -+} -+ -+/** -+ * dynamic_irq_cleanup_keep_chip_data - cleanup a dynamically allocated irq -+ * @irq: irq number to initialize -+ * -+ * does not set irq_to_desc(irq)->chip_data to NULL -+ */ -+void dynamic_irq_cleanup_keep_chip_data(unsigned int irq) -+{ -+ dynamic_irq_cleanup_x(irq, true); -+} -+ - - /** - * set_irq_chip - set the irq chip for an irq -diff --git a/kernel/perf_event.c b/kernel/perf_event.c -index 2ae7409..b707465 100644 ---- a/kernel/perf_event.c -+++ b/kernel/perf_event.c -@@ -248,7 +248,7 @@ static void perf_unpin_context(struct perf_event_context *ctx) - - static inline u64 perf_clock(void) - { -- return cpu_clock(smp_processor_id()); -+ return cpu_clock(raw_smp_processor_id()); - } - - /* -@@ -1350,14 +1350,83 @@ static void perf_event_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) - - static void perf_log_throttle(struct perf_event *event, int enable); - --static void perf_adjust_period(struct perf_event *event, u64 events) -+static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count) -+{ -+ u64 frequency = event->attr.sample_freq; -+ u64 sec = NSEC_PER_SEC; -+ u64 divisor, dividend; -+ -+ int count_fls, nsec_fls, frequency_fls, sec_fls; -+ -+ count_fls = fls64(count); -+ nsec_fls = fls64(nsec); -+ frequency_fls = fls64(frequency); -+ sec_fls = 30; -+ -+ /* -+ * We got @count in @nsec, with a target of sample_freq HZ -+ * the target period becomes: -+ * -+ * @count * 10^9 -+ * period = ------------------- -+ * @nsec * sample_freq -+ * -+ */ -+ -+ /* -+ * Reduce accuracy by one bit such that @a and @b converge -+ * to a similar magnitude. -+ */ -+#define REDUCE_FLS(a, b) \ -+do { \ -+ if (a##_fls > b##_fls) { \ -+ a >>= 1; \ -+ a##_fls--; \ -+ } else { \ -+ b >>= 1; \ -+ b##_fls--; \ -+ } \ -+} while (0) -+ -+ /* -+ * Reduce accuracy until either term fits in a u64, then proceed with -+ * the other, so that finally we can do a u64/u64 division. -+ */ -+ while (count_fls + sec_fls > 64 && nsec_fls + frequency_fls > 64) { -+ REDUCE_FLS(nsec, frequency); -+ REDUCE_FLS(sec, count); -+ } -+ -+ if (count_fls + sec_fls > 64) { -+ divisor = nsec * frequency; -+ -+ while (count_fls + sec_fls > 64) { -+ REDUCE_FLS(count, sec); -+ divisor >>= 1; -+ } -+ -+ dividend = count * sec; -+ } else { -+ dividend = count * sec; -+ -+ while (nsec_fls + frequency_fls > 64) { -+ REDUCE_FLS(nsec, frequency); -+ dividend >>= 1; -+ } -+ -+ divisor = nsec * frequency; -+ } -+ -+ return div64_u64(dividend, divisor); -+} -+ -+static void perf_adjust_period(struct perf_event *event, u64 nsec, u64 count) - { - struct hw_perf_event *hwc = &event->hw; - u64 period, sample_period; - s64 delta; - -- events *= hwc->sample_period; -- period = div64_u64(events, event->attr.sample_freq); -+ period = perf_calculate_period(event, nsec, count); - - delta = (s64)(period - hwc->sample_period); - delta = (delta + 7) / 8; /* low pass filter */ -@@ -1368,13 +1437,22 @@ static void perf_adjust_period(struct perf_event *event, u64 events) - sample_period = 1; - - hwc->sample_period = sample_period; -+ -+ if (atomic64_read(&hwc->period_left) > 8*sample_period) { -+ perf_disable(); -+ event->pmu->disable(event); -+ atomic64_set(&hwc->period_left, 0); -+ event->pmu->enable(event); -+ perf_enable(); -+ } - } - - static void perf_ctx_adjust_freq(struct perf_event_context *ctx) - { - struct perf_event *event; - struct hw_perf_event *hwc; -- u64 interrupts, freq; -+ u64 interrupts, now; -+ s64 delta; - - raw_spin_lock(&ctx->lock); - list_for_each_entry_rcu(event, &ctx->event_list, event_entry) { -@@ -1395,44 +1473,18 @@ static void perf_ctx_adjust_freq(struct perf_event_context *ctx) - if (interrupts == MAX_INTERRUPTS) { - perf_log_throttle(event, 1); - event->pmu->unthrottle(event); -- interrupts = 2*sysctl_perf_event_sample_rate/HZ; - } - - if (!event->attr.freq || !event->attr.sample_freq) - continue; - -- /* -- * if the specified freq < HZ then we need to skip ticks -- */ -- if (event->attr.sample_freq < HZ) { -- freq = event->attr.sample_freq; -- -- hwc->freq_count += freq; -- hwc->freq_interrupts += interrupts; -- -- if (hwc->freq_count < HZ) -- continue; -- -- interrupts = hwc->freq_interrupts; -- hwc->freq_interrupts = 0; -- hwc->freq_count -= HZ; -- } else -- freq = HZ; -- -- perf_adjust_period(event, freq * interrupts); -+ event->pmu->read(event); -+ now = atomic64_read(&event->count); -+ delta = now - hwc->freq_count_stamp; -+ hwc->freq_count_stamp = now; - -- /* -- * In order to avoid being stalled by an (accidental) huge -- * sample period, force reset the sample period if we didn't -- * get any events in this freq period. -- */ -- if (!interrupts) { -- perf_disable(); -- event->pmu->disable(event); -- atomic64_set(&hwc->period_left, 0); -- event->pmu->enable(event); -- perf_enable(); -- } -+ if (delta > 0) -+ perf_adjust_period(event, TICK_NSEC, delta); - } - raw_spin_unlock(&ctx->lock); - } -@@ -3688,12 +3740,12 @@ static int __perf_event_overflow(struct perf_event *event, int nmi, - - if (event->attr.freq) { - u64 now = perf_clock(); -- s64 delta = now - hwc->freq_stamp; -+ s64 delta = now - hwc->freq_time_stamp; - -- hwc->freq_stamp = now; -+ hwc->freq_time_stamp = now; - -- if (delta > 0 && delta < TICK_NSEC) -- perf_adjust_period(event, NSEC_PER_SEC / (int)delta); -+ if (delta > 0 && delta < 2*TICK_NSEC) -+ perf_adjust_period(event, delta, hwc->last_period); - } - - /* -diff --git a/kernel/power/snapshot.c b/kernel/power/snapshot.c -index 36cb168..fc9ed15 100644 ---- a/kernel/power/snapshot.c -+++ b/kernel/power/snapshot.c -@@ -1181,7 +1181,7 @@ static void free_unnecessary_pages(void) - - memory_bm_position_reset(©_bm); - -- while (to_free_normal > 0 && to_free_highmem > 0) { -+ while (to_free_normal > 0 || to_free_highmem > 0) { - unsigned long pfn = memory_bm_next_pfn(©_bm); - struct page *page = pfn_to_page(pfn); - -diff --git a/kernel/sched.c b/kernel/sched.c -index 3a8fb30..00a59b0 100644 ---- a/kernel/sched.c -+++ b/kernel/sched.c -@@ -4119,12 +4119,23 @@ find_busiest_queue(struct sched_group *group, enum cpu_idle_type idle, - continue; - - rq = cpu_rq(i); -- wl = weighted_cpuload(i) * SCHED_LOAD_SCALE; -- wl /= power; -+ wl = weighted_cpuload(i); - -+ /* -+ * When comparing with imbalance, use weighted_cpuload() -+ * which is not scaled with the cpu power. -+ */ - if (capacity && rq->nr_running == 1 && wl > imbalance) - continue; - -+ /* -+ * For the load comparisons with the other cpu's, consider -+ * the weighted_cpuload() scaled with the cpu power, so that -+ * the load can be moved away from the cpu that is potentially -+ * running at a lower capacity. -+ */ -+ wl = (wl * SCHED_LOAD_SCALE) / power; -+ - if (wl > max_load) { - max_load = wl; - busiest = rq; -@@ -6054,7 +6065,7 @@ void rt_mutex_setprio(struct task_struct *p, int prio) - unsigned long flags; - int oldprio, on_rq, running; - struct rq *rq; -- const struct sched_class *prev_class = p->sched_class; -+ const struct sched_class *prev_class; - - BUG_ON(prio < 0 || prio > MAX_PRIO); - -@@ -6062,6 +6073,7 @@ void rt_mutex_setprio(struct task_struct *p, int prio) - update_rq_clock(rq); - - oldprio = p->prio; -+ prev_class = p->sched_class; - on_rq = p->se.on_rq; - running = task_current(rq, p); - if (on_rq) -@@ -6281,7 +6293,7 @@ static int __sched_setscheduler(struct task_struct *p, int policy, - { - int retval, oldprio, oldpolicy = -1, on_rq, running; - unsigned long flags; -- const struct sched_class *prev_class = p->sched_class; -+ const struct sched_class *prev_class; - struct rq *rq; - int reset_on_fork; - -@@ -6395,6 +6407,7 @@ recheck: - p->sched_reset_on_fork = reset_on_fork; - - oldprio = p->prio; -+ prev_class = p->sched_class; - __setscheduler(rq, p, policy, param->sched_priority); - - if (running) -diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h -index 4df6a77..a1edaa8 100644 ---- a/kernel/trace/trace.h -+++ b/kernel/trace/trace.h -@@ -791,7 +791,8 @@ extern const char *__stop___trace_bprintk_fmt[]; - - #undef FTRACE_ENTRY - #define FTRACE_ENTRY(call, struct_name, id, tstruct, print) \ -- extern struct ftrace_event_call event_##call; -+ extern struct ftrace_event_call \ -+ __attribute__((__aligned__(4))) event_##call; - #undef FTRACE_ENTRY_DUP - #define FTRACE_ENTRY_DUP(call, struct_name, id, tstruct, print) \ - FTRACE_ENTRY(call, struct_name, id, PARAMS(tstruct), PARAMS(print)) -diff --git a/mm/fadvise.c b/mm/fadvise.c -index e433592..8d723c9 100644 ---- a/mm/fadvise.c -+++ b/mm/fadvise.c -@@ -77,12 +77,20 @@ SYSCALL_DEFINE(fadvise64_64)(int fd, loff_t offset, loff_t len, int advice) - switch (advice) { - case POSIX_FADV_NORMAL: - file->f_ra.ra_pages = bdi->ra_pages; -+ spin_lock(&file->f_lock); -+ file->f_mode &= ~FMODE_RANDOM; -+ spin_unlock(&file->f_lock); - break; - case POSIX_FADV_RANDOM: -- file->f_ra.ra_pages = 0; -+ spin_lock(&file->f_lock); -+ file->f_mode |= FMODE_RANDOM; -+ spin_unlock(&file->f_lock); - break; - case POSIX_FADV_SEQUENTIAL: - file->f_ra.ra_pages = bdi->ra_pages * 2; -+ spin_lock(&file->f_lock); -+ file->f_mode &= ~FMODE_RANDOM; -+ spin_unlock(&file->f_lock); - break; - case POSIX_FADV_WILLNEED: - if (!mapping->a_ops->readpage) { -diff --git a/mm/readahead.c b/mm/readahead.c -index 033bc13..337b20e 100644 ---- a/mm/readahead.c -+++ b/mm/readahead.c -@@ -501,6 +501,12 @@ void page_cache_sync_readahead(struct address_space *mapping, - if (!ra->ra_pages) - return; - -+ /* be dumb */ -+ if (filp->f_mode & FMODE_RANDOM) { -+ force_page_cache_readahead(mapping, filp, offset, req_size); -+ return; -+ } -+ - /* do read-ahead */ - ondemand_readahead(mapping, ra, filp, false, offset, req_size); - } -diff --git a/mm/slab.c b/mm/slab.c -index 7451bda..ff44eb2 100644 ---- a/mm/slab.c -+++ b/mm/slab.c -@@ -983,13 +983,11 @@ static struct array_cache **alloc_alien_cache(int node, int limit, gfp_t gfp) - - if (limit > 1) - limit = 12; -- ac_ptr = kmalloc_node(memsize, gfp, node); -+ ac_ptr = kzalloc_node(memsize, gfp, node); - if (ac_ptr) { - for_each_node(i) { -- if (i == node || !node_online(i)) { -- ac_ptr[i] = NULL; -+ if (i == node || !node_online(i)) - continue; -- } - ac_ptr[i] = alloc_arraycache(node, limit, 0xbaadf00d, gfp); - if (!ac_ptr[i]) { - for (i--; i >= 0; i--) -diff --git a/net/core/scm.c b/net/core/scm.c -index b7ba91b..9b26463 100644 ---- a/net/core/scm.c -+++ b/net/core/scm.c -@@ -156,6 +156,8 @@ int __scm_send(struct socket *sock, struct msghdr *msg, struct scm_cookie *p) - switch (cmsg->cmsg_type) - { - case SCM_RIGHTS: -+ if (!sock->ops || sock->ops->family != PF_UNIX) -+ goto error; - err=scm_fp_copy(cmsg, &p->fp); - if (err<0) - goto error; -diff --git a/net/mac80211/agg-tx.c b/net/mac80211/agg-tx.c -index 5e3a7ec..304b0b6 100644 ---- a/net/mac80211/agg-tx.c -+++ b/net/mac80211/agg-tx.c -@@ -179,7 +179,8 @@ static void sta_addba_resp_timer_expired(unsigned long data) - - /* check if the TID waits for addBA response */ - spin_lock_bh(&sta->lock); -- if ((*state & (HT_ADDBA_REQUESTED_MSK | HT_ADDBA_RECEIVED_MSK)) != -+ if ((*state & (HT_ADDBA_REQUESTED_MSK | HT_ADDBA_RECEIVED_MSK | -+ HT_AGG_STATE_REQ_STOP_BA_MSK)) != - HT_ADDBA_REQUESTED_MSK) { - spin_unlock_bh(&sta->lock); - *state = HT_AGG_STATE_IDLE; -diff --git a/net/mac80211/rx.c b/net/mac80211/rx.c -index 82a30c1..da92cde 100644 ---- a/net/mac80211/rx.c -+++ b/net/mac80211/rx.c -@@ -1788,6 +1788,7 @@ static ieee80211_rx_result debug_noinline - ieee80211_rx_h_data(struct ieee80211_rx_data *rx) - { - struct ieee80211_sub_if_data *sdata = rx->sdata; -+ struct ieee80211_local *local = rx->local; - struct net_device *dev = sdata->dev; - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)rx->skb->data; - __le16 fc = hdr->frame_control; -@@ -1819,6 +1820,13 @@ ieee80211_rx_h_data(struct ieee80211_rx_data *rx) - dev->stats.rx_packets++; - dev->stats.rx_bytes += rx->skb->len; - -+ if (ieee80211_is_data(hdr->frame_control) && -+ !is_multicast_ether_addr(hdr->addr1) && -+ local->hw.conf.dynamic_ps_timeout > 0 && local->ps_sdata) { -+ mod_timer(&local->dynamic_ps_timer, jiffies + -+ msecs_to_jiffies(local->hw.conf.dynamic_ps_timeout)); -+ } -+ - ieee80211_deliver_skb(rx); - - return RX_QUEUED; -diff --git a/net/mac80211/tx.c b/net/mac80211/tx.c -index ac210b5..70c79c3 100644 ---- a/net/mac80211/tx.c -+++ b/net/mac80211/tx.c -@@ -1052,8 +1052,11 @@ ieee80211_tx_prepare(struct ieee80211_sub_if_data *sdata, - - hdr = (struct ieee80211_hdr *) skb->data; - -- if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN) -+ if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN) { - tx->sta = rcu_dereference(sdata->u.vlan.sta); -+ if (!tx->sta && sdata->dev->ieee80211_ptr->use_4addr) -+ return TX_DROP; -+ } - if (!tx->sta) - tx->sta = sta_info_get(local, hdr->addr1); - -diff --git a/net/netfilter/xt_recent.c b/net/netfilter/xt_recent.c -index fc70a49..43e83a4 100644 ---- a/net/netfilter/xt_recent.c -+++ b/net/netfilter/xt_recent.c -@@ -173,10 +173,10 @@ recent_entry_init(struct recent_table *t, const union nf_inet_addr *addr, - - static void recent_entry_update(struct recent_table *t, struct recent_entry *e) - { -+ e->index %= ip_pkt_list_tot; - e->stamps[e->index++] = jiffies; - if (e->index > e->nstamps) - e->nstamps = e->index; -- e->index %= ip_pkt_list_tot; - list_move_tail(&e->lru_list, &t->lru_list); - } - -@@ -260,7 +260,7 @@ recent_mt(const struct sk_buff *skb, const struct xt_match_param *par) - for (i = 0; i < e->nstamps; i++) { - if (info->seconds && time_after(time, e->stamps[i])) - continue; -- if (++hits >= info->hit_count) { -+ if (info->hit_count && ++hits >= info->hit_count) { - ret = !ret; - break; - } -diff --git a/net/sunrpc/svc_xprt.c b/net/sunrpc/svc_xprt.c -index 7d1f9e9..4f30336 100644 ---- a/net/sunrpc/svc_xprt.c -+++ b/net/sunrpc/svc_xprt.c -@@ -889,11 +889,8 @@ void svc_delete_xprt(struct svc_xprt *xprt) - if (test_bit(XPT_TEMP, &xprt->xpt_flags)) - serv->sv_tmpcnt--; - -- for (dr = svc_deferred_dequeue(xprt); dr; -- dr = svc_deferred_dequeue(xprt)) { -- svc_xprt_put(xprt); -+ while ((dr = svc_deferred_dequeue(xprt)) != NULL) - kfree(dr); -- } - - svc_xprt_put(xprt); - spin_unlock_bh(&serv->sv_lock); -diff --git a/net/sunrpc/xprtsock.c b/net/sunrpc/xprtsock.c -index 3d739e5..4df801d 100644 ---- a/net/sunrpc/xprtsock.c -+++ b/net/sunrpc/xprtsock.c -@@ -1912,6 +1912,11 @@ static void xs_tcp_setup_socket(struct rpc_xprt *xprt, - case -EALREADY: - xprt_clear_connecting(xprt); - return; -+ case -EINVAL: -+ /* Happens, for instance, if the user specified a link -+ * local IPv6 address without a scope-id. -+ */ -+ goto out; - } - out_eagain: - status = -EAGAIN; -diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl -index 2f3230d..049c419 100755 ---- a/scripts/get_maintainer.pl -+++ b/scripts/get_maintainer.pl -@@ -314,6 +314,7 @@ foreach my $file (@files) { - if ($type eq 'X') { - if (file_match_pattern($file, $value)) { - $exclude = 1; -+ last; - } - } - } -@@ -340,8 +341,7 @@ foreach my $file (@files) { - } - } - -- $tvi += ($end - $start); -- -+ $tvi = $end + 1; - } - - foreach my $line (sort {$hash{$b} <=> $hash{$a}} keys %hash) { -diff --git a/security/integrity/ima/ima_iint.c b/security/integrity/ima/ima_iint.c -index 0d83edc..2d4d05d 100644 ---- a/security/integrity/ima/ima_iint.c -+++ b/security/integrity/ima/ima_iint.c -@@ -63,12 +63,11 @@ int ima_inode_alloc(struct inode *inode) - spin_lock(&ima_iint_lock); - rc = radix_tree_insert(&ima_iint_store, (unsigned long)inode, iint); - spin_unlock(&ima_iint_lock); -+ radix_tree_preload_end(); - out: - if (rc < 0) - kmem_cache_free(iint_cache, iint); - -- radix_tree_preload_end(); -- - return rc; - } - -diff --git a/security/selinux/ss/ebitmap.c b/security/selinux/ss/ebitmap.c -index 68c7348..04b6145 100644 ---- a/security/selinux/ss/ebitmap.c -+++ b/security/selinux/ss/ebitmap.c -@@ -128,7 +128,7 @@ int ebitmap_netlbl_export(struct ebitmap *ebmap, - cmap_idx = delta / NETLBL_CATMAP_MAPSIZE; - cmap_sft = delta % NETLBL_CATMAP_MAPSIZE; - c_iter->bitmap[cmap_idx] -- |= e_iter->maps[cmap_idx] << cmap_sft; -+ |= e_iter->maps[i] << cmap_sft; - } - e_iter = e_iter->next; - } -diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c -index 25b0641..f7e1c9f 100644 ---- a/sound/core/pcm_native.c -+++ b/sound/core/pcm_native.c -@@ -315,10 +315,10 @@ int snd_pcm_hw_refine(struct snd_pcm_substream *substream, - if (!params->info) - params->info = hw->info & ~SNDRV_PCM_INFO_FIFO_IN_FRAMES; - if (!params->fifo_size) { -- if (snd_mask_min(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT]) == -- snd_mask_max(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT]) && -- snd_mask_min(¶ms->masks[SNDRV_PCM_HW_PARAM_CHANNELS]) == -- snd_mask_max(¶ms->masks[SNDRV_PCM_HW_PARAM_CHANNELS])) { -+ m = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); -+ i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); -+ if (snd_mask_min(m) == snd_mask_max(m) && -+ snd_interval_min(i) == snd_interval_max(i)) { - changed = substream->ops->ioctl(substream, - SNDRV_PCM_IOCTL1_FIFO_SIZE, params); - if (changed < 0) -diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c -index ff6da6f..6d6e307 100644 ---- a/sound/pci/hda/hda_intel.c -+++ b/sound/pci/hda/hda_intel.c -@@ -2261,9 +2261,12 @@ static int azx_dev_free(struct snd_device *device) - static struct snd_pci_quirk position_fix_list[] __devinitdata = { - SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB), - SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB), -+ SND_PCI_QUIRK(0x1028, 0x01f6, "Dell Latitude 131L", POS_FIX_LPIB), - SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB), -+ SND_PCI_QUIRK(0x1106, 0x3288, "ASUS M2V-MX SE", POS_FIX_LPIB), - SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB), - SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB), -+ SND_PCI_QUIRK(0x1565, 0x820f, "Biostar Microtech", POS_FIX_LPIB), - {} - }; - -diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c -index 69a941c..7069441 100644 ---- a/sound/pci/hda/patch_analog.c -+++ b/sound/pci/hda/patch_analog.c -@@ -1008,7 +1008,7 @@ static struct snd_pci_quirk ad1986a_cfg_tbl[] = { - SND_PCI_QUIRK(0x1043, 0x81cb, "ASUS M2N", AD1986A_3STACK), - SND_PCI_QUIRK(0x1043, 0x8234, "ASUS M2N", AD1986A_3STACK), - SND_PCI_QUIRK(0x10de, 0xcb84, "ASUS A8N-VM", AD1986A_3STACK), -- SND_PCI_QUIRK(0x1179, 0xff40, "Toshiba", AD1986A_LAPTOP_EAPD), -+ SND_PCI_QUIRK(0x1179, 0xff40, "Toshiba Satellite L40-10Q", AD1986A_3STACK), - SND_PCI_QUIRK(0x144d, 0xb03c, "Samsung R55", AD1986A_3STACK), - SND_PCI_QUIRK(0x144d, 0xc01e, "FSC V2060", AD1986A_LAPTOP), - SND_PCI_QUIRK(0x144d, 0xc024, "Samsung P50", AD1986A_SAMSUNG_P50), -diff --git a/sound/pci/via82xx.c b/sound/pci/via82xx.c -index 8a332d2..03d6aea 100644 ---- a/sound/pci/via82xx.c -+++ b/sound/pci/via82xx.c -@@ -1791,6 +1791,12 @@ static struct ac97_quirk ac97_quirks[] = { - .type = AC97_TUNE_HP_ONLY - }, - { -+ .subvendor = 0x110a, -+ .subdevice = 0x0079, -+ .name = "Fujitsu Siemens D1289", -+ .type = AC97_TUNE_HP_ONLY -+ }, -+ { - .subvendor = 0x1019, - .subdevice = 0x0a81, - .name = "ECS K7VTA3", -diff --git a/sound/soc/codecs/ak4104.c b/sound/soc/codecs/ak4104.c -index 3a14c6f..0f439ab 100644 ---- a/sound/soc/codecs/ak4104.c -+++ b/sound/soc/codecs/ak4104.c -@@ -90,12 +90,10 @@ static int ak4104_spi_write(struct snd_soc_codec *codec, unsigned int reg, - if (reg >= codec->reg_cache_size) - return -EINVAL; - -- reg &= AK4104_REG_MASK; -- reg |= AK4104_WRITE; -- - /* only write to the hardware if value has changed */ - if (cache[reg] != value) { -- u8 tmp[2] = { reg, value }; -+ u8 tmp[2] = { (reg & AK4104_REG_MASK) | AK4104_WRITE, value }; -+ - if (spi_write(spi, tmp, sizeof(tmp))) { - dev_err(&spi->dev, "SPI write failed\n"); - return -EIO; -diff --git a/sound/usb/usbaudio.c b/sound/usb/usbaudio.c -index 9edef46..3c81add 100644 ---- a/sound/usb/usbaudio.c -+++ b/sound/usb/usbaudio.c -@@ -3327,6 +3327,32 @@ static int snd_usb_cm6206_boot_quirk(struct usb_device *dev) - } - - /* -+ * This call will put the synth in "USB send" mode, i.e it will send MIDI -+ * messages through USB (this is disabled at startup). The synth will -+ * acknowledge by sending a sysex on endpoint 0x85 and by displaying a USB -+ * sign on its LCD. Values here are chosen based on sniffing USB traffic -+ * under Windows. -+ */ -+static int snd_usb_accessmusic_boot_quirk(struct usb_device *dev) -+{ -+ int err, actual_length; -+ -+ /* "midi send" enable */ -+ static const u8 seq[] = { 0x4e, 0x73, 0x52, 0x01 }; -+ -+ void *buf = kmemdup(seq, ARRAY_SIZE(seq), GFP_KERNEL); -+ if (!buf) -+ return -ENOMEM; -+ err = usb_interrupt_msg(dev, usb_sndintpipe(dev, 0x05), buf, -+ ARRAY_SIZE(seq), &actual_length, 1000); -+ kfree(buf); -+ if (err < 0) -+ return err; -+ -+ return 0; -+} -+ -+/* - * Setup quirks - */ - #define AUDIOPHILE_SET 0x01 /* if set, parse device_setup */ -@@ -3624,6 +3650,12 @@ static void *snd_usb_audio_probe(struct usb_device *dev, - goto __err_val; - } - -+ /* Access Music VirusTI Desktop */ -+ if (id == USB_ID(0x133e, 0x0815)) { -+ if (snd_usb_accessmusic_boot_quirk(dev) < 0) -+ goto __err_val; -+ } -+ - /* - * found a config. now register to ALSA - */ -diff --git a/sound/usb/usbmidi.c b/sound/usb/usbmidi.c -index 6e89b83..b2da478 100644 ---- a/sound/usb/usbmidi.c -+++ b/sound/usb/usbmidi.c -@@ -1162,10 +1162,22 @@ static int snd_usbmidi_out_endpoint_create(struct snd_usb_midi* umidi, - pipe = usb_sndintpipe(umidi->dev, ep_info->out_ep); - else - pipe = usb_sndbulkpipe(umidi->dev, ep_info->out_ep); -- if (umidi->usb_id == USB_ID(0x0a92, 0x1020)) /* ESI M4U */ -- ep->max_transfer = 4; -- else -+ switch (umidi->usb_id) { -+ default: - ep->max_transfer = usb_maxpacket(umidi->dev, pipe, 1); -+ break; -+ /* -+ * Various chips declare a packet size larger than 4 bytes, but -+ * do not actually work with larger packets: -+ */ -+ case USB_ID(0x0a92, 0x1020): /* ESI M4U */ -+ case USB_ID(0x1430, 0x474b): /* RedOctane GH MIDI INTERFACE */ -+ case USB_ID(0x15ca, 0x0101): /* Textech USB Midi Cable */ -+ case USB_ID(0x15ca, 0x1806): /* Textech USB Midi Cable */ -+ case USB_ID(0x1a86, 0x752d): /* QinHeng CH345 "USB2.0-MIDI" */ -+ ep->max_transfer = 4; -+ break; -+ } - for (i = 0; i < OUTPUT_URBS; ++i) { - buffer = usb_buffer_alloc(umidi->dev, - ep->max_transfer, GFP_KERNEL, -@@ -1407,6 +1419,12 @@ static struct port_info { - EXTERNAL_PORT(0x086a, 0x0001, 8, "%s Broadcast"), - EXTERNAL_PORT(0x086a, 0x0002, 8, "%s Broadcast"), - EXTERNAL_PORT(0x086a, 0x0003, 4, "%s Broadcast"), -+ /* Access Music Virus TI */ -+ EXTERNAL_PORT(0x133e, 0x0815, 0, "%s MIDI"), -+ PORT_INFO(0x133e, 0x0815, 1, "%s Synth", 0, -+ SNDRV_SEQ_PORT_TYPE_MIDI_GENERIC | -+ SNDRV_SEQ_PORT_TYPE_HARDWARE | -+ SNDRV_SEQ_PORT_TYPE_SYNTHESIZER), - }; - - static struct port_info *find_port_info(struct snd_usb_midi* umidi, int number) -diff --git a/sound/usb/usbquirks.h b/sound/usb/usbquirks.h -index a892bda..406b74b 100644 ---- a/sound/usb/usbquirks.h -+++ b/sound/usb/usbquirks.h -@@ -2073,6 +2073,33 @@ YAMAHA_DEVICE(0x7010, "UB99"), - } - }, - -+/* Access Music devices */ -+{ -+ /* VirusTI Desktop */ -+ USB_DEVICE_VENDOR_SPEC(0x133e, 0x0815), -+ .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { -+ .ifnum = QUIRK_ANY_INTERFACE, -+ .type = QUIRK_COMPOSITE, -+ .data = &(const struct snd_usb_audio_quirk[]) { -+ { -+ .ifnum = 3, -+ .type = QUIRK_MIDI_FIXED_ENDPOINT, -+ .data = &(const struct snd_usb_midi_endpoint_info) { -+ .out_cables = 0x0003, -+ .in_cables = 0x0003 -+ } -+ }, -+ { -+ .ifnum = 4, -+ .type = QUIRK_IGNORE_INTERFACE -+ }, -+ { -+ .ifnum = -1 -+ } -+ } -+ } -+}, -+ - /* */ - { - /* aka. Serato Scratch Live DJ Box */ -diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c -index ab92763..72547b9 100644 ---- a/tools/perf/util/symbol.c -+++ b/tools/perf/util/symbol.c -@@ -503,7 +503,7 @@ static int dso__split_kallsyms(struct dso *self, struct map *map, - return -1; - - curr_map = map__new2(pos->start, dso, map->type); -- if (map == NULL) { -+ if (curr_map == NULL) { - dso__delete(dso); - return -1; - } diff --git a/debian/patches/bugfix/all/stable/2.6.33.2.patch b/debian/patches/bugfix/all/stable/2.6.33.2.patch deleted file mode 100644 index abc2b1808..000000000 --- a/debian/patches/bugfix/all/stable/2.6.33.2.patch +++ /dev/null @@ -1,6335 +0,0 @@ -diff --git a/Documentation/filesystems/tmpfs.txt b/Documentation/filesystems/tmpfs.txt -index 3015da0..fe09a2c 100644 ---- a/Documentation/filesystems/tmpfs.txt -+++ b/Documentation/filesystems/tmpfs.txt -@@ -82,11 +82,13 @@ tmpfs has a mount option to set the NUMA memory allocation policy for - all files in that instance (if CONFIG_NUMA is enabled) - which can be - adjusted on the fly via 'mount -o remount ...' - --mpol=default prefers to allocate memory from the local node -+mpol=default use the process allocation policy -+ (see set_mempolicy(2)) - mpol=prefer:Node prefers to allocate memory from the given Node - mpol=bind:NodeList allocates memory only from nodes in NodeList - mpol=interleave prefers to allocate from each node in turn - mpol=interleave:NodeList allocates from each node of NodeList in turn -+mpol=local prefers to allocate memory from the local node - - NodeList format is a comma-separated list of decimal numbers and ranges, - a range being two hyphen-separated decimal numbers, the smallest and -@@ -134,3 +136,5 @@ Author: - Christoph Rohland , 1.12.01 - Updated: - Hugh Dickins, 4 June 2007 -+Updated: -+ KOSAKI Motohiro, 16 Mar 2010 -diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S -index 4fddc50..6b84a04 100644 ---- a/arch/arm/boot/compressed/head.S -+++ b/arch/arm/boot/compressed/head.S -@@ -170,8 +170,8 @@ not_angel: - - .text - adr r0, LC0 -- ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, ip, sp} ) -- THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, ip} ) -+ ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp}) -+ THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip} ) - THUMB( ldr sp, [r0, #28] ) - subs r0, r0, r1 @ calculate the delta offset - -@@ -182,12 +182,13 @@ not_angel: - /* - * We're running at a different address. We need to fix - * up various pointers: -- * r5 - zImage base address -- * r6 - GOT start -+ * r5 - zImage base address (_start) -+ * r6 - size of decompressed image -+ * r11 - GOT start - * ip - GOT end - */ - add r5, r5, r0 -- add r6, r6, r0 -+ add r11, r11, r0 - add ip, ip, r0 - - #ifndef CONFIG_ZBOOT_ROM -@@ -205,10 +206,10 @@ not_angel: - /* - * Relocate all entries in the GOT table. - */ --1: ldr r1, [r6, #0] @ relocate entries in the GOT -+1: ldr r1, [r11, #0] @ relocate entries in the GOT - add r1, r1, r0 @ table. This fixes up the -- str r1, [r6], #4 @ C references. -- cmp r6, ip -+ str r1, [r11], #4 @ C references. -+ cmp r11, ip - blo 1b - #else - -@@ -216,12 +217,12 @@ not_angel: - * Relocate entries in the GOT table. We only relocate - * the entries that are outside the (relocated) BSS region. - */ --1: ldr r1, [r6, #0] @ relocate entries in the GOT -+1: ldr r1, [r11, #0] @ relocate entries in the GOT - cmp r1, r2 @ entry < bss_start || - cmphs r3, r1 @ _end < entry - addlo r1, r1, r0 @ table. This fixes up the -- str r1, [r6], #4 @ C references. -- cmp r6, ip -+ str r1, [r11], #4 @ C references. -+ cmp r11, ip - blo 1b - #endif - -@@ -247,6 +248,7 @@ not_relocated: mov r0, #0 - * Check to see if we will overwrite ourselves. - * r4 = final kernel address - * r5 = start of this image -+ * r6 = size of decompressed image - * r2 = end of malloc space (and therefore this image) - * We basically want: - * r4 >= r2 -> OK -@@ -254,8 +256,7 @@ not_relocated: mov r0, #0 - */ - cmp r4, r2 - bhs wont_overwrite -- sub r3, sp, r5 @ > compressed kernel size -- add r0, r4, r3, lsl #2 @ allow for 4x expansion -+ add r0, r4, r6 - cmp r0, r5 - bls wont_overwrite - -@@ -271,7 +272,6 @@ not_relocated: mov r0, #0 - * r1-r3 = unused - * r4 = kernel execution address - * r5 = decompressed kernel start -- * r6 = processor ID - * r7 = architecture ID - * r8 = atags pointer - * r9-r12,r14 = corrupted -@@ -312,7 +312,8 @@ LC0: .word LC0 @ r1 - .word _end @ r3 - .word zreladdr @ r4 - .word _start @ r5 -- .word _got_start @ r6 -+ .word _image_size @ r6 -+ .word _got_start @ r11 - .word _got_end @ ip - .word user_stack+4096 @ sp - LC1: .word reloc_end - reloc_start -@@ -336,7 +337,6 @@ params: ldr r0, =params_phys - * - * On entry, - * r4 = kernel execution address -- * r6 = processor ID - * r7 = architecture number - * r8 = atags pointer - * r9 = run-time address of "start" (???) -@@ -542,7 +542,6 @@ __common_mmu_cache_on: - * r1-r3 = unused - * r4 = kernel execution address - * r5 = decompressed kernel start -- * r6 = processor ID - * r7 = architecture ID - * r8 = atags pointer - * r9-r12,r14 = corrupted -@@ -581,19 +580,19 @@ call_kernel: bl cache_clean_flush - * r1 = corrupted - * r2 = corrupted - * r3 = block offset -- * r6 = corrupted -+ * r9 = corrupted - * r12 = corrupted - */ - - call_cache_fn: adr r12, proc_types - #ifdef CONFIG_CPU_CP15 -- mrc p15, 0, r6, c0, c0 @ get processor ID -+ mrc p15, 0, r9, c0, c0 @ get processor ID - #else -- ldr r6, =CONFIG_PROCESSOR_ID -+ ldr r9, =CONFIG_PROCESSOR_ID - #endif - 1: ldr r1, [r12, #0] @ get value - ldr r2, [r12, #4] @ get mask -- eor r1, r1, r6 @ (real ^ match) -+ eor r1, r1, r9 @ (real ^ match) - tst r1, r2 @ & mask - ARM( addeq pc, r12, r3 ) @ call cache function - THUMB( addeq r12, r3 ) -@@ -778,8 +777,7 @@ proc_types: - * Turn off the Cache and MMU. ARMv3 does not support - * reading the control register, but ARMv4 does. - * -- * On entry, r6 = processor ID -- * On exit, r0, r1, r2, r3, r12 corrupted -+ * On exit, r0, r1, r2, r3, r9, r12 corrupted - * This routine must preserve: r4, r6, r7 - */ - .align 5 -@@ -852,10 +850,8 @@ __armv3_mmu_cache_off: - /* - * Clean and flush the cache to maintain consistency. - * -- * On entry, -- * r6 = processor ID - * On exit, -- * r1, r2, r3, r11, r12 corrupted -+ * r1, r2, r3, r9, r11, r12 corrupted - * This routine must preserve: - * r0, r4, r5, r6, r7 - */ -@@ -967,7 +963,7 @@ __armv4_mmu_cache_flush: - mov r2, #64*1024 @ default: 32K dcache size (*2) - mov r11, #32 @ default: 32 byte line size - mrc p15, 0, r3, c0, c0, 1 @ read cache type -- teq r3, r6 @ cache ID register present? -+ teq r3, r9 @ cache ID register present? - beq no_cache_id - mov r1, r3, lsr #18 - and r1, r1, #7 -diff --git a/arch/arm/boot/compressed/vmlinux.lds.in b/arch/arm/boot/compressed/vmlinux.lds.in -index a5924b9..cbed030 100644 ---- a/arch/arm/boot/compressed/vmlinux.lds.in -+++ b/arch/arm/boot/compressed/vmlinux.lds.in -@@ -36,6 +36,9 @@ SECTIONS - - _etext = .; - -+ /* Assume size of decompressed image is 4x the compressed image */ -+ _image_size = (_etext - _text) * 4; -+ - _got_start = .; - .got : { *(.got) } - _got_end = .; -diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c -index 1eb85fb..a3c0a32 100644 ---- a/arch/powerpc/kernel/perf_event.c -+++ b/arch/powerpc/kernel/perf_event.c -@@ -1164,10 +1164,10 @@ static void record_and_restart(struct perf_event *event, unsigned long val, - * Finally record data if requested. - */ - if (record) { -- struct perf_sample_data data = { -- .addr = ~0ULL, -- .period = event->hw.last_period, -- }; -+ struct perf_sample_data data; -+ -+ perf_sample_data_init(&data, ~0ULL); -+ data.period = event->hw.last_period; - - if (event->attr.sample_type & PERF_SAMPLE_ADDR) - perf_get_data_addr(regs, &data.addr); -diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c -index b51b1fc..d3cc94f 100644 ---- a/arch/sh/boot/compressed/misc.c -+++ b/arch/sh/boot/compressed/misc.c -@@ -132,7 +132,7 @@ void decompress_kernel(void) - output_addr = (CONFIG_MEMORY_START + 0x2000); - #else - output_addr = __pa((unsigned long)&_text+PAGE_SIZE); --#ifdef CONFIG_29BIT -+#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_LEGACY) - output_addr |= P2SEG; - #endif - #endif -diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c -index e856456..8c70d3e 100644 ---- a/arch/sparc/kernel/perf_event.c -+++ b/arch/sparc/kernel/perf_event.c -@@ -1189,7 +1189,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self, - - regs = args->regs; - -- data.addr = 0; -+ perf_sample_data_init(&data, 0); - - cpuc = &__get_cpu_var(cpu_hw_events); - -@@ -1337,7 +1337,7 @@ static void perf_callchain_user_32(struct pt_regs *regs, - callchain_store(entry, PERF_CONTEXT_USER); - callchain_store(entry, regs->tpc); - -- ufp = regs->u_regs[UREG_I6]; -+ ufp = regs->u_regs[UREG_I6] & 0xffffffffUL; - do { - struct sparc_stackf32 *usf, sf; - unsigned long pc; -diff --git a/arch/sparc/prom/p1275.c b/arch/sparc/prom/p1275.c -index 4b7c937..2d8b70d 100644 ---- a/arch/sparc/prom/p1275.c -+++ b/arch/sparc/prom/p1275.c -@@ -32,10 +32,9 @@ extern void prom_cif_interface(void); - extern void prom_cif_callback(void); - - /* -- * This provides SMP safety on the p1275buf. prom_callback() drops this lock -- * to allow recursuve acquisition. -+ * This provides SMP safety on the p1275buf. - */ --DEFINE_SPINLOCK(prom_entry_lock); -+DEFINE_RAW_SPINLOCK(prom_entry_lock); - - long p1275_cmd(const char *service, long fmt, ...) - { -@@ -47,7 +46,9 @@ long p1275_cmd(const char *service, long fmt, ...) - - p = p1275buf.prom_buffer; - -- spin_lock_irqsave(&prom_entry_lock, flags); -+ raw_local_save_flags(flags); -+ raw_local_irq_restore(PIL_NMI); -+ raw_spin_lock(&prom_entry_lock); - - p1275buf.prom_args[0] = (unsigned long)p; /* service */ - strcpy (p, service); -@@ -139,7 +140,8 @@ long p1275_cmd(const char *service, long fmt, ...) - va_end(list); - x = p1275buf.prom_args [nargs + 3]; - -- spin_unlock_irqrestore(&prom_entry_lock, flags); -+ raw_spin_unlock(&prom_entry_lock); -+ raw_local_irq_restore(flags); - - return x; - } -diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h -index 14f9890..c22a164 100644 ---- a/arch/x86/include/asm/fixmap.h -+++ b/arch/x86/include/asm/fixmap.h -@@ -82,6 +82,9 @@ enum fixed_addresses { - #endif - FIX_DBGP_BASE, - FIX_EARLYCON_MEM_BASE, -+#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT -+ FIX_OHCI1394_BASE, -+#endif - #ifdef CONFIG_X86_LOCAL_APIC - FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */ - #endif -@@ -126,9 +129,6 @@ enum fixed_addresses { - FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 - - (__end_of_permanent_fixed_addresses & 255), - FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1, --#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT -- FIX_OHCI1394_BASE, --#endif - #ifdef CONFIG_X86_32 - FIX_WP_TEST, - #endif -diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h -index 1cd58cd..4604e6a 100644 ---- a/arch/x86/include/asm/msr-index.h -+++ b/arch/x86/include/asm/msr-index.h -@@ -105,6 +105,8 @@ - #define MSR_AMD64_PATCH_LEVEL 0x0000008b - #define MSR_AMD64_NB_CFG 0xc001001f - #define MSR_AMD64_PATCH_LOADER 0xc0010020 -+#define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 -+#define MSR_AMD64_OSVW_STATUS 0xc0010141 - #define MSR_AMD64_IBSFETCHCTL 0xc0011030 - #define MSR_AMD64_IBSFETCHLINAD 0xc0011031 - #define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032 -diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c -index 879666f..7e1cca1 100644 ---- a/arch/x86/kernel/cpu/intel.c -+++ b/arch/x86/kernel/cpu/intel.c -@@ -70,7 +70,8 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) - if (c->x86_power & (1 << 8)) { - set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); - set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC); -- sched_clock_stable = 1; -+ if (!check_tsc_unstable()) -+ sched_clock_stable = 1; - } - - /* -diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c -index 8c1c070..98819b3 100644 ---- a/arch/x86/kernel/cpu/perf_event.c -+++ b/arch/x86/kernel/cpu/perf_event.c -@@ -1636,10 +1636,9 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_events *cpuc) - - ds->bts_index = ds->bts_buffer_base; - -+ perf_sample_data_init(&data, 0); - - data.period = event->hw.last_period; -- data.addr = 0; -- data.raw = NULL; - regs.ip = 0; - - /* -@@ -1756,8 +1755,7 @@ static int p6_pmu_handle_irq(struct pt_regs *regs) - int idx, handled = 0; - u64 val; - -- data.addr = 0; -- data.raw = NULL; -+ perf_sample_data_init(&data, 0); - - cpuc = &__get_cpu_var(cpu_hw_events); - -@@ -1802,8 +1800,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs) - int bit, loops; - u64 ack, status; - -- data.addr = 0; -- data.raw = NULL; -+ perf_sample_data_init(&data, 0); - - cpuc = &__get_cpu_var(cpu_hw_events); - -diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c -index 0ad9597..a6c906c 100644 ---- a/arch/x86/kernel/dumpstack_64.c -+++ b/arch/x86/kernel/dumpstack_64.c -@@ -125,9 +125,15 @@ fixup_bp_irq_link(unsigned long bp, unsigned long *stack, - { - #ifdef CONFIG_FRAME_POINTER - struct stack_frame *frame = (struct stack_frame *)bp; -+ unsigned long next; - -- if (!in_irq_stack(stack, irq_stack, irq_stack_end)) -- return (unsigned long)frame->next_frame; -+ if (!in_irq_stack(stack, irq_stack, irq_stack_end)) { -+ if (!probe_kernel_address(&frame->next_frame, next)) -+ return next; -+ else -+ WARN_ONCE(1, "Perf: bad frame pointer = %p in " -+ "callchain\n", &frame->next_frame); -+ } - #endif - return bp; - } -diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c -index bb6006e..1e8cead 100644 ---- a/arch/x86/kernel/hw_breakpoint.c -+++ b/arch/x86/kernel/hw_breakpoint.c -@@ -531,8 +531,3 @@ void hw_breakpoint_pmu_read(struct perf_event *bp) - { - /* TODO */ - } -- --void hw_breakpoint_pmu_unthrottle(struct perf_event *bp) --{ -- /* TODO */ --} -diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c -index c9b3522..999c8a6 100644 ---- a/arch/x86/kernel/process.c -+++ b/arch/x86/kernel/process.c -@@ -519,21 +519,37 @@ static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c) - } - - /* -- * Check for AMD CPUs, which have potentially C1E support -+ * Check for AMD CPUs, where APIC timer interrupt does not wake up CPU from C1e. -+ * For more information see -+ * - Erratum #400 for NPT family 0xf and family 0x10 CPUs -+ * - Erratum #365 for family 0x11 (not affected because C1e not in use) - */ - static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c) - { -+ u64 val; - if (c->x86_vendor != X86_VENDOR_AMD) -- return 0; -- -- if (c->x86 < 0x0F) -- return 0; -+ goto no_c1e_idle; - - /* Family 0x0f models < rev F do not have C1E */ -- if (c->x86 == 0x0f && c->x86_model < 0x40) -- return 0; -+ if (c->x86 == 0x0F && c->x86_model >= 0x40) -+ return 1; - -- return 1; -+ if (c->x86 == 0x10) { -+ /* -+ * check OSVW bit for CPUs that are not affected -+ * by erratum #400 -+ */ -+ rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val); -+ if (val >= 2) { -+ rdmsrl(MSR_AMD64_OSVW_STATUS, val); -+ if (!(val & BIT(1))) -+ goto no_c1e_idle; -+ } -+ return 1; -+ } -+ -+no_c1e_idle: -+ return 0; - } - - static cpumask_var_t c1e_mask; -diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c -index a1e1bc9..e900908 100644 ---- a/arch/x86/kvm/x86.c -+++ b/arch/x86/kvm/x86.c -@@ -1351,6 +1351,7 @@ int kvm_dev_ioctl_check_extension(long ext) - case KVM_CAP_XEN_HVM: - case KVM_CAP_ADJUST_CLOCK: - case KVM_CAP_VCPU_EVENTS: -+ case KVM_CAP_X86_ROBUST_SINGLESTEP: - r = 1; - break; - case KVM_CAP_COALESCED_MMIO: -diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c -index 1d4eb93..cf07c26 100644 ---- a/arch/x86/mm/pageattr.c -+++ b/arch/x86/mm/pageattr.c -@@ -291,8 +291,29 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address, - */ - if (kernel_set_to_readonly && - within(address, (unsigned long)_text, -- (unsigned long)__end_rodata_hpage_align)) -- pgprot_val(forbidden) |= _PAGE_RW; -+ (unsigned long)__end_rodata_hpage_align)) { -+ unsigned int level; -+ -+ /* -+ * Don't enforce the !RW mapping for the kernel text mapping, -+ * if the current mapping is already using small page mapping. -+ * No need to work hard to preserve large page mappings in this -+ * case. -+ * -+ * This also fixes the Linux Xen paravirt guest boot failure -+ * (because of unexpected read-only mappings for kernel identity -+ * mappings). In this paravirt guest case, the kernel text -+ * mapping and the kernel identity mapping share the same -+ * page-table pages. Thus we can't really use different -+ * protections for the kernel text and identity mappings. Also, -+ * these shared mappings are made of small page mappings. -+ * Thus this don't enforce !RW mapping for small page kernel -+ * text mapping logic will help Linux Xen parvirt guest boot -+ * aswell. -+ */ -+ if (lookup_address(address, &level) && (level != PG_LEVEL_4K)) -+ pgprot_val(forbidden) |= _PAGE_RW; -+ } - #endif - - prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); -diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c -index a6a736a..9e2feb6 100644 ---- a/drivers/ata/ahci.c -+++ b/drivers/ata/ahci.c -@@ -2831,6 +2831,14 @@ static bool ahci_broken_suspend(struct pci_dev *pdev) - * On HP dv[4-6] and HDX18 with earlier BIOSen, link - * to the harddisk doesn't become online after - * resuming from STR. Warn and fail suspend. -+ * -+ * http://bugzilla.kernel.org/show_bug.cgi?id=12276 -+ * -+ * Use dates instead of versions to match as HP is -+ * apparently recycling both product and version -+ * strings. -+ * -+ * http://bugzilla.kernel.org/show_bug.cgi?id=15462 - */ - { - .ident = "dv4", -@@ -2839,7 +2847,7 @@ static bool ahci_broken_suspend(struct pci_dev *pdev) - DMI_MATCH(DMI_PRODUCT_NAME, - "HP Pavilion dv4 Notebook PC"), - }, -- .driver_data = "F.30", /* cutoff BIOS version */ -+ .driver_data = "20090105", /* F.30 */ - }, - { - .ident = "dv5", -@@ -2848,7 +2856,7 @@ static bool ahci_broken_suspend(struct pci_dev *pdev) - DMI_MATCH(DMI_PRODUCT_NAME, - "HP Pavilion dv5 Notebook PC"), - }, -- .driver_data = "F.16", /* cutoff BIOS version */ -+ .driver_data = "20090506", /* F.16 */ - }, - { - .ident = "dv6", -@@ -2857,7 +2865,7 @@ static bool ahci_broken_suspend(struct pci_dev *pdev) - DMI_MATCH(DMI_PRODUCT_NAME, - "HP Pavilion dv6 Notebook PC"), - }, -- .driver_data = "F.21", /* cutoff BIOS version */ -+ .driver_data = "20090423", /* F.21 */ - }, - { - .ident = "HDX18", -@@ -2866,7 +2874,7 @@ static bool ahci_broken_suspend(struct pci_dev *pdev) - DMI_MATCH(DMI_PRODUCT_NAME, - "HP HDX18 Notebook PC"), - }, -- .driver_data = "F.23", /* cutoff BIOS version */ -+ .driver_data = "20090430", /* F.23 */ - }, - /* - * Acer eMachines G725 has the same problem. BIOS -@@ -2874,6 +2882,8 @@ static bool ahci_broken_suspend(struct pci_dev *pdev) - * work. Inbetween, there are V1.06, V2.06 and V3.03 - * that we don't have much idea about. For now, - * blacklist anything older than V3.04. -+ * -+ * http://bugzilla.kernel.org/show_bug.cgi?id=15104 - */ - { - .ident = "G725", -@@ -2881,19 +2891,21 @@ static bool ahci_broken_suspend(struct pci_dev *pdev) - DMI_MATCH(DMI_SYS_VENDOR, "eMachines"), - DMI_MATCH(DMI_PRODUCT_NAME, "eMachines G725"), - }, -- .driver_data = "V3.04", /* cutoff BIOS version */ -+ .driver_data = "20091216", /* V3.04 */ - }, - { } /* terminate list */ - }; - const struct dmi_system_id *dmi = dmi_first_match(sysids); -- const char *ver; -+ int year, month, date; -+ char buf[9]; - - if (!dmi || pdev->bus->number || pdev->devfn != PCI_DEVFN(0x1f, 2)) - return false; - -- ver = dmi_get_system_info(DMI_BIOS_VERSION); -+ dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); -+ snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); - -- return !ver || strcmp(ver, dmi->driver_data) < 0; -+ return strcmp(buf, dmi->driver_data) < 0; - } - - static bool ahci_broken_online(struct pci_dev *pdev) -diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c -index 0d97890..be7c395 100644 ---- a/drivers/ata/pata_via.c -+++ b/drivers/ata/pata_via.c -@@ -588,6 +588,10 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) - u8 rev = isa->revision; - pci_dev_put(isa); - -+ if ((id->device == 0x0415 || id->device == 0x3164) && -+ (config->id != id->device)) -+ continue; -+ - if (rev >= config->rev_min && rev <= config->rev_max) - break; - } -diff --git a/drivers/char/tty_buffer.c b/drivers/char/tty_buffer.c -index 66fa4e1..f27c4d6 100644 ---- a/drivers/char/tty_buffer.c -+++ b/drivers/char/tty_buffer.c -@@ -247,7 +247,8 @@ int tty_insert_flip_string(struct tty_struct *tty, const unsigned char *chars, - { - int copied = 0; - do { -- int space = tty_buffer_request_room(tty, size - copied); -+ int goal = min(size - copied, TTY_BUFFER_PAGE); -+ int space = tty_buffer_request_room(tty, goal); - struct tty_buffer *tb = tty->buf.tail; - /* If there is no space then tb may be NULL */ - if (unlikely(space == 0)) -@@ -283,7 +284,8 @@ int tty_insert_flip_string_flags(struct tty_struct *tty, - { - int copied = 0; - do { -- int space = tty_buffer_request_room(tty, size - copied); -+ int goal = min(size - copied, TTY_BUFFER_PAGE); -+ int space = tty_buffer_request_room(tty, goal); - struct tty_buffer *tb = tty->buf.tail; - /* If there is no space then tb may be NULL */ - if (unlikely(space == 0)) -diff --git a/drivers/edac/edac_mce_amd.c b/drivers/edac/edac_mce_amd.c -index 8fc91a0..f5b6d9f 100644 ---- a/drivers/edac/edac_mce_amd.c -+++ b/drivers/edac/edac_mce_amd.c -@@ -316,7 +316,12 @@ void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors) - if (regs->nbsh & K8_NBSH_ERR_CPU_VAL) - pr_cont(", core: %u\n", (u8)(regs->nbsh & 0xf)); - } else { -- pr_cont(", core: %d\n", fls((regs->nbsh & 0xf) - 1)); -+ u8 assoc_cpus = regs->nbsh & 0xf; -+ -+ if (assoc_cpus > 0) -+ pr_cont(", core: %d", fls(assoc_cpus) - 1); -+ -+ pr_cont("\n"); - } - - pr_emerg("%s.\n", EXT_ERR_MSG(xec)); -diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c -index ec8a0d7..fd099a1 100644 ---- a/drivers/gpu/drm/i915/i915_gem.c -+++ b/drivers/gpu/drm/i915/i915_gem.c -@@ -1470,9 +1470,6 @@ i915_gem_object_put_pages(struct drm_gem_object *obj) - obj_priv->dirty = 0; - - for (i = 0; i < page_count; i++) { -- if (obj_priv->pages[i] == NULL) -- break; -- - if (obj_priv->dirty) - set_page_dirty(obj_priv->pages[i]); - -@@ -2228,7 +2225,6 @@ i915_gem_object_get_pages(struct drm_gem_object *obj, - struct address_space *mapping; - struct inode *inode; - struct page *page; -- int ret; - - if (obj_priv->pages_refcount++ != 0) - return 0; -@@ -2251,11 +2247,9 @@ i915_gem_object_get_pages(struct drm_gem_object *obj, - mapping_gfp_mask (mapping) | - __GFP_COLD | - gfpmask); -- if (IS_ERR(page)) { -- ret = PTR_ERR(page); -- i915_gem_object_put_pages(obj); -- return ret; -- } -+ if (IS_ERR(page)) -+ goto err_pages; -+ - obj_priv->pages[i] = page; - } - -@@ -2263,6 +2257,15 @@ i915_gem_object_get_pages(struct drm_gem_object *obj, - i915_gem_object_do_bit_17_swizzle(obj); - - return 0; -+ -+err_pages: -+ while (i--) -+ page_cache_release(obj_priv->pages[i]); -+ -+ drm_free_large(obj_priv->pages); -+ obj_priv->pages = NULL; -+ obj_priv->pages_refcount--; -+ return PTR_ERR(page); - } - - static void i965_write_fence_reg(struct drm_i915_fence_reg *reg) -diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c -index 2639591..63f569b 100644 ---- a/drivers/gpu/drm/i915/intel_overlay.c -+++ b/drivers/gpu/drm/i915/intel_overlay.c -@@ -1083,14 +1083,18 @@ int intel_overlay_put_image(struct drm_device *dev, void *data, - - drmmode_obj = drm_mode_object_find(dev, put_image_rec->crtc_id, - DRM_MODE_OBJECT_CRTC); -- if (!drmmode_obj) -- return -ENOENT; -+ if (!drmmode_obj) { -+ ret = -ENOENT; -+ goto out_free; -+ } - crtc = to_intel_crtc(obj_to_crtc(drmmode_obj)); - - new_bo = drm_gem_object_lookup(dev, file_priv, - put_image_rec->bo_handle); -- if (!new_bo) -- return -ENOENT; -+ if (!new_bo) { -+ ret = -ENOENT; -+ goto out_free; -+ } - - mutex_lock(&dev->mode_config.mutex); - mutex_lock(&dev->struct_mutex); -@@ -1180,6 +1184,7 @@ out_unlock: - mutex_unlock(&dev->struct_mutex); - mutex_unlock(&dev->mode_config.mutex); - drm_gem_object_unreference(new_bo); -+out_free: - kfree(params); - - return ret; -diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c -index d2f6335..a378bc3 100644 ---- a/drivers/gpu/drm/nouveau/nouveau_connector.c -+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c -@@ -239,12 +239,14 @@ nouveau_connector_detect(struct drm_connector *connector) - if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS) - nv_encoder = find_encoder_by_type(connector, OUTPUT_LVDS); - if (nv_encoder && nv_connector->native_mode) { -+ unsigned status = connector_status_connected; -+ - #ifdef CONFIG_ACPI - if (!nouveau_ignorelid && !acpi_lid_open()) -- return connector_status_disconnected; -+ status = connector_status_unknown; - #endif - nouveau_connector_set_encoder(connector, nv_encoder); -- return connector_status_connected; -+ return status; - } - - /* Cleanup the previous EDID block. */ -diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c -index 2d7bcee..cb4290a 100644 ---- a/drivers/hwmon/coretemp.c -+++ b/drivers/hwmon/coretemp.c -@@ -228,7 +228,7 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device * - if (err) { - dev_warn(dev, - "Unable to access MSR 0xEE, for Tjmax, left" -- " at default"); -+ " at default\n"); - } else if (eax & 0x40000000) { - tjmax = tjmax_ee; - } -diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c -index df6ab55..5574be2 100644 ---- a/drivers/i2c/busses/i2c-i801.c -+++ b/drivers/i2c/busses/i2c-i801.c -@@ -415,9 +415,11 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write, - data->block[0] = 32; /* max for SMBus block reads */ - } - -+ /* Experience has shown that the block buffer can only be used for -+ SMBus (not I2C) block transactions, even though the datasheet -+ doesn't mention this limitation. */ - if ((i801_features & FEATURE_BLOCK_BUFFER) -- && !(command == I2C_SMBUS_I2C_BLOCK_DATA -- && read_write == I2C_SMBUS_READ) -+ && command != I2C_SMBUS_I2C_BLOCK_DATA - && i801_set_block_buffer_mode() == 0) - result = i801_block_transaction_by_block(data, read_write, - hwpec); -diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c -index 1c440a7..b289ec9 100644 ---- a/drivers/i2c/busses/i2c-powermac.c -+++ b/drivers/i2c/busses/i2c-powermac.c -@@ -122,9 +122,14 @@ static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap, - - rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len); - if (rc) { -- dev_err(&adap->dev, -- "I2C transfer at 0x%02x failed, size %d, err %d\n", -- addrdir >> 1, size, rc); -+ if (rc == -ENXIO) -+ dev_dbg(&adap->dev, -+ "I2C transfer at 0x%02x failed, size %d, " -+ "err %d\n", addrdir >> 1, size, rc); -+ else -+ dev_err(&adap->dev, -+ "I2C transfer at 0x%02x failed, size %d, " -+ "err %d\n", addrdir >> 1, size, rc); - goto bail; - } - -@@ -175,10 +180,16 @@ static int i2c_powermac_master_xfer( struct i2c_adapter *adap, - goto bail; - } - rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len); -- if (rc < 0) -- dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n", -- addrdir & 1 ? "read from" : "write to", addrdir >> 1, -- rc); -+ if (rc < 0) { -+ if (rc == -ENXIO) -+ dev_dbg(&adap->dev, "I2C %s 0x%02x failed, err %d\n", -+ addrdir & 1 ? "read from" : "write to", -+ addrdir >> 1, rc); -+ else -+ dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n", -+ addrdir & 1 ? "read from" : "write to", -+ addrdir >> 1, rc); -+ } - bail: - pmac_i2c_close(bus); - return rc < 0 ? rc : 1; -diff --git a/drivers/ide/icside.c b/drivers/ide/icside.c -index 0f67f1a..d7e6f09 100644 ---- a/drivers/ide/icside.c -+++ b/drivers/ide/icside.c -@@ -65,6 +65,8 @@ static struct cardinfo icside_cardinfo_v6_2 = { - }; - - struct icside_state { -+ unsigned int channel; -+ unsigned int enabled; - void __iomem *irq_port; - void __iomem *ioc_base; - unsigned int sel; -@@ -114,11 +116,18 @@ static void icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr) - struct icside_state *state = ec->irq_data; - void __iomem *base = state->irq_port; - -- writeb(0, base + ICS_ARCIN_V6_INTROFFSET_1); -- readb(base + ICS_ARCIN_V6_INTROFFSET_2); -+ state->enabled = 1; - -- writeb(0, base + ICS_ARCIN_V6_INTROFFSET_2); -- readb(base + ICS_ARCIN_V6_INTROFFSET_1); -+ switch (state->channel) { -+ case 0: -+ writeb(0, base + ICS_ARCIN_V6_INTROFFSET_1); -+ readb(base + ICS_ARCIN_V6_INTROFFSET_2); -+ break; -+ case 1: -+ writeb(0, base + ICS_ARCIN_V6_INTROFFSET_2); -+ readb(base + ICS_ARCIN_V6_INTROFFSET_1); -+ break; -+ } - } - - /* Prototype: icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr) -@@ -128,6 +137,8 @@ static void icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr) - { - struct icside_state *state = ec->irq_data; - -+ state->enabled = 0; -+ - readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1); - readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2); - } -@@ -149,6 +160,44 @@ static const expansioncard_ops_t icside_ops_arcin_v6 = { - .irqpending = icside_irqpending_arcin_v6, - }; - -+/* -+ * Handle routing of interrupts. This is called before -+ * we write the command to the drive. -+ */ -+static void icside_maskproc(ide_drive_t *drive, int mask) -+{ -+ ide_hwif_t *hwif = drive->hwif; -+ struct expansion_card *ec = ECARD_DEV(hwif->dev); -+ struct icside_state *state = ecard_get_drvdata(ec); -+ unsigned long flags; -+ -+ local_irq_save(flags); -+ -+ state->channel = hwif->channel; -+ -+ if (state->enabled && !mask) { -+ switch (hwif->channel) { -+ case 0: -+ writeb(0, state->irq_port + ICS_ARCIN_V6_INTROFFSET_1); -+ readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2); -+ break; -+ case 1: -+ writeb(0, state->irq_port + ICS_ARCIN_V6_INTROFFSET_2); -+ readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1); -+ break; -+ } -+ } else { -+ readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2); -+ readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1); -+ } -+ -+ local_irq_restore(flags); -+} -+ -+static const struct ide_port_ops icside_v6_no_dma_port_ops = { -+ .maskproc = icside_maskproc, -+}; -+ - #ifdef CONFIG_BLK_DEV_IDEDMA_ICS - /* - * SG-DMA support. -@@ -228,6 +277,7 @@ static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode) - - static const struct ide_port_ops icside_v6_port_ops = { - .set_dma_mode = icside_set_dma_mode, -+ .maskproc = icside_maskproc, - }; - - static void icside_dma_host_set(ide_drive_t *drive, int on) -@@ -272,6 +322,11 @@ static int icside_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) - BUG_ON(dma_channel_active(ec->dma)); - - /* -+ * Ensure that we have the right interrupt routed. -+ */ -+ icside_maskproc(drive, 0); -+ -+ /* - * Route the DMA signals to the correct interface. - */ - writeb(state->sel | hwif->channel, state->ioc_base); -@@ -399,6 +454,7 @@ err_free: - - static const struct ide_port_info icside_v6_port_info __initdata = { - .init_dma = icside_dma_off_init, -+ .port_ops = &icside_v6_no_dma_port_ops, - .dma_ops = &icside_v6_dma_ops, - .host_flags = IDE_HFLAG_SERIALIZE | IDE_HFLAG_MMIO, - .mwdma_mask = ATA_MWDMA2, -diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c -index 4d76ba4..0c11237 100644 ---- a/drivers/ide/ide-probe.c -+++ b/drivers/ide/ide-probe.c -@@ -695,14 +695,8 @@ static int ide_probe_port(ide_hwif_t *hwif) - if (irqd) - disable_irq(hwif->irq); - -- rc = ide_port_wait_ready(hwif); -- if (rc == -ENODEV) { -- printk(KERN_INFO "%s: no devices on the port\n", hwif->name); -- goto out; -- } else if (rc == -EBUSY) -- printk(KERN_ERR "%s: not ready before the probe\n", hwif->name); -- else -- rc = -ENODEV; -+ if (ide_port_wait_ready(hwif) == -EBUSY) -+ printk(KERN_DEBUG "%s: Wait for ready failed before probe !\n", hwif->name); - - /* - * Second drive should only exist if first drive was found, -@@ -713,7 +707,7 @@ static int ide_probe_port(ide_hwif_t *hwif) - if (drive->dev_flags & IDE_DFLAG_PRESENT) - rc = 0; - } --out: -+ - /* - * Use cached IRQ number. It might be (and is...) changed by probe - * code above -diff --git a/drivers/ide/pdc202xx_old.c b/drivers/ide/pdc202xx_old.c -index 35161dd..e3bca38 100644 ---- a/drivers/ide/pdc202xx_old.c -+++ b/drivers/ide/pdc202xx_old.c -@@ -100,13 +100,13 @@ static int pdc202xx_test_irq(ide_hwif_t *hwif) - * bit 7: error, bit 6: interrupting, - * bit 5: FIFO full, bit 4: FIFO empty - */ -- return ((sc1d & 0x50) == 0x40) ? 1 : 0; -+ return ((sc1d & 0x50) == 0x50) ? 1 : 0; - } else { - /* - * bit 3: error, bit 2: interrupting, - * bit 1: FIFO full, bit 0: FIFO empty - */ -- return ((sc1d & 0x05) == 0x04) ? 1 : 0; -+ return ((sc1d & 0x05) == 0x05) ? 1 : 0; - } - } - -diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c -index f93c2c0..f6dad83 100644 ---- a/drivers/input/mouse/alps.c -+++ b/drivers/input/mouse/alps.c -@@ -63,6 +63,8 @@ static const struct alps_model_info alps_model_data[] = { - { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, - ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, - { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FOUR_BUTTONS }, /* Dell Vostro 1400 */ -+ { { 0x52, 0x01, 0x14 }, 0xff, 0xff, -+ ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, /* Toshiba Tecra A11-11L */ - }; - - /* -diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h -index 2a5982e..525b9b9 100644 ---- a/drivers/input/serio/i8042-x86ia64io.h -+++ b/drivers/input/serio/i8042-x86ia64io.h -@@ -442,6 +442,13 @@ static const struct dmi_system_id __initconst i8042_dmi_reset_table[] = { - }, - }, - { -+ /* Medion Akoya E1222 */ -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "MEDION"), -+ DMI_MATCH(DMI_PRODUCT_NAME, "E122X"), -+ }, -+ }, -+ { - /* Mivvy M310 */ - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "VIOOO"), -diff --git a/drivers/isdn/gigaset/capi.c b/drivers/isdn/gigaset/capi.c -index 3f5cd06..6b6c25d 100644 ---- a/drivers/isdn/gigaset/capi.c -+++ b/drivers/isdn/gigaset/capi.c -@@ -1313,7 +1313,7 @@ static void do_connect_req(struct gigaset_capi_ctr *iif, - } - - /* check parameter: CIP Value */ -- if (cmsg->CIPValue > ARRAY_SIZE(cip2bchlc) || -+ if (cmsg->CIPValue >= ARRAY_SIZE(cip2bchlc) || - (cmsg->CIPValue > 0 && cip2bchlc[cmsg->CIPValue].bc == NULL)) { - dev_notice(cs->dev, "%s: unknown CIP value %d\n", - "CONNECT_REQ", cmsg->CIPValue); -@@ -2215,36 +2215,24 @@ static int gigaset_ctr_read_proc(char *page, char **start, off_t off, - } - - --static struct capi_driver capi_driver_gigaset = { -- .name = "gigaset", -- .revision = "1.0", --}; -- - /** -- * gigaset_isdn_register() - register to LL -+ * gigaset_isdn_regdev() - register device to LL - * @cs: device descriptor structure. - * @isdnid: device name. - * -- * Called by main module to register the device with the LL. -- * - * Return value: 1 for success, 0 for failure - */ --int gigaset_isdn_register(struct cardstate *cs, const char *isdnid) -+int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid) - { - struct gigaset_capi_ctr *iif; - int rc; - -- pr_info("Kernel CAPI interface\n"); -- - iif = kmalloc(sizeof(*iif), GFP_KERNEL); - if (!iif) { - pr_err("%s: out of memory\n", __func__); - return 0; - } - -- /* register driver with CAPI (ToDo: what for?) */ -- register_capi_driver(&capi_driver_gigaset); -- - /* prepare controller structure */ - iif->ctr.owner = THIS_MODULE; - iif->ctr.driverdata = cs; -@@ -2265,7 +2253,6 @@ int gigaset_isdn_register(struct cardstate *cs, const char *isdnid) - rc = attach_capi_ctr(&iif->ctr); - if (rc) { - pr_err("attach_capi_ctr failed (%d)\n", rc); -- unregister_capi_driver(&capi_driver_gigaset); - kfree(iif); - return 0; - } -@@ -2276,17 +2263,36 @@ int gigaset_isdn_register(struct cardstate *cs, const char *isdnid) - } - - /** -- * gigaset_isdn_unregister() - unregister from LL -+ * gigaset_isdn_unregdev() - unregister device from LL - * @cs: device descriptor structure. -- * -- * Called by main module to unregister the device from the LL. - */ --void gigaset_isdn_unregister(struct cardstate *cs) -+void gigaset_isdn_unregdev(struct cardstate *cs) - { - struct gigaset_capi_ctr *iif = cs->iif; - - detach_capi_ctr(&iif->ctr); - kfree(iif); - cs->iif = NULL; -+} -+ -+static struct capi_driver capi_driver_gigaset = { -+ .name = "gigaset", -+ .revision = "1.0", -+}; -+ -+/** -+ * gigaset_isdn_regdrv() - register driver to LL -+ */ -+void gigaset_isdn_regdrv(void) -+{ -+ pr_info("Kernel CAPI interface\n"); -+ register_capi_driver(&capi_driver_gigaset); -+} -+ -+/** -+ * gigaset_isdn_unregdrv() - unregister driver from LL -+ */ -+void gigaset_isdn_unregdrv(void) -+{ - unregister_capi_driver(&capi_driver_gigaset); - } -diff --git a/drivers/isdn/gigaset/common.c b/drivers/isdn/gigaset/common.c -index 664b0c5..0427fac 100644 ---- a/drivers/isdn/gigaset/common.c -+++ b/drivers/isdn/gigaset/common.c -@@ -505,7 +505,7 @@ void gigaset_freecs(struct cardstate *cs) - case 2: /* error in initcshw */ - /* Deregister from LL */ - make_invalid(cs, VALID_ID); -- gigaset_isdn_unregister(cs); -+ gigaset_isdn_unregdev(cs); - - /* fall through */ - case 1: /* error when registering to LL */ -@@ -767,7 +767,7 @@ struct cardstate *gigaset_initcs(struct gigaset_driver *drv, int channels, - cs->cmdbytes = 0; - - gig_dbg(DEBUG_INIT, "setting up iif"); -- if (!gigaset_isdn_register(cs, modulename)) { -+ if (!gigaset_isdn_regdev(cs, modulename)) { - pr_err("error registering ISDN device\n"); - goto error; - } -@@ -1214,11 +1214,13 @@ static int __init gigaset_init_module(void) - gigaset_debuglevel = DEBUG_DEFAULT; - - pr_info(DRIVER_DESC DRIVER_DESC_DEBUG "\n"); -+ gigaset_isdn_regdrv(); - return 0; - } - - static void __exit gigaset_exit_module(void) - { -+ gigaset_isdn_unregdrv(); - } - - module_init(gigaset_init_module); -diff --git a/drivers/isdn/gigaset/dummyll.c b/drivers/isdn/gigaset/dummyll.c -index 5b27c99..bd0b1ea 100644 ---- a/drivers/isdn/gigaset/dummyll.c -+++ b/drivers/isdn/gigaset/dummyll.c -@@ -57,12 +57,20 @@ void gigaset_isdn_stop(struct cardstate *cs) - { - } - --int gigaset_isdn_register(struct cardstate *cs, const char *isdnid) -+int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid) - { -- pr_info("no ISDN subsystem interface\n"); - return 1; - } - --void gigaset_isdn_unregister(struct cardstate *cs) -+void gigaset_isdn_unregdev(struct cardstate *cs) -+{ -+} -+ -+void gigaset_isdn_regdrv(void) -+{ -+ pr_info("no ISDN subsystem interface\n"); -+} -+ -+void gigaset_isdn_unregdrv(void) - { - } -diff --git a/drivers/isdn/gigaset/ev-layer.c b/drivers/isdn/gigaset/ev-layer.c -index ddeb045..0304d02 100644 ---- a/drivers/isdn/gigaset/ev-layer.c -+++ b/drivers/isdn/gigaset/ev-layer.c -@@ -1259,14 +1259,10 @@ static void do_action(int action, struct cardstate *cs, - * note that bcs may be NULL if no B channel is free - */ - at_state2->ConState = 700; -- kfree(at_state2->str_var[STR_NMBR]); -- at_state2->str_var[STR_NMBR] = NULL; -- kfree(at_state2->str_var[STR_ZCPN]); -- at_state2->str_var[STR_ZCPN] = NULL; -- kfree(at_state2->str_var[STR_ZBC]); -- at_state2->str_var[STR_ZBC] = NULL; -- kfree(at_state2->str_var[STR_ZHLC]); -- at_state2->str_var[STR_ZHLC] = NULL; -+ for (i = 0; i < STR_NUM; ++i) { -+ kfree(at_state2->str_var[i]); -+ at_state2->str_var[i] = NULL; -+ } - at_state2->int_var[VAR_ZCTP] = -1; - - spin_lock_irqsave(&cs->lock, flags); -diff --git a/drivers/isdn/gigaset/gigaset.h b/drivers/isdn/gigaset/gigaset.h -index e963a6c..62909b2 100644 ---- a/drivers/isdn/gigaset/gigaset.h -+++ b/drivers/isdn/gigaset/gigaset.h -@@ -674,8 +674,10 @@ int gigaset_isowbuf_getbytes(struct isowbuf_t *iwb, int size); - */ - - /* Called from common.c for setting up/shutting down with the ISDN subsystem */ --int gigaset_isdn_register(struct cardstate *cs, const char *isdnid); --void gigaset_isdn_unregister(struct cardstate *cs); -+void gigaset_isdn_regdrv(void); -+void gigaset_isdn_unregdrv(void); -+int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid); -+void gigaset_isdn_unregdev(struct cardstate *cs); - - /* Called from hardware module to indicate completion of an skb */ - void gigaset_skb_sent(struct bc_state *bcs, struct sk_buff *skb); -diff --git a/drivers/isdn/gigaset/i4l.c b/drivers/isdn/gigaset/i4l.c -index c129ee4..6429a6b 100644 ---- a/drivers/isdn/gigaset/i4l.c -+++ b/drivers/isdn/gigaset/i4l.c -@@ -632,15 +632,13 @@ void gigaset_isdn_stop(struct cardstate *cs) - } - - /** -- * gigaset_isdn_register() - register to LL -+ * gigaset_isdn_regdev() - register to LL - * @cs: device descriptor structure. - * @isdnid: device name. - * -- * Called by main module to register the device with the LL. -- * - * Return value: 1 for success, 0 for failure - */ --int gigaset_isdn_register(struct cardstate *cs, const char *isdnid) -+int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid) - { - isdn_if *iif; - -@@ -690,15 +688,29 @@ int gigaset_isdn_register(struct cardstate *cs, const char *isdnid) - } - - /** -- * gigaset_isdn_unregister() - unregister from LL -+ * gigaset_isdn_unregdev() - unregister device from LL - * @cs: device descriptor structure. -- * -- * Called by main module to unregister the device from the LL. - */ --void gigaset_isdn_unregister(struct cardstate *cs) -+void gigaset_isdn_unregdev(struct cardstate *cs) - { - gig_dbg(DEBUG_CMD, "sending UNLOAD"); - gigaset_i4l_cmd(cs, ISDN_STAT_UNLOAD); - kfree(cs->iif); - cs->iif = NULL; - } -+ -+/** -+ * gigaset_isdn_regdrv() - register driver to LL -+ */ -+void gigaset_isdn_regdrv(void) -+{ -+ /* nothing to do */ -+} -+ -+/** -+ * gigaset_isdn_unregdrv() - unregister driver from LL -+ */ -+void gigaset_isdn_unregdrv(void) -+{ -+ /* nothing to do */ -+} -diff --git a/drivers/isdn/gigaset/interface.c b/drivers/isdn/gigaset/interface.c -index d2260b0..07bb299 100644 ---- a/drivers/isdn/gigaset/interface.c -+++ b/drivers/isdn/gigaset/interface.c -@@ -632,7 +632,6 @@ void gigaset_if_receive(struct cardstate *cs, - if (tty == NULL) - gig_dbg(DEBUG_ANY, "receive on closed device"); - else { -- tty_buffer_request_room(tty, len); - tty_insert_flip_string(tty, buffer, len); - tty_flip_buffer_push(tty); - } -diff --git a/drivers/leds/leds-gpio.c b/drivers/leds/leds-gpio.c -index e5225d2..0823e26 100644 ---- a/drivers/leds/leds-gpio.c -+++ b/drivers/leds/leds-gpio.c -@@ -211,7 +211,6 @@ static int __devinit of_gpio_leds_probe(struct of_device *ofdev, - const struct of_device_id *match) - { - struct device_node *np = ofdev->node, *child; -- struct gpio_led led; - struct gpio_led_of_platform_data *pdata; - int count = 0, ret; - -@@ -226,8 +225,8 @@ static int __devinit of_gpio_leds_probe(struct of_device *ofdev, - if (!pdata) - return -ENOMEM; - -- memset(&led, 0, sizeof(led)); - for_each_child_of_node(np, child) { -+ struct gpio_led led = {}; - enum of_gpio_flags flags; - const char *state; - -diff --git a/drivers/media/video/em28xx/em28xx-dvb.c b/drivers/media/video/em28xx/em28xx-dvb.c -index cc0505e..6b0a495 100644 ---- a/drivers/media/video/em28xx/em28xx-dvb.c -+++ b/drivers/media/video/em28xx/em28xx-dvb.c -@@ -606,6 +606,7 @@ static int dvb_fini(struct em28xx *dev) - - if (dev->dvb) { - unregister_dvb(dev->dvb); -+ kfree(dev->dvb); - dev->dvb = NULL; - } - -diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c -index efa0e41..1f800ae 100644 ---- a/drivers/net/bonding/bond_main.c -+++ b/drivers/net/bonding/bond_main.c -@@ -4935,6 +4935,8 @@ int bond_create(struct net *net, const char *name) - } - - res = register_netdevice(bond_dev); -+ if (res < 0) -+ goto out_netdev; - - out: - rtnl_unlock(); -diff --git a/drivers/net/can/bfin_can.c b/drivers/net/can/bfin_can.c -index 0ec1524..fe5e320 100644 ---- a/drivers/net/can/bfin_can.c -+++ b/drivers/net/can/bfin_can.c -@@ -26,6 +26,7 @@ - - #define DRV_NAME "bfin_can" - #define BFIN_CAN_TIMEOUT 100 -+#define TX_ECHO_SKB_MAX 1 - - /* - * transmit and receive channels -@@ -590,7 +591,7 @@ struct net_device *alloc_bfin_candev(void) - struct net_device *dev; - struct bfin_can_priv *priv; - -- dev = alloc_candev(sizeof(*priv)); -+ dev = alloc_candev(sizeof(*priv), TX_ECHO_SKB_MAX); - if (!dev) - return NULL; - -diff --git a/drivers/net/e100.c b/drivers/net/e100.c -index 839fb2b..a565ea1 100644 ---- a/drivers/net/e100.c -+++ b/drivers/net/e100.c -@@ -2854,7 +2854,7 @@ static int __devinit e100_probe(struct pci_dev *pdev, - } - nic->cbs_pool = pci_pool_create(netdev->name, - nic->pdev, -- nic->params.cbs.count * sizeof(struct cb), -+ nic->params.cbs.max * sizeof(struct cb), - sizeof(u32), - 0); - DPRINTK(PROBE, INFO, "addr 0x%llx, irq %d, MAC addr %pM\n", -diff --git a/drivers/net/jme.c b/drivers/net/jme.c -index 792b88f..981c9fb 100644 ---- a/drivers/net/jme.c -+++ b/drivers/net/jme.c -@@ -946,6 +946,8 @@ jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) - jme->jme_vlan_rx(skb, jme->vlgrp, - le16_to_cpu(rxdesc->descwb.vlan)); - NET_STAT(jme).rx_bytes += 4; -+ } else { -+ dev_kfree_skb(skb); - } - } else { - jme->jme_rx(skb); -@@ -2085,12 +2087,45 @@ jme_tx_timeout(struct net_device *netdev) - jme_reset_link(jme); - } - -+static inline void jme_pause_rx(struct jme_adapter *jme) -+{ -+ atomic_dec(&jme->link_changing); -+ -+ jme_set_rx_pcc(jme, PCC_OFF); -+ if (test_bit(JME_FLAG_POLL, &jme->flags)) { -+ JME_NAPI_DISABLE(jme); -+ } else { -+ tasklet_disable(&jme->rxclean_task); -+ tasklet_disable(&jme->rxempty_task); -+ } -+} -+ -+static inline void jme_resume_rx(struct jme_adapter *jme) -+{ -+ struct dynpcc_info *dpi = &(jme->dpi); -+ -+ if (test_bit(JME_FLAG_POLL, &jme->flags)) { -+ JME_NAPI_ENABLE(jme); -+ } else { -+ tasklet_hi_enable(&jme->rxclean_task); -+ tasklet_hi_enable(&jme->rxempty_task); -+ } -+ dpi->cur = PCC_P1; -+ dpi->attempt = PCC_P1; -+ dpi->cnt = 0; -+ jme_set_rx_pcc(jme, PCC_P1); -+ -+ atomic_inc(&jme->link_changing); -+} -+ - static void - jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) - { - struct jme_adapter *jme = netdev_priv(netdev); - -+ jme_pause_rx(jme); - jme->vlgrp = grp; -+ jme_resume_rx(jme); - } - - static void -diff --git a/drivers/net/pppol2tp.c b/drivers/net/pppol2tp.c -index 9fbb2eb..449a982 100644 ---- a/drivers/net/pppol2tp.c -+++ b/drivers/net/pppol2tp.c -@@ -756,6 +756,7 @@ static int pppol2tp_recv_core(struct sock *sock, struct sk_buff *skb) - - /* Try to dequeue as many skbs from reorder_q as we can. */ - pppol2tp_recv_dequeue(session); -+ sock_put(sock); - - return 0; - -@@ -772,6 +773,7 @@ discard_bad_csum: - UDP_INC_STATS_USER(&init_net, UDP_MIB_INERRORS, 0); - tunnel->stats.rx_errors++; - kfree_skb(skb); -+ sock_put(sock); - - return 0; - -@@ -1180,7 +1182,8 @@ static int pppol2tp_xmit(struct ppp_channel *chan, struct sk_buff *skb) - /* Calculate UDP checksum if configured to do so */ - if (sk_tun->sk_no_check == UDP_CSUM_NOXMIT) - skb->ip_summed = CHECKSUM_NONE; -- else if (!(skb_dst(skb)->dev->features & NETIF_F_V4_CSUM)) { -+ else if ((skb_dst(skb) && skb_dst(skb)->dev) && -+ (!(skb_dst(skb)->dev->features & NETIF_F_V4_CSUM))) { - skb->ip_summed = CHECKSUM_COMPLETE; - csum = skb_checksum(skb, 0, udp_len, 0); - uh->check = csum_tcpudp_magic(inet->inet_saddr, -@@ -1661,6 +1664,7 @@ static int pppol2tp_connect(struct socket *sock, struct sockaddr *uservaddr, - if (tunnel_sock == NULL) - goto end; - -+ sock_hold(tunnel_sock); - tunnel = tunnel_sock->sk_user_data; - } else { - tunnel = pppol2tp_tunnel_find(sock_net(sk), sp->pppol2tp.s_tunnel); -diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c -index 60f96c4..67d414b 100644 ---- a/drivers/net/r8169.c -+++ b/drivers/net/r8169.c -@@ -186,7 +186,12 @@ static struct pci_device_id rtl8169_pci_tbl[] = { - - MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl); - --static int rx_copybreak = 200; -+/* -+ * we set our copybreak very high so that we don't have -+ * to allocate 16k frames all the time (see note in -+ * rtl8169_open() -+ */ -+static int rx_copybreak = 16383; - static int use_dac; - static struct { - u32 msg_enable; -@@ -3245,9 +3250,13 @@ static void __devexit rtl8169_remove_one(struct pci_dev *pdev) - } - - static void rtl8169_set_rxbufsize(struct rtl8169_private *tp, -- struct net_device *dev) -+ unsigned int mtu) - { -- unsigned int max_frame = dev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; -+ unsigned int max_frame = mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; -+ -+ if (max_frame != 16383) -+ printk(KERN_WARNING "WARNING! Changing of MTU on this NIC" -+ "May lead to frame reception errors!\n"); - - tp->rx_buf_sz = (max_frame > RX_BUF_SIZE) ? max_frame : RX_BUF_SIZE; - } -@@ -3259,7 +3268,17 @@ static int rtl8169_open(struct net_device *dev) - int retval = -ENOMEM; - - -- rtl8169_set_rxbufsize(tp, dev); -+ /* -+ * Note that we use a magic value here, its wierd I know -+ * its done because, some subset of rtl8169 hardware suffers from -+ * a problem in which frames received that are longer than -+ * the size set in RxMaxSize register return garbage sizes -+ * when received. To avoid this we need to turn off filtering, -+ * which is done by setting a value of 16383 in the RxMaxSize register -+ * and allocating 16k frames to handle the largest possible rx value -+ * thats what the magic math below does. -+ */ -+ rtl8169_set_rxbufsize(tp, 16383 - VLAN_ETH_HLEN - ETH_FCS_LEN); - - /* - * Rx and Tx desscriptors needs 256 bytes alignment. -@@ -3912,7 +3931,7 @@ static int rtl8169_change_mtu(struct net_device *dev, int new_mtu) - - rtl8169_down(dev); - -- rtl8169_set_rxbufsize(tp, dev); -+ rtl8169_set_rxbufsize(tp, dev->mtu); - - ret = rtl8169_init_ring(dev); - if (ret < 0) -diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c -index 7f82b02..17d1493 100644 ---- a/drivers/net/tg3.c -+++ b/drivers/net/tg3.c -@@ -5223,7 +5223,7 @@ static void tg3_poll_controller(struct net_device *dev) - struct tg3 *tp = netdev_priv(dev); - - for (i = 0; i < tp->irq_cnt; i++) -- tg3_interrupt(tp->napi[i].irq_vec, dev); -+ tg3_interrupt(tp->napi[i].irq_vec, &tp->napi[i]); - } - #endif - -diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h -index bbd2f31..8b43089 100644 ---- a/drivers/net/wireless/ath/ath5k/ath5k.h -+++ b/drivers/net/wireless/ath/ath5k/ath5k.h -@@ -535,7 +535,7 @@ struct ath5k_txq_info { - u32 tqi_cbr_period; /* Constant bit rate period */ - u32 tqi_cbr_overflow_limit; - u32 tqi_burst_time; -- u32 tqi_ready_time; /* Not used */ -+ u32 tqi_ready_time; /* Time queue waits after an event */ - }; - - /* -diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c -index d6ee8ac..ced648b 100644 ---- a/drivers/net/wireless/ath/ath5k/base.c -+++ b/drivers/net/wireless/ath/ath5k/base.c -@@ -1537,7 +1537,8 @@ ath5k_beaconq_config(struct ath5k_softc *sc) - - ret = ath5k_hw_get_tx_queueprops(ah, sc->bhalq, &qi); - if (ret) -- return ret; -+ goto err; -+ - if (sc->opmode == NL80211_IFTYPE_AP || - sc->opmode == NL80211_IFTYPE_MESH_POINT) { - /* -@@ -1564,10 +1565,25 @@ ath5k_beaconq_config(struct ath5k_softc *sc) - if (ret) { - ATH5K_ERR(sc, "%s: unable to update parameters for beacon " - "hardware queue!\n", __func__); -- return ret; -+ goto err; - } -+ ret = ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */ -+ if (ret) -+ goto err; - -- return ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */; -+ /* reconfigure cabq with ready time to 80% of beacon_interval */ -+ ret = ath5k_hw_get_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi); -+ if (ret) -+ goto err; -+ -+ qi.tqi_ready_time = (sc->bintval * 80) / 100; -+ ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi); -+ if (ret) -+ goto err; -+ -+ ret = ath5k_hw_reset_tx_queue(ah, AR5K_TX_QUEUE_ID_CAB); -+err: -+ return ret; - } - - static void -diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c -index 72474c0..97df0d9 100644 ---- a/drivers/net/wireless/ath/ath5k/phy.c -+++ b/drivers/net/wireless/ath/ath5k/phy.c -@@ -1386,38 +1386,39 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah, - goto done; - - /* Calibration has finished, get the results and re-run */ -+ -+ /* work around empty results which can apparently happen on 5212 */ - for (i = 0; i <= 10; i++) { - iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR); - i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I); - q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q); -+ ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, -+ "iq_corr:%x i_pwr:%x q_pwr:%x", iq_corr, i_pwr, q_pwr); -+ if (i_pwr && q_pwr) -+ break; - } - - i_coffd = ((i_pwr >> 1) + (q_pwr >> 1)) >> 7; - q_coffd = q_pwr >> 7; - -- /* No correction */ -- if (i_coffd == 0 || q_coffd == 0) -+ /* protect against divide by 0 and loss of sign bits */ -+ if (i_coffd == 0 || q_coffd < 2) - goto done; - -- i_coff = ((-iq_corr) / i_coffd); -+ i_coff = (-iq_corr) / i_coffd; -+ i_coff = clamp(i_coff, -32, 31); /* signed 6 bit */ - -- /* Boundary check */ -- if (i_coff > 31) -- i_coff = 31; -- if (i_coff < -32) -- i_coff = -32; -+ q_coff = (i_pwr / q_coffd) - 128; -+ q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */ - -- q_coff = (((s32)i_pwr / q_coffd) - 128); -+ ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, -+ "new I:%d Q:%d (i_coffd:%x q_coffd:%x)", -+ i_coff, q_coff, i_coffd, q_coffd); - -- /* Boundary check */ -- if (q_coff > 15) -- q_coff = 15; -- if (q_coff < -16) -- q_coff = -16; -- -- /* Commit new I/Q value */ -- AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE | -- ((u32)q_coff) | ((u32)i_coff << AR5K_PHY_IQ_CORR_Q_I_COFF_S)); -+ /* Commit new I/Q values (set enable bit last to match HAL sources) */ -+ AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_I_COFF, i_coff); -+ AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_Q_COFF, q_coff); -+ AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE); - - /* Re-enable calibration -if we don't we'll commit - * the same values again and again */ -diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c -index eeebb9a..b7c5725 100644 ---- a/drivers/net/wireless/ath/ath5k/qcu.c -+++ b/drivers/net/wireless/ath/ath5k/qcu.c -@@ -408,12 +408,13 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) - break; - - case AR5K_TX_QUEUE_CAB: -+ /* XXX: use BCN_SENT_GT, if we can figure out how */ - AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue), -- AR5K_QCU_MISC_FRSHED_BCN_SENT_GT | -+ AR5K_QCU_MISC_FRSHED_DBA_GT | - AR5K_QCU_MISC_CBREXP_DIS | - AR5K_QCU_MISC_CBREXP_BCN_DIS); - -- ath5k_hw_reg_write(ah, ((AR5K_TUNE_BEACON_INTERVAL - -+ ath5k_hw_reg_write(ah, ((tq->tqi_ready_time - - (AR5K_TUNE_SW_BEACON_RESP - - AR5K_TUNE_DMA_BEACON_RESP) - - AR5K_TUNE_ADDITIONAL_SWBA_BACKOFF) * 1024) | -diff --git a/drivers/net/wireless/ath/ath5k/reg.h b/drivers/net/wireless/ath/ath5k/reg.h -index 4cb9c5d..1464f89 100644 ---- a/drivers/net/wireless/ath/ath5k/reg.h -+++ b/drivers/net/wireless/ath/ath5k/reg.h -@@ -2187,6 +2187,7 @@ - */ - #define AR5K_PHY_IQ 0x9920 /* Register Address */ - #define AR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f /* Mask for q correction info */ -+#define AR5K_PHY_IQ_CORR_Q_Q_COFF_S 0 - #define AR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0 /* Mask for i correction info */ - #define AR5K_PHY_IQ_CORR_Q_I_COFF_S 5 - #define AR5K_PHY_IQ_CORR_ENABLE 0x00000800 /* Enable i/q correction */ -diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c -index 62954fc..dbc52ee 100644 ---- a/drivers/net/wireless/ath/ath5k/reset.c -+++ b/drivers/net/wireless/ath/ath5k/reset.c -@@ -1371,8 +1371,9 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, - * Set clocks to 32KHz operation and use an - * external 32KHz crystal when sleeping if one - * exists */ -- if (ah->ah_version == AR5K_AR5212) -- ath5k_hw_set_sleep_clock(ah, true); -+ if (ah->ah_version == AR5K_AR5212 && -+ ah->ah_op_mode != NL80211_IFTYPE_AP) -+ ath5k_hw_set_sleep_clock(ah, true); - - /* - * Disable beacons and reset the register -diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h -index 1597a42..2bad712 100644 ---- a/drivers/net/wireless/ath/ath9k/ath9k.h -+++ b/drivers/net/wireless/ath/ath9k/ath9k.h -@@ -267,6 +267,7 @@ void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, - u16 tid, u16 *ssn); - void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); - void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); -+void ath9k_enable_ps(struct ath_softc *sc); - - /********/ - /* VIFs */ -diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c -index 06eaaa9..20b1fd3 100644 ---- a/drivers/net/wireless/ath/ath9k/beacon.c -+++ b/drivers/net/wireless/ath/ath9k/beacon.c -@@ -573,6 +573,13 @@ static void ath_beacon_config_sta(struct ath_softc *sc, - u64 tsf; - int num_beacons, offset, dtim_dec_count, cfp_dec_count; - -+ /* No need to configure beacon if we are not associated */ -+ if (!common->curaid) { -+ ath_print(common, ATH_DBG_BEACON, -+ "STA is not yet associated..skipping beacon config\n"); -+ return; -+ } -+ - memset(&bs, 0, sizeof(bs)); - intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; - -diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c -index 7c64aa5..6661178 100644 ---- a/drivers/net/wireless/ath/ath9k/hw.c -+++ b/drivers/net/wireless/ath/ath9k/hw.c -@@ -380,7 +380,6 @@ static void ath9k_hw_init_config(struct ath_hw *ah) - ah->config.pcie_clock_req = 0; - ah->config.pcie_waen = 0; - ah->config.analog_shiftreg = 1; -- ah->config.ht_enable = 1; - ah->config.ofdm_trig_low = 200; - ah->config.ofdm_trig_high = 500; - ah->config.cck_trig_high = 200; -@@ -392,6 +391,11 @@ static void ath9k_hw_init_config(struct ath_hw *ah) - ah->config.spurchans[i][1] = AR_NO_SPUR; - } - -+ if (ah->hw_version.devid != AR2427_DEVID_PCIE) -+ ah->config.ht_enable = 1; -+ else -+ ah->config.ht_enable = 0; -+ - ah->config.intr_mitigation = true; - - /* -@@ -590,6 +594,7 @@ static bool ath9k_hw_devid_supported(u16 devid) - case AR5416_DEVID_AR9287_PCI: - case AR5416_DEVID_AR9287_PCIE: - case AR9271_USB: -+ case AR2427_DEVID_PCIE: - return true; - default: - break; -diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h -index e2b0c73..33a28ec 100644 ---- a/drivers/net/wireless/ath/ath9k/hw.h -+++ b/drivers/net/wireless/ath/ath9k/hw.h -@@ -40,6 +40,7 @@ - #define AR9280_DEVID_PCI 0x0029 - #define AR9280_DEVID_PCIE 0x002a - #define AR9285_DEVID_PCIE 0x002b -+#define AR2427_DEVID_PCIE 0x002c - - #define AR5416_AR9100_DEVID 0x000b - -diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c -index 4faafbd..33a1071 100644 ---- a/drivers/net/wireless/ath/ath9k/main.c -+++ b/drivers/net/wireless/ath/ath9k/main.c -@@ -1854,11 +1854,14 @@ void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw) - hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | - IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | - IEEE80211_HW_SIGNAL_DBM | -- IEEE80211_HW_AMPDU_AGGREGATION | - IEEE80211_HW_SUPPORTS_PS | - IEEE80211_HW_PS_NULLFUNC_STACK | -+ IEEE80211_HW_REPORTS_TX_ACK_STATUS | - IEEE80211_HW_SPECTRUM_MGMT; - -+ if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) -+ hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; -+ - if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || modparam_nohwcrypt) - hw->flags |= IEEE80211_HW_MFP_CAPABLE; - -@@ -2679,6 +2682,19 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw, - mutex_unlock(&sc->mutex); - } - -+void ath9k_enable_ps(struct ath_softc *sc) -+{ -+ sc->ps_enabled = true; -+ if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { -+ if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) { -+ sc->imask |= ATH9K_INT_TIM_TIMER; -+ ath9k_hw_set_interrupts(sc->sc_ah, -+ sc->imask); -+ } -+ } -+ ath9k_hw_setrxabort(sc->sc_ah, 1); -+} -+ - static int ath9k_config(struct ieee80211_hw *hw, u32 changed) - { - struct ath_wiphy *aphy = hw->priv; -@@ -2732,22 +2748,13 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) - if (changed & IEEE80211_CONF_CHANGE_PS) { - if (conf->flags & IEEE80211_CONF_PS) { - sc->sc_flags |= SC_OP_PS_ENABLED; -- if (!(ah->caps.hw_caps & -- ATH9K_HW_CAP_AUTOSLEEP)) { -- if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) { -- sc->imask |= ATH9K_INT_TIM_TIMER; -- ath9k_hw_set_interrupts(sc->sc_ah, -- sc->imask); -- } -- } - /* - * At this point we know hardware has received an ACK - * of a previously sent null data frame. - */ - if ((sc->sc_flags & SC_OP_NULLFUNC_COMPLETED)) { - sc->sc_flags &= ~SC_OP_NULLFUNC_COMPLETED; -- sc->ps_enabled = true; -- ath9k_hw_setrxabort(sc->sc_ah, 1); -+ ath9k_enable_ps(sc); - } - } else { - sc->ps_enabled = false; -diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c -index f7af5ea..199c54a 100644 ---- a/drivers/net/wireless/ath/ath9k/pci.c -+++ b/drivers/net/wireless/ath/ath9k/pci.c -@@ -25,6 +25,7 @@ static struct pci_device_id ath_pci_id_table[] __devinitdata = { - { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */ - { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */ - { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */ -+ { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */ - { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */ - { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */ - { 0 } -diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c -index 1d6cf7d..171ce2b 100644 ---- a/drivers/net/wireless/ath/ath9k/rc.c -+++ b/drivers/net/wireless/ath/ath9k/rc.c -@@ -1323,7 +1323,7 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband, - - static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband, - struct ieee80211_sta *sta, void *priv_sta, -- u32 changed) -+ u32 changed, enum nl80211_channel_type oper_chan_type) - { - struct ath_softc *sc = priv; - struct ath_rate_priv *ath_rc_priv = priv_sta; -@@ -1340,8 +1340,8 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband, - if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION) - return; - -- if (sc->hw->conf.channel_type == NL80211_CHAN_HT40MINUS || -- sc->hw->conf.channel_type == NL80211_CHAN_HT40PLUS) -+ if (oper_chan_type == NL80211_CHAN_HT40MINUS || -+ oper_chan_type == NL80211_CHAN_HT40PLUS) - oper_cw40 = true; - - oper_sgi40 = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? -diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c -index 29bf336..c3ce920 100644 ---- a/drivers/net/wireless/ath/ath9k/xmit.c -+++ b/drivers/net/wireless/ath/ath9k/xmit.c -@@ -1353,25 +1353,6 @@ static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb) - return htype; - } - --static bool is_pae(struct sk_buff *skb) --{ -- struct ieee80211_hdr *hdr; -- __le16 fc; -- -- hdr = (struct ieee80211_hdr *)skb->data; -- fc = hdr->frame_control; -- -- if (ieee80211_is_data(fc)) { -- if (ieee80211_is_nullfunc(fc) || -- /* Port Access Entity (IEEE 802.1X) */ -- (skb->protocol == cpu_to_be16(ETH_P_PAE))) { -- return true; -- } -- } -- -- return false; --} -- - static int get_hw_crypto_keytype(struct sk_buff *skb) - { - struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); -@@ -1701,7 +1682,7 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf, - goto tx_done; - } - -- if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && !is_pae(skb)) { -+ if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { - /* - * Try aggregation if it's a unicast data frame - * and the destination is HT capable. -@@ -2053,10 +2034,9 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) - */ - if (bf->bf_isnullfunc && - (ds->ds_txstat.ts_status & ATH9K_TX_ACKED)) { -- if ((sc->sc_flags & SC_OP_PS_ENABLED)) { -- sc->ps_enabled = true; -- ath9k_hw_setrxabort(sc->sc_ah, 1); -- } else -+ if ((sc->sc_flags & SC_OP_PS_ENABLED)) -+ ath9k_enable_ps(sc); -+ else - sc->sc_flags |= SC_OP_NULLFUNC_COMPLETED; - } - -@@ -2264,7 +2244,7 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an) - if (ATH_TXQ_SETUP(sc, i)) { - txq = &sc->tx.txq[i]; - -- spin_lock(&txq->axq_lock); -+ spin_lock_bh(&txq->axq_lock); - - list_for_each_entry_safe(ac, - ac_tmp, &txq->axq_acq, list) { -@@ -2285,7 +2265,7 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an) - } - } - -- spin_unlock(&txq->axq_lock); -+ spin_unlock_bh(&txq->axq_lock); - } - } - } -diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c -index b59166c..629c166 100644 ---- a/drivers/net/wireless/b43/main.c -+++ b/drivers/net/wireless/b43/main.c -@@ -852,19 +852,16 @@ static void b43_op_update_tkip_key(struct ieee80211_hw *hw, - if (B43_WARN_ON(!modparam_hwtkip)) - return; - -- mutex_lock(&wl->mutex); -- -+ /* This is only called from the RX path through mac80211, where -+ * our mutex is already locked. */ -+ B43_WARN_ON(!mutex_is_locked(&wl->mutex)); - dev = wl->current_dev; -- if (!dev || b43_status(dev) < B43_STAT_INITIALIZED) -- goto out_unlock; -+ B43_WARN_ON(!dev || b43_status(dev) < B43_STAT_INITIALIZED); - - keymac_write(dev, index, NULL); /* First zero out mac to avoid race */ - - rx_tkip_phase1_write(dev, index, iv32, phase1key); - keymac_write(dev, index, addr); -- --out_unlock: -- mutex_unlock(&wl->mutex); - } - - static void do_key_write(struct b43_wldev *dev, -diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c -index 234891d..e955515 100644 ---- a/drivers/net/wireless/iwlwifi/iwl-3945.c -+++ b/drivers/net/wireless/iwlwifi/iwl-3945.c -@@ -2474,11 +2474,9 @@ int iwl3945_hw_set_hw_params(struct iwl_priv *priv) - memset((void *)&priv->hw_params, 0, - sizeof(struct iwl_hw_params)); - -- priv->shared_virt = -- pci_alloc_consistent(priv->pci_dev, -- sizeof(struct iwl3945_shared), -- &priv->shared_phys); -- -+ priv->shared_virt = dma_alloc_coherent(&priv->pci_dev->dev, -+ sizeof(struct iwl3945_shared), -+ &priv->shared_phys, GFP_KERNEL); - if (!priv->shared_virt) { - IWL_ERR(priv, "failed to allocate pci memory\n"); - mutex_unlock(&priv->mutex); -diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c -index f36f804..6e9e156 100644 ---- a/drivers/net/wireless/iwlwifi/iwl-core.c -+++ b/drivers/net/wireless/iwlwifi/iwl-core.c -@@ -1658,9 +1658,9 @@ EXPORT_SYMBOL(iwl_set_tx_power); - void iwl_free_isr_ict(struct iwl_priv *priv) - { - if (priv->ict_tbl_vir) { -- pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) + -- PAGE_SIZE, priv->ict_tbl_vir, -- priv->ict_tbl_dma); -+ dma_free_coherent(&priv->pci_dev->dev, -+ (sizeof(u32) * ICT_COUNT) + PAGE_SIZE, -+ priv->ict_tbl_vir, priv->ict_tbl_dma); - priv->ict_tbl_vir = NULL; - } - } -@@ -1676,9 +1676,9 @@ int iwl_alloc_isr_ict(struct iwl_priv *priv) - if (priv->cfg->use_isr_legacy) - return 0; - /* allocate shrared data table */ -- priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) * -- ICT_COUNT) + PAGE_SIZE, -- &priv->ict_tbl_dma); -+ priv->ict_tbl_vir = dma_alloc_coherent(&priv->pci_dev->dev, -+ (sizeof(u32) * ICT_COUNT) + PAGE_SIZE, -+ &priv->ict_tbl_dma, GFP_KERNEL); - if (!priv->ict_tbl_vir) - return -ENOMEM; - -diff --git a/drivers/net/wireless/iwlwifi/iwl-helpers.h b/drivers/net/wireless/iwlwifi/iwl-helpers.h -index bd0b12e..f8481e8 100644 ---- a/drivers/net/wireless/iwlwifi/iwl-helpers.h -+++ b/drivers/net/wireless/iwlwifi/iwl-helpers.h -@@ -80,8 +80,8 @@ static inline void iwl_free_fw_desc(struct pci_dev *pci_dev, - struct fw_desc *desc) - { - if (desc->v_addr) -- pci_free_consistent(pci_dev, desc->len, -- desc->v_addr, desc->p_addr); -+ dma_free_coherent(&pci_dev->dev, desc->len, -+ desc->v_addr, desc->p_addr); - desc->v_addr = NULL; - desc->len = 0; - } -@@ -89,7 +89,8 @@ static inline void iwl_free_fw_desc(struct pci_dev *pci_dev, - static inline int iwl_alloc_fw_desc(struct pci_dev *pci_dev, - struct fw_desc *desc) - { -- desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr); -+ desc->v_addr = dma_alloc_coherent(&pci_dev->dev, desc->len, -+ &desc->p_addr, GFP_KERNEL); - return (desc->v_addr != NULL) ? 0 : -ENOMEM; - } - -diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c -index 2dbce85..4ac16d9 100644 ---- a/drivers/net/wireless/iwlwifi/iwl-rx.c -+++ b/drivers/net/wireless/iwlwifi/iwl-rx.c -@@ -350,10 +350,10 @@ void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq) - } - } - -- pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, -- rxq->dma_addr); -- pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status), -- rxq->rb_stts, rxq->rb_stts_dma); -+ dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, -+ rxq->dma_addr); -+ dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status), -+ rxq->rb_stts, rxq->rb_stts_dma); - rxq->bd = NULL; - rxq->rb_stts = NULL; - } -@@ -362,7 +362,7 @@ EXPORT_SYMBOL(iwl_rx_queue_free); - int iwl_rx_queue_alloc(struct iwl_priv *priv) - { - struct iwl_rx_queue *rxq = &priv->rxq; -- struct pci_dev *dev = priv->pci_dev; -+ struct device *dev = &priv->pci_dev->dev; - int i; - - spin_lock_init(&rxq->lock); -@@ -370,12 +370,13 @@ int iwl_rx_queue_alloc(struct iwl_priv *priv) - INIT_LIST_HEAD(&rxq->rx_used); - - /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */ -- rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr); -+ rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr, -+ GFP_KERNEL); - if (!rxq->bd) - goto err_bd; - -- rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status), -- &rxq->rb_stts_dma); -+ rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status), -+ &rxq->rb_stts_dma, GFP_KERNEL); - if (!rxq->rb_stts) - goto err_rb; - -@@ -392,8 +393,8 @@ int iwl_rx_queue_alloc(struct iwl_priv *priv) - return 0; - - err_rb: -- pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, -- rxq->dma_addr); -+ dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, -+ rxq->dma_addr); - err_bd: - return -ENOMEM; - } -diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c -index 8f40715..88470fb 100644 ---- a/drivers/net/wireless/iwlwifi/iwl-tx.c -+++ b/drivers/net/wireless/iwlwifi/iwl-tx.c -@@ -60,7 +60,8 @@ static const u16 default_tid_to_tx_fifo[] = { - static inline int iwl_alloc_dma_ptr(struct iwl_priv *priv, - struct iwl_dma_ptr *ptr, size_t size) - { -- ptr->addr = pci_alloc_consistent(priv->pci_dev, size, &ptr->dma); -+ ptr->addr = dma_alloc_coherent(&priv->pci_dev->dev, size, &ptr->dma, -+ GFP_KERNEL); - if (!ptr->addr) - return -ENOMEM; - ptr->size = size; -@@ -73,7 +74,7 @@ static inline void iwl_free_dma_ptr(struct iwl_priv *priv, - if (unlikely(!ptr->addr)) - return; - -- pci_free_consistent(priv->pci_dev, ptr->size, ptr->addr, ptr->dma); -+ dma_free_coherent(&priv->pci_dev->dev, ptr->size, ptr->addr, ptr->dma); - memset(ptr, 0, sizeof(*ptr)); - } - -@@ -126,7 +127,7 @@ void iwl_free_tfds_in_queue(struct iwl_priv *priv, - if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed) - priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; - else { -- IWL_ERR(priv, "free more than tfds_in_queue (%u:%d)\n", -+ IWL_DEBUG_TX(priv, "free more than tfds_in_queue (%u:%d)\n", - priv->stations[sta_id].tid[tid].tfds_in_queue, - freed); - priv->stations[sta_id].tid[tid].tfds_in_queue = 0; -@@ -146,7 +147,7 @@ void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id) - { - struct iwl_tx_queue *txq = &priv->txq[txq_id]; - struct iwl_queue *q = &txq->q; -- struct pci_dev *dev = priv->pci_dev; -+ struct device *dev = &priv->pci_dev->dev; - int i; - - if (q->n_bd == 0) -@@ -163,8 +164,8 @@ void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id) - - /* De-alloc circular buffer of TFDs */ - if (txq->q.n_bd) -- pci_free_consistent(dev, priv->hw_params.tfd_size * -- txq->q.n_bd, txq->tfds, txq->q.dma_addr); -+ dma_free_coherent(dev, priv->hw_params.tfd_size * -+ txq->q.n_bd, txq->tfds, txq->q.dma_addr); - - /* De-alloc array of per-TFD driver data */ - kfree(txq->txb); -@@ -193,7 +194,7 @@ void iwl_cmd_queue_free(struct iwl_priv *priv) - { - struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; - struct iwl_queue *q = &txq->q; -- struct pci_dev *dev = priv->pci_dev; -+ struct device *dev = &priv->pci_dev->dev; - int i; - - if (q->n_bd == 0) -@@ -205,8 +206,8 @@ void iwl_cmd_queue_free(struct iwl_priv *priv) - - /* De-alloc circular buffer of TFDs */ - if (txq->q.n_bd) -- pci_free_consistent(dev, priv->hw_params.tfd_size * -- txq->q.n_bd, txq->tfds, txq->q.dma_addr); -+ dma_free_coherent(dev, priv->hw_params.tfd_size * txq->q.n_bd, -+ txq->tfds, txq->q.dma_addr); - - /* deallocate arrays */ - kfree(txq->cmd); -@@ -297,7 +298,7 @@ static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q, - static int iwl_tx_queue_alloc(struct iwl_priv *priv, - struct iwl_tx_queue *txq, u32 id) - { -- struct pci_dev *dev = priv->pci_dev; -+ struct device *dev = &priv->pci_dev->dev; - size_t tfd_sz = priv->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX; - - /* Driver private data, only for Tx (not command) queues, -@@ -316,8 +317,8 @@ static int iwl_tx_queue_alloc(struct iwl_priv *priv, - - /* Circular buffer of transmit frame descriptors (TFDs), - * shared with device */ -- txq->tfds = pci_alloc_consistent(dev, tfd_sz, &txq->q.dma_addr); -- -+ txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, -+ GFP_KERNEL); - if (!txq->tfds) { - IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n", tfd_sz); - goto error; -diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c -index f8e4e4b..f297865 100644 ---- a/drivers/net/wireless/iwlwifi/iwl3945-base.c -+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c -@@ -352,10 +352,10 @@ static int iwl3945_send_beacon_cmd(struct iwl_priv *priv) - static void iwl3945_unset_hw_params(struct iwl_priv *priv) - { - if (priv->shared_virt) -- pci_free_consistent(priv->pci_dev, -- sizeof(struct iwl3945_shared), -- priv->shared_virt, -- priv->shared_phys); -+ dma_free_coherent(&priv->pci_dev->dev, -+ sizeof(struct iwl3945_shared), -+ priv->shared_virt, -+ priv->shared_phys); - } - - static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv, -@@ -1253,10 +1253,10 @@ static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rx - } - } - -- pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, -- rxq->dma_addr); -- pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status), -- rxq->rb_stts, rxq->rb_stts_dma); -+ dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, -+ rxq->dma_addr); -+ dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status), -+ rxq->rb_stts, rxq->rb_stts_dma); - rxq->bd = NULL; - rxq->rb_stts = NULL; - } -diff --git a/drivers/net/wireless/wl12xx/wl1251_debugfs.c b/drivers/net/wireless/wl12xx/wl1251_debugfs.c -index a007230..1685c09 100644 ---- a/drivers/net/wireless/wl12xx/wl1251_debugfs.c -+++ b/drivers/net/wireless/wl12xx/wl1251_debugfs.c -@@ -443,7 +443,8 @@ out: - - void wl1251_debugfs_reset(struct wl1251 *wl) - { -- memset(wl->stats.fw_stats, 0, sizeof(*wl->stats.fw_stats)); -+ if (wl->stats.fw_stats != NULL) -+ memset(wl->stats.fw_stats, 0, sizeof(*wl->stats.fw_stats)); - wl->stats.retry_count = 0; - wl->stats.excessive_retries = 0; - } -diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c -index 315fea4..3245d33 100644 ---- a/drivers/pci/pci.c -+++ b/drivers/pci/pci.c -@@ -2421,18 +2421,17 @@ EXPORT_SYMBOL_GPL(pci_reset_function); - */ - int pcix_get_max_mmrbc(struct pci_dev *dev) - { -- int err, cap; -+ int cap; - u32 stat; - - cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); - if (!cap) - return -EINVAL; - -- err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat); -- if (err) -+ if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat)) - return -EINVAL; - -- return (stat & PCI_X_STATUS_MAX_READ) >> 12; -+ return 512 << ((stat & PCI_X_STATUS_MAX_READ) >> 21); - } - EXPORT_SYMBOL(pcix_get_max_mmrbc); - -@@ -2445,18 +2444,17 @@ EXPORT_SYMBOL(pcix_get_max_mmrbc); - */ - int pcix_get_mmrbc(struct pci_dev *dev) - { -- int ret, cap; -- u32 cmd; -+ int cap; -+ u16 cmd; - - cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); - if (!cap) - return -EINVAL; - -- ret = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd); -- if (!ret) -- ret = 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2); -+ if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd)) -+ return -EINVAL; - -- return ret; -+ return 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2); - } - EXPORT_SYMBOL(pcix_get_mmrbc); - -@@ -2471,28 +2469,27 @@ EXPORT_SYMBOL(pcix_get_mmrbc); - */ - int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc) - { -- int cap, err = -EINVAL; -- u32 stat, cmd, v, o; -+ int cap; -+ u32 stat, v, o; -+ u16 cmd; - - if (mmrbc < 512 || mmrbc > 4096 || !is_power_of_2(mmrbc)) -- goto out; -+ return -EINVAL; - - v = ffs(mmrbc) - 10; - - cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); - if (!cap) -- goto out; -+ return -EINVAL; - -- err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat); -- if (err) -- goto out; -+ if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat)) -+ return -EINVAL; - - if (v > (stat & PCI_X_STATUS_MAX_READ) >> 21) - return -E2BIG; - -- err = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd); -- if (err) -- goto out; -+ if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd)) -+ return -EINVAL; - - o = (cmd & PCI_X_CMD_MAX_READ) >> 2; - if (o != v) { -@@ -2502,10 +2499,10 @@ int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc) - - cmd &= ~PCI_X_CMD_MAX_READ; - cmd |= v << 2; -- err = pci_write_config_dword(dev, cap + PCI_X_CMD, cmd); -+ if (pci_write_config_word(dev, cap + PCI_X_CMD, cmd)) -+ return -EIO; - } --out: -- return err; -+ return 0; - } - EXPORT_SYMBOL(pcix_set_mmrbc); - -diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c -index d58b940..456c265 100644 ---- a/drivers/pci/quirks.c -+++ b/drivers/pci/quirks.c -@@ -2534,6 +2534,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, quirk_i82576_sriov); - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e8, quirk_i82576_sriov); - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150a, quirk_i82576_sriov); - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150d, quirk_i82576_sriov); -+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1518, quirk_i82576_sriov); - - #endif /* CONFIG_PCI_IOV */ - -diff --git a/drivers/platform/x86/classmate-laptop.c b/drivers/platform/x86/classmate-laptop.c -index ed90082..8cb20e4 100644 ---- a/drivers/platform/x86/classmate-laptop.c -+++ b/drivers/platform/x86/classmate-laptop.c -@@ -34,6 +34,11 @@ struct cmpc_accel { - #define CMPC_ACCEL_SENSITIVITY_DEFAULT 5 - - -+#define CMPC_ACCEL_HID "ACCE0000" -+#define CMPC_TABLET_HID "TBLT0000" -+#define CMPC_BL_HID "IPML200" -+#define CMPC_KEYS_HID "FnBT0000" -+ - /* - * Generic input device code. - */ -@@ -282,10 +287,9 @@ static int cmpc_accel_remove(struct acpi_device *acpi, int type) - } - - static const struct acpi_device_id cmpc_accel_device_ids[] = { -- {"ACCE0000", 0}, -+ {CMPC_ACCEL_HID, 0}, - {"", 0} - }; --MODULE_DEVICE_TABLE(acpi, cmpc_accel_device_ids); - - static struct acpi_driver cmpc_accel_acpi_driver = { - .owner = THIS_MODULE, -@@ -366,10 +370,9 @@ static int cmpc_tablet_resume(struct acpi_device *acpi) - } - - static const struct acpi_device_id cmpc_tablet_device_ids[] = { -- {"TBLT0000", 0}, -+ {CMPC_TABLET_HID, 0}, - {"", 0} - }; --MODULE_DEVICE_TABLE(acpi, cmpc_tablet_device_ids); - - static struct acpi_driver cmpc_tablet_acpi_driver = { - .owner = THIS_MODULE, -@@ -477,17 +480,16 @@ static int cmpc_bl_remove(struct acpi_device *acpi, int type) - return 0; - } - --static const struct acpi_device_id cmpc_device_ids[] = { -- {"IPML200", 0}, -+static const struct acpi_device_id cmpc_bl_device_ids[] = { -+ {CMPC_BL_HID, 0}, - {"", 0} - }; --MODULE_DEVICE_TABLE(acpi, cmpc_device_ids); - - static struct acpi_driver cmpc_bl_acpi_driver = { - .owner = THIS_MODULE, - .name = "cmpc", - .class = "cmpc", -- .ids = cmpc_device_ids, -+ .ids = cmpc_bl_device_ids, - .ops = { - .add = cmpc_bl_add, - .remove = cmpc_bl_remove -@@ -540,10 +542,9 @@ static int cmpc_keys_remove(struct acpi_device *acpi, int type) - } - - static const struct acpi_device_id cmpc_keys_device_ids[] = { -- {"FnBT0000", 0}, -+ {CMPC_KEYS_HID, 0}, - {"", 0} - }; --MODULE_DEVICE_TABLE(acpi, cmpc_keys_device_ids); - - static struct acpi_driver cmpc_keys_acpi_driver = { - .owner = THIS_MODULE, -@@ -607,3 +608,13 @@ static void cmpc_exit(void) - - module_init(cmpc_init); - module_exit(cmpc_exit); -+ -+static const struct acpi_device_id cmpc_device_ids[] = { -+ {CMPC_ACCEL_HID, 0}, -+ {CMPC_TABLET_HID, 0}, -+ {CMPC_BL_HID, 0}, -+ {CMPC_KEYS_HID, 0}, -+ {"", 0} -+}; -+ -+MODULE_DEVICE_TABLE(acpi, cmpc_device_ids); -diff --git a/drivers/scsi/qlogicpti.c b/drivers/scsi/qlogicpti.c -index fa34b92..1b82170 100644 ---- a/drivers/scsi/qlogicpti.c -+++ b/drivers/scsi/qlogicpti.c -@@ -738,7 +738,7 @@ static int __devinit qpti_register_irq(struct qlogicpti *qpti) - * sanely maintain. - */ - if (request_irq(qpti->irq, qpti_intr, -- IRQF_SHARED, "Qlogic/PTI", qpti)) -+ IRQF_SHARED, "QlogicPTI", qpti)) - goto fail; - - printk("qlogicpti%d: IRQ %d ", qpti->qpti_id, qpti->irq); -diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c -index 653f22a..bb8fd5b 100644 ---- a/drivers/scsi/scsi_transport_fc.c -+++ b/drivers/scsi/scsi_transport_fc.c -@@ -1216,6 +1216,15 @@ store_fc_vport_delete(struct device *dev, struct device_attribute *attr, - { - struct fc_vport *vport = transport_class_to_vport(dev); - struct Scsi_Host *shost = vport_to_shost(vport); -+ unsigned long flags; -+ -+ spin_lock_irqsave(shost->host_lock, flags); -+ if (vport->flags & (FC_VPORT_DEL | FC_VPORT_CREATING)) { -+ spin_unlock_irqrestore(shost->host_lock, flags); -+ return -EBUSY; -+ } -+ vport->flags |= FC_VPORT_DELETING; -+ spin_unlock_irqrestore(shost->host_lock, flags); - - fc_queue_work(shost, &vport->vport_delete_work); - return count; -@@ -1805,6 +1814,9 @@ store_fc_host_vport_delete(struct device *dev, struct device_attribute *attr, - list_for_each_entry(vport, &fc_host->vports, peers) { - if ((vport->channel == 0) && - (vport->port_name == wwpn) && (vport->node_name == wwnn)) { -+ if (vport->flags & (FC_VPORT_DEL | FC_VPORT_CREATING)) -+ break; -+ vport->flags |= FC_VPORT_DELETING; - match = 1; - break; - } -@@ -3354,18 +3366,6 @@ fc_vport_terminate(struct fc_vport *vport) - unsigned long flags; - int stat; - -- spin_lock_irqsave(shost->host_lock, flags); -- if (vport->flags & FC_VPORT_CREATING) { -- spin_unlock_irqrestore(shost->host_lock, flags); -- return -EBUSY; -- } -- if (vport->flags & (FC_VPORT_DEL)) { -- spin_unlock_irqrestore(shost->host_lock, flags); -- return -EALREADY; -- } -- vport->flags |= FC_VPORT_DELETING; -- spin_unlock_irqrestore(shost->host_lock, flags); -- - if (i->f->vport_delete) - stat = i->f->vport_delete(vport); - else -diff --git a/drivers/scsi/ses.c b/drivers/scsi/ses.c -index 55b034b..3c8a024 100644 ---- a/drivers/scsi/ses.c -+++ b/drivers/scsi/ses.c -@@ -591,8 +591,6 @@ static int ses_intf_add(struct device *cdev, - ses_dev->page10_len = len; - buf = NULL; - } -- kfree(hdr_buf); -- - scomp = kzalloc(sizeof(struct ses_component) * components, GFP_KERNEL); - if (!scomp) - goto err_free; -@@ -604,6 +602,8 @@ static int ses_intf_add(struct device *cdev, - goto err_free; - } - -+ kfree(hdr_buf); -+ - edev->scratch = ses_dev; - for (i = 0; i < components; i++) - edev->component[i].scratch = scomp + i; -diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c -index a678186..4fd67d6 100644 ---- a/drivers/usb/core/devio.c -+++ b/drivers/usb/core/devio.c -@@ -1176,6 +1176,13 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb, - free_async(as); - return -ENOMEM; - } -+ /* Isochronous input data may end up being discontiguous -+ * if some of the packets are short. Clear the buffer so -+ * that the gaps don't leak kernel data to userspace. -+ */ -+ if (is_in && uurb->type == USBDEVFS_URB_TYPE_ISO) -+ memset(as->urb->transfer_buffer, 0, -+ uurb->buffer_length); - } - as->urb->dev = ps->dev; - as->urb->pipe = (uurb->type << 30) | -@@ -1312,10 +1319,14 @@ static int processcompl(struct async *as, void __user * __user *arg) - void __user *addr = as->userurb; - unsigned int i; - -- if (as->userbuffer && urb->actual_length) -- if (copy_to_user(as->userbuffer, urb->transfer_buffer, -- urb->actual_length)) -+ if (as->userbuffer && urb->actual_length) { -+ if (urb->number_of_packets > 0) /* Isochronous */ -+ i = urb->transfer_buffer_length; -+ else /* Non-Isoc */ -+ i = urb->actual_length; -+ if (copy_to_user(as->userbuffer, urb->transfer_buffer, i)) - goto err_out; -+ } - if (put_user(as->status, &userurb->status)) - goto err_out; - if (put_user(urb->actual_length, &userurb->actual_length)) -diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c -index 1ec3857..9c90b67 100644 ---- a/drivers/usb/host/ehci-hcd.c -+++ b/drivers/usb/host/ehci-hcd.c -@@ -995,7 +995,7 @@ rescan: - /* endpoints can be iso streams. for now, we don't - * accelerate iso completions ... so spin a while. - */ -- if (qh->hw->hw_info1 == 0) { -+ if (qh->hw == NULL) { - ehci_vdbg (ehci, "iso delay\n"); - goto idle_timeout; - } -diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c -index 1e391e6..df533ce 100644 ---- a/drivers/usb/host/ehci-sched.c -+++ b/drivers/usb/host/ehci-sched.c -@@ -1121,8 +1121,8 @@ iso_stream_find (struct ehci_hcd *ehci, struct urb *urb) - urb->interval); - } - -- /* if dev->ep [epnum] is a QH, info1.maxpacket is nonzero */ -- } else if (unlikely (stream->hw_info1 != 0)) { -+ /* if dev->ep [epnum] is a QH, hw is set */ -+ } else if (unlikely (stream->hw != NULL)) { - ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n", - urb->dev->devpath, epnum, - usb_pipein(urb->pipe) ? "in" : "out"); -@@ -1563,13 +1563,27 @@ itd_patch( - static inline void - itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd) - { -- /* always prepend ITD/SITD ... only QH tree is order-sensitive */ -- itd->itd_next = ehci->pshadow [frame]; -- itd->hw_next = ehci->periodic [frame]; -- ehci->pshadow [frame].itd = itd; -+ union ehci_shadow *prev = &ehci->pshadow[frame]; -+ __hc32 *hw_p = &ehci->periodic[frame]; -+ union ehci_shadow here = *prev; -+ __hc32 type = 0; -+ -+ /* skip any iso nodes which might belong to previous microframes */ -+ while (here.ptr) { -+ type = Q_NEXT_TYPE(ehci, *hw_p); -+ if (type == cpu_to_hc32(ehci, Q_TYPE_QH)) -+ break; -+ prev = periodic_next_shadow(ehci, prev, type); -+ hw_p = shadow_next_periodic(ehci, &here, type); -+ here = *prev; -+ } -+ -+ itd->itd_next = here; -+ itd->hw_next = *hw_p; -+ prev->itd = itd; - itd->frame = frame; - wmb (); -- ehci->periodic[frame] = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD); -+ *hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD); - } - - /* fit urb's itds into the selected schedule slot; activate as needed */ -diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h -index 2d85e21..b1dce96 100644 ---- a/drivers/usb/host/ehci.h -+++ b/drivers/usb/host/ehci.h -@@ -394,9 +394,8 @@ struct ehci_iso_sched { - * acts like a qh would, if EHCI had them for ISO. - */ - struct ehci_iso_stream { -- /* first two fields match QH, but info1 == 0 */ -- __hc32 hw_next; -- __hc32 hw_info1; -+ /* first field matches ehci_hq, but is NULL */ -+ struct ehci_qh_hw *hw; - - u32 refcount; - u8 bEndpointAddress; -diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c -index bee558a..f71a73a 100644 ---- a/drivers/usb/host/r8a66597-hcd.c -+++ b/drivers/usb/host/r8a66597-hcd.c -@@ -418,7 +418,7 @@ static u8 alloc_usb_address(struct r8a66597 *r8a66597, struct urb *urb) - - /* this function must be called with interrupt disabled */ - static void free_usb_address(struct r8a66597 *r8a66597, -- struct r8a66597_device *dev) -+ struct r8a66597_device *dev, int reset) - { - int port; - -@@ -430,7 +430,13 @@ static void free_usb_address(struct r8a66597 *r8a66597, - dev->state = USB_STATE_DEFAULT; - r8a66597->address_map &= ~(1 << dev->address); - dev->address = 0; -- dev_set_drvdata(&dev->udev->dev, NULL); -+ /* -+ * Only when resetting USB, it is necessary to erase drvdata. When -+ * a usb device with usb hub is disconnect, "dev->udev" is already -+ * freed on usb_desconnect(). So we cannot access the data. -+ */ -+ if (reset) -+ dev_set_drvdata(&dev->udev->dev, NULL); - list_del(&dev->device_list); - kfree(dev); - -@@ -1069,7 +1075,7 @@ static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597, int port) - struct r8a66597_device *dev = r8a66597->root_hub[port].dev; - - disable_r8a66597_pipe_all(r8a66597, dev); -- free_usb_address(r8a66597, dev); -+ free_usb_address(r8a66597, dev, 0); - - start_root_hub_sampling(r8a66597, port, 0); - } -@@ -2085,7 +2091,7 @@ static void update_usb_address_map(struct r8a66597 *r8a66597, - spin_lock_irqsave(&r8a66597->lock, flags); - dev = get_r8a66597_device(r8a66597, addr); - disable_r8a66597_pipe_all(r8a66597, dev); -- free_usb_address(r8a66597, dev); -+ free_usb_address(r8a66597, dev, 0); - put_child_connect_map(r8a66597, addr); - spin_unlock_irqrestore(&r8a66597->lock, flags); - } -@@ -2228,7 +2234,7 @@ static int r8a66597_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, - rh->port |= (1 << USB_PORT_FEAT_RESET); - - disable_r8a66597_pipe_all(r8a66597, dev); -- free_usb_address(r8a66597, dev); -+ free_usb_address(r8a66597, dev, 1); - - r8a66597_mdfy(r8a66597, USBRST, USBRST | UACT, - get_dvstctr_reg(port)); -diff --git a/drivers/usb/host/xhci-hcd.c b/drivers/usb/host/xhci-hcd.c -index 5e92c72..fa920c7 100644 ---- a/drivers/usb/host/xhci-hcd.c -+++ b/drivers/usb/host/xhci-hcd.c -@@ -1173,6 +1173,7 @@ static int xhci_configure_endpoint(struct xhci_hcd *xhci, - cmd_completion = &virt_dev->cmd_completion; - cmd_status = &virt_dev->cmd_status; - } -+ init_completion(cmd_completion); - - if (!ctx_change) - ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma, -diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c -index 34acf6c..ca9e3ba 100644 ---- a/drivers/usb/serial/ftdi_sio.c -+++ b/drivers/usb/serial/ftdi_sio.c -@@ -658,6 +658,7 @@ static struct usb_device_id id_table_combined [] = { - { USB_DEVICE(EVOLUTION_VID, EVOLUTION_ER1_PID) }, - { USB_DEVICE(EVOLUTION_VID, EVO_HYBRID_PID) }, - { USB_DEVICE(EVOLUTION_VID, EVO_RCM4_PID) }, -+ { USB_DEVICE(CONTEC_VID, CONTEC_COM1USBH_PID) }, - { USB_DEVICE(FTDI_VID, FTDI_ARTEMIS_PID) }, - { USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16_PID) }, - { USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16C_PID) }, -diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h -index d10b5a8..8f9e805 100644 ---- a/drivers/usb/serial/ftdi_sio_ids.h -+++ b/drivers/usb/serial/ftdi_sio_ids.h -@@ -501,6 +501,13 @@ - #define CONTEC_COM1USBH_PID 0x8311 /* COM-1(USB)H */ - - /* -+ * Contec products (http://www.contec.com) -+ * Submitted by Daniel Sangorrin -+ */ -+#define CONTEC_VID 0x06CE /* Vendor ID */ -+#define CONTEC_COM1USBH_PID 0x8311 /* COM-1(USB)H */ -+ -+/* - * Definitions for B&B Electronics products. - */ - #define BANDB_VID 0x0856 /* B&B Electronics Vendor ID */ -diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c -index 6e94a67..d93283d 100644 ---- a/drivers/usb/serial/option.c -+++ b/drivers/usb/serial/option.c -@@ -288,7 +288,9 @@ static int option_resume(struct usb_serial *serial); - - #define QUALCOMM_VENDOR_ID 0x05C6 - --#define MAXON_VENDOR_ID 0x16d8 -+#define CMOTECH_VENDOR_ID 0x16d8 -+#define CMOTECH_PRODUCT_6008 0x6008 -+#define CMOTECH_PRODUCT_6280 0x6280 - - #define TELIT_VENDOR_ID 0x1bc7 - #define TELIT_PRODUCT_UC864E 0x1003 -@@ -520,7 +522,8 @@ static struct usb_device_id option_ids[] = { - { USB_DEVICE(KYOCERA_VENDOR_ID, KYOCERA_PRODUCT_KPC680) }, - { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6000)}, /* ZTE AC8700 */ - { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */ -- { USB_DEVICE(MAXON_VENDOR_ID, 0x6280) }, /* BP3-USB & BP3-EXT HSDPA */ -+ { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6280) }, /* BP3-USB & BP3-EXT HSDPA */ -+ { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6008) }, - { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) }, - { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864G) }, - { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF622, 0xff, 0xff, 0xff) }, /* ZTE WCDMA products */ -diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c -index 7528b8d..8ab4ab2 100644 ---- a/drivers/usb/serial/qcserial.c -+++ b/drivers/usb/serial/qcserial.c -@@ -47,6 +47,35 @@ static struct usb_device_id id_table[] = { - {USB_DEVICE(0x05c6, 0x9221)}, /* Generic Gobi QDL device */ - {USB_DEVICE(0x05c6, 0x9231)}, /* Generic Gobi QDL device */ - {USB_DEVICE(0x1f45, 0x0001)}, /* Unknown Gobi QDL device */ -+ {USB_DEVICE(0x413c, 0x8185)}, /* Dell Gobi 2000 QDL device (N0218, VU936) */ -+ {USB_DEVICE(0x413c, 0x8186)}, /* Dell Gobi 2000 Modem device (N0218, VU936) */ -+ {USB_DEVICE(0x05c6, 0x9224)}, /* Sony Gobi 2000 QDL device (N0279, VU730) */ -+ {USB_DEVICE(0x05c6, 0x9225)}, /* Sony Gobi 2000 Modem device (N0279, VU730) */ -+ {USB_DEVICE(0x05c6, 0x9244)}, /* Samsung Gobi 2000 QDL device (VL176) */ -+ {USB_DEVICE(0x05c6, 0x9245)}, /* Samsung Gobi 2000 Modem device (VL176) */ -+ {USB_DEVICE(0x03f0, 0x241d)}, /* HP Gobi 2000 QDL device (VP412) */ -+ {USB_DEVICE(0x03f0, 0x251d)}, /* HP Gobi 2000 Modem device (VP412) */ -+ {USB_DEVICE(0x05c6, 0x9214)}, /* Acer Gobi 2000 QDL device (VP413) */ -+ {USB_DEVICE(0x05c6, 0x9215)}, /* Acer Gobi 2000 Modem device (VP413) */ -+ {USB_DEVICE(0x05c6, 0x9264)}, /* Asus Gobi 2000 QDL device (VR305) */ -+ {USB_DEVICE(0x05c6, 0x9265)}, /* Asus Gobi 2000 Modem device (VR305) */ -+ {USB_DEVICE(0x05c6, 0x9234)}, /* Top Global Gobi 2000 QDL device (VR306) */ -+ {USB_DEVICE(0x05c6, 0x9235)}, /* Top Global Gobi 2000 Modem device (VR306) */ -+ {USB_DEVICE(0x05c6, 0x9274)}, /* iRex Technologies Gobi 2000 QDL device (VR307) */ -+ {USB_DEVICE(0x05c6, 0x9275)}, /* iRex Technologies Gobi 2000 Modem device (VR307) */ -+ {USB_DEVICE(0x1199, 0x9000)}, /* Sierra Wireless Gobi 2000 QDL device (VT773) */ -+ {USB_DEVICE(0x1199, 0x9001)}, /* Sierra Wireless Gobi 2000 Modem device (VT773) */ -+ {USB_DEVICE(0x1199, 0x9002)}, /* Sierra Wireless Gobi 2000 Modem device (VT773) */ -+ {USB_DEVICE(0x1199, 0x9003)}, /* Sierra Wireless Gobi 2000 Modem device (VT773) */ -+ {USB_DEVICE(0x1199, 0x9004)}, /* Sierra Wireless Gobi 2000 Modem device (VT773) */ -+ {USB_DEVICE(0x1199, 0x9005)}, /* Sierra Wireless Gobi 2000 Modem device (VT773) */ -+ {USB_DEVICE(0x1199, 0x9006)}, /* Sierra Wireless Gobi 2000 Modem device (VT773) */ -+ {USB_DEVICE(0x1199, 0x9007)}, /* Sierra Wireless Gobi 2000 Modem device (VT773) */ -+ {USB_DEVICE(0x1199, 0x9008)}, /* Sierra Wireless Gobi 2000 Modem device (VT773) */ -+ {USB_DEVICE(0x1199, 0x9009)}, /* Sierra Wireless Gobi 2000 Modem device (VT773) */ -+ {USB_DEVICE(0x1199, 0x900a)}, /* Sierra Wireless Gobi 2000 Modem device (VT773) */ -+ {USB_DEVICE(0x16d8, 0x8001)}, /* CMDTech Gobi 2000 QDL device (VU922) */ -+ {USB_DEVICE(0x16d8, 0x8002)}, /* CMDTech Gobi 2000 Modem device (VU922) */ - { } /* Terminating entry */ - }; - MODULE_DEVICE_TABLE(usb, id_table); -diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 5a5c303..f15fb02 100644 ---- a/drivers/video/Kconfig -+++ b/drivers/video/Kconfig -@@ -909,6 +909,18 @@ config FB_XVR2500 - mostly initialized the card already. It is treated as a - completely dumb framebuffer device. - -+config FB_XVR1000 -+ bool "Sun XVR-1000 support" -+ depends on (FB = y) && SPARC64 -+ select FB_CFB_FILLRECT -+ select FB_CFB_COPYAREA -+ select FB_CFB_IMAGEBLIT -+ help -+ This is the framebuffer device for the Sun XVR-1000 and similar -+ graphics cards. The driver only works on sparc64 systems where -+ the system firmware has mostly initialized the card already. It -+ is treated as a completely dumb framebuffer device. -+ - config FB_PVR2 - tristate "NEC PowerVR 2 display support" - depends on FB && SH_DREAMCAST -diff --git a/drivers/video/Makefile b/drivers/video/Makefile -index 4ecb30c..8c9a357 100644 ---- a/drivers/video/Makefile -+++ b/drivers/video/Makefile -@@ -79,6 +79,7 @@ obj-$(CONFIG_FB_N411) += n411.o - obj-$(CONFIG_FB_HGA) += hgafb.o - obj-$(CONFIG_FB_XVR500) += sunxvr500.o - obj-$(CONFIG_FB_XVR2500) += sunxvr2500.o -+obj-$(CONFIG_FB_XVR1000) += sunxvr1000.o - obj-$(CONFIG_FB_IGA) += igafb.o - obj-$(CONFIG_FB_APOLLO) += dnfb.o - obj-$(CONFIG_FB_Q40) += q40fb.o -diff --git a/drivers/video/sunxvr1000.c b/drivers/video/sunxvr1000.c -new file mode 100644 -index 0000000..a8248c0 ---- /dev/null -+++ b/drivers/video/sunxvr1000.c -@@ -0,0 +1,228 @@ -+/* sunxvr1000.c: Sun XVR-1000 driver for sparc64 systems -+ * -+ * Copyright (C) 2010 David S. Miller (davem@davemloft.net) -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct gfb_info { -+ struct fb_info *info; -+ -+ char __iomem *fb_base; -+ unsigned long fb_base_phys; -+ -+ struct device_node *of_node; -+ -+ unsigned int width; -+ unsigned int height; -+ unsigned int depth; -+ unsigned int fb_size; -+ -+ u32 pseudo_palette[16]; -+}; -+ -+static int __devinit gfb_get_props(struct gfb_info *gp) -+{ -+ gp->width = of_getintprop_default(gp->of_node, "width", 0); -+ gp->height = of_getintprop_default(gp->of_node, "height", 0); -+ gp->depth = of_getintprop_default(gp->of_node, "depth", 32); -+ -+ if (!gp->width || !gp->height) { -+ printk(KERN_ERR "gfb: Critical properties missing for %s\n", -+ gp->of_node->full_name); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int gfb_setcolreg(unsigned regno, -+ unsigned red, unsigned green, unsigned blue, -+ unsigned transp, struct fb_info *info) -+{ -+ u32 value; -+ -+ if (regno < 16) { -+ red >>= 8; -+ green >>= 8; -+ blue >>= 8; -+ -+ value = (blue << 16) | (green << 8) | red; -+ ((u32 *)info->pseudo_palette)[regno] = value; -+ } -+ -+ return 0; -+} -+ -+static struct fb_ops gfb_ops = { -+ .owner = THIS_MODULE, -+ .fb_setcolreg = gfb_setcolreg, -+ .fb_fillrect = cfb_fillrect, -+ .fb_copyarea = cfb_copyarea, -+ .fb_imageblit = cfb_imageblit, -+}; -+ -+static int __devinit gfb_set_fbinfo(struct gfb_info *gp) -+{ -+ struct fb_info *info = gp->info; -+ struct fb_var_screeninfo *var = &info->var; -+ -+ info->flags = FBINFO_DEFAULT; -+ info->fbops = &gfb_ops; -+ info->screen_base = gp->fb_base; -+ info->screen_size = gp->fb_size; -+ -+ info->pseudo_palette = gp->pseudo_palette; -+ -+ /* Fill fix common fields */ -+ strlcpy(info->fix.id, "gfb", sizeof(info->fix.id)); -+ info->fix.smem_start = gp->fb_base_phys; -+ info->fix.smem_len = gp->fb_size; -+ info->fix.type = FB_TYPE_PACKED_PIXELS; -+ if (gp->depth == 32 || gp->depth == 24) -+ info->fix.visual = FB_VISUAL_TRUECOLOR; -+ else -+ info->fix.visual = FB_VISUAL_PSEUDOCOLOR; -+ -+ var->xres = gp->width; -+ var->yres = gp->height; -+ var->xres_virtual = var->xres; -+ var->yres_virtual = var->yres; -+ var->bits_per_pixel = gp->depth; -+ -+ var->red.offset = 0; -+ var->red.length = 8; -+ var->green.offset = 8; -+ var->green.length = 8; -+ var->blue.offset = 16; -+ var->blue.length = 8; -+ var->transp.offset = 0; -+ var->transp.length = 0; -+ -+ if (fb_alloc_cmap(&info->cmap, 256, 0)) { -+ printk(KERN_ERR "gfb: Cannot allocate color map.\n"); -+ return -ENOMEM; -+ } -+ -+ return 0; -+} -+ -+static int __devinit gfb_probe(struct of_device *op, -+ const struct of_device_id *match) -+{ -+ struct device_node *dp = op->node; -+ struct fb_info *info; -+ struct gfb_info *gp; -+ int err; -+ -+ info = framebuffer_alloc(sizeof(struct gfb_info), &op->dev); -+ if (!info) { -+ printk(KERN_ERR "gfb: Cannot allocate fb_info\n"); -+ err = -ENOMEM; -+ goto err_out; -+ } -+ -+ gp = info->par; -+ gp->info = info; -+ gp->of_node = dp; -+ -+ gp->fb_base_phys = op->resource[6].start; -+ -+ err = gfb_get_props(gp); -+ if (err) -+ goto err_release_fb; -+ -+ /* Framebuffer length is the same regardless of resolution. */ -+ info->fix.line_length = 16384; -+ gp->fb_size = info->fix.line_length * gp->height; -+ -+ gp->fb_base = of_ioremap(&op->resource[6], 0, -+ gp->fb_size, "gfb fb"); -+ if (!gp->fb_base) -+ goto err_release_fb; -+ -+ err = gfb_set_fbinfo(gp); -+ if (err) -+ goto err_unmap_fb; -+ -+ printk("gfb: Found device at %s\n", dp->full_name); -+ -+ err = register_framebuffer(info); -+ if (err < 0) { -+ printk(KERN_ERR "gfb: Could not register framebuffer %s\n", -+ dp->full_name); -+ goto err_unmap_fb; -+ } -+ -+ dev_set_drvdata(&op->dev, info); -+ -+ return 0; -+ -+err_unmap_fb: -+ of_iounmap(&op->resource[6], gp->fb_base, gp->fb_size); -+ -+err_release_fb: -+ framebuffer_release(info); -+ -+err_out: -+ return err; -+} -+ -+static int __devexit gfb_remove(struct of_device *op) -+{ -+ struct fb_info *info = dev_get_drvdata(&op->dev); -+ struct gfb_info *gp = info->par; -+ -+ unregister_framebuffer(info); -+ -+ iounmap(gp->fb_base); -+ -+ of_iounmap(&op->resource[6], gp->fb_base, gp->fb_size); -+ -+ framebuffer_release(info); -+ -+ dev_set_drvdata(&op->dev, NULL); -+ -+ return 0; -+} -+ -+static const struct of_device_id gfb_match[] = { -+ { -+ .name = "SUNW,gfb", -+ }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, ffb_match); -+ -+static struct of_platform_driver gfb_driver = { -+ .name = "gfb", -+ .match_table = gfb_match, -+ .probe = gfb_probe, -+ .remove = __devexit_p(gfb_remove), -+}; -+ -+static int __init gfb_init(void) -+{ -+ if (fb_get_options("gfb", NULL)) -+ return -ENODEV; -+ -+ return of_register_driver(&gfb_driver, &of_bus_type); -+} -+ -+static void __exit gfb_exit(void) -+{ -+ of_unregister_driver(&gfb_driver); -+} -+ -+module_init(gfb_init); -+module_exit(gfb_exit); -+ -+MODULE_DESCRIPTION("framebuffer driver for Sun XVR-1000 graphics"); -+MODULE_AUTHOR("David S. Miller "); -+MODULE_VERSION("1.0"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/virtio/virtio_pci.c b/drivers/virtio/virtio_pci.c -index 28d9cf7..7127bfe 100644 ---- a/drivers/virtio/virtio_pci.c -+++ b/drivers/virtio/virtio_pci.c -@@ -473,7 +473,8 @@ static void vp_del_vqs(struct virtio_device *vdev) - - list_for_each_entry_safe(vq, n, &vdev->vqs, list) { - info = vq->priv; -- if (vp_dev->per_vq_vectors) -+ if (vp_dev->per_vq_vectors && -+ info->msix_vector != VIRTIO_MSI_NO_VECTOR) - free_irq(vp_dev->msix_entries[info->msix_vector].vector, - vq); - vp_del_vq(vq); -diff --git a/fs/exec.c b/fs/exec.c -index cce6bbd..9071360 100644 ---- a/fs/exec.c -+++ b/fs/exec.c -@@ -1923,8 +1923,9 @@ void do_coredump(long signr, int exit_code, struct pt_regs *regs) - /* - * Dont allow local users get cute and trick others to coredump - * into their pre-created files: -+ * Note, this is not relevant for pipes - */ -- if (inode->i_uid != current_fsuid()) -+ if (!ispipe && (inode->i_uid != current_fsuid())) - goto close_fail; - if (!cprm.file->f_op) - goto close_fail; -diff --git a/fs/gfs2/file.c b/fs/gfs2/file.c -index a6abbae..e6dd2ae 100644 ---- a/fs/gfs2/file.c -+++ b/fs/gfs2/file.c -@@ -640,7 +640,7 @@ static int gfs2_lock(struct file *file, int cmd, struct file_lock *fl) - - if (!(fl->fl_flags & FL_POSIX)) - return -ENOLCK; -- if (__mandatory_lock(&ip->i_inode)) -+ if (__mandatory_lock(&ip->i_inode) && fl->fl_type != F_UNLCK) - return -ENOLCK; - - if (cmd == F_CANCELLK) { -diff --git a/fs/nfs/delegation.h b/fs/nfs/delegation.h -index 944b627..69e7b81 100644 ---- a/fs/nfs/delegation.h -+++ b/fs/nfs/delegation.h -@@ -71,4 +71,10 @@ static inline int nfs_inode_return_delegation(struct inode *inode) - } - #endif - -+static inline int nfs_have_delegated_attributes(struct inode *inode) -+{ -+ return nfs_have_delegation(inode, FMODE_READ) && -+ !(NFS_I(inode)->cache_validity & NFS_INO_REVAL_FORCED); -+} -+ - #endif -diff --git a/fs/nfs/dir.c b/fs/nfs/dir.c -index 3c7f03b..8b5382e 100644 ---- a/fs/nfs/dir.c -+++ b/fs/nfs/dir.c -@@ -1789,7 +1789,7 @@ static int nfs_access_get_cached(struct inode *inode, struct rpc_cred *cred, str - cache = nfs_access_search_rbtree(inode, cred); - if (cache == NULL) - goto out; -- if (!nfs_have_delegation(inode, FMODE_READ) && -+ if (!nfs_have_delegated_attributes(inode) && - !time_in_range_open(jiffies, cache->jiffies, cache->jiffies + nfsi->attrtimeo)) - goto out_stale; - res->jiffies = cache->jiffies; -diff --git a/fs/nfs/file.c b/fs/nfs/file.c -index 63f2071..bdd2142 100644 ---- a/fs/nfs/file.c -+++ b/fs/nfs/file.c -@@ -486,7 +486,8 @@ static int nfs_release_page(struct page *page, gfp_t gfp) - { - dfprintk(PAGECACHE, "NFS: release_page(%p)\n", page); - -- if (gfp & __GFP_WAIT) -+ /* Only do I/O if gfp is a superset of GFP_KERNEL */ -+ if ((gfp & GFP_KERNEL) == GFP_KERNEL) - nfs_wb_page(page->mapping->host, page); - /* If PagePrivate() is set, then the page is not freeable */ - if (PagePrivate(page)) -diff --git a/fs/nfs/inode.c b/fs/nfs/inode.c -index f141bde..5f59a2d 100644 ---- a/fs/nfs/inode.c -+++ b/fs/nfs/inode.c -@@ -759,7 +759,7 @@ int nfs_attribute_timeout(struct inode *inode) - { - struct nfs_inode *nfsi = NFS_I(inode); - -- if (nfs_have_delegation(inode, FMODE_READ)) -+ if (nfs_have_delegated_attributes(inode)) - return 0; - return !time_in_range_open(jiffies, nfsi->read_cache_jiffies, nfsi->read_cache_jiffies + nfsi->attrtimeo); - } -diff --git a/fs/nfs/pagelist.c b/fs/nfs/pagelist.c -index a12c45b..29d9d36 100644 ---- a/fs/nfs/pagelist.c -+++ b/fs/nfs/pagelist.c -@@ -112,12 +112,10 @@ void nfs_unlock_request(struct nfs_page *req) - */ - int nfs_set_page_tag_locked(struct nfs_page *req) - { -- struct nfs_inode *nfsi = NFS_I(req->wb_context->path.dentry->d_inode); -- - if (!nfs_lock_request_dontget(req)) - return 0; - if (req->wb_page != NULL) -- radix_tree_tag_set(&nfsi->nfs_page_tree, req->wb_index, NFS_PAGE_TAG_LOCKED); -+ radix_tree_tag_set(&NFS_I(req->wb_context->path.dentry->d_inode)->nfs_page_tree, req->wb_index, NFS_PAGE_TAG_LOCKED); - return 1; - } - -@@ -126,10 +124,10 @@ int nfs_set_page_tag_locked(struct nfs_page *req) - */ - void nfs_clear_page_tag_locked(struct nfs_page *req) - { -- struct inode *inode = req->wb_context->path.dentry->d_inode; -- struct nfs_inode *nfsi = NFS_I(inode); -- - if (req->wb_page != NULL) { -+ struct inode *inode = req->wb_context->path.dentry->d_inode; -+ struct nfs_inode *nfsi = NFS_I(inode); -+ - spin_lock(&inode->i_lock); - radix_tree_tag_clear(&nfsi->nfs_page_tree, req->wb_index, NFS_PAGE_TAG_LOCKED); - nfs_unlock_request(req); -@@ -142,16 +140,22 @@ void nfs_clear_page_tag_locked(struct nfs_page *req) - * nfs_clear_request - Free up all resources allocated to the request - * @req: - * -- * Release page resources associated with a write request after it -- * has completed. -+ * Release page and open context resources associated with a read/write -+ * request after it has completed. - */ - void nfs_clear_request(struct nfs_page *req) - { - struct page *page = req->wb_page; -+ struct nfs_open_context *ctx = req->wb_context; -+ - if (page != NULL) { - page_cache_release(page); - req->wb_page = NULL; - } -+ if (ctx != NULL) { -+ put_nfs_open_context(ctx); -+ req->wb_context = NULL; -+ } - } - - -@@ -165,9 +169,8 @@ static void nfs_free_request(struct kref *kref) - { - struct nfs_page *req = container_of(kref, struct nfs_page, wb_kref); - -- /* Release struct file or cached credential */ -+ /* Release struct file and open context */ - nfs_clear_request(req); -- put_nfs_open_context(req->wb_context); - nfs_page_free(req); - } - -diff --git a/fs/nilfs2/segment.c b/fs/nilfs2/segment.c -index 105b508..ddce17b 100644 ---- a/fs/nilfs2/segment.c -+++ b/fs/nilfs2/segment.c -@@ -1902,8 +1902,7 @@ static void nilfs_segctor_abort_construction(struct nilfs_sc_info *sci, - - list_splice_tail_init(&sci->sc_write_logs, &logs); - ret = nilfs_wait_on_logs(&logs); -- if (ret) -- nilfs_abort_logs(&logs, NULL, sci->sc_super_root, ret); -+ nilfs_abort_logs(&logs, NULL, sci->sc_super_root, ret ? : err); - - list_splice_tail_init(&sci->sc_segbufs, &logs); - nilfs_cancel_segusage(&logs, nilfs->ns_sufile); -diff --git a/fs/partitions/msdos.c b/fs/partitions/msdos.c -index 0028d2e..90be97f 100644 ---- a/fs/partitions/msdos.c -+++ b/fs/partitions/msdos.c -@@ -31,14 +31,17 @@ - */ - #include - --#define SYS_IND(p) (get_unaligned(&p->sys_ind)) --#define NR_SECTS(p) ({ __le32 __a = get_unaligned(&p->nr_sects); \ -- le32_to_cpu(__a); \ -- }) -+#define SYS_IND(p) get_unaligned(&p->sys_ind) - --#define START_SECT(p) ({ __le32 __a = get_unaligned(&p->start_sect); \ -- le32_to_cpu(__a); \ -- }) -+static inline sector_t nr_sects(struct partition *p) -+{ -+ return (sector_t)get_unaligned_le32(&p->nr_sects); -+} -+ -+static inline sector_t start_sect(struct partition *p) -+{ -+ return (sector_t)get_unaligned_le32(&p->start_sect); -+} - - static inline int is_extended_partition(struct partition *p) - { -@@ -104,13 +107,13 @@ static int aix_magic_present(unsigned char *p, struct block_device *bdev) - - static void - parse_extended(struct parsed_partitions *state, struct block_device *bdev, -- u32 first_sector, u32 first_size) -+ sector_t first_sector, sector_t first_size) - { - struct partition *p; - Sector sect; - unsigned char *data; -- u32 this_sector, this_size; -- int sector_size = bdev_logical_block_size(bdev) / 512; -+ sector_t this_sector, this_size; -+ sector_t sector_size = bdev_logical_block_size(bdev) / 512; - int loopct = 0; /* number of links followed - without finding a data partition */ - int i; -@@ -145,14 +148,14 @@ parse_extended(struct parsed_partitions *state, struct block_device *bdev, - * First process the data partition(s) - */ - for (i=0; i<4; i++, p++) { -- u32 offs, size, next; -- if (!NR_SECTS(p) || is_extended_partition(p)) -+ sector_t offs, size, next; -+ if (!nr_sects(p) || is_extended_partition(p)) - continue; - - /* Check the 3rd and 4th entries - - these sometimes contain random garbage */ -- offs = START_SECT(p)*sector_size; -- size = NR_SECTS(p)*sector_size; -+ offs = start_sect(p)*sector_size; -+ size = nr_sects(p)*sector_size; - next = this_sector + offs; - if (i >= 2) { - if (offs + size > this_size) -@@ -179,13 +182,13 @@ parse_extended(struct parsed_partitions *state, struct block_device *bdev, - */ - p -= 4; - for (i=0; i<4; i++, p++) -- if (NR_SECTS(p) && is_extended_partition(p)) -+ if (nr_sects(p) && is_extended_partition(p)) - break; - if (i == 4) - goto done; /* nothing left to do */ - -- this_sector = first_sector + START_SECT(p) * sector_size; -- this_size = NR_SECTS(p) * sector_size; -+ this_sector = first_sector + start_sect(p) * sector_size; -+ this_size = nr_sects(p) * sector_size; - put_dev_sector(sect); - } - done: -@@ -197,7 +200,7 @@ done: - - static void - parse_solaris_x86(struct parsed_partitions *state, struct block_device *bdev, -- u32 offset, u32 size, int origin) -+ sector_t offset, sector_t size, int origin) - { - #ifdef CONFIG_SOLARIS_X86_PARTITION - Sector sect; -@@ -244,7 +247,7 @@ parse_solaris_x86(struct parsed_partitions *state, struct block_device *bdev, - */ - static void - parse_bsd(struct parsed_partitions *state, struct block_device *bdev, -- u32 offset, u32 size, int origin, char *flavour, -+ sector_t offset, sector_t size, int origin, char *flavour, - int max_partitions) - { - Sector sect; -@@ -263,7 +266,7 @@ parse_bsd(struct parsed_partitions *state, struct block_device *bdev, - if (le16_to_cpu(l->d_npartitions) < max_partitions) - max_partitions = le16_to_cpu(l->d_npartitions); - for (p = l->d_partitions; p - l->d_partitions < max_partitions; p++) { -- u32 bsd_start, bsd_size; -+ sector_t bsd_start, bsd_size; - - if (state->next == state->limit) - break; -@@ -290,7 +293,7 @@ parse_bsd(struct parsed_partitions *state, struct block_device *bdev, - - static void - parse_freebsd(struct parsed_partitions *state, struct block_device *bdev, -- u32 offset, u32 size, int origin) -+ sector_t offset, sector_t size, int origin) - { - #ifdef CONFIG_BSD_DISKLABEL - parse_bsd(state, bdev, offset, size, origin, -@@ -300,7 +303,7 @@ parse_freebsd(struct parsed_partitions *state, struct block_device *bdev, - - static void - parse_netbsd(struct parsed_partitions *state, struct block_device *bdev, -- u32 offset, u32 size, int origin) -+ sector_t offset, sector_t size, int origin) - { - #ifdef CONFIG_BSD_DISKLABEL - parse_bsd(state, bdev, offset, size, origin, -@@ -310,7 +313,7 @@ parse_netbsd(struct parsed_partitions *state, struct block_device *bdev, - - static void - parse_openbsd(struct parsed_partitions *state, struct block_device *bdev, -- u32 offset, u32 size, int origin) -+ sector_t offset, sector_t size, int origin) - { - #ifdef CONFIG_BSD_DISKLABEL - parse_bsd(state, bdev, offset, size, origin, -@@ -324,7 +327,7 @@ parse_openbsd(struct parsed_partitions *state, struct block_device *bdev, - */ - static void - parse_unixware(struct parsed_partitions *state, struct block_device *bdev, -- u32 offset, u32 size, int origin) -+ sector_t offset, sector_t size, int origin) - { - #ifdef CONFIG_UNIXWARE_DISKLABEL - Sector sect; -@@ -348,7 +351,8 @@ parse_unixware(struct parsed_partitions *state, struct block_device *bdev, - - if (p->s_label != UNIXWARE_FS_UNUSED) - put_partition(state, state->next++, -- START_SECT(p), NR_SECTS(p)); -+ le32_to_cpu(p->start_sect), -+ le32_to_cpu(p->nr_sects)); - p++; - } - put_dev_sector(sect); -@@ -363,7 +367,7 @@ parse_unixware(struct parsed_partitions *state, struct block_device *bdev, - */ - static void - parse_minix(struct parsed_partitions *state, struct block_device *bdev, -- u32 offset, u32 size, int origin) -+ sector_t offset, sector_t size, int origin) - { - #ifdef CONFIG_MINIX_SUBPARTITION - Sector sect; -@@ -390,7 +394,7 @@ parse_minix(struct parsed_partitions *state, struct block_device *bdev, - /* add each partition in use */ - if (SYS_IND(p) == MINIX_PARTITION) - put_partition(state, state->next++, -- START_SECT(p), NR_SECTS(p)); -+ start_sect(p), nr_sects(p)); - } - printk(" >\n"); - } -@@ -401,7 +405,7 @@ parse_minix(struct parsed_partitions *state, struct block_device *bdev, - static struct { - unsigned char id; - void (*parse)(struct parsed_partitions *, struct block_device *, -- u32, u32, int); -+ sector_t, sector_t, int); - } subtypes[] = { - {FREEBSD_PARTITION, parse_freebsd}, - {NETBSD_PARTITION, parse_netbsd}, -@@ -415,7 +419,7 @@ static struct { - - int msdos_partition(struct parsed_partitions *state, struct block_device *bdev) - { -- int sector_size = bdev_logical_block_size(bdev) / 512; -+ sector_t sector_size = bdev_logical_block_size(bdev) / 512; - Sector sect; - unsigned char *data; - struct partition *p; -@@ -483,14 +487,21 @@ int msdos_partition(struct parsed_partitions *state, struct block_device *bdev) - - state->next = 5; - for (slot = 1 ; slot <= 4 ; slot++, p++) { -- u32 start = START_SECT(p)*sector_size; -- u32 size = NR_SECTS(p)*sector_size; -+ sector_t start = start_sect(p)*sector_size; -+ sector_t size = nr_sects(p)*sector_size; - if (!size) - continue; - if (is_extended_partition(p)) { -- /* prevent someone doing mkfs or mkswap on an -- extended partition, but leave room for LILO */ -- put_partition(state, slot, start, size == 1 ? 1 : 2); -+ /* -+ * prevent someone doing mkfs or mkswap on an -+ * extended partition, but leave room for LILO -+ * FIXME: this uses one logical sector for > 512b -+ * sector, although it may not be enough/proper. -+ */ -+ sector_t n = 2; -+ n = min(size, max(sector_size, n)); -+ put_partition(state, slot, start, n); -+ - printk(" <"); - parse_extended(state, bdev, start, size); - printk(" >"); -@@ -513,7 +524,7 @@ int msdos_partition(struct parsed_partitions *state, struct block_device *bdev) - unsigned char id = SYS_IND(p); - int n; - -- if (!NR_SECTS(p)) -+ if (!nr_sects(p)) - continue; - - for (n = 0; subtypes[n].parse && id != subtypes[n].id; n++) -@@ -521,8 +532,8 @@ int msdos_partition(struct parsed_partitions *state, struct block_device *bdev) - - if (!subtypes[n].parse) - continue; -- subtypes[n].parse(state, bdev, START_SECT(p)*sector_size, -- NR_SECTS(p)*sector_size, slot); -+ subtypes[n].parse(state, bdev, start_sect(p)*sector_size, -+ nr_sects(p)*sector_size, slot); - } - put_dev_sector(sect); - return 1; -diff --git a/fs/quota/dquot.c b/fs/quota/dquot.c -index 3fc62b0..6e722c1 100644 ---- a/fs/quota/dquot.c -+++ b/fs/quota/dquot.c -@@ -225,6 +225,8 @@ static struct hlist_head *dquot_hash; - struct dqstats dqstats; - EXPORT_SYMBOL(dqstats); - -+static qsize_t inode_get_rsv_space(struct inode *inode); -+ - static inline unsigned int - hashfn(const struct super_block *sb, unsigned int id, int type) - { -@@ -840,11 +842,14 @@ static int dqinit_needed(struct inode *inode, int type) - static void add_dquot_ref(struct super_block *sb, int type) - { - struct inode *inode, *old_inode = NULL; -+ int reserved = 0; - - spin_lock(&inode_lock); - list_for_each_entry(inode, &sb->s_inodes, i_sb_list) { - if (inode->i_state & (I_FREEING|I_CLEAR|I_WILL_FREE|I_NEW)) - continue; -+ if (unlikely(inode_get_rsv_space(inode) > 0)) -+ reserved = 1; - if (!atomic_read(&inode->i_writecount)) - continue; - if (!dqinit_needed(inode, type)) -@@ -865,6 +870,12 @@ static void add_dquot_ref(struct super_block *sb, int type) - } - spin_unlock(&inode_lock); - iput(old_inode); -+ -+ if (reserved) { -+ printk(KERN_WARNING "VFS (%s): Writes happened before quota" -+ " was turned on thus quota information is probably " -+ "inconsistent. Please run quotacheck(8).\n", sb->s_id); -+ } - } - - /* -@@ -978,10 +989,12 @@ static inline void dquot_resv_space(struct dquot *dquot, qsize_t number) - /* - * Claim reserved quota space - */ --static void dquot_claim_reserved_space(struct dquot *dquot, -- qsize_t number) -+static void dquot_claim_reserved_space(struct dquot *dquot, qsize_t number) - { -- WARN_ON(dquot->dq_dqb.dqb_rsvspace < number); -+ if (dquot->dq_dqb.dqb_rsvspace < number) { -+ WARN_ON_ONCE(1); -+ number = dquot->dq_dqb.dqb_rsvspace; -+ } - dquot->dq_dqb.dqb_curspace += number; - dquot->dq_dqb.dqb_rsvspace -= number; - } -@@ -989,7 +1002,12 @@ static void dquot_claim_reserved_space(struct dquot *dquot, - static inline - void dquot_free_reserved_space(struct dquot *dquot, qsize_t number) - { -- dquot->dq_dqb.dqb_rsvspace -= number; -+ if (dquot->dq_dqb.dqb_rsvspace >= number) -+ dquot->dq_dqb.dqb_rsvspace -= number; -+ else { -+ WARN_ON_ONCE(1); -+ dquot->dq_dqb.dqb_rsvspace = 0; -+ } - } - - static void dquot_decr_inodes(struct dquot *dquot, qsize_t number) -@@ -1242,6 +1260,7 @@ static int info_bdq_free(struct dquot *dquot, qsize_t space) - return QUOTA_NL_BHARDBELOW; - return QUOTA_NL_NOWARN; - } -+ - /* - * Initialize quota pointers in inode - * We do things in a bit complicated way but by that we avoid calling -@@ -1253,6 +1272,7 @@ int dquot_initialize(struct inode *inode, int type) - int cnt, ret = 0; - struct dquot *got[MAXQUOTAS] = { NULL, NULL }; - struct super_block *sb = inode->i_sb; -+ qsize_t rsv; - - /* First test before acquiring mutex - solves deadlocks when we - * re-enter the quota code and are already holding the mutex */ -@@ -1287,6 +1307,13 @@ int dquot_initialize(struct inode *inode, int type) - if (!inode->i_dquot[cnt]) { - inode->i_dquot[cnt] = got[cnt]; - got[cnt] = NULL; -+ /* -+ * Make quota reservation system happy if someone -+ * did a write before quota was turned on -+ */ -+ rsv = inode_get_rsv_space(inode); -+ if (unlikely(rsv)) -+ dquot_resv_space(inode->i_dquot[cnt], rsv); - } - } - out_err: -@@ -1351,28 +1378,30 @@ static qsize_t *inode_reserved_space(struct inode * inode) - return inode->i_sb->dq_op->get_reserved_space(inode); - } - --static void inode_add_rsv_space(struct inode *inode, qsize_t number) -+void inode_add_rsv_space(struct inode *inode, qsize_t number) - { - spin_lock(&inode->i_lock); - *inode_reserved_space(inode) += number; - spin_unlock(&inode->i_lock); - } -+EXPORT_SYMBOL(inode_add_rsv_space); - -- --static void inode_claim_rsv_space(struct inode *inode, qsize_t number) -+void inode_claim_rsv_space(struct inode *inode, qsize_t number) - { - spin_lock(&inode->i_lock); - *inode_reserved_space(inode) -= number; - __inode_add_bytes(inode, number); - spin_unlock(&inode->i_lock); - } -+EXPORT_SYMBOL(inode_claim_rsv_space); - --static void inode_sub_rsv_space(struct inode *inode, qsize_t number) -+void inode_sub_rsv_space(struct inode *inode, qsize_t number) - { - spin_lock(&inode->i_lock); - *inode_reserved_space(inode) -= number; - spin_unlock(&inode->i_lock); - } -+EXPORT_SYMBOL(inode_sub_rsv_space); - - static qsize_t inode_get_rsv_space(struct inode *inode) - { -diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h -index 5032b9a..ad5ec1d 100644 ---- a/include/linux/decompress/mm.h -+++ b/include/linux/decompress/mm.h -@@ -14,11 +14,21 @@ - - /* Code active when included from pre-boot environment: */ - -+/* -+ * Some architectures want to ensure there is no local data in their -+ * pre-boot environment, so that data can arbitarily relocated (via -+ * GOT references). This is achieved by defining STATIC_RW_DATA to -+ * be null. -+ */ -+#ifndef STATIC_RW_DATA -+#define STATIC_RW_DATA static -+#endif -+ - /* A trivial malloc implementation, adapted from - * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 - */ --static unsigned long malloc_ptr; --static int malloc_count; -+STATIC_RW_DATA unsigned long malloc_ptr; -+STATIC_RW_DATA int malloc_count; - - static void *malloc(int size) - { -diff --git a/include/linux/if_tunnel.h b/include/linux/if_tunnel.h -index 1822d63..16b92d0 100644 ---- a/include/linux/if_tunnel.h -+++ b/include/linux/if_tunnel.h -@@ -2,6 +2,7 @@ - #define _IF_TUNNEL_H_ - - #include -+#include - - #ifdef __KERNEL__ - #include -diff --git a/include/linux/kfifo.h b/include/linux/kfifo.h -index bc0fc79..ece0b1c 100644 ---- a/include/linux/kfifo.h -+++ b/include/linux/kfifo.h -@@ -102,8 +102,6 @@ union { \ - unsigned char name##kfifo_buffer[size]; \ - struct kfifo name = __kfifo_initializer(size, name##kfifo_buffer) - --#undef __kfifo_initializer -- - extern void kfifo_init(struct kfifo *fifo, void *buffer, - unsigned int size); - extern __must_check int kfifo_alloc(struct kfifo *fifo, unsigned int size, -diff --git a/include/linux/kvm.h b/include/linux/kvm.h -index a24de0b..553a388 100644 ---- a/include/linux/kvm.h -+++ b/include/linux/kvm.h -@@ -497,6 +497,7 @@ struct kvm_ioeventfd { - #endif - #define KVM_CAP_S390_PSW 42 - #define KVM_CAP_PPC_SEGSTATE 43 -+#define KVM_CAP_X86_ROBUST_SINGLESTEP 51 - - #ifdef KVM_CAP_IRQ_ROUTING - -diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h -index 99914e6..03e8d81 100644 ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -2023,12 +2023,12 @@ static inline void skb_bond_set_mac_by_master(struct sk_buff *skb, - * duplicates except for 802.3ad ETH_P_SLOW, alb non-mcast/bcast, and - * ARP on active-backup slaves with arp_validate enabled. - */ --static inline int skb_bond_should_drop(struct sk_buff *skb) -+static inline int skb_bond_should_drop(struct sk_buff *skb, -+ struct net_device *master) - { -- struct net_device *dev = skb->dev; -- struct net_device *master = dev->master; -- - if (master) { -+ struct net_device *dev = skb->dev; -+ - if (master->priv_flags & IFF_MASTER_ARPMON) - dev->last_rx = jiffies; - -diff --git a/include/linux/netfilter/nfnetlink.h b/include/linux/netfilter/nfnetlink.h -index 49d321f..264d83d 100644 ---- a/include/linux/netfilter/nfnetlink.h -+++ b/include/linux/netfilter/nfnetlink.h -@@ -76,7 +76,7 @@ extern int nfnetlink_subsys_unregister(const struct nfnetlink_subsystem *n); - extern int nfnetlink_has_listeners(unsigned int group); - extern int nfnetlink_send(struct sk_buff *skb, u32 pid, unsigned group, - int echo, gfp_t flags); --extern void nfnetlink_set_err(u32 pid, u32 group, int error); -+extern int nfnetlink_set_err(u32 pid, u32 group, int error); - extern int nfnetlink_unicast(struct sk_buff *skb, u_int32_t pid, int flags); - - extern void nfnl_lock(void); -diff --git a/include/linux/netlink.h b/include/linux/netlink.h -index fde27c0..6eaca5e 100644 ---- a/include/linux/netlink.h -+++ b/include/linux/netlink.h -@@ -188,7 +188,7 @@ extern int netlink_has_listeners(struct sock *sk, unsigned int group); - extern int netlink_unicast(struct sock *ssk, struct sk_buff *skb, __u32 pid, int nonblock); - extern int netlink_broadcast(struct sock *ssk, struct sk_buff *skb, __u32 pid, - __u32 group, gfp_t allocation); --extern void netlink_set_err(struct sock *ssk, __u32 pid, __u32 group, int code); -+extern int netlink_set_err(struct sock *ssk, __u32 pid, __u32 group, int code); - extern int netlink_register_notifier(struct notifier_block *nb); - extern int netlink_unregister_notifier(struct notifier_block *nb); - -diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h -index c8ea0c7..41f977b 100644 ---- a/include/linux/perf_event.h -+++ b/include/linux/perf_event.h -@@ -793,6 +793,13 @@ struct perf_sample_data { - struct perf_raw_record *raw; - }; - -+static inline -+void perf_sample_data_init(struct perf_sample_data *data, u64 addr) -+{ -+ data->addr = addr; -+ data->raw = NULL; -+} -+ - extern void perf_output_sample(struct perf_output_handle *handle, - struct perf_event_header *header, - struct perf_sample_data *data, -diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h -index 3ebb231..a529d86 100644 ---- a/include/linux/quotaops.h -+++ b/include/linux/quotaops.h -@@ -26,6 +26,10 @@ static inline void writeout_quota_sb(struct super_block *sb, int type) - sb->s_qcop->quota_sync(sb, type); - } - -+void inode_add_rsv_space(struct inode *inode, qsize_t number); -+void inode_claim_rsv_space(struct inode *inode, qsize_t number); -+void inode_sub_rsv_space(struct inode *inode, qsize_t number); -+ - int dquot_initialize(struct inode *inode, int type); - int dquot_drop(struct inode *inode); - struct dquot *dqget(struct super_block *sb, unsigned int id, int type); -@@ -42,7 +46,6 @@ int dquot_alloc_inode(const struct inode *inode, qsize_t number); - int dquot_reserve_space(struct inode *inode, qsize_t number, int prealloc); - int dquot_claim_space(struct inode *inode, qsize_t number); - void dquot_release_reserved_space(struct inode *inode, qsize_t number); --qsize_t dquot_get_reserved_space(struct inode *inode); - - int dquot_free_space(struct inode *inode, qsize_t number); - int dquot_free_inode(const struct inode *inode, qsize_t number); -@@ -199,6 +202,8 @@ static inline int vfs_dq_reserve_space(struct inode *inode, qsize_t nr) - if (inode->i_sb->dq_op->reserve_space(inode, nr, 0) == NO_QUOTA) - return 1; - } -+ else -+ inode_add_rsv_space(inode, nr); - return 0; - } - -@@ -221,7 +226,7 @@ static inline int vfs_dq_claim_space(struct inode *inode, qsize_t nr) - if (inode->i_sb->dq_op->claim_space(inode, nr) == NO_QUOTA) - return 1; - } else -- inode_add_bytes(inode, nr); -+ inode_claim_rsv_space(inode, nr); - - mark_inode_dirty(inode); - return 0; -@@ -235,6 +240,8 @@ void vfs_dq_release_reservation_space(struct inode *inode, qsize_t nr) - { - if (sb_any_quota_active(inode->i_sb)) - inode->i_sb->dq_op->release_rsv(inode, nr); -+ else -+ inode_sub_rsv_space(inode, nr); - } - - static inline void vfs_dq_free_space_nodirty(struct inode *inode, qsize_t nr) -diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h -index ec226a2..28a9617 100644 ---- a/include/linux/skbuff.h -+++ b/include/linux/skbuff.h -@@ -190,9 +190,6 @@ struct skb_shared_info { - atomic_t dataref; - unsigned short nr_frags; - unsigned short gso_size; --#ifdef CONFIG_HAS_DMA -- dma_addr_t dma_head; --#endif - /* Warning: this field is not always filled in (UFO)! */ - unsigned short gso_segs; - unsigned short gso_type; -@@ -201,9 +198,6 @@ struct skb_shared_info { - struct sk_buff *frag_list; - struct skb_shared_hwtstamps hwtstamps; - skb_frag_t frags[MAX_SKB_FRAGS]; --#ifdef CONFIG_HAS_DMA -- dma_addr_t dma_maps[MAX_SKB_FRAGS]; --#endif - /* Intermediate layers must ensure that destructor_arg - * remains valid until skb destructor */ - void * destructor_arg; -diff --git a/include/linux/tty.h b/include/linux/tty.h -index 6abfcf5..42f2076 100644 ---- a/include/linux/tty.h -+++ b/include/linux/tty.h -@@ -68,6 +68,17 @@ struct tty_buffer { - unsigned long data[0]; - }; - -+/* -+ * We default to dicing tty buffer allocations to this many characters -+ * in order to avoid multiple page allocations. We know the size of -+ * tty_buffer itself but it must also be taken into account that the -+ * the buffer is 256 byte aligned. See tty_buffer_find for the allocation -+ * logic this must match -+ */ -+ -+#define TTY_BUFFER_PAGE (((PAGE_SIZE - sizeof(struct tty_buffer)) / 2) & ~0xFF) -+ -+ - struct tty_bufhead { - struct delayed_work work; - spinlock_t lock; -diff --git a/include/net/mac80211.h b/include/net/mac80211.h -index 0bf3697..f39b303 100644 ---- a/include/net/mac80211.h -+++ b/include/net/mac80211.h -@@ -926,6 +926,9 @@ enum ieee80211_tkip_key_type { - * @IEEE80211_HW_BEACON_FILTER: - * Hardware supports dropping of irrelevant beacon frames to - * avoid waking up cpu. -+ * @IEEE80211_HW_REPORTS_TX_ACK_STATUS: -+ * Hardware can provide ack status reports of Tx frames to -+ * the stack. - */ - enum ieee80211_hw_flags { - IEEE80211_HW_HAS_RATE_CONTROL = 1<<0, -@@ -943,6 +946,7 @@ enum ieee80211_hw_flags { - IEEE80211_HW_SUPPORTS_DYNAMIC_PS = 1<<12, - IEEE80211_HW_MFP_CAPABLE = 1<<13, - IEEE80211_HW_BEACON_FILTER = 1<<14, -+ IEEE80211_HW_REPORTS_TX_ACK_STATUS = 1<<15, - }; - - /** -@@ -2258,7 +2262,8 @@ struct rate_control_ops { - struct ieee80211_sta *sta, void *priv_sta); - void (*rate_update)(void *priv, struct ieee80211_supported_band *sband, - struct ieee80211_sta *sta, -- void *priv_sta, u32 changed); -+ void *priv_sta, u32 changed, -+ enum nl80211_channel_type oper_chan_type); - void (*free_sta)(void *priv, struct ieee80211_sta *sta, - void *priv_sta); - -diff --git a/include/net/netlink.h b/include/net/netlink.h -index a63b219..668ad04 100644 ---- a/include/net/netlink.h -+++ b/include/net/netlink.h -@@ -945,7 +945,11 @@ static inline u64 nla_get_u64(const struct nlattr *nla) - */ - static inline __be64 nla_get_be64(const struct nlattr *nla) - { -- return *(__be64 *) nla_data(nla); -+ __be64 tmp; -+ -+ nla_memcpy(&tmp, nla, sizeof(tmp)); -+ -+ return tmp; - } - - /** -diff --git a/include/net/sock.h b/include/net/sock.h -index 3f1a480..86f2da1 100644 ---- a/include/net/sock.h -+++ b/include/net/sock.h -@@ -253,6 +253,8 @@ struct sock { - struct { - struct sk_buff *head; - struct sk_buff *tail; -+ int len; -+ int limit; - } sk_backlog; - wait_queue_head_t *sk_sleep; - struct dst_entry *sk_dst_cache; -@@ -574,8 +576,8 @@ static inline int sk_stream_memory_free(struct sock *sk) - return sk->sk_wmem_queued < sk->sk_sndbuf; - } - --/* The per-socket spinlock must be held here. */ --static inline void sk_add_backlog(struct sock *sk, struct sk_buff *skb) -+/* OOB backlog add */ -+static inline void __sk_add_backlog(struct sock *sk, struct sk_buff *skb) - { - if (!sk->sk_backlog.tail) { - sk->sk_backlog.head = sk->sk_backlog.tail = skb; -@@ -586,6 +588,17 @@ static inline void sk_add_backlog(struct sock *sk, struct sk_buff *skb) - skb->next = NULL; - } - -+/* The per-socket spinlock must be held here. */ -+static inline __must_check int sk_add_backlog(struct sock *sk, struct sk_buff *skb) -+{ -+ if (sk->sk_backlog.len >= max(sk->sk_backlog.limit, sk->sk_rcvbuf << 1)) -+ return -ENOBUFS; -+ -+ __sk_add_backlog(sk, skb); -+ sk->sk_backlog.len += skb->truesize; -+ return 0; -+} -+ - static inline int sk_backlog_rcv(struct sock *sk, struct sk_buff *skb) - { - return sk->sk_backlog_rcv(sk, skb); -diff --git a/include/net/xfrm.h b/include/net/xfrm.h -index 60c2770..1e355d8 100644 ---- a/include/net/xfrm.h -+++ b/include/net/xfrm.h -@@ -274,7 +274,8 @@ struct xfrm_policy_afinfo { - struct dst_entry *dst, - int nfheader_len); - int (*fill_dst)(struct xfrm_dst *xdst, -- struct net_device *dev); -+ struct net_device *dev, -+ struct flowi *fl); - }; - - extern int xfrm_policy_register_afinfo(struct xfrm_policy_afinfo *afinfo); -diff --git a/init/main.c b/init/main.c -index 4cb47a1..512ba15 100644 ---- a/init/main.c -+++ b/init/main.c -@@ -846,7 +846,7 @@ static int __init kernel_init(void * unused) - /* - * init can allocate pages on any node - */ -- set_mems_allowed(node_possible_map); -+ set_mems_allowed(node_states[N_HIGH_MEMORY]); - /* - * init can run on any cpu. - */ -diff --git a/ipc/mqueue.c b/ipc/mqueue.c -index c79bd57..04985a7 100644 ---- a/ipc/mqueue.c -+++ b/ipc/mqueue.c -@@ -705,7 +705,7 @@ SYSCALL_DEFINE4(mq_open, const char __user *, u_name, int, oflag, mode_t, mode, - dentry = lookup_one_len(name, ipc_ns->mq_mnt->mnt_root, strlen(name)); - if (IS_ERR(dentry)) { - error = PTR_ERR(dentry); -- goto out_err; -+ goto out_putfd; - } - mntget(ipc_ns->mq_mnt); - -@@ -742,7 +742,6 @@ out: - mntput(ipc_ns->mq_mnt); - out_putfd: - put_unused_fd(fd); --out_err: - fd = error; - out_upsem: - mutex_unlock(&ipc_ns->mq_mnt->mnt_root->d_inode->i_mutex); -diff --git a/kernel/cpuset.c b/kernel/cpuset.c -index ba401fa..5d38bd7 100644 ---- a/kernel/cpuset.c -+++ b/kernel/cpuset.c -@@ -920,9 +920,6 @@ static int update_cpumask(struct cpuset *cs, struct cpuset *trialcs, - * call to guarantee_online_mems(), as we know no one is changing - * our task's cpuset. - * -- * Hold callback_mutex around the two modifications of our tasks -- * mems_allowed to synchronize with cpuset_mems_allowed(). -- * - * While the mm_struct we are migrating is typically from some - * other task, the task_struct mems_allowed that we are hacking - * is for our current task, which must allocate new pages for that -@@ -1391,11 +1388,10 @@ static void cpuset_attach(struct cgroup_subsys *ss, struct cgroup *cont, - - if (cs == &top_cpuset) { - cpumask_copy(cpus_attach, cpu_possible_mask); -- to = node_possible_map; - } else { - guarantee_online_cpus(cs, cpus_attach); -- guarantee_online_mems(cs, &to); - } -+ guarantee_online_mems(cs, &to); - - /* do per-task migration stuff possibly for each in the threadgroup */ - cpuset_attach_task(tsk, &to, cs); -@@ -2090,15 +2086,23 @@ static int cpuset_track_online_cpus(struct notifier_block *unused_nb, - static int cpuset_track_online_nodes(struct notifier_block *self, - unsigned long action, void *arg) - { -+ nodemask_t oldmems; -+ - cgroup_lock(); - switch (action) { - case MEM_ONLINE: -- case MEM_OFFLINE: -+ oldmems = top_cpuset.mems_allowed; - mutex_lock(&callback_mutex); - top_cpuset.mems_allowed = node_states[N_HIGH_MEMORY]; - mutex_unlock(&callback_mutex); -- if (action == MEM_OFFLINE) -- scan_for_empty_cpusets(&top_cpuset); -+ update_tasks_nodemask(&top_cpuset, &oldmems, NULL); -+ break; -+ case MEM_OFFLINE: -+ /* -+ * needn't update top_cpuset.mems_allowed explicitly because -+ * scan_for_empty_cpusets() will update it. -+ */ -+ scan_for_empty_cpusets(&top_cpuset); - break; - default: - break; -diff --git a/kernel/hw_breakpoint.c b/kernel/hw_breakpoint.c -index 967e661..4d99512 100644 ---- a/kernel/hw_breakpoint.c -+++ b/kernel/hw_breakpoint.c -@@ -489,5 +489,4 @@ struct pmu perf_ops_bp = { - .enable = arch_install_hw_breakpoint, - .disable = arch_uninstall_hw_breakpoint, - .read = hw_breakpoint_pmu_read, -- .unthrottle = hw_breakpoint_pmu_unthrottle - }; -diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c -index d70394f..71eba24 100644 ---- a/kernel/irq/chip.c -+++ b/kernel/irq/chip.c -@@ -359,6 +359,23 @@ static inline void mask_ack_irq(struct irq_desc *desc, int irq) - if (desc->chip->ack) - desc->chip->ack(irq); - } -+ desc->status |= IRQ_MASKED; -+} -+ -+static inline void mask_irq(struct irq_desc *desc, int irq) -+{ -+ if (desc->chip->mask) { -+ desc->chip->mask(irq); -+ desc->status |= IRQ_MASKED; -+ } -+} -+ -+static inline void unmask_irq(struct irq_desc *desc, int irq) -+{ -+ if (desc->chip->unmask) { -+ desc->chip->unmask(irq); -+ desc->status &= ~IRQ_MASKED; -+ } - } - - /* -@@ -484,10 +501,8 @@ handle_level_irq(unsigned int irq, struct irq_desc *desc) - raw_spin_lock(&desc->lock); - desc->status &= ~IRQ_INPROGRESS; - -- if (unlikely(desc->status & IRQ_ONESHOT)) -- desc->status |= IRQ_MASKED; -- else if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) -- desc->chip->unmask(irq); -+ if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT))) -+ unmask_irq(desc, irq); - out_unlock: - raw_spin_unlock(&desc->lock); - } -@@ -524,8 +539,7 @@ handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) - action = desc->action; - if (unlikely(!action || (desc->status & IRQ_DISABLED))) { - desc->status |= IRQ_PENDING; -- if (desc->chip->mask) -- desc->chip->mask(irq); -+ mask_irq(desc, irq); - goto out; - } - -@@ -593,7 +607,7 @@ handle_edge_irq(unsigned int irq, struct irq_desc *desc) - irqreturn_t action_ret; - - if (unlikely(!action)) { -- desc->chip->mask(irq); -+ mask_irq(desc, irq); - goto out_unlock; - } - -@@ -605,8 +619,7 @@ handle_edge_irq(unsigned int irq, struct irq_desc *desc) - if (unlikely((desc->status & - (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == - (IRQ_PENDING | IRQ_MASKED))) { -- desc->chip->unmask(irq); -- desc->status &= ~IRQ_MASKED; -+ unmask_irq(desc, irq); - } - - desc->status &= ~IRQ_PENDING; -diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c -index eb6078c..69a3d7b 100644 ---- a/kernel/irq/manage.c -+++ b/kernel/irq/manage.c -@@ -483,8 +483,26 @@ static int irq_wait_for_interrupt(struct irqaction *action) - */ - static void irq_finalize_oneshot(unsigned int irq, struct irq_desc *desc) - { -+again: - chip_bus_lock(irq, desc); - raw_spin_lock_irq(&desc->lock); -+ -+ /* -+ * Implausible though it may be we need to protect us against -+ * the following scenario: -+ * -+ * The thread is faster done than the hard interrupt handler -+ * on the other CPU. If we unmask the irq line then the -+ * interrupt can come in again and masks the line, leaves due -+ * to IRQ_INPROGRESS and the irq line is masked forever. -+ */ -+ if (unlikely(desc->status & IRQ_INPROGRESS)) { -+ raw_spin_unlock_irq(&desc->lock); -+ chip_bus_sync_unlock(irq, desc); -+ cpu_relax(); -+ goto again; -+ } -+ - if (!(desc->status & IRQ_DISABLED) && (desc->status & IRQ_MASKED)) { - desc->status &= ~IRQ_MASKED; - desc->chip->unmask(irq); -diff --git a/kernel/kthread.c b/kernel/kthread.c -index fbb6222..84c7f99 100644 ---- a/kernel/kthread.c -+++ b/kernel/kthread.c -@@ -219,7 +219,7 @@ int kthreadd(void *unused) - set_task_comm(tsk, "kthreadd"); - ignore_signals(tsk); - set_cpus_allowed_ptr(tsk, cpu_all_mask); -- set_mems_allowed(node_possible_map); -+ set_mems_allowed(node_states[N_HIGH_MEMORY]); - - current->flags |= PF_NOFREEZE | PF_FREEZER_NOSIG; - -diff --git a/kernel/perf_event.c b/kernel/perf_event.c -index b707465..32d0ae2 100644 ---- a/kernel/perf_event.c -+++ b/kernel/perf_event.c -@@ -4027,8 +4027,7 @@ void __perf_sw_event(u32 event_id, u64 nr, int nmi, - if (rctx < 0) - return; - -- data.addr = addr; -- data.raw = NULL; -+ perf_sample_data_init(&data, addr); - - do_perf_sw_event(PERF_TYPE_SOFTWARE, event_id, nr, nmi, &data, regs); - -@@ -4073,11 +4072,10 @@ static enum hrtimer_restart perf_swevent_hrtimer(struct hrtimer *hrtimer) - struct perf_event *event; - u64 period; - -- event = container_of(hrtimer, struct perf_event, hw.hrtimer); -+ event = container_of(hrtimer, struct perf_event, hw.hrtimer); - event->pmu->read(event); - -- data.addr = 0; -- data.raw = NULL; -+ perf_sample_data_init(&data, 0); - data.period = event->hw.last_period; - regs = get_irq_regs(); - /* -@@ -4241,17 +4239,15 @@ static const struct pmu perf_ops_task_clock = { - void perf_tp_event(int event_id, u64 addr, u64 count, void *record, - int entry_size) - { -+ struct pt_regs *regs = get_irq_regs(); -+ struct perf_sample_data data; - struct perf_raw_record raw = { - .size = entry_size, - .data = record, - }; - -- struct perf_sample_data data = { -- .addr = addr, -- .raw = &raw, -- }; -- -- struct pt_regs *regs = get_irq_regs(); -+ perf_sample_data_init(&data, addr); -+ data.raw = &raw; - - if (!regs) - regs = task_pt_regs(current); -@@ -4367,8 +4363,7 @@ void perf_bp_event(struct perf_event *bp, void *data) - struct perf_sample_data sample; - struct pt_regs *regs = data; - -- sample.raw = NULL; -- sample.addr = bp->attr.bp_addr; -+ perf_sample_data_init(&sample, bp->attr.bp_addr); - - if (!perf_exclude_event(bp, regs)) - perf_swevent_add(bp, 1, 1, &sample, regs); -@@ -5251,12 +5246,22 @@ int perf_event_init_task(struct task_struct *child) - return ret; - } - -+static void __init perf_event_init_all_cpus(void) -+{ -+ int cpu; -+ struct perf_cpu_context *cpuctx; -+ -+ for_each_possible_cpu(cpu) { -+ cpuctx = &per_cpu(perf_cpu_context, cpu); -+ __perf_event_init_context(&cpuctx->ctx, NULL); -+ } -+} -+ - static void __cpuinit perf_event_init_cpu(int cpu) - { - struct perf_cpu_context *cpuctx; - - cpuctx = &per_cpu(perf_cpu_context, cpu); -- __perf_event_init_context(&cpuctx->ctx, NULL); - - spin_lock(&perf_resource_lock); - cpuctx->max_pertask = perf_max_events - perf_reserved_percpu; -@@ -5327,6 +5332,7 @@ static struct notifier_block __cpuinitdata perf_cpu_nb = { - - void __init perf_event_init(void) - { -+ perf_event_init_all_cpus(); - perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, - (void *)(long)smp_processor_id()); - perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_ONLINE, -diff --git a/kernel/sched.c b/kernel/sched.c -index 00a59b0..7ca9345 100644 ---- a/kernel/sched.c -+++ b/kernel/sched.c -@@ -3423,6 +3423,7 @@ struct sd_lb_stats { - unsigned long max_load; - unsigned long busiest_load_per_task; - unsigned long busiest_nr_running; -+ unsigned long busiest_group_capacity; - - int group_imb; /* Is there imbalance in this sd */ - #if defined(CONFIG_SCHED_MC) || defined(CONFIG_SCHED_SMT) -@@ -3742,8 +3743,7 @@ static inline void update_sg_lb_stats(struct sched_domain *sd, - unsigned long load, max_cpu_load, min_cpu_load; - int i; - unsigned int balance_cpu = -1, first_idle_cpu = 0; -- unsigned long sum_avg_load_per_task; -- unsigned long avg_load_per_task; -+ unsigned long avg_load_per_task = 0; - - if (local_group) { - balance_cpu = group_first_cpu(group); -@@ -3752,7 +3752,6 @@ static inline void update_sg_lb_stats(struct sched_domain *sd, - } - - /* Tally up the load of all CPUs in the group */ -- sum_avg_load_per_task = avg_load_per_task = 0; - max_cpu_load = 0; - min_cpu_load = ~0UL; - -@@ -3782,7 +3781,6 @@ static inline void update_sg_lb_stats(struct sched_domain *sd, - sgs->sum_nr_running += rq->nr_running; - sgs->sum_weighted_load += weighted_cpuload(i); - -- sum_avg_load_per_task += cpu_avg_load_per_task(i); - } - - /* -@@ -3800,7 +3798,6 @@ static inline void update_sg_lb_stats(struct sched_domain *sd, - /* Adjust by relative CPU power of the group */ - sgs->avg_load = (sgs->group_load * SCHED_LOAD_SCALE) / group->cpu_power; - -- - /* - * Consider the group unbalanced when the imbalance is larger - * than the average weight of two tasks. -@@ -3810,8 +3807,8 @@ static inline void update_sg_lb_stats(struct sched_domain *sd, - * normalized nr_running number somewhere that negates - * the hierarchy? - */ -- avg_load_per_task = (sum_avg_load_per_task * SCHED_LOAD_SCALE) / -- group->cpu_power; -+ if (sgs->sum_nr_running) -+ avg_load_per_task = sgs->sum_weighted_load / sgs->sum_nr_running; - - if ((max_cpu_load - min_cpu_load) > 2*avg_load_per_task) - sgs->group_imb = 1; -@@ -3880,6 +3877,7 @@ static inline void update_sd_lb_stats(struct sched_domain *sd, int this_cpu, - sds->max_load = sgs.avg_load; - sds->busiest = group; - sds->busiest_nr_running = sgs.sum_nr_running; -+ sds->busiest_group_capacity = sgs.group_capacity; - sds->busiest_load_per_task = sgs.sum_weighted_load; - sds->group_imb = sgs.group_imb; - } -@@ -3902,6 +3900,7 @@ static inline void fix_small_imbalance(struct sd_lb_stats *sds, - { - unsigned long tmp, pwr_now = 0, pwr_move = 0; - unsigned int imbn = 2; -+ unsigned long scaled_busy_load_per_task; - - if (sds->this_nr_running) { - sds->this_load_per_task /= sds->this_nr_running; -@@ -3912,8 +3911,12 @@ static inline void fix_small_imbalance(struct sd_lb_stats *sds, - sds->this_load_per_task = - cpu_avg_load_per_task(this_cpu); - -- if (sds->max_load - sds->this_load + sds->busiest_load_per_task >= -- sds->busiest_load_per_task * imbn) { -+ scaled_busy_load_per_task = sds->busiest_load_per_task -+ * SCHED_LOAD_SCALE; -+ scaled_busy_load_per_task /= sds->busiest->cpu_power; -+ -+ if (sds->max_load - sds->this_load + scaled_busy_load_per_task >= -+ (scaled_busy_load_per_task * imbn)) { - *imbalance = sds->busiest_load_per_task; - return; - } -@@ -3964,7 +3967,14 @@ static inline void fix_small_imbalance(struct sd_lb_stats *sds, - static inline void calculate_imbalance(struct sd_lb_stats *sds, int this_cpu, - unsigned long *imbalance) - { -- unsigned long max_pull; -+ unsigned long max_pull, load_above_capacity = ~0UL; -+ -+ sds->busiest_load_per_task /= sds->busiest_nr_running; -+ if (sds->group_imb) { -+ sds->busiest_load_per_task = -+ min(sds->busiest_load_per_task, sds->avg_load); -+ } -+ - /* - * In the presence of smp nice balancing, certain scenarios can have - * max load less than avg load(as we skip the groups at or below -@@ -3975,9 +3985,29 @@ static inline void calculate_imbalance(struct sd_lb_stats *sds, int this_cpu, - return fix_small_imbalance(sds, this_cpu, imbalance); - } - -- /* Don't want to pull so many tasks that a group would go idle */ -- max_pull = min(sds->max_load - sds->avg_load, -- sds->max_load - sds->busiest_load_per_task); -+ if (!sds->group_imb) { -+ /* -+ * Don't want to pull so many tasks that a group would go idle. -+ */ -+ load_above_capacity = (sds->busiest_nr_running - -+ sds->busiest_group_capacity); -+ -+ load_above_capacity *= (SCHED_LOAD_SCALE * SCHED_LOAD_SCALE); -+ -+ load_above_capacity /= sds->busiest->cpu_power; -+ } -+ -+ /* -+ * We're trying to get all the cpus to the average_load, so we don't -+ * want to push ourselves above the average load, nor do we wish to -+ * reduce the max loaded cpu below the average load. At the same time, -+ * we also don't want to reduce the group load below the group capacity -+ * (so that we can implement power-savings policies etc). Thus we look -+ * for the minimum possible imbalance. -+ * Be careful of negative numbers as they'll appear as very large values -+ * with unsigned longs. -+ */ -+ max_pull = min(sds->max_load - sds->avg_load, load_above_capacity); - - /* How much load to actually move to equalise the imbalance */ - *imbalance = min(max_pull * sds->busiest->cpu_power, -@@ -4045,7 +4075,6 @@ find_busiest_group(struct sched_domain *sd, int this_cpu, - * 4) This group is more busy than the avg busieness at this - * sched_domain. - * 5) The imbalance is within the specified limit. -- * 6) Any rebalance would lead to ping-pong - */ - if (balance && !(*balance)) - goto ret; -@@ -4064,25 +4093,6 @@ find_busiest_group(struct sched_domain *sd, int this_cpu, - if (100 * sds.max_load <= sd->imbalance_pct * sds.this_load) - goto out_balanced; - -- sds.busiest_load_per_task /= sds.busiest_nr_running; -- if (sds.group_imb) -- sds.busiest_load_per_task = -- min(sds.busiest_load_per_task, sds.avg_load); -- -- /* -- * We're trying to get all the cpus to the average_load, so we don't -- * want to push ourselves above the average load, nor do we wish to -- * reduce the max loaded cpu below the average load, as either of these -- * actions would just result in more rebalancing later, and ping-pong -- * tasks around. Thus we look for the minimum possible imbalance. -- * Negative imbalances (*we* are more loaded than anyone else) will -- * be counted as no imbalance for these purposes -- we can't fix that -- * by pulling tasks to us. Be careful of negative numbers as they'll -- * appear as very large values with unsigned longs. -- */ -- if (sds.max_load <= sds.busiest_load_per_task) -- goto out_balanced; -- - /* Looks like there is an imbalance. Compute it */ - calculate_imbalance(&sds, this_cpu, imbalance); - return sds.busiest; -diff --git a/kernel/softlockup.c b/kernel/softlockup.c -index 0d4c789..4b493f6 100644 ---- a/kernel/softlockup.c -+++ b/kernel/softlockup.c -@@ -155,11 +155,11 @@ void softlockup_tick(void) - * Wake up the high-prio watchdog task twice per - * threshold timespan. - */ -- if (now > touch_ts + softlockup_thresh/2) -+ if (time_after(now - softlockup_thresh/2, touch_ts)) - wake_up_process(per_cpu(softlockup_watchdog, this_cpu)); - - /* Warn about unreasonable delays: */ -- if (now <= (touch_ts + softlockup_thresh)) -+ if (time_before_eq(now - softlockup_thresh, touch_ts)) - return; - - per_cpu(softlockup_print_ts, this_cpu) = touch_ts; -diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c -index 1370083..0e98497 100644 ---- a/kernel/time/clocksource.c -+++ b/kernel/time/clocksource.c -@@ -580,6 +580,10 @@ static inline void clocksource_select(void) { } - */ - static int __init clocksource_done_booting(void) - { -+ mutex_lock(&clocksource_mutex); -+ curr_clocksource = clocksource_default_clock(); -+ mutex_unlock(&clocksource_mutex); -+ - finished_booting = 1; - - /* -diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c -index 1e6640f..404c9ba 100644 ---- a/kernel/trace/ftrace.c -+++ b/kernel/trace/ftrace.c -@@ -3364,6 +3364,7 @@ void ftrace_graph_init_task(struct task_struct *t) - { - /* Make sure we do not use the parent ret_stack */ - t->ret_stack = NULL; -+ t->curr_ret_stack = -1; - - if (ftrace_graph_active) { - struct ftrace_ret_stack *ret_stack; -@@ -3373,7 +3374,6 @@ void ftrace_graph_init_task(struct task_struct *t) - GFP_KERNEL); - if (!ret_stack) - return; -- t->curr_ret_stack = -1; - atomic_set(&t->tracing_graph_pause, 0); - atomic_set(&t->trace_overrun, 0); - t->ftrace_timestamp = 0; -diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c -index 8c1b2d2..54191d6 100644 ---- a/kernel/trace/ring_buffer.c -+++ b/kernel/trace/ring_buffer.c -@@ -2232,12 +2232,12 @@ ring_buffer_lock_reserve(struct ring_buffer *buffer, unsigned long length) - if (ring_buffer_flags != RB_BUFFERS_ON) - return NULL; - -- if (atomic_read(&buffer->record_disabled)) -- return NULL; -- - /* If we are tracing schedule, we don't want to recurse */ - resched = ftrace_preempt_disable(); - -+ if (atomic_read(&buffer->record_disabled)) -+ goto out_nocheck; -+ - if (trace_recursive_lock()) - goto out_nocheck; - -@@ -2469,11 +2469,11 @@ int ring_buffer_write(struct ring_buffer *buffer, - if (ring_buffer_flags != RB_BUFFERS_ON) - return -EBUSY; - -- if (atomic_read(&buffer->record_disabled)) -- return -EBUSY; -- - resched = ftrace_preempt_disable(); - -+ if (atomic_read(&buffer->record_disabled)) -+ goto out; -+ - cpu = raw_smp_processor_id(); - - if (!cpumask_test_cpu(cpu, buffer->cpumask)) -diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c -index eac6875..45cfb6d 100644 ---- a/kernel/trace/trace.c -+++ b/kernel/trace/trace.c -@@ -747,10 +747,10 @@ out: - mutex_unlock(&trace_types_lock); - } - --static void __tracing_reset(struct trace_array *tr, int cpu) -+static void __tracing_reset(struct ring_buffer *buffer, int cpu) - { - ftrace_disable_cpu(); -- ring_buffer_reset_cpu(tr->buffer, cpu); -+ ring_buffer_reset_cpu(buffer, cpu); - ftrace_enable_cpu(); - } - -@@ -762,7 +762,7 @@ void tracing_reset(struct trace_array *tr, int cpu) - - /* Make sure all commits have finished */ - synchronize_sched(); -- __tracing_reset(tr, cpu); -+ __tracing_reset(buffer, cpu); - - ring_buffer_record_enable(buffer); - } -@@ -780,7 +780,7 @@ void tracing_reset_online_cpus(struct trace_array *tr) - tr->time_start = ftrace_now(tr->cpu); - - for_each_online_cpu(cpu) -- __tracing_reset(tr, cpu); -+ __tracing_reset(buffer, cpu); - - ring_buffer_record_enable(buffer); - } -@@ -857,6 +857,8 @@ void tracing_start(void) - goto out; - } - -+ /* Prevent the buffers from switching */ -+ arch_spin_lock(&ftrace_max_lock); - - buffer = global_trace.buffer; - if (buffer) -@@ -866,6 +868,8 @@ void tracing_start(void) - if (buffer) - ring_buffer_record_enable(buffer); - -+ arch_spin_unlock(&ftrace_max_lock); -+ - ftrace_start(); - out: - spin_unlock_irqrestore(&tracing_start_lock, flags); -@@ -887,6 +891,9 @@ void tracing_stop(void) - if (trace_stop_count++) - goto out; - -+ /* Prevent the buffers from switching */ -+ arch_spin_lock(&ftrace_max_lock); -+ - buffer = global_trace.buffer; - if (buffer) - ring_buffer_record_disable(buffer); -@@ -895,6 +902,8 @@ void tracing_stop(void) - if (buffer) - ring_buffer_record_disable(buffer); - -+ arch_spin_unlock(&ftrace_max_lock); -+ - out: - spin_unlock_irqrestore(&tracing_start_lock, flags); - } -@@ -1182,6 +1191,13 @@ ftrace_trace_userstack(struct ring_buffer *buffer, unsigned long flags, int pc) - if (!(trace_flags & TRACE_ITER_USERSTACKTRACE)) - return; - -+ /* -+ * NMIs can not handle page faults, even with fix ups. -+ * The save user stack can (and often does) fault. -+ */ -+ if (unlikely(in_nmi())) -+ return; -+ - event = trace_buffer_lock_reserve(buffer, TRACE_USER_STACK, - sizeof(*entry), flags, pc); - if (!event) -@@ -1628,6 +1644,7 @@ static void *s_start(struct seq_file *m, loff_t *pos) - - ftrace_enable_cpu(); - -+ iter->leftover = 0; - for (p = iter; p && l < *pos; p = s_next(m, p, &l)) - ; - -diff --git a/mm/mempolicy.c b/mm/mempolicy.c -index 290fb5b..0beac93 100644 ---- a/mm/mempolicy.c -+++ b/mm/mempolicy.c -@@ -2167,8 +2167,8 @@ int mpol_parse_str(char *str, struct mempolicy **mpol, int no_context) - char *rest = nodelist; - while (isdigit(*rest)) - rest++; -- if (!*rest) -- err = 0; -+ if (*rest) -+ goto out; - } - break; - case MPOL_INTERLEAVE: -@@ -2177,7 +2177,6 @@ int mpol_parse_str(char *str, struct mempolicy **mpol, int no_context) - */ - if (!nodelist) - nodes = node_states[N_HIGH_MEMORY]; -- err = 0; - break; - case MPOL_LOCAL: - /* -@@ -2187,11 +2186,19 @@ int mpol_parse_str(char *str, struct mempolicy **mpol, int no_context) - goto out; - mode = MPOL_PREFERRED; - break; -- -- /* -- * case MPOL_BIND: mpol_new() enforces non-empty nodemask. -- * case MPOL_DEFAULT: mpol_new() enforces empty nodemask, ignores flags. -- */ -+ case MPOL_DEFAULT: -+ /* -+ * Insist on a empty nodelist -+ */ -+ if (!nodelist) -+ err = 0; -+ goto out; -+ case MPOL_BIND: -+ /* -+ * Insist on a nodelist -+ */ -+ if (!nodelist) -+ goto out; - } - - mode_flags = 0; -@@ -2205,13 +2212,14 @@ int mpol_parse_str(char *str, struct mempolicy **mpol, int no_context) - else if (!strcmp(flags, "relative")) - mode_flags |= MPOL_F_RELATIVE_NODES; - else -- err = 1; -+ goto out; - } - - new = mpol_new(mode, mode_flags, &nodes); - if (IS_ERR(new)) -- err = 1; -- else { -+ goto out; -+ -+ { - int ret; - NODEMASK_SCRATCH(scratch); - if (scratch) { -@@ -2222,13 +2230,15 @@ int mpol_parse_str(char *str, struct mempolicy **mpol, int no_context) - ret = -ENOMEM; - NODEMASK_SCRATCH_FREE(scratch); - if (ret) { -- err = 1; - mpol_put(new); -- } else if (no_context) { -- /* save for contextualization */ -- new->w.user_nodemask = nodes; -+ goto out; - } - } -+ err = 0; -+ if (no_context) { -+ /* save for contextualization */ -+ new->w.user_nodemask = nodes; -+ } - - out: - /* Restore string for error message */ -diff --git a/net/8021q/vlan_core.c b/net/8021q/vlan_core.c -index e75a2f3..152760a 100644 ---- a/net/8021q/vlan_core.c -+++ b/net/8021q/vlan_core.c -@@ -11,7 +11,7 @@ int __vlan_hwaccel_rx(struct sk_buff *skb, struct vlan_group *grp, - if (netpoll_rx(skb)) - return NET_RX_DROP; - -- if (skb_bond_should_drop(skb)) -+ if (skb_bond_should_drop(skb, ACCESS_ONCE(skb->dev->master))) - goto drop; - - __vlan_hwaccel_put_tag(skb, vlan_tci); -@@ -82,7 +82,7 @@ vlan_gro_common(struct napi_struct *napi, struct vlan_group *grp, - { - struct sk_buff *p; - -- if (skb_bond_should_drop(skb)) -+ if (skb_bond_should_drop(skb, ACCESS_ONCE(skb->dev->master))) - goto drop; - - __vlan_hwaccel_put_tag(skb, vlan_tci); -diff --git a/net/bluetooth/l2cap.c b/net/bluetooth/l2cap.c -index 400efa2..615fecc 100644 ---- a/net/bluetooth/l2cap.c -+++ b/net/bluetooth/l2cap.c -@@ -2830,6 +2830,11 @@ static inline int l2cap_config_rsp(struct l2cap_conn *conn, struct l2cap_cmd_hdr - int len = cmd->len - sizeof(*rsp); - char req[64]; - -+ if (len > sizeof(req) - sizeof(struct l2cap_conf_req)) { -+ l2cap_send_disconn_req(conn, sk); -+ goto done; -+ } -+ - /* throw out any old stored conf requests */ - result = L2CAP_CONF_SUCCESS; - len = l2cap_parse_conf_rsp(sk, rsp->data, -@@ -3942,16 +3947,24 @@ static ssize_t l2cap_sysfs_show(struct class *dev, char *buf) - struct sock *sk; - struct hlist_node *node; - char *str = buf; -+ int size = PAGE_SIZE; - - read_lock_bh(&l2cap_sk_list.lock); - - sk_for_each(sk, node, &l2cap_sk_list.head) { - struct l2cap_pinfo *pi = l2cap_pi(sk); -+ int len; - -- str += sprintf(str, "%s %s %d %d 0x%4.4x 0x%4.4x %d %d %d\n", -+ len = snprintf(str, size, "%s %s %d %d 0x%4.4x 0x%4.4x %d %d %d\n", - batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst), - sk->sk_state, __le16_to_cpu(pi->psm), pi->scid, - pi->dcid, pi->imtu, pi->omtu, pi->sec_level); -+ -+ size -= len; -+ if (size <= 0) -+ break; -+ -+ str += len; - } - - read_unlock_bh(&l2cap_sk_list.lock); -diff --git a/net/bluetooth/rfcomm/core.c b/net/bluetooth/rfcomm/core.c -index 89f4a59..3fe9c7c 100644 ---- a/net/bluetooth/rfcomm/core.c -+++ b/net/bluetooth/rfcomm/core.c -@@ -2103,6 +2103,7 @@ static ssize_t rfcomm_dlc_sysfs_show(struct class *dev, char *buf) - struct rfcomm_session *s; - struct list_head *pp, *p; - char *str = buf; -+ int size = PAGE_SIZE; - - rfcomm_lock(); - -@@ -2111,11 +2112,21 @@ static ssize_t rfcomm_dlc_sysfs_show(struct class *dev, char *buf) - list_for_each(pp, &s->dlcs) { - struct sock *sk = s->sock->sk; - struct rfcomm_dlc *d = list_entry(pp, struct rfcomm_dlc, list); -+ int len; - -- str += sprintf(str, "%s %s %ld %d %d %d %d\n", -+ len = snprintf(str, size, "%s %s %ld %d %d %d %d\n", - batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst), - d->state, d->dlci, d->mtu, d->rx_credits, d->tx_credits); -+ -+ size -= len; -+ if (size <= 0) -+ break; -+ -+ str += len; - } -+ -+ if (size <= 0) -+ break; - } - - rfcomm_unlock(); -diff --git a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c -index 4b5968d..bc03b50 100644 ---- a/net/bluetooth/rfcomm/sock.c -+++ b/net/bluetooth/rfcomm/sock.c -@@ -1066,13 +1066,22 @@ static ssize_t rfcomm_sock_sysfs_show(struct class *dev, char *buf) - struct sock *sk; - struct hlist_node *node; - char *str = buf; -+ int size = PAGE_SIZE; - - read_lock_bh(&rfcomm_sk_list.lock); - - sk_for_each(sk, node, &rfcomm_sk_list.head) { -- str += sprintf(str, "%s %s %d %d\n", -+ int len; -+ -+ len = snprintf(str, size, "%s %s %d %d\n", - batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst), - sk->sk_state, rfcomm_pi(sk)->channel); -+ -+ size -= len; -+ if (size <= 0) -+ break; -+ -+ str += len; - } - - read_unlock_bh(&rfcomm_sk_list.lock); -diff --git a/net/bluetooth/sco.c b/net/bluetooth/sco.c -index dd8f6ec..66cab63 100644 ---- a/net/bluetooth/sco.c -+++ b/net/bluetooth/sco.c -@@ -958,13 +958,22 @@ static ssize_t sco_sysfs_show(struct class *dev, char *buf) - struct sock *sk; - struct hlist_node *node; - char *str = buf; -+ int size = PAGE_SIZE; - - read_lock_bh(&sco_sk_list.lock); - - sk_for_each(sk, node, &sco_sk_list.head) { -- str += sprintf(str, "%s %s %d\n", -+ int len; -+ -+ len = snprintf(str, size, "%s %s %d\n", - batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst), - sk->sk_state); -+ -+ size -= len; -+ if (size <= 0) -+ break; -+ -+ str += len; - } - - read_unlock_bh(&sco_sk_list.lock); -diff --git a/net/core/dev.c b/net/core/dev.c -index ec87421..f51f940 100644 ---- a/net/core/dev.c -+++ b/net/core/dev.c -@@ -2421,6 +2421,7 @@ int netif_receive_skb(struct sk_buff *skb) - { - struct packet_type *ptype, *pt_prev; - struct net_device *orig_dev; -+ struct net_device *master; - struct net_device *null_or_orig; - int ret = NET_RX_DROP; - __be16 type; -@@ -2440,11 +2441,12 @@ int netif_receive_skb(struct sk_buff *skb) - - null_or_orig = NULL; - orig_dev = skb->dev; -- if (orig_dev->master) { -- if (skb_bond_should_drop(skb)) -+ master = ACCESS_ONCE(orig_dev->master); -+ if (master) { -+ if (skb_bond_should_drop(skb, master)) - null_or_orig = orig_dev; /* deliver only exact match */ - else -- skb->dev = orig_dev->master; -+ skb->dev = master; - } - - __get_cpu_var(netdev_rx_stat).total++; -diff --git a/net/core/sock.c b/net/core/sock.c -index e1f6f22..5779f31 100644 ---- a/net/core/sock.c -+++ b/net/core/sock.c -@@ -340,8 +340,12 @@ int sk_receive_skb(struct sock *sk, struct sk_buff *skb, const int nested) - rc = sk_backlog_rcv(sk, skb); - - mutex_release(&sk->sk_lock.dep_map, 1, _RET_IP_); -- } else -- sk_add_backlog(sk, skb); -+ } else if (sk_add_backlog(sk, skb)) { -+ bh_unlock_sock(sk); -+ atomic_inc(&sk->sk_drops); -+ goto discard_and_relse; -+ } -+ - bh_unlock_sock(sk); - out: - sock_put(sk); -@@ -1138,6 +1142,7 @@ struct sock *sk_clone(const struct sock *sk, const gfp_t priority) - sock_lock_init(newsk); - bh_lock_sock(newsk); - newsk->sk_backlog.head = newsk->sk_backlog.tail = NULL; -+ newsk->sk_backlog.len = 0; - - atomic_set(&newsk->sk_rmem_alloc, 0); - /* -@@ -1541,6 +1546,12 @@ static void __release_sock(struct sock *sk) - - bh_lock_sock(sk); - } while ((skb = sk->sk_backlog.head) != NULL); -+ -+ /* -+ * Doing the zeroing here guarantee we can not loop forever -+ * while a wild producer attempts to flood us. -+ */ -+ sk->sk_backlog.len = 0; - } - - /** -@@ -1873,6 +1884,7 @@ void sock_init_data(struct socket *sock, struct sock *sk) - sk->sk_allocation = GFP_KERNEL; - sk->sk_rcvbuf = sysctl_rmem_default; - sk->sk_sndbuf = sysctl_wmem_default; -+ sk->sk_backlog.limit = sk->sk_rcvbuf << 1; - sk->sk_state = TCP_CLOSE; - sk_set_socket(sk, sock); - -diff --git a/net/dccp/minisocks.c b/net/dccp/minisocks.c -index af226a0..0d508c3 100644 ---- a/net/dccp/minisocks.c -+++ b/net/dccp/minisocks.c -@@ -254,7 +254,7 @@ int dccp_child_process(struct sock *parent, struct sock *child, - * in main socket hash table and lock on listening - * socket does not protect us more. - */ -- sk_add_backlog(child, skb); -+ __sk_add_backlog(child, skb); - } - - bh_unlock_sock(child); -diff --git a/net/ipv4/ip_gre.c b/net/ipv4/ip_gre.c -index f36ce15..68c1454 100644 ---- a/net/ipv4/ip_gre.c -+++ b/net/ipv4/ip_gre.c -@@ -810,11 +810,13 @@ static netdev_tx_t ipgre_tunnel_xmit(struct sk_buff *skb, struct net_device *dev - tunnel->err_count = 0; - } - -- max_headroom = LL_RESERVED_SPACE(tdev) + gre_hlen; -+ max_headroom = LL_RESERVED_SPACE(tdev) + gre_hlen + rt->u.dst.header_len; - - if (skb_headroom(skb) < max_headroom || skb_shared(skb)|| - (skb_cloned(skb) && !skb_clone_writable(skb, 0))) { - struct sk_buff *new_skb = skb_realloc_headroom(skb, max_headroom); -+ if (max_headroom > dev->needed_headroom) -+ dev->needed_headroom = max_headroom; - if (!new_skb) { - ip_rt_put(rt); - txq->tx_dropped++; -diff --git a/net/ipv4/route.c b/net/ipv4/route.c -index d62b05d..af86e41 100644 ---- a/net/ipv4/route.c -+++ b/net/ipv4/route.c -@@ -922,10 +922,8 @@ static void rt_secret_rebuild_oneshot(struct net *net) - { - del_timer_sync(&net->ipv4.rt_secret_timer); - rt_cache_invalidate(net); -- if (ip_rt_secret_interval) { -- net->ipv4.rt_secret_timer.expires += ip_rt_secret_interval; -- add_timer(&net->ipv4.rt_secret_timer); -- } -+ if (ip_rt_secret_interval) -+ mod_timer(&net->ipv4.rt_secret_timer, jiffies + ip_rt_secret_interval); - } - - static void rt_emergency_hash_rebuild(struct net *net) -@@ -1417,7 +1415,7 @@ void ip_rt_redirect(__be32 old_gw, __be32 daddr, __be32 new_gw, - dev_hold(rt->u.dst.dev); - if (rt->idev) - in_dev_hold(rt->idev); -- rt->u.dst.obsolete = 0; -+ rt->u.dst.obsolete = -1; - rt->u.dst.lastuse = jiffies; - rt->u.dst.path = &rt->u.dst; - rt->u.dst.neighbour = NULL; -@@ -1482,11 +1480,12 @@ static struct dst_entry *ipv4_negative_advice(struct dst_entry *dst) - struct dst_entry *ret = dst; - - if (rt) { -- if (dst->obsolete) { -+ if (dst->obsolete > 0) { - ip_rt_put(rt); - ret = NULL; - } else if ((rt->rt_flags & RTCF_REDIRECTED) || -- rt->u.dst.expires) { -+ (rt->u.dst.expires && -+ time_after_eq(jiffies, rt->u.dst.expires))) { - unsigned hash = rt_hash(rt->fl.fl4_dst, rt->fl.fl4_src, - rt->fl.oif, - rt_genid(dev_net(dst->dev))); -@@ -1702,7 +1701,9 @@ static void ip_rt_update_pmtu(struct dst_entry *dst, u32 mtu) - - static struct dst_entry *ipv4_dst_check(struct dst_entry *dst, u32 cookie) - { -- return NULL; -+ if (rt_is_expired((struct rtable *)dst)) -+ return NULL; -+ return dst; - } - - static void ipv4_dst_destroy(struct dst_entry *dst) -@@ -1864,7 +1865,8 @@ static int ip_route_input_mc(struct sk_buff *skb, __be32 daddr, __be32 saddr, - if (!rth) - goto e_nobufs; - -- rth->u.dst.output= ip_rt_bug; -+ rth->u.dst.output = ip_rt_bug; -+ rth->u.dst.obsolete = -1; - - atomic_set(&rth->u.dst.__refcnt, 1); - rth->u.dst.flags= DST_HOST; -@@ -2025,6 +2027,7 @@ static int __mkroute_input(struct sk_buff *skb, - rth->fl.oif = 0; - rth->rt_spec_dst= spec_dst; - -+ rth->u.dst.obsolete = -1; - rth->u.dst.input = ip_forward; - rth->u.dst.output = ip_output; - rth->rt_genid = rt_genid(dev_net(rth->u.dst.dev)); -@@ -2189,6 +2192,7 @@ local_input: - goto e_nobufs; - - rth->u.dst.output= ip_rt_bug; -+ rth->u.dst.obsolete = -1; - rth->rt_genid = rt_genid(net); - - atomic_set(&rth->u.dst.__refcnt, 1); -@@ -2415,6 +2419,7 @@ static int __mkroute_output(struct rtable **result, - rth->rt_spec_dst= fl->fl4_src; - - rth->u.dst.output=ip_output; -+ rth->u.dst.obsolete = -1; - rth->rt_genid = rt_genid(dev_net(dev_out)); - - RT_CACHE_STAT_INC(out_slow_tot); -@@ -3072,22 +3077,20 @@ static void rt_secret_reschedule(int old) - rtnl_lock(); - for_each_net(net) { - int deleted = del_timer_sync(&net->ipv4.rt_secret_timer); -+ long time; - - if (!new) - continue; - - if (deleted) { -- long time = net->ipv4.rt_secret_timer.expires - jiffies; -+ time = net->ipv4.rt_secret_timer.expires - jiffies; - - if (time <= 0 || (time += diff) <= 0) - time = 0; -- -- net->ipv4.rt_secret_timer.expires = time; - } else -- net->ipv4.rt_secret_timer.expires = new; -+ time = new; - -- net->ipv4.rt_secret_timer.expires += jiffies; -- add_timer(&net->ipv4.rt_secret_timer); -+ mod_timer(&net->ipv4.rt_secret_timer, jiffies + time); - } - rtnl_unlock(); - } -diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c -index b0a26bb..564a0f8 100644 ---- a/net/ipv4/tcp.c -+++ b/net/ipv4/tcp.c -@@ -429,7 +429,7 @@ unsigned int tcp_poll(struct file *file, struct socket *sock, poll_table *wait) - if (tp->urg_seq == tp->copied_seq && - !sock_flag(sk, SOCK_URGINLINE) && - tp->urg_data) -- target--; -+ target++; - - /* Potential race condition. If read of tp below will - * escape above sk->sk_state, we can be illegally awaken -@@ -1254,6 +1254,39 @@ static void tcp_prequeue_process(struct sock *sk) - tp->ucopy.memory = 0; - } - -+#ifdef CONFIG_NET_DMA -+static void tcp_service_net_dma(struct sock *sk, bool wait) -+{ -+ dma_cookie_t done, used; -+ dma_cookie_t last_issued; -+ struct tcp_sock *tp = tcp_sk(sk); -+ -+ if (!tp->ucopy.dma_chan) -+ return; -+ -+ last_issued = tp->ucopy.dma_cookie; -+ dma_async_memcpy_issue_pending(tp->ucopy.dma_chan); -+ -+ do { -+ if (dma_async_memcpy_complete(tp->ucopy.dma_chan, -+ last_issued, &done, -+ &used) == DMA_SUCCESS) { -+ /* Safe to free early-copied skbs now */ -+ __skb_queue_purge(&sk->sk_async_wait_queue); -+ break; -+ } else { -+ struct sk_buff *skb; -+ while ((skb = skb_peek(&sk->sk_async_wait_queue)) && -+ (dma_async_is_complete(skb->dma_cookie, done, -+ used) == DMA_SUCCESS)) { -+ __skb_dequeue(&sk->sk_async_wait_queue); -+ kfree_skb(skb); -+ } -+ } -+ } while (wait); -+} -+#endif -+ - static inline struct sk_buff *tcp_recv_skb(struct sock *sk, u32 seq, u32 *off) - { - struct sk_buff *skb; -@@ -1546,6 +1579,10 @@ int tcp_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg, - /* __ Set realtime policy in scheduler __ */ - } - -+#ifdef CONFIG_NET_DMA -+ if (tp->ucopy.dma_chan) -+ dma_async_memcpy_issue_pending(tp->ucopy.dma_chan); -+#endif - if (copied >= target) { - /* Do not sleep, just process backlog. */ - release_sock(sk); -@@ -1554,6 +1591,7 @@ int tcp_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg, - sk_wait_data(sk, &timeo); - - #ifdef CONFIG_NET_DMA -+ tcp_service_net_dma(sk, false); /* Don't block */ - tp->ucopy.wakeup = 0; - #endif - -@@ -1633,6 +1671,9 @@ do_prequeue: - copied = -EFAULT; - break; - } -+ -+ dma_async_memcpy_issue_pending(tp->ucopy.dma_chan); -+ - if ((offset + used) == skb->len) - copied_early = 1; - -@@ -1702,27 +1743,9 @@ skip_copy: - } - - #ifdef CONFIG_NET_DMA -- if (tp->ucopy.dma_chan) { -- dma_cookie_t done, used; -- -- dma_async_memcpy_issue_pending(tp->ucopy.dma_chan); -- -- while (dma_async_memcpy_complete(tp->ucopy.dma_chan, -- tp->ucopy.dma_cookie, &done, -- &used) == DMA_IN_PROGRESS) { -- /* do partial cleanup of sk_async_wait_queue */ -- while ((skb = skb_peek(&sk->sk_async_wait_queue)) && -- (dma_async_is_complete(skb->dma_cookie, done, -- used) == DMA_SUCCESS)) { -- __skb_dequeue(&sk->sk_async_wait_queue); -- kfree_skb(skb); -- } -- } -+ tcp_service_net_dma(sk, true); /* Wait for queue to drain */ -+ tp->ucopy.dma_chan = NULL; - -- /* Safe to free early-copied skbs now */ -- __skb_queue_purge(&sk->sk_async_wait_queue); -- tp->ucopy.dma_chan = NULL; -- } - if (tp->ucopy.pinned_list) { - dma_unpin_iovec_pages(tp->ucopy.pinned_list); - tp->ucopy.pinned_list = NULL; -diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c -index 3fddc69..b347d3c 100644 ---- a/net/ipv4/tcp_input.c -+++ b/net/ipv4/tcp_input.c -@@ -2499,6 +2499,9 @@ static void tcp_mark_head_lost(struct sock *sk, int packets) - int err; - unsigned int mss; - -+ if (packets == 0) -+ return; -+ - WARN_ON(packets > tp->packets_out); - if (tp->lost_skb_hint) { - skb = tp->lost_skb_hint; -diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c -index 65b8ebf..de935e3 100644 ---- a/net/ipv4/tcp_ipv4.c -+++ b/net/ipv4/tcp_ipv4.c -@@ -1677,8 +1677,10 @@ process: - if (!tcp_prequeue(sk, skb)) - ret = tcp_v4_do_rcv(sk, skb); - } -- } else -- sk_add_backlog(sk, skb); -+ } else if (sk_add_backlog(sk, skb)) { -+ bh_unlock_sock(sk); -+ goto discard_and_relse; -+ } - bh_unlock_sock(sk); - - sock_put(sk); -diff --git a/net/ipv4/tcp_minisocks.c b/net/ipv4/tcp_minisocks.c -index f206ee5..4199bc6 100644 ---- a/net/ipv4/tcp_minisocks.c -+++ b/net/ipv4/tcp_minisocks.c -@@ -728,7 +728,7 @@ int tcp_child_process(struct sock *parent, struct sock *child, - * in main socket hash table and lock on listening - * socket does not protect us more. - */ -- sk_add_backlog(child, skb); -+ __sk_add_backlog(child, skb); - } - - bh_unlock_sock(child); -diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c -index 383ce23..dc26654 100644 ---- a/net/ipv4/tcp_output.c -+++ b/net/ipv4/tcp_output.c -@@ -2393,13 +2393,17 @@ struct sk_buff *tcp_make_synack(struct sock *sk, struct dst_entry *dst, - struct tcp_extend_values *xvp = tcp_xv(rvp); - struct inet_request_sock *ireq = inet_rsk(req); - struct tcp_sock *tp = tcp_sk(sk); -+ const struct tcp_cookie_values *cvp = tp->cookie_values; - struct tcphdr *th; - struct sk_buff *skb; - struct tcp_md5sig_key *md5; - int tcp_header_size; - int mss; -+ int s_data_desired = 0; - -- skb = sock_wmalloc(sk, MAX_TCP_HEADER + 15, 1, GFP_ATOMIC); -+ if (cvp != NULL && cvp->s_data_constant && cvp->s_data_desired) -+ s_data_desired = cvp->s_data_desired; -+ skb = sock_wmalloc(sk, MAX_TCP_HEADER + 15 + s_data_desired, 1, GFP_ATOMIC); - if (skb == NULL) - return NULL; - -@@ -2454,16 +2458,12 @@ struct sk_buff *tcp_make_synack(struct sock *sk, struct dst_entry *dst, - TCPCB_FLAG_SYN | TCPCB_FLAG_ACK); - - if (OPTION_COOKIE_EXTENSION & opts.options) { -- const struct tcp_cookie_values *cvp = tp->cookie_values; -- -- if (cvp != NULL && -- cvp->s_data_constant && -- cvp->s_data_desired > 0) { -- u8 *buf = skb_put(skb, cvp->s_data_desired); -+ if (s_data_desired) { -+ u8 *buf = skb_put(skb, s_data_desired); - - /* copy data directly from the listening socket. */ -- memcpy(buf, cvp->s_data_payload, cvp->s_data_desired); -- TCP_SKB_CB(skb)->end_seq += cvp->s_data_desired; -+ memcpy(buf, cvp->s_data_payload, s_data_desired); -+ TCP_SKB_CB(skb)->end_seq += s_data_desired; - } - - if (opts.hash_size > 0) { -diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c -index f0126fd..112c611 100644 ---- a/net/ipv4/udp.c -+++ b/net/ipv4/udp.c -@@ -1372,8 +1372,10 @@ int udp_queue_rcv_skb(struct sock *sk, struct sk_buff *skb) - bh_lock_sock(sk); - if (!sock_owned_by_user(sk)) - rc = __udp_queue_rcv_skb(sk, skb); -- else -- sk_add_backlog(sk, skb); -+ else if (sk_add_backlog(sk, skb)) { -+ bh_unlock_sock(sk); -+ goto drop; -+ } - bh_unlock_sock(sk); - - return rc; -diff --git a/net/ipv4/xfrm4_policy.c b/net/ipv4/xfrm4_policy.c -index 67107d6..e4a1483 100644 ---- a/net/ipv4/xfrm4_policy.c -+++ b/net/ipv4/xfrm4_policy.c -@@ -91,11 +91,12 @@ static int xfrm4_init_path(struct xfrm_dst *path, struct dst_entry *dst, - return 0; - } - --static int xfrm4_fill_dst(struct xfrm_dst *xdst, struct net_device *dev) -+static int xfrm4_fill_dst(struct xfrm_dst *xdst, struct net_device *dev, -+ struct flowi *fl) - { - struct rtable *rt = (struct rtable *)xdst->route; - -- xdst->u.rt.fl = rt->fl; -+ xdst->u.rt.fl = *fl; - - xdst->u.dst.dev = dev; - dev_hold(dev); -diff --git a/net/ipv6/route.c b/net/ipv6/route.c -index c2bd74c..6232284 100644 ---- a/net/ipv6/route.c -+++ b/net/ipv6/route.c -@@ -897,12 +897,17 @@ static struct dst_entry *ip6_negative_advice(struct dst_entry *dst) - struct rt6_info *rt = (struct rt6_info *) dst; - - if (rt) { -- if (rt->rt6i_flags & RTF_CACHE) -- ip6_del_rt(rt); -- else -+ if (rt->rt6i_flags & RTF_CACHE) { -+ if (rt6_check_expired(rt)) { -+ ip6_del_rt(rt); -+ dst = NULL; -+ } -+ } else { - dst_release(dst); -+ dst = NULL; -+ } - } -- return NULL; -+ return dst; - } - - static void ip6_link_failure(struct sk_buff *skb) -diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c -index febfd59..548a06e 100644 ---- a/net/ipv6/tcp_ipv6.c -+++ b/net/ipv6/tcp_ipv6.c -@@ -1732,8 +1732,10 @@ process: - if (!tcp_prequeue(sk, skb)) - ret = tcp_v6_do_rcv(sk, skb); - } -- } else -- sk_add_backlog(sk, skb); -+ } else if (sk_add_backlog(sk, skb)) { -+ bh_unlock_sock(sk); -+ goto discard_and_relse; -+ } - bh_unlock_sock(sk); - - sock_put(sk); -diff --git a/net/ipv6/udp.c b/net/ipv6/udp.c -index 69ebdbe..d9714d2 100644 ---- a/net/ipv6/udp.c -+++ b/net/ipv6/udp.c -@@ -584,16 +584,20 @@ static void flush_stack(struct sock **stack, unsigned int count, - bh_lock_sock(sk); - if (!sock_owned_by_user(sk)) - udpv6_queue_rcv_skb(sk, skb1); -- else -- sk_add_backlog(sk, skb1); -+ else if (sk_add_backlog(sk, skb1)) { -+ kfree_skb(skb1); -+ bh_unlock_sock(sk); -+ goto drop; -+ } - bh_unlock_sock(sk); -- } else { -- atomic_inc(&sk->sk_drops); -- UDP6_INC_STATS_BH(sock_net(sk), -- UDP_MIB_RCVBUFERRORS, IS_UDPLITE(sk)); -- UDP6_INC_STATS_BH(sock_net(sk), -- UDP_MIB_INERRORS, IS_UDPLITE(sk)); -+ continue; - } -+drop: -+ atomic_inc(&sk->sk_drops); -+ UDP6_INC_STATS_BH(sock_net(sk), -+ UDP_MIB_RCVBUFERRORS, IS_UDPLITE(sk)); -+ UDP6_INC_STATS_BH(sock_net(sk), -+ UDP_MIB_INERRORS, IS_UDPLITE(sk)); - } - } - /* -@@ -756,8 +760,12 @@ int __udp6_lib_rcv(struct sk_buff *skb, struct udp_table *udptable, - bh_lock_sock(sk); - if (!sock_owned_by_user(sk)) - udpv6_queue_rcv_skb(sk, skb); -- else -- sk_add_backlog(sk, skb); -+ else if (sk_add_backlog(sk, skb)) { -+ atomic_inc(&sk->sk_drops); -+ bh_unlock_sock(sk); -+ sock_put(sk); -+ goto discard; -+ } - bh_unlock_sock(sk); - sock_put(sk); - return 0; -diff --git a/net/ipv6/xfrm6_policy.c b/net/ipv6/xfrm6_policy.c -index dbdc696..ae18165 100644 ---- a/net/ipv6/xfrm6_policy.c -+++ b/net/ipv6/xfrm6_policy.c -@@ -116,7 +116,8 @@ static int xfrm6_init_path(struct xfrm_dst *path, struct dst_entry *dst, - return 0; - } - --static int xfrm6_fill_dst(struct xfrm_dst *xdst, struct net_device *dev) -+static int xfrm6_fill_dst(struct xfrm_dst *xdst, struct net_device *dev, -+ struct flowi *fl) - { - struct rt6_info *rt = (struct rt6_info*)xdst->route; - -diff --git a/net/llc/llc_c_ac.c b/net/llc/llc_c_ac.c -index 019c780..86d6985 100644 ---- a/net/llc/llc_c_ac.c -+++ b/net/llc/llc_c_ac.c -@@ -1437,7 +1437,7 @@ static void llc_process_tmr_ev(struct sock *sk, struct sk_buff *skb) - llc_conn_state_process(sk, skb); - else { - llc_set_backlog_type(skb, LLC_EVENT); -- sk_add_backlog(sk, skb); -+ __sk_add_backlog(sk, skb); - } - } - } -diff --git a/net/llc/llc_conn.c b/net/llc/llc_conn.c -index c6bab39..c61ca88 100644 ---- a/net/llc/llc_conn.c -+++ b/net/llc/llc_conn.c -@@ -756,7 +756,8 @@ void llc_conn_handler(struct llc_sap *sap, struct sk_buff *skb) - else { - dprintk("%s: adding to backlog...\n", __func__); - llc_set_backlog_type(skb, LLC_PACKET); -- sk_add_backlog(sk, skb); -+ if (sk_add_backlog(sk, skb)) -+ goto drop_unlock; - } - out: - bh_unlock_sock(sk); -diff --git a/net/mac80211/ieee80211_i.h b/net/mac80211/ieee80211_i.h -index 91dc863..3521c17 100644 ---- a/net/mac80211/ieee80211_i.h -+++ b/net/mac80211/ieee80211_i.h -@@ -264,6 +264,7 @@ enum ieee80211_sta_flags { - IEEE80211_STA_DISABLE_11N = BIT(4), - IEEE80211_STA_CSA_RECEIVED = BIT(5), - IEEE80211_STA_MFP_ENABLED = BIT(6), -+ IEEE80211_STA_NULLFUNC_ACKED = BIT(7), - }; - - /* flags for MLME request */ -diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c -index 05a18f4..1a209ac 100644 ---- a/net/mac80211/mlme.c -+++ b/net/mac80211/mlme.c -@@ -205,7 +205,8 @@ static u32 ieee80211_enable_ht(struct ieee80211_sub_if_data *sdata, - sta = sta_info_get(local, bssid); - if (sta) - rate_control_rate_update(local, sband, sta, -- IEEE80211_RC_HT_CHANGED); -+ IEEE80211_RC_HT_CHANGED, -+ local->oper_channel_type); - rcu_read_unlock(); - } - -@@ -661,8 +662,11 @@ static void ieee80211_enable_ps(struct ieee80211_local *local, - } else { - if (local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK) - ieee80211_send_nullfunc(local, sdata, 1); -- conf->flags |= IEEE80211_CONF_PS; -- ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS); -+ -+ if (!(local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS)) { -+ conf->flags |= IEEE80211_CONF_PS; -+ ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS); -+ } - } - } - -@@ -753,6 +757,7 @@ void ieee80211_dynamic_ps_enable_work(struct work_struct *work) - container_of(work, struct ieee80211_local, - dynamic_ps_enable_work); - struct ieee80211_sub_if_data *sdata = local->ps_sdata; -+ struct ieee80211_if_managed *ifmgd = &sdata->u.mgd; - - /* can only happen when PS was just disabled anyway */ - if (!sdata) -@@ -761,11 +766,16 @@ void ieee80211_dynamic_ps_enable_work(struct work_struct *work) - if (local->hw.conf.flags & IEEE80211_CONF_PS) - return; - -- if (local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK) -+ if ((local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK) && -+ (!(ifmgd->flags & IEEE80211_STA_NULLFUNC_ACKED))) - ieee80211_send_nullfunc(local, sdata, 1); - -- local->hw.conf.flags |= IEEE80211_CONF_PS; -- ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS); -+ if (!(local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS) || -+ (ifmgd->flags & IEEE80211_STA_NULLFUNC_ACKED)) { -+ ifmgd->flags &= ~IEEE80211_STA_NULLFUNC_ACKED; -+ local->hw.conf.flags |= IEEE80211_CONF_PS; -+ ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS); -+ } - } - - void ieee80211_dynamic_ps_timer(unsigned long data) -@@ -2467,6 +2477,7 @@ int ieee80211_mgd_assoc(struct ieee80211_sub_if_data *sdata, - list_add(&wk->list, &ifmgd->work_list); - - ifmgd->flags &= ~IEEE80211_STA_DISABLE_11N; -+ ifmgd->flags &= ~IEEE80211_STA_NULLFUNC_ACKED; - - for (i = 0; i < req->crypto.n_ciphers_pairwise; i++) - if (req->crypto.ciphers_pairwise[i] == WLAN_CIPHER_SUITE_WEP40 || -diff --git a/net/mac80211/rate.h b/net/mac80211/rate.h -index cb9bd1f..3e02ea4 100644 ---- a/net/mac80211/rate.h -+++ b/net/mac80211/rate.h -@@ -69,7 +69,8 @@ static inline void rate_control_rate_init(struct sta_info *sta) - - static inline void rate_control_rate_update(struct ieee80211_local *local, - struct ieee80211_supported_band *sband, -- struct sta_info *sta, u32 changed) -+ struct sta_info *sta, u32 changed, -+ enum nl80211_channel_type oper_chan_type) - { - struct rate_control_ref *ref = local->rate_ctrl; - struct ieee80211_sta *ista = &sta->sta; -@@ -77,7 +78,7 @@ static inline void rate_control_rate_update(struct ieee80211_local *local, - - if (ref && ref->ops->rate_update) - ref->ops->rate_update(ref->priv, sband, ista, -- priv_sta, changed); -+ priv_sta, changed, oper_chan_type); - } - - static inline void *rate_control_alloc_sta(struct rate_control_ref *ref, -diff --git a/net/mac80211/status.c b/net/mac80211/status.c -index d78f36c..f5abeec 100644 ---- a/net/mac80211/status.c -+++ b/net/mac80211/status.c -@@ -165,6 +165,7 @@ void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) - rcu_read_lock(); - - sband = local->hw.wiphy->bands[info->band]; -+ fc = hdr->frame_control; - - sta = sta_info_get(local, hdr->addr1); - -@@ -180,8 +181,6 @@ void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) - return; - } - -- fc = hdr->frame_control; -- - if ((info->flags & IEEE80211_TX_STAT_AMPDU_NO_BACK) && - (ieee80211_is_data_qos(fc))) { - u16 tid, ssn; -@@ -246,6 +245,20 @@ void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) - local->dot11FailedCount++; - } - -+ if (ieee80211_is_nullfunc(fc) && ieee80211_has_pm(fc) && -+ (local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS) && -+ !(info->flags & IEEE80211_TX_CTL_INJECTED) && -+ local->ps_sdata && !(local->scanning)) { -+ if (info->flags & IEEE80211_TX_STAT_ACK) { -+ local->ps_sdata->u.mgd.flags |= -+ IEEE80211_STA_NULLFUNC_ACKED; -+ ieee80211_queue_work(&local->hw, -+ &local->dynamic_ps_enable_work); -+ } else -+ mod_timer(&local->dynamic_ps_timer, jiffies + -+ msecs_to_jiffies(10)); -+ } -+ - /* this was a transmitted frame, but now we want to reuse it */ - skb_orphan(skb); - -diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c -index 0ffe689..eeac97f 100644 ---- a/net/netfilter/nf_conntrack_netlink.c -+++ b/net/netfilter/nf_conntrack_netlink.c -@@ -571,7 +571,8 @@ nla_put_failure: - nlmsg_failure: - kfree_skb(skb); - errout: -- nfnetlink_set_err(0, group, -ENOBUFS); -+ if (nfnetlink_set_err(0, group, -ENOBUFS) > 0) -+ return -ENOBUFS; - return 0; - } - #endif /* CONFIG_NF_CONNTRACK_EVENTS */ -diff --git a/net/netfilter/nfnetlink.c b/net/netfilter/nfnetlink.c -index eedc0c1..35fe185 100644 ---- a/net/netfilter/nfnetlink.c -+++ b/net/netfilter/nfnetlink.c -@@ -114,9 +114,9 @@ int nfnetlink_send(struct sk_buff *skb, u32 pid, - } - EXPORT_SYMBOL_GPL(nfnetlink_send); - --void nfnetlink_set_err(u32 pid, u32 group, int error) -+int nfnetlink_set_err(u32 pid, u32 group, int error) - { -- netlink_set_err(nfnl, pid, group, error); -+ return netlink_set_err(nfnl, pid, group, error); - } - EXPORT_SYMBOL_GPL(nfnetlink_set_err); - -diff --git a/net/netfilter/xt_recent.c b/net/netfilter/xt_recent.c -index 43e83a4..e460bf9 100644 ---- a/net/netfilter/xt_recent.c -+++ b/net/netfilter/xt_recent.c -@@ -260,7 +260,7 @@ recent_mt(const struct sk_buff *skb, const struct xt_match_param *par) - for (i = 0; i < e->nstamps; i++) { - if (info->seconds && time_after(time, e->stamps[i])) - continue; -- if (info->hit_count && ++hits >= info->hit_count) { -+ if (!info->hit_count || ++hits >= info->hit_count) { - ret = !ret; - break; - } -diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c -index 4c5972b..0052d3c 100644 ---- a/net/netlink/af_netlink.c -+++ b/net/netlink/af_netlink.c -@@ -1093,6 +1093,7 @@ static inline int do_one_set_err(struct sock *sk, - struct netlink_set_err_data *p) - { - struct netlink_sock *nlk = nlk_sk(sk); -+ int ret = 0; - - if (sk == p->exclude_sk) - goto out; -@@ -1104,10 +1105,15 @@ static inline int do_one_set_err(struct sock *sk, - !test_bit(p->group - 1, nlk->groups)) - goto out; - -+ if (p->code == ENOBUFS && nlk->flags & NETLINK_RECV_NO_ENOBUFS) { -+ ret = 1; -+ goto out; -+ } -+ - sk->sk_err = p->code; - sk->sk_error_report(sk); - out: -- return 0; -+ return ret; - } - - /** -@@ -1116,12 +1122,16 @@ out: - * @pid: the PID of a process that we want to skip (if any) - * @groups: the broadcast group that will notice the error - * @code: error code, must be negative (as usual in kernelspace) -+ * -+ * This function returns the number of broadcast listeners that have set the -+ * NETLINK_RECV_NO_ENOBUFS socket option. - */ --void netlink_set_err(struct sock *ssk, u32 pid, u32 group, int code) -+int netlink_set_err(struct sock *ssk, u32 pid, u32 group, int code) - { - struct netlink_set_err_data info; - struct hlist_node *node; - struct sock *sk; -+ int ret = 0; - - info.exclude_sk = ssk; - info.pid = pid; -@@ -1132,9 +1142,10 @@ void netlink_set_err(struct sock *ssk, u32 pid, u32 group, int code) - read_lock(&nl_table_lock); - - sk_for_each_bound(sk, node, &nl_table[ssk->sk_protocol].mc_list) -- do_one_set_err(sk, &info); -+ ret += do_one_set_err(sk, &info); - - read_unlock(&nl_table_lock); -+ return ret; - } - EXPORT_SYMBOL(netlink_set_err); - -diff --git a/net/sctp/input.c b/net/sctp/input.c -index c0c973e..3d74b26 100644 ---- a/net/sctp/input.c -+++ b/net/sctp/input.c -@@ -75,7 +75,7 @@ static struct sctp_association *__sctp_lookup_association( - const union sctp_addr *peer, - struct sctp_transport **pt); - --static void sctp_add_backlog(struct sock *sk, struct sk_buff *skb); -+static int sctp_add_backlog(struct sock *sk, struct sk_buff *skb); - - - /* Calculate the SCTP checksum of an SCTP packet. */ -@@ -265,8 +265,13 @@ int sctp_rcv(struct sk_buff *skb) - } - - if (sock_owned_by_user(sk)) { -+ if (sctp_add_backlog(sk, skb)) { -+ sctp_bh_unlock_sock(sk); -+ sctp_chunk_free(chunk); -+ skb = NULL; /* sctp_chunk_free already freed the skb */ -+ goto discard_release; -+ } - SCTP_INC_STATS_BH(SCTP_MIB_IN_PKT_BACKLOG); -- sctp_add_backlog(sk, skb); - } else { - SCTP_INC_STATS_BH(SCTP_MIB_IN_PKT_SOFTIRQ); - sctp_inq_push(&chunk->rcvr->inqueue, chunk); -@@ -336,8 +341,10 @@ int sctp_backlog_rcv(struct sock *sk, struct sk_buff *skb) - sctp_bh_lock_sock(sk); - - if (sock_owned_by_user(sk)) { -- sk_add_backlog(sk, skb); -- backloged = 1; -+ if (sk_add_backlog(sk, skb)) -+ sctp_chunk_free(chunk); -+ else -+ backloged = 1; - } else - sctp_inq_push(inqueue, chunk); - -@@ -362,22 +369,27 @@ done: - return 0; - } - --static void sctp_add_backlog(struct sock *sk, struct sk_buff *skb) -+static int sctp_add_backlog(struct sock *sk, struct sk_buff *skb) - { - struct sctp_chunk *chunk = SCTP_INPUT_CB(skb)->chunk; - struct sctp_ep_common *rcvr = chunk->rcvr; -+ int ret; - -- /* Hold the assoc/ep while hanging on the backlog queue. -- * This way, we know structures we need will not disappear from us -- */ -- if (SCTP_EP_TYPE_ASSOCIATION == rcvr->type) -- sctp_association_hold(sctp_assoc(rcvr)); -- else if (SCTP_EP_TYPE_SOCKET == rcvr->type) -- sctp_endpoint_hold(sctp_ep(rcvr)); -- else -- BUG(); -+ ret = sk_add_backlog(sk, skb); -+ if (!ret) { -+ /* Hold the assoc/ep while hanging on the backlog queue. -+ * This way, we know structures we need will not disappear -+ * from us -+ */ -+ if (SCTP_EP_TYPE_ASSOCIATION == rcvr->type) -+ sctp_association_hold(sctp_assoc(rcvr)); -+ else if (SCTP_EP_TYPE_SOCKET == rcvr->type) -+ sctp_endpoint_hold(sctp_ep(rcvr)); -+ else -+ BUG(); -+ } -+ return ret; - -- sk_add_backlog(sk, skb); - } - - /* Handle icmp frag needed error. */ -diff --git a/net/sctp/socket.c b/net/sctp/socket.c -index 67fdac9..9bd9d82 100644 ---- a/net/sctp/socket.c -+++ b/net/sctp/socket.c -@@ -3720,6 +3720,9 @@ SCTP_STATIC int sctp_init_sock(struct sock *sk) - SCTP_DBG_OBJCNT_INC(sock); - percpu_counter_inc(&sctp_sockets_allocated); - -+ /* Set socket backlog limit. */ -+ sk->sk_backlog.limit = sysctl_sctp_rmem[1]; -+ - local_bh_disable(); - sock_prot_inuse_add(sock_net(sk), sk->sk_prot, 1); - local_bh_enable(); -diff --git a/net/sunrpc/auth_gss/auth_gss.c b/net/sunrpc/auth_gss/auth_gss.c -index f7a7f83..50346a6 100644 ---- a/net/sunrpc/auth_gss/auth_gss.c -+++ b/net/sunrpc/auth_gss/auth_gss.c -@@ -1273,9 +1273,8 @@ alloc_enc_pages(struct rpc_rqst *rqstp) - rqstp->rq_release_snd_buf = priv_release_snd_buf; - return 0; - out_free: -- for (i--; i >= 0; i--) { -- __free_page(rqstp->rq_enc_pages[i]); -- } -+ rqstp->rq_enc_pages_num = i; -+ priv_release_snd_buf(rqstp); - out: - return -EAGAIN; - } -diff --git a/net/sunrpc/rpc_pipe.c b/net/sunrpc/rpc_pipe.c -index 49278f8..27a2378 100644 ---- a/net/sunrpc/rpc_pipe.c -+++ b/net/sunrpc/rpc_pipe.c -@@ -587,6 +587,8 @@ static struct dentry *__rpc_lookup_create_exclusive(struct dentry *parent, - struct dentry *dentry; - - dentry = __rpc_lookup_create(parent, name); -+ if (IS_ERR(dentry)) -+ return dentry; - if (dentry->d_inode == NULL) - return dentry; - dput(dentry); -diff --git a/net/sunrpc/svc_xprt.c b/net/sunrpc/svc_xprt.c -index 4f30336..6bd41a9 100644 ---- a/net/sunrpc/svc_xprt.c -+++ b/net/sunrpc/svc_xprt.c -@@ -699,8 +699,10 @@ int svc_recv(struct svc_rqst *rqstp, long timeout) - spin_unlock_bh(&pool->sp_lock); - - len = 0; -- if (test_bit(XPT_LISTENER, &xprt->xpt_flags) && -- !test_bit(XPT_CLOSE, &xprt->xpt_flags)) { -+ if (test_bit(XPT_CLOSE, &xprt->xpt_flags)) { -+ dprintk("svc_recv: found XPT_CLOSE\n"); -+ svc_delete_xprt(xprt); -+ } else if (test_bit(XPT_LISTENER, &xprt->xpt_flags)) { - struct svc_xprt *newxpt; - newxpt = xprt->xpt_ops->xpo_accept(xprt); - if (newxpt) { -@@ -726,7 +728,7 @@ int svc_recv(struct svc_rqst *rqstp, long timeout) - svc_xprt_received(newxpt); - } - svc_xprt_received(xprt); -- } else if (!test_bit(XPT_CLOSE, &xprt->xpt_flags)) { -+ } else { - dprintk("svc: server %p, pool %u, transport %p, inuse=%d\n", - rqstp, pool->sp_id, xprt, - atomic_read(&xprt->xpt_ref.refcount)); -@@ -739,11 +741,6 @@ int svc_recv(struct svc_rqst *rqstp, long timeout) - dprintk("svc: got len=%d\n", len); - } - -- if (test_bit(XPT_CLOSE, &xprt->xpt_flags)) { -- dprintk("svc_recv: found XPT_CLOSE\n"); -- svc_delete_xprt(xprt); -- } -- - /* No data, incomplete (TCP) read, or accept() */ - if (len == 0 || len == -EAGAIN) { - rqstp->rq_res.len = 0; -diff --git a/net/sunrpc/svcsock.c b/net/sunrpc/svcsock.c -index 870929e..528efef 100644 ---- a/net/sunrpc/svcsock.c -+++ b/net/sunrpc/svcsock.c -@@ -968,6 +968,7 @@ static int svc_tcp_recv_record(struct svc_sock *svsk, struct svc_rqst *rqstp) - return len; - err_delete: - set_bit(XPT_CLOSE, &svsk->sk_xprt.xpt_flags); -+ svc_xprt_received(&svsk->sk_xprt); - err_again: - return -EAGAIN; - } -diff --git a/net/tipc/socket.c b/net/tipc/socket.c -index 1ea64f0..4b235fc 100644 ---- a/net/tipc/socket.c -+++ b/net/tipc/socket.c -@@ -1322,8 +1322,10 @@ static u32 dispatch(struct tipc_port *tport, struct sk_buff *buf) - if (!sock_owned_by_user(sk)) { - res = filter_rcv(sk, buf); - } else { -- sk_add_backlog(sk, buf); -- res = TIPC_OK; -+ if (sk_add_backlog(sk, buf)) -+ res = TIPC_ERR_OVERLOAD; -+ else -+ res = TIPC_OK; - } - bh_unlock_sock(sk); - -diff --git a/net/x25/x25_dev.c b/net/x25/x25_dev.c -index 3e1efe5..52e3042 100644 ---- a/net/x25/x25_dev.c -+++ b/net/x25/x25_dev.c -@@ -53,7 +53,7 @@ static int x25_receive_data(struct sk_buff *skb, struct x25_neigh *nb) - if (!sock_owned_by_user(sk)) { - queued = x25_process_rx_frame(sk, skb); - } else { -- sk_add_backlog(sk, skb); -+ queued = !sk_add_backlog(sk, skb); - } - bh_unlock_sock(sk); - sock_put(sk); -diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c -index 0ecb16a..f12dd3d 100644 ---- a/net/xfrm/xfrm_policy.c -+++ b/net/xfrm/xfrm_policy.c -@@ -1354,7 +1354,8 @@ static inline int xfrm_init_path(struct xfrm_dst *path, struct dst_entry *dst, - return err; - } - --static inline int xfrm_fill_dst(struct xfrm_dst *xdst, struct net_device *dev) -+static inline int xfrm_fill_dst(struct xfrm_dst *xdst, struct net_device *dev, -+ struct flowi *fl) - { - struct xfrm_policy_afinfo *afinfo = - xfrm_policy_get_afinfo(xdst->u.dst.ops->family); -@@ -1363,7 +1364,7 @@ static inline int xfrm_fill_dst(struct xfrm_dst *xdst, struct net_device *dev) - if (!afinfo) - return -EINVAL; - -- err = afinfo->fill_dst(xdst, dev); -+ err = afinfo->fill_dst(xdst, dev, fl); - - xfrm_policy_put_afinfo(afinfo); - -@@ -1468,7 +1469,7 @@ static struct dst_entry *xfrm_bundle_create(struct xfrm_policy *policy, - for (dst_prev = dst0; dst_prev != dst; dst_prev = dst_prev->child) { - struct xfrm_dst *xdst = (struct xfrm_dst *)dst_prev; - -- err = xfrm_fill_dst(xdst, dev); -+ err = xfrm_fill_dst(xdst, dev, fl); - if (err) - goto free_dst; - -diff --git a/sound/pci/ac97/ac97_patch.c b/sound/pci/ac97/ac97_patch.c -index d9266ba..4e5f2f7 100644 ---- a/sound/pci/ac97/ac97_patch.c -+++ b/sound/pci/ac97/ac97_patch.c -@@ -1867,12 +1867,14 @@ static unsigned int ad1981_jacks_blacklist[] = { - 0x10140523, /* Thinkpad R40 */ - 0x10140534, /* Thinkpad X31 */ - 0x10140537, /* Thinkpad T41p */ -+ 0x1014053e, /* Thinkpad R40e */ - 0x10140554, /* Thinkpad T42p/R50p */ - 0x10140567, /* Thinkpad T43p 2668-G7U */ - 0x10140581, /* Thinkpad X41-2527 */ - 0x10280160, /* Dell Dimension 2400 */ - 0x104380b0, /* Asus A7V8X-MX */ - 0x11790241, /* Toshiba Satellite A-15 S127 */ -+ 0x1179ff10, /* Toshiba P500 */ - 0x144dc01a, /* Samsung NP-X20C004/SEG */ - 0 /* end */ - }; -diff --git a/sound/pci/cmipci.c b/sound/pci/cmipci.c -index a312bae..bbaec22 100644 ---- a/sound/pci/cmipci.c -+++ b/sound/pci/cmipci.c -@@ -941,13 +941,21 @@ static snd_pcm_uframes_t snd_cmipci_pcm_pointer(struct cmipci *cm, struct cmipci - struct snd_pcm_substream *substream) - { - size_t ptr; -- unsigned int reg; -+ unsigned int reg, rem, tries; -+ - if (!rec->running) - return 0; - #if 1 // this seems better.. - reg = rec->ch ? CM_REG_CH1_FRAME2 : CM_REG_CH0_FRAME2; -- ptr = rec->dma_size - (snd_cmipci_read_w(cm, reg) + 1); -- ptr >>= rec->shift; -+ for (tries = 0; tries < 3; tries++) { -+ rem = snd_cmipci_read_w(cm, reg); -+ if (rem < rec->dma_size) -+ goto ok; -+ } -+ printk(KERN_ERR "cmipci: invalid PCM pointer: %#x\n", rem); -+ return SNDRV_PCM_POS_XRUN; -+ok: -+ ptr = (rec->dma_size - (rem + 1)) >> rec->shift; - #else - reg = rec->ch ? CM_REG_CH1_FRAME1 : CM_REG_CH0_FRAME1; - ptr = snd_cmipci_read(cm, reg) - rec->offset; -diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c -index 6d6e307..9ace8eb 100644 ---- a/sound/pci/hda/hda_intel.c -+++ b/sound/pci/hda/hda_intel.c -@@ -2265,8 +2265,10 @@ static struct snd_pci_quirk position_fix_list[] __devinitdata = { - SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB), - SND_PCI_QUIRK(0x1106, 0x3288, "ASUS M2V-MX SE", POS_FIX_LPIB), - SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB), -+ SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB), - SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB), - SND_PCI_QUIRK(0x1565, 0x820f, "Biostar Microtech", POS_FIX_LPIB), -+ SND_PCI_QUIRK(0x8086, 0xd601, "eMachines T5212", POS_FIX_LPIB), - {} - }; - -@@ -2354,6 +2356,7 @@ static void __devinit check_probe_mask(struct azx *chip, int dev) - static struct snd_pci_quirk msi_black_list[] __devinitdata = { - SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */ - SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */ -+ SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */ - {} - }; - -@@ -2372,6 +2375,13 @@ static void __devinit check_msi(struct azx *chip) - "hda_intel: msi for device %04x:%04x set to %d\n", - q->subvendor, q->subdevice, q->value); - chip->msi = q->value; -+ return; -+ } -+ -+ /* NVidia chipsets seem to cause troubles with MSI */ -+ if (chip->driver_type == AZX_DRIVER_NVIDIA) { -+ printk(KERN_INFO "hda_intel: Disable MSI for Nvidia chipset\n"); -+ chip->msi = 0; - } - } - -diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c -index c578c28..71b7a96 100644 ---- a/sound/pci/hda/patch_conexant.c -+++ b/sound/pci/hda/patch_conexant.c -@@ -1570,6 +1570,21 @@ static int patch_cxt5047(struct hda_codec *codec) - #endif - } - spec->vmaster_nid = 0x13; -+ -+ switch (codec->subsystem_id >> 16) { -+ case 0x103c: -+ /* HP laptops have really bad sound over 0 dB on NID 0x10. -+ * Fix max PCM level to 0 dB (originally it has 0x1e steps -+ * with 0 dB offset 0x17) -+ */ -+ snd_hda_override_amp_caps(codec, 0x10, HDA_INPUT, -+ (0x17 << AC_AMPCAP_OFFSET_SHIFT) | -+ (0x17 << AC_AMPCAP_NUM_STEPS_SHIFT) | -+ (0x05 << AC_AMPCAP_STEP_SIZE_SHIFT) | -+ (1 << AC_AMPCAP_MUTE_SHIFT)); -+ break; -+ } -+ - return 0; - } - -diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c -index da34095..a79f841 100644 ---- a/sound/pci/hda/patch_realtek.c -+++ b/sound/pci/hda/patch_realtek.c -@@ -407,6 +407,8 @@ static int alc_mux_enum_info(struct snd_kcontrol *kcontrol, - unsigned int mux_idx = snd_ctl_get_ioffidx(kcontrol, &uinfo->id); - if (mux_idx >= spec->num_mux_defs) - mux_idx = 0; -+ if (!spec->input_mux[mux_idx].num_items && mux_idx > 0) -+ mux_idx = 0; - return snd_hda_input_mux_info(&spec->input_mux[mux_idx], uinfo); - } - -@@ -435,6 +437,8 @@ static int alc_mux_enum_put(struct snd_kcontrol *kcontrol, - - mux_idx = adc_idx >= spec->num_mux_defs ? 0 : adc_idx; - imux = &spec->input_mux[mux_idx]; -+ if (!imux->num_items && mux_idx > 0) -+ imux = &spec->input_mux[0]; - - type = get_wcaps_type(get_wcaps(codec, nid)); - if (type == AC_WID_AUD_MIX) { -@@ -6380,7 +6384,7 @@ static struct alc_config_preset alc260_presets[] = { - .num_dacs = ARRAY_SIZE(alc260_dac_nids), - .dac_nids = alc260_dac_nids, - .num_adc_nids = ARRAY_SIZE(alc260_dual_adc_nids), -- .adc_nids = alc260_adc_nids, -+ .adc_nids = alc260_dual_adc_nids, - .num_channel_mode = ARRAY_SIZE(alc260_modes), - .channel_mode = alc260_modes, - .input_mux = &alc260_capture_source, -@@ -9097,7 +9101,7 @@ static struct snd_pci_quirk alc882_cfg_tbl[] = { - SND_PCI_QUIRK(0x8086, 0x0022, "DX58SO", ALC889_INTEL), - SND_PCI_QUIRK(0x8086, 0x0021, "Intel IbexPeak", ALC889A_INTEL), - SND_PCI_QUIRK(0x8086, 0x3b56, "Intel IbexPeak", ALC889A_INTEL), -- SND_PCI_QUIRK(0x8086, 0xd601, "D102GGC", ALC883_3ST_6ch), -+ SND_PCI_QUIRK(0x8086, 0xd601, "D102GGC", ALC882_6ST_DIG), - - {} - }; -@@ -9941,6 +9945,8 @@ static void alc882_auto_init_input_src(struct hda_codec *codec) - continue; - mux_idx = c >= spec->num_mux_defs ? 0 : c; - imux = &spec->input_mux[mux_idx]; -+ if (!imux->num_items && mux_idx > 0) -+ imux = &spec->input_mux[0]; - for (idx = 0; idx < conns; idx++) { - /* if the current connection is the selected one, - * unmute it as default - otherwise mute it -diff --git a/tools/perf/Documentation/Makefile b/tools/perf/Documentation/Makefile -index bdd3b7e..bd498d4 100644 ---- a/tools/perf/Documentation/Makefile -+++ b/tools/perf/Documentation/Makefile -@@ -24,7 +24,10 @@ DOC_MAN1=$(patsubst %.txt,%.1,$(MAN1_TXT)) - DOC_MAN5=$(patsubst %.txt,%.5,$(MAN5_TXT)) - DOC_MAN7=$(patsubst %.txt,%.7,$(MAN7_TXT)) - -+# Make the path relative to DESTDIR, not prefix -+ifndef DESTDIR - prefix?=$(HOME) -+endif - bindir?=$(prefix)/bin - htmldir?=$(prefix)/share/doc/perf-doc - pdfdir?=$(prefix)/share/doc/perf-doc -@@ -32,7 +35,6 @@ mandir?=$(prefix)/share/man - man1dir=$(mandir)/man1 - man5dir=$(mandir)/man5 - man7dir=$(mandir)/man7 --# DESTDIR= - - ASCIIDOC=asciidoc - ASCIIDOC_EXTRA = --unsafe -diff --git a/tools/perf/Makefile b/tools/perf/Makefile -index 2e7fa3a..03eb7c9 100644 ---- a/tools/perf/Makefile -+++ b/tools/perf/Makefile -@@ -216,7 +216,10 @@ STRIP ?= strip - # runtime figures out where they are based on the path to the executable. - # This can help installing the suite in a relocatable way. - -+# Make the path relative to DESTDIR, not to prefix -+ifndef DESTDIR - prefix = $(HOME) -+endif - bindir_relative = bin - bindir = $(prefix)/$(bindir_relative) - mandir = share/man -@@ -233,7 +236,6 @@ sysconfdir = $(prefix)/etc - ETC_PERFCONFIG = etc/perfconfig - endif - lib = lib --# DESTDIR= - - export prefix bindir sharedir sysconfdir - -diff --git a/tools/perf/builtin-annotate.c b/tools/perf/builtin-annotate.c -index 593ff25..0b1ba36 100644 ---- a/tools/perf/builtin-annotate.c -+++ b/tools/perf/builtin-annotate.c -@@ -53,32 +53,20 @@ struct sym_priv { - - static const char *sym_hist_filter; - --static int symbol_filter(struct map *map __used, struct symbol *sym) -+static int sym__alloc_hist(struct symbol *self) - { -- if (sym_hist_filter == NULL || -- strcmp(sym->name, sym_hist_filter) == 0) { -- struct sym_priv *priv = symbol__priv(sym); -- const int size = (sizeof(*priv->hist) + -- (sym->end - sym->start) * sizeof(u64)); -+ struct sym_priv *priv = symbol__priv(self); -+ const int size = (sizeof(*priv->hist) + -+ (self->end - self->start) * sizeof(u64)); - -- priv->hist = malloc(size); -- if (priv->hist) -- memset(priv->hist, 0, size); -- return 0; -- } -- /* -- * FIXME: We should really filter it out, as we don't want to go thru symbols -- * we're not interested, and if a DSO ends up with no symbols, delete it too, -- * but right now the kernel loading routines in symbol.c bail out if no symbols -- * are found, fix it later. -- */ -- return 0; -+ priv->hist = zalloc(size); -+ return priv->hist == NULL ? -1 : 0; - } - - /* - * collect histogram counts - */ --static void hist_hit(struct hist_entry *he, u64 ip) -+static int annotate__hist_hit(struct hist_entry *he, u64 ip) - { - unsigned int sym_size, offset; - struct symbol *sym = he->sym; -@@ -88,11 +76,11 @@ static void hist_hit(struct hist_entry *he, u64 ip) - he->count++; - - if (!sym || !he->map) -- return; -+ return 0; - - priv = symbol__priv(sym); -- if (!priv->hist) -- return; -+ if (priv->hist == NULL && sym__alloc_hist(sym) < 0) -+ return -ENOMEM; - - sym_size = sym->end - sym->start; - offset = ip - sym->start; -@@ -102,7 +90,7 @@ static void hist_hit(struct hist_entry *he, u64 ip) - he->map->unmap_ip(he->map, ip)); - - if (offset >= sym_size) -- return; -+ return 0; - - h = priv->hist; - h->sum++; -@@ -114,18 +102,31 @@ static void hist_hit(struct hist_entry *he, u64 ip) - he->sym->name, - (void *)(unsigned long)ip, ip - he->sym->start, - h->ip[offset]); -+ return 0; - } - - static int perf_session__add_hist_entry(struct perf_session *self, - struct addr_location *al, u64 count) - { -- bool hit; -- struct hist_entry *he = __perf_session__add_hist_entry(self, al, NULL, -- count, &hit); -- if (he == NULL) -- return -ENOMEM; -- hist_hit(he, al->addr); -- return 0; -+ bool hit; -+ struct hist_entry *he; -+ -+ if (sym_hist_filter != NULL && -+ (al->sym == NULL || strcmp(sym_hist_filter, al->sym->name) != 0)) { -+ /* We're only interested in a symbol named sym_hist_filter */ -+ if (al->sym != NULL) { -+ rb_erase(&al->sym->rb_node, -+ &al->map->dso->symbols[al->map->type]); -+ symbol__delete(al->sym); -+ } -+ return 0; -+ } -+ -+ he = __perf_session__add_hist_entry(self, al, NULL, count, &hit); -+ if (he == NULL) -+ return -ENOMEM; -+ -+ return annotate__hist_hit(he, al->addr); - } - - static int process_sample_event(event_t *event, struct perf_session *session) -@@ -135,7 +136,7 @@ static int process_sample_event(event_t *event, struct perf_session *session) - dump_printf("(IP, %d): %d: %p\n", event->header.misc, - event->ip.pid, (void *)(long)event->ip.ip); - -- if (event__preprocess_sample(event, session, &al, symbol_filter) < 0) { -+ if (event__preprocess_sample(event, session, &al, NULL) < 0) { - fprintf(stderr, "problem processing %d event, skipping it.\n", - event->header.type); - return -1; -diff --git a/tools/perf/builtin-probe.c b/tools/perf/builtin-probe.c -index c1e6774..fa626eb 100644 ---- a/tools/perf/builtin-probe.c -+++ b/tools/perf/builtin-probe.c -@@ -48,7 +48,6 @@ - #include "util/probe-event.h" - - #define MAX_PATH_LEN 256 --#define MAX_PROBES 128 - - /* Session management structure */ - static struct { -diff --git a/tools/perf/util/probe-finder.c b/tools/perf/util/probe-finder.c -index 4b852c0..7f81ded 100644 ---- a/tools/perf/util/probe-finder.c -+++ b/tools/perf/util/probe-finder.c -@@ -544,6 +544,9 @@ static void show_probepoint(Dwarf_Die sp_die, Dwarf_Signed offs, - } - free_current_frame_base(pf); - -+ if (pp->found == MAX_PROBES) -+ die("Too many( > %d) probe point found.\n", MAX_PROBES); -+ - pp->probes[pp->found] = strdup(tmp); - pp->found++; - } -diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c -index 72547b9..fcb8919 100644 ---- a/tools/perf/util/symbol.c -+++ b/tools/perf/util/symbol.c -@@ -149,7 +149,7 @@ static struct symbol *symbol__new(u64 start, u64 len, const char *name) - return self; - } - --static void symbol__delete(struct symbol *self) -+void symbol__delete(struct symbol *self) - { - free(((void *)self) - symbol_conf.priv_size); - } -diff --git a/tools/perf/util/symbol.h b/tools/perf/util/symbol.h -index 8aded23..400227a 100644 ---- a/tools/perf/util/symbol.h -+++ b/tools/perf/util/symbol.h -@@ -49,6 +49,8 @@ struct symbol { - char name[0]; - }; - -+void symbol__delete(struct symbol *self); -+ - struct strlist; - - struct symbol_conf { diff --git a/debian/patches/bugfix/all/stable/2.6.33.3.patch b/debian/patches/bugfix/all/stable/2.6.33.3.patch deleted file mode 100644 index eef11755d..000000000 --- a/debian/patches/bugfix/all/stable/2.6.33.3.patch +++ /dev/null @@ -1,5186 +0,0 @@ -diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 -index 81c0c59..e1bb5b2 100644 ---- a/Documentation/i2c/busses/i2c-i801 -+++ b/Documentation/i2c/busses/i2c-i801 -@@ -15,7 +15,8 @@ Supported adapters: - * Intel 82801I (ICH9) - * Intel EP80579 (Tolapai) - * Intel 82801JI (ICH10) -- * Intel PCH -+ * Intel 3400/5 Series (PCH) -+ * Intel Cougar Point (PCH) - Datasheets: Publicly available at the Intel website - - Authors: -diff --git a/Makefile b/Makefile -index 35160e3..de3e66c 100644 -diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S -index 6b84a04..cbeb6e0 100644 ---- a/arch/arm/boot/compressed/head.S -+++ b/arch/arm/boot/compressed/head.S -@@ -172,7 +172,7 @@ not_angel: - adr r0, LC0 - ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp}) - THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip} ) -- THUMB( ldr sp, [r0, #28] ) -+ THUMB( ldr sp, [r0, #32] ) - subs r0, r0, r1 @ calculate the delta offset - - @ if delta is zero, we are -diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c -index 5fdeec5..d76279a 100644 ---- a/arch/ia64/kvm/kvm-ia64.c -+++ b/arch/ia64/kvm/kvm-ia64.c -@@ -1794,7 +1794,8 @@ static int kvm_ia64_sync_dirty_log(struct kvm *kvm, - { - struct kvm_memory_slot *memslot; - int r, i; -- long n, base; -+ long base; -+ unsigned long n; - unsigned long *dirty_bitmap = (unsigned long *)(kvm->arch.vm_base + - offsetof(struct kvm_vm_data, kvm_mem_dirty_log)); - -@@ -1807,7 +1808,7 @@ static int kvm_ia64_sync_dirty_log(struct kvm *kvm, - if (!memslot->dirty_bitmap) - goto out; - -- n = ALIGN(memslot->npages, BITS_PER_LONG) / 8; -+ n = kvm_dirty_bitmap_bytes(memslot); - base = memslot->base_gfn / BITS_PER_LONG; - - for (i = 0; i < n/sizeof(long); ++i) { -@@ -1823,7 +1824,7 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, - struct kvm_dirty_log *log) - { - int r; -- int n; -+ unsigned long n; - struct kvm_memory_slot *memslot; - int is_dirty = 0; - -@@ -1841,7 +1842,7 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, - if (is_dirty) { - kvm_flush_remote_tlbs(kvm); - memslot = &kvm->memslots[log->slot]; -- n = ALIGN(memslot->npages, BITS_PER_LONG) / 8; -+ n = kvm_dirty_bitmap_bytes(memslot); - memset(memslot->dirty_bitmap, 0, n); - } - r = 0; -diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c -index 3e294bd..e6dc595 100644 ---- a/arch/powerpc/kvm/book3s.c -+++ b/arch/powerpc/kvm/book3s.c -@@ -848,7 +848,8 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, - struct kvm_vcpu *vcpu; - ulong ga, ga_end; - int is_dirty = 0; -- int r, n; -+ int r; -+ unsigned long n; - - down_write(&kvm->slots_lock); - -@@ -866,7 +867,7 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, - kvm_for_each_vcpu(n, vcpu, kvm) - kvmppc_mmu_pte_pflush(vcpu, ga, ga_end); - -- n = ALIGN(memslot->npages, BITS_PER_LONG) / 8; -+ n = kvm_dirty_bitmap_bytes(memslot); - memset(memslot->dirty_bitmap, 0, n); - } - -diff --git a/arch/powerpc/platforms/pseries/offline_states.h b/arch/powerpc/platforms/pseries/offline_states.h -index 22574e0..202d869 100644 ---- a/arch/powerpc/platforms/pseries/offline_states.h -+++ b/arch/powerpc/platforms/pseries/offline_states.h -@@ -9,10 +9,30 @@ enum cpu_state_vals { - CPU_MAX_OFFLINE_STATES - }; - -+#ifdef CONFIG_HOTPLUG_CPU - extern enum cpu_state_vals get_cpu_current_state(int cpu); - extern void set_cpu_current_state(int cpu, enum cpu_state_vals state); --extern enum cpu_state_vals get_preferred_offline_state(int cpu); - extern void set_preferred_offline_state(int cpu, enum cpu_state_vals state); - extern void set_default_offline_state(int cpu); -+#else -+static inline enum cpu_state_vals get_cpu_current_state(int cpu) -+{ -+ return CPU_STATE_ONLINE; -+} -+ -+static inline void set_cpu_current_state(int cpu, enum cpu_state_vals state) -+{ -+} -+ -+static inline void set_preferred_offline_state(int cpu, enum cpu_state_vals state) -+{ -+} -+ -+static inline void set_default_offline_state(int cpu) -+{ -+} -+#endif -+ -+extern enum cpu_state_vals get_preferred_offline_state(int cpu); - extern int start_secondary(void); - #endif -diff --git a/arch/s390/mm/vmem.c b/arch/s390/mm/vmem.c -index 300ab01..5f91a38 100644 ---- a/arch/s390/mm/vmem.c -+++ b/arch/s390/mm/vmem.c -@@ -70,12 +70,8 @@ static pte_t __ref *vmem_pte_alloc(void) - pte = alloc_bootmem(PTRS_PER_PTE * sizeof(pte_t)); - if (!pte) - return NULL; -- if (MACHINE_HAS_HPAGE) -- clear_table((unsigned long *) pte, _PAGE_TYPE_EMPTY | _PAGE_CO, -- PTRS_PER_PTE * sizeof(pte_t)); -- else -- clear_table((unsigned long *) pte, _PAGE_TYPE_EMPTY, -- PTRS_PER_PTE * sizeof(pte_t)); -+ clear_table((unsigned long *) pte, _PAGE_TYPE_EMPTY, -+ PTRS_PER_PTE * sizeof(pte_t)); - return pte; - } - -@@ -116,8 +112,7 @@ static int vmem_add_mem(unsigned long start, unsigned long size, int ro) - if (MACHINE_HAS_HPAGE && !(address & ~HPAGE_MASK) && - (address + HPAGE_SIZE <= start + size) && - (address >= HPAGE_SIZE)) { -- pte_val(pte) |= _SEGMENT_ENTRY_LARGE | -- _SEGMENT_ENTRY_CO; -+ pte_val(pte) |= _SEGMENT_ENTRY_LARGE; - pmd_val(*pm_dir) = pte_val(pte); - address += HPAGE_SIZE - PAGE_SIZE; - continue; -diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h -index ac04255..ce830fa 100644 ---- a/arch/sh/include/asm/elf.h -+++ b/arch/sh/include/asm/elf.h -@@ -211,7 +211,9 @@ extern void __kernel_vsyscall; - - #define VSYSCALL_AUX_ENT \ - if (vdso_enabled) \ -- NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); -+ NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); \ -+ else \ -+ NEW_AUX_ENT(AT_IGNORE, 0); - #else - #define VSYSCALL_AUX_ENT - #endif /* CONFIG_VSYSCALL */ -@@ -219,7 +221,7 @@ extern void __kernel_vsyscall; - #ifdef CONFIG_SH_FPU - #define FPU_AUX_ENT NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT) - #else --#define FPU_AUX_ENT -+#define FPU_AUX_ENT NEW_AUX_ENT(AT_IGNORE, 0) - #endif - - extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; -diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c -index 983e079..1d19c19 100644 ---- a/arch/sh/kernel/smp.c -+++ b/arch/sh/kernel/smp.c -@@ -69,6 +69,7 @@ asmlinkage void __cpuinit start_secondary(void) - unsigned int cpu; - struct mm_struct *mm = &init_mm; - -+ enable_mmu(); - atomic_inc(&mm->mm_count); - atomic_inc(&mm->mm_users); - current->active_mm = mm; -diff --git a/arch/sparc/kernel/ptrace_32.c b/arch/sparc/kernel/ptrace_32.c -index 7e3dfd9..e608f39 100644 ---- a/arch/sparc/kernel/ptrace_32.c -+++ b/arch/sparc/kernel/ptrace_32.c -@@ -65,6 +65,7 @@ static int genregs32_get(struct task_struct *target, - *k++ = regs->u_regs[pos++]; - - reg_window = (unsigned long __user *) regs->u_regs[UREG_I6]; -+ reg_window -= 16; - for (; count > 0 && pos < 32; count--) { - if (get_user(*k++, ®_window[pos++])) - return -EFAULT; -@@ -76,6 +77,7 @@ static int genregs32_get(struct task_struct *target, - } - - reg_window = (unsigned long __user *) regs->u_regs[UREG_I6]; -+ reg_window -= 16; - for (; count > 0 && pos < 32; count--) { - if (get_user(reg, ®_window[pos++]) || - put_user(reg, u++)) -@@ -141,6 +143,7 @@ static int genregs32_set(struct task_struct *target, - regs->u_regs[pos++] = *k++; - - reg_window = (unsigned long __user *) regs->u_regs[UREG_I6]; -+ reg_window -= 16; - for (; count > 0 && pos < 32; count--) { - if (put_user(*k++, ®_window[pos++])) - return -EFAULT; -@@ -153,6 +156,7 @@ static int genregs32_set(struct task_struct *target, - } - - reg_window = (unsigned long __user *) regs->u_regs[UREG_I6]; -+ reg_window -= 16; - for (; count > 0 && pos < 32; count--) { - if (get_user(reg, u++) || - put_user(reg, ®_window[pos++])) -diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c -index 2f6524d..aa90da0 100644 ---- a/arch/sparc/kernel/ptrace_64.c -+++ b/arch/sparc/kernel/ptrace_64.c -@@ -492,6 +492,7 @@ static int genregs32_get(struct task_struct *target, - *k++ = regs->u_regs[pos++]; - - reg_window = (compat_ulong_t __user *) regs->u_regs[UREG_I6]; -+ reg_window -= 16; - if (target == current) { - for (; count > 0 && pos < 32; count--) { - if (get_user(*k++, ®_window[pos++])) -@@ -516,6 +517,7 @@ static int genregs32_get(struct task_struct *target, - } - - reg_window = (compat_ulong_t __user *) regs->u_regs[UREG_I6]; -+ reg_window -= 16; - if (target == current) { - for (; count > 0 && pos < 32; count--) { - if (get_user(reg, ®_window[pos++]) || -@@ -599,6 +601,7 @@ static int genregs32_set(struct task_struct *target, - regs->u_regs[pos++] = *k++; - - reg_window = (compat_ulong_t __user *) regs->u_regs[UREG_I6]; -+ reg_window -= 16; - if (target == current) { - for (; count > 0 && pos < 32; count--) { - if (put_user(*k++, ®_window[pos++])) -@@ -625,6 +628,7 @@ static int genregs32_set(struct task_struct *target, - } - - reg_window = (compat_ulong_t __user *) regs->u_regs[UREG_I6]; -+ reg_window -= 16; - if (target == current) { - for (; count > 0 && pos < 32; count--) { - if (get_user(reg, u++) || -diff --git a/arch/um/sys-x86_64/Makefile b/arch/um/sys-x86_64/Makefile -index 2201e9c..c1ea9eb 100644 ---- a/arch/um/sys-x86_64/Makefile -+++ b/arch/um/sys-x86_64/Makefile -@@ -8,7 +8,8 @@ obj-y = bug.o bugs.o delay.o fault.o ldt.o mem.o ptrace.o ptrace_user.o \ - setjmp.o signal.o stub.o stub_segv.o syscalls.o syscall_table.o \ - sysrq.o ksyms.o tls.o - --subarch-obj-y = lib/csum-partial_64.o lib/memcpy_64.o lib/thunk_64.o -+subarch-obj-y = lib/csum-partial_64.o lib/memcpy_64.o lib/thunk_64.o \ -+ lib/rwsem_64.o - subarch-obj-$(CONFIG_MODULES) += kernel/module.o - - ldt-y = ../sys-i386/ldt.o -diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu -index f20ddf8..a198293 100644 ---- a/arch/x86/Kconfig.cpu -+++ b/arch/x86/Kconfig.cpu -@@ -319,7 +319,7 @@ config X86_L1_CACHE_SHIFT - - config X86_XADD - def_bool y -- depends on X86_32 && !M386 -+ depends on X86_64 || !M386 - - config X86_PPRO_FENCE - bool "PentiumPro memory ordering errata workaround" -diff --git a/arch/x86/include/asm/rwsem.h b/arch/x86/include/asm/rwsem.h -index ca7517d..606ede1 100644 ---- a/arch/x86/include/asm/rwsem.h -+++ b/arch/x86/include/asm/rwsem.h -@@ -41,6 +41,7 @@ - #include - #include - #include -+#include - - struct rwsem_waiter; - -@@ -55,17 +56,28 @@ extern asmregparm struct rw_semaphore * - - /* - * the semaphore definition -+ * -+ * The bias values and the counter type limits the number of -+ * potential readers/writers to 32767 for 32 bits and 2147483647 -+ * for 64 bits. - */ - --#define RWSEM_UNLOCKED_VALUE 0x00000000 --#define RWSEM_ACTIVE_BIAS 0x00000001 --#define RWSEM_ACTIVE_MASK 0x0000ffff --#define RWSEM_WAITING_BIAS (-0x00010000) -+#ifdef CONFIG_X86_64 -+# define RWSEM_ACTIVE_MASK 0xffffffffL -+#else -+# define RWSEM_ACTIVE_MASK 0x0000ffffL -+#endif -+ -+#define RWSEM_UNLOCKED_VALUE 0x00000000L -+#define RWSEM_ACTIVE_BIAS 0x00000001L -+#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1) - #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS - #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - -+typedef signed long rwsem_count_t; -+ - struct rw_semaphore { -- signed long count; -+ rwsem_count_t count; - spinlock_t wait_lock; - struct list_head wait_list; - #ifdef CONFIG_DEBUG_LOCK_ALLOC -@@ -105,7 +117,7 @@ do { \ - static inline void __down_read(struct rw_semaphore *sem) - { - asm volatile("# beginning down_read\n\t" -- LOCK_PREFIX " incl (%%eax)\n\t" -+ LOCK_PREFIX _ASM_INC "(%1)\n\t" - /* adds 0x00000001, returns the old value */ - " jns 1f\n" - " call call_rwsem_down_read_failed\n" -@@ -121,14 +133,14 @@ static inline void __down_read(struct rw_semaphore *sem) - */ - static inline int __down_read_trylock(struct rw_semaphore *sem) - { -- __s32 result, tmp; -+ rwsem_count_t result, tmp; - asm volatile("# beginning __down_read_trylock\n\t" -- " movl %0,%1\n\t" -+ " mov %0,%1\n\t" - "1:\n\t" -- " movl %1,%2\n\t" -- " addl %3,%2\n\t" -+ " mov %1,%2\n\t" -+ " add %3,%2\n\t" - " jle 2f\n\t" -- LOCK_PREFIX " cmpxchgl %2,%0\n\t" -+ LOCK_PREFIX " cmpxchg %2,%0\n\t" - " jnz 1b\n\t" - "2:\n\t" - "# ending __down_read_trylock\n\t" -@@ -143,13 +155,13 @@ static inline int __down_read_trylock(struct rw_semaphore *sem) - */ - static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) - { -- int tmp; -+ rwsem_count_t tmp; - - tmp = RWSEM_ACTIVE_WRITE_BIAS; - asm volatile("# beginning down_write\n\t" -- LOCK_PREFIX " xadd %%edx,(%%eax)\n\t" -+ LOCK_PREFIX " xadd %1,(%2)\n\t" - /* subtract 0x0000ffff, returns the old value */ -- " testl %%edx,%%edx\n\t" -+ " test %1,%1\n\t" - /* was the count 0 before? */ - " jz 1f\n" - " call call_rwsem_down_write_failed\n" -@@ -170,9 +182,9 @@ static inline void __down_write(struct rw_semaphore *sem) - */ - static inline int __down_write_trylock(struct rw_semaphore *sem) - { -- signed long ret = cmpxchg(&sem->count, -- RWSEM_UNLOCKED_VALUE, -- RWSEM_ACTIVE_WRITE_BIAS); -+ rwsem_count_t ret = cmpxchg(&sem->count, -+ RWSEM_UNLOCKED_VALUE, -+ RWSEM_ACTIVE_WRITE_BIAS); - if (ret == RWSEM_UNLOCKED_VALUE) - return 1; - return 0; -@@ -183,9 +195,9 @@ static inline int __down_write_trylock(struct rw_semaphore *sem) - */ - static inline void __up_read(struct rw_semaphore *sem) - { -- __s32 tmp = -RWSEM_ACTIVE_READ_BIAS; -+ rwsem_count_t tmp = -RWSEM_ACTIVE_READ_BIAS; - asm volatile("# beginning __up_read\n\t" -- LOCK_PREFIX " xadd %%edx,(%%eax)\n\t" -+ LOCK_PREFIX " xadd %1,(%2)\n\t" - /* subtracts 1, returns the old value */ - " jns 1f\n\t" - " call call_rwsem_wake\n" -@@ -201,18 +213,18 @@ static inline void __up_read(struct rw_semaphore *sem) - */ - static inline void __up_write(struct rw_semaphore *sem) - { -+ rwsem_count_t tmp; - asm volatile("# beginning __up_write\n\t" -- " movl %2,%%edx\n\t" -- LOCK_PREFIX " xaddl %%edx,(%%eax)\n\t" -+ LOCK_PREFIX " xadd %1,(%2)\n\t" - /* tries to transition - 0xffff0001 -> 0x00000000 */ - " jz 1f\n" - " call call_rwsem_wake\n" - "1:\n\t" - "# ending __up_write\n" -- : "+m" (sem->count) -- : "a" (sem), "i" (-RWSEM_ACTIVE_WRITE_BIAS) -- : "memory", "cc", "edx"); -+ : "+m" (sem->count), "=d" (tmp) -+ : "a" (sem), "1" (-RWSEM_ACTIVE_WRITE_BIAS) -+ : "memory", "cc"); - } - - /* -@@ -221,33 +233,38 @@ static inline void __up_write(struct rw_semaphore *sem) - static inline void __downgrade_write(struct rw_semaphore *sem) - { - asm volatile("# beginning __downgrade_write\n\t" -- LOCK_PREFIX " addl %2,(%%eax)\n\t" -- /* transitions 0xZZZZ0001 -> 0xYYYY0001 */ -+ LOCK_PREFIX _ASM_ADD "%2,(%1)\n\t" -+ /* -+ * transitions 0xZZZZ0001 -> 0xYYYY0001 (i386) -+ * 0xZZZZZZZZ00000001 -> 0xYYYYYYYY00000001 (x86_64) -+ */ - " jns 1f\n\t" - " call call_rwsem_downgrade_wake\n" - "1:\n\t" - "# ending __downgrade_write\n" - : "+m" (sem->count) -- : "a" (sem), "i" (-RWSEM_WAITING_BIAS) -+ : "a" (sem), "er" (-RWSEM_WAITING_BIAS) - : "memory", "cc"); - } - - /* - * implement atomic add functionality - */ --static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) -+static inline void rwsem_atomic_add(rwsem_count_t delta, -+ struct rw_semaphore *sem) - { -- asm volatile(LOCK_PREFIX "addl %1,%0" -+ asm volatile(LOCK_PREFIX _ASM_ADD "%1,%0" - : "+m" (sem->count) -- : "ir" (delta)); -+ : "er" (delta)); - } - - /* - * implement exchange and add functionality - */ --static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) -+static inline rwsem_count_t rwsem_atomic_update(rwsem_count_t delta, -+ struct rw_semaphore *sem) - { -- int tmp = delta; -+ rwsem_count_t tmp = delta; - - asm volatile(LOCK_PREFIX "xadd %0,%1" - : "+r" (tmp), "+m" (sem->count) -diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h -index 1e79678..4cfc908 100644 ---- a/arch/x86/include/asm/smp.h -+++ b/arch/x86/include/asm/smp.h -@@ -135,6 +135,8 @@ int native_cpu_disable(void); - void native_cpu_die(unsigned int cpu); - void native_play_dead(void); - void play_dead_common(void); -+void wbinvd_on_cpu(int cpu); -+int wbinvd_on_all_cpus(void); - - void native_send_call_func_ipi(const struct cpumask *mask); - void native_send_call_func_single_ipi(int cpu); -@@ -147,6 +149,13 @@ static inline int num_booting_cpus(void) - { - return cpumask_weight(cpu_callout_mask); - } -+#else /* !CONFIG_SMP */ -+#define wbinvd_on_cpu(cpu) wbinvd() -+static inline int wbinvd_on_all_cpus(void) -+{ -+ wbinvd(); -+ return 0; -+} - #endif /* CONFIG_SMP */ - - extern unsigned disabled_cpus __cpuinitdata; -diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c -index adb0ba0..2e77516 100644 ---- a/arch/x86/kernel/amd_iommu.c -+++ b/arch/x86/kernel/amd_iommu.c -@@ -2298,7 +2298,7 @@ static void cleanup_domain(struct protection_domain *domain) - list_for_each_entry_safe(dev_data, next, &domain->dev_list, list) { - struct device *dev = dev_data->dev; - -- do_detach(dev); -+ __detach_device(dev); - atomic_set(&dev_data->bind, 0); - } - -@@ -2379,9 +2379,7 @@ static void amd_iommu_domain_destroy(struct iommu_domain *dom) - - free_pagetable(domain); - -- domain_id_free(domain->id); -- -- kfree(domain); -+ protection_domain_free(domain); - - dom->priv = NULL; - } -diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c -index 9dc91b4..883d619 100644 ---- a/arch/x86/kernel/amd_iommu_init.c -+++ b/arch/x86/kernel/amd_iommu_init.c -@@ -1288,6 +1288,8 @@ static int __init amd_iommu_init(void) - if (ret) - goto free; - -+ enable_iommus(); -+ - if (iommu_pass_through) - ret = amd_iommu_init_passthrough(); - else -@@ -1300,8 +1302,6 @@ static int __init amd_iommu_init(void) - - amd_iommu_init_notifier(); - -- enable_iommus(); -- - if (iommu_pass_through) - goto out; - -@@ -1315,6 +1315,7 @@ out: - return ret; - - free: -+ disable_iommus(); - - amd_iommu_uninit_devices(); - -diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c -index f147a95..19f2c70 100644 ---- a/arch/x86/kernel/aperture_64.c -+++ b/arch/x86/kernel/aperture_64.c -@@ -394,6 +394,7 @@ void __init gart_iommu_hole_init(void) - for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) { - int bus; - int dev_base, dev_limit; -+ u32 ctl; - - bus = bus_dev_ranges[i].bus; - dev_base = bus_dev_ranges[i].dev_base; -@@ -407,7 +408,19 @@ void __init gart_iommu_hole_init(void) - gart_iommu_aperture = 1; - x86_init.iommu.iommu_init = gart_iommu_init; - -- aper_order = (read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL) >> 1) & 7; -+ ctl = read_pci_config(bus, slot, 3, -+ AMD64_GARTAPERTURECTL); -+ -+ /* -+ * Before we do anything else disable the GART. It may -+ * still be enabled if we boot into a crash-kernel here. -+ * Reconfiguring the GART while it is enabled could have -+ * unknown side-effects. -+ */ -+ ctl &= ~GARTEN; -+ write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, ctl); -+ -+ aper_order = (ctl >> 1) & 7; - aper_size = (32 * 1024 * 1024) << aper_order; - aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff; - aper_base <<= 25; -diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c -index dfca210..d4df517 100644 ---- a/arch/x86/kernel/apic/apic.c -+++ b/arch/x86/kernel/apic/apic.c -@@ -1640,8 +1640,10 @@ int __init APIC_init_uniprocessor(void) - } - #endif - -+#ifndef CONFIG_SMP - enable_IR_x2apic(); - default_setup_apic_routing(); -+#endif - - verify_local_APIC(); - connect_bsp_APIC(); -diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c -index fc6c8ef..d440123 100644 ---- a/arch/x86/kernel/cpu/intel_cacheinfo.c -+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c -@@ -18,6 +18,7 @@ - #include - #include - #include -+#include - - #define LVL_1_INST 1 - #define LVL_1_DATA 2 -@@ -150,7 +151,8 @@ struct _cpuid4_info { - union _cpuid4_leaf_ebx ebx; - union _cpuid4_leaf_ecx ecx; - unsigned long size; -- unsigned long can_disable; -+ bool can_disable; -+ unsigned int l3_indices; - DECLARE_BITMAP(shared_cpu_map, NR_CPUS); - }; - -@@ -160,7 +162,8 @@ struct _cpuid4_info_regs { - union _cpuid4_leaf_ebx ebx; - union _cpuid4_leaf_ecx ecx; - unsigned long size; -- unsigned long can_disable; -+ bool can_disable; -+ unsigned int l3_indices; - }; - - unsigned short num_cache_leaves; -@@ -290,6 +293,36 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax, - (ebx->split.ways_of_associativity + 1) - 1; - } - -+struct _cache_attr { -+ struct attribute attr; -+ ssize_t (*show)(struct _cpuid4_info *, char *); -+ ssize_t (*store)(struct _cpuid4_info *, const char *, size_t count); -+}; -+ -+#ifdef CONFIG_CPU_SUP_AMD -+static unsigned int __cpuinit amd_calc_l3_indices(void) -+{ -+ /* -+ * We're called over smp_call_function_single() and therefore -+ * are on the correct cpu. -+ */ -+ int cpu = smp_processor_id(); -+ int node = cpu_to_node(cpu); -+ struct pci_dev *dev = node_to_k8_nb_misc(node); -+ unsigned int sc0, sc1, sc2, sc3; -+ u32 val = 0; -+ -+ pci_read_config_dword(dev, 0x1C4, &val); -+ -+ /* calculate subcache sizes */ -+ sc0 = !(val & BIT(0)); -+ sc1 = !(val & BIT(4)); -+ sc2 = !(val & BIT(8)) + !(val & BIT(9)); -+ sc3 = !(val & BIT(12)) + !(val & BIT(13)); -+ -+ return (max(max(max(sc0, sc1), sc2), sc3) << 10) - 1; -+} -+ - static void __cpuinit - amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf) - { -@@ -299,12 +332,103 @@ amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf) - if (boot_cpu_data.x86 == 0x11) - return; - -- /* see erratum #382 */ -- if ((boot_cpu_data.x86 == 0x10) && (boot_cpu_data.x86_model < 0x8)) -+ /* see errata #382 and #388 */ -+ if ((boot_cpu_data.x86 == 0x10) && -+ ((boot_cpu_data.x86_model < 0x8) || -+ (boot_cpu_data.x86_mask < 0x1))) - return; - -- this_leaf->can_disable = 1; -+ this_leaf->can_disable = true; -+ this_leaf->l3_indices = amd_calc_l3_indices(); -+} -+ -+static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf, -+ unsigned int index) -+{ -+ int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map)); -+ int node = amd_get_nb_id(cpu); -+ struct pci_dev *dev = node_to_k8_nb_misc(node); -+ unsigned int reg = 0; -+ -+ if (!this_leaf->can_disable) -+ return -EINVAL; -+ -+ if (!dev) -+ return -EINVAL; -+ -+ pci_read_config_dword(dev, 0x1BC + index * 4, ®); -+ return sprintf(buf, "0x%08x\n", reg); -+} -+ -+#define SHOW_CACHE_DISABLE(index) \ -+static ssize_t \ -+show_cache_disable_##index(struct _cpuid4_info *this_leaf, char *buf) \ -+{ \ -+ return show_cache_disable(this_leaf, buf, index); \ -+} -+SHOW_CACHE_DISABLE(0) -+SHOW_CACHE_DISABLE(1) -+ -+static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf, -+ const char *buf, size_t count, unsigned int index) -+{ -+ int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map)); -+ int node = amd_get_nb_id(cpu); -+ struct pci_dev *dev = node_to_k8_nb_misc(node); -+ unsigned long val = 0; -+ -+#define SUBCACHE_MASK (3UL << 20) -+#define SUBCACHE_INDEX 0xfff -+ -+ if (!this_leaf->can_disable) -+ return -EINVAL; -+ -+ if (!capable(CAP_SYS_ADMIN)) -+ return -EPERM; -+ -+ if (!dev) -+ return -EINVAL; -+ -+ if (strict_strtoul(buf, 10, &val) < 0) -+ return -EINVAL; -+ -+ /* do not allow writes outside of allowed bits */ -+ if ((val & ~(SUBCACHE_MASK | SUBCACHE_INDEX)) || -+ ((val & SUBCACHE_INDEX) > this_leaf->l3_indices)) -+ return -EINVAL; -+ -+ val |= BIT(30); -+ pci_write_config_dword(dev, 0x1BC + index * 4, val); -+ /* -+ * We need to WBINVD on a core on the node containing the L3 cache which -+ * indices we disable therefore a simple wbinvd() is not sufficient. -+ */ -+ wbinvd_on_cpu(cpu); -+ pci_write_config_dword(dev, 0x1BC + index * 4, val | BIT(31)); -+ return count; -+} -+ -+#define STORE_CACHE_DISABLE(index) \ -+static ssize_t \ -+store_cache_disable_##index(struct _cpuid4_info *this_leaf, \ -+ const char *buf, size_t count) \ -+{ \ -+ return store_cache_disable(this_leaf, buf, count, index); \ - } -+STORE_CACHE_DISABLE(0) -+STORE_CACHE_DISABLE(1) -+ -+static struct _cache_attr cache_disable_0 = __ATTR(cache_disable_0, 0644, -+ show_cache_disable_0, store_cache_disable_0); -+static struct _cache_attr cache_disable_1 = __ATTR(cache_disable_1, 0644, -+ show_cache_disable_1, store_cache_disable_1); -+ -+#else /* CONFIG_CPU_SUP_AMD */ -+static void __cpuinit -+amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf) -+{ -+}; -+#endif /* CONFIG_CPU_SUP_AMD */ - - static int - __cpuinit cpuid4_cache_lookup_regs(int index, -@@ -711,82 +835,6 @@ static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf) - #define to_object(k) container_of(k, struct _index_kobject, kobj) - #define to_attr(a) container_of(a, struct _cache_attr, attr) - --static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf, -- unsigned int index) --{ -- int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map)); -- int node = cpu_to_node(cpu); -- struct pci_dev *dev = node_to_k8_nb_misc(node); -- unsigned int reg = 0; -- -- if (!this_leaf->can_disable) -- return -EINVAL; -- -- if (!dev) -- return -EINVAL; -- -- pci_read_config_dword(dev, 0x1BC + index * 4, ®); -- return sprintf(buf, "%x\n", reg); --} -- --#define SHOW_CACHE_DISABLE(index) \ --static ssize_t \ --show_cache_disable_##index(struct _cpuid4_info *this_leaf, char *buf) \ --{ \ -- return show_cache_disable(this_leaf, buf, index); \ --} --SHOW_CACHE_DISABLE(0) --SHOW_CACHE_DISABLE(1) -- --static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf, -- const char *buf, size_t count, unsigned int index) --{ -- int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map)); -- int node = cpu_to_node(cpu); -- struct pci_dev *dev = node_to_k8_nb_misc(node); -- unsigned long val = 0; -- unsigned int scrubber = 0; -- -- if (!this_leaf->can_disable) -- return -EINVAL; -- -- if (!capable(CAP_SYS_ADMIN)) -- return -EPERM; -- -- if (!dev) -- return -EINVAL; -- -- if (strict_strtoul(buf, 10, &val) < 0) -- return -EINVAL; -- -- val |= 0xc0000000; -- -- pci_read_config_dword(dev, 0x58, &scrubber); -- scrubber &= ~0x1f000000; -- pci_write_config_dword(dev, 0x58, scrubber); -- -- pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000); -- wbinvd(); -- pci_write_config_dword(dev, 0x1BC + index * 4, val); -- return count; --} -- --#define STORE_CACHE_DISABLE(index) \ --static ssize_t \ --store_cache_disable_##index(struct _cpuid4_info *this_leaf, \ -- const char *buf, size_t count) \ --{ \ -- return store_cache_disable(this_leaf, buf, count, index); \ --} --STORE_CACHE_DISABLE(0) --STORE_CACHE_DISABLE(1) -- --struct _cache_attr { -- struct attribute attr; -- ssize_t (*show)(struct _cpuid4_info *, char *); -- ssize_t (*store)(struct _cpuid4_info *, const char *, size_t count); --}; -- - #define define_one_ro(_name) \ - static struct _cache_attr _name = \ - __ATTR(_name, 0444, show_##_name, NULL) -@@ -801,23 +849,28 @@ define_one_ro(size); - define_one_ro(shared_cpu_map); - define_one_ro(shared_cpu_list); - --static struct _cache_attr cache_disable_0 = __ATTR(cache_disable_0, 0644, -- show_cache_disable_0, store_cache_disable_0); --static struct _cache_attr cache_disable_1 = __ATTR(cache_disable_1, 0644, -- show_cache_disable_1, store_cache_disable_1); -+#define DEFAULT_SYSFS_CACHE_ATTRS \ -+ &type.attr, \ -+ &level.attr, \ -+ &coherency_line_size.attr, \ -+ &physical_line_partition.attr, \ -+ &ways_of_associativity.attr, \ -+ &number_of_sets.attr, \ -+ &size.attr, \ -+ &shared_cpu_map.attr, \ -+ &shared_cpu_list.attr - - static struct attribute *default_attrs[] = { -- &type.attr, -- &level.attr, -- &coherency_line_size.attr, -- &physical_line_partition.attr, -- &ways_of_associativity.attr, -- &number_of_sets.attr, -- &size.attr, -- &shared_cpu_map.attr, -- &shared_cpu_list.attr, -+ DEFAULT_SYSFS_CACHE_ATTRS, -+ NULL -+}; -+ -+static struct attribute *default_l3_attrs[] = { -+ DEFAULT_SYSFS_CACHE_ATTRS, -+#ifdef CONFIG_CPU_SUP_AMD - &cache_disable_0.attr, - &cache_disable_1.attr, -+#endif - NULL - }; - -@@ -908,6 +961,7 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev) - unsigned int cpu = sys_dev->id; - unsigned long i, j; - struct _index_kobject *this_object; -+ struct _cpuid4_info *this_leaf; - int retval; - - retval = cpuid4_cache_sysfs_init(cpu); -@@ -926,6 +980,14 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev) - this_object = INDEX_KOBJECT_PTR(cpu, i); - this_object->cpu = cpu; - this_object->index = i; -+ -+ this_leaf = CPUID4_INFO_IDX(cpu, i); -+ -+ if (this_leaf->can_disable) -+ ktype_cache.default_attrs = default_l3_attrs; -+ else -+ ktype_cache.default_attrs = default_attrs; -+ - retval = kobject_init_and_add(&(this_object->kobj), - &ktype_cache, - per_cpu(ici_cache_kobject, cpu), -diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c -index 98819b3..c7ca8e2 100644 ---- a/arch/x86/kernel/cpu/perf_event.c -+++ b/arch/x86/kernel/cpu/perf_event.c -@@ -245,6 +245,97 @@ static u64 __read_mostly hw_cache_event_ids - [PERF_COUNT_HW_CACHE_OP_MAX] - [PERF_COUNT_HW_CACHE_RESULT_MAX]; - -+static const u64 westmere_hw_cache_event_ids -+ [PERF_COUNT_HW_CACHE_MAX] -+ [PERF_COUNT_HW_CACHE_OP_MAX] -+ [PERF_COUNT_HW_CACHE_RESULT_MAX] = -+{ -+ [ C(L1D) ] = { -+ [ C(OP_READ) ] = { -+ [ C(RESULT_ACCESS) ] = 0x010b, /* MEM_INST_RETIRED.LOADS */ -+ [ C(RESULT_MISS) ] = 0x0151, /* L1D.REPL */ -+ }, -+ [ C(OP_WRITE) ] = { -+ [ C(RESULT_ACCESS) ] = 0x020b, /* MEM_INST_RETURED.STORES */ -+ [ C(RESULT_MISS) ] = 0x0251, /* L1D.M_REPL */ -+ }, -+ [ C(OP_PREFETCH) ] = { -+ [ C(RESULT_ACCESS) ] = 0x014e, /* L1D_PREFETCH.REQUESTS */ -+ [ C(RESULT_MISS) ] = 0x024e, /* L1D_PREFETCH.MISS */ -+ }, -+ }, -+ [ C(L1I ) ] = { -+ [ C(OP_READ) ] = { -+ [ C(RESULT_ACCESS) ] = 0x0380, /* L1I.READS */ -+ [ C(RESULT_MISS) ] = 0x0280, /* L1I.MISSES */ -+ }, -+ [ C(OP_WRITE) ] = { -+ [ C(RESULT_ACCESS) ] = -1, -+ [ C(RESULT_MISS) ] = -1, -+ }, -+ [ C(OP_PREFETCH) ] = { -+ [ C(RESULT_ACCESS) ] = 0x0, -+ [ C(RESULT_MISS) ] = 0x0, -+ }, -+ }, -+ [ C(LL ) ] = { -+ [ C(OP_READ) ] = { -+ [ C(RESULT_ACCESS) ] = 0x0324, /* L2_RQSTS.LOADS */ -+ [ C(RESULT_MISS) ] = 0x0224, /* L2_RQSTS.LD_MISS */ -+ }, -+ [ C(OP_WRITE) ] = { -+ [ C(RESULT_ACCESS) ] = 0x0c24, /* L2_RQSTS.RFOS */ -+ [ C(RESULT_MISS) ] = 0x0824, /* L2_RQSTS.RFO_MISS */ -+ }, -+ [ C(OP_PREFETCH) ] = { -+ [ C(RESULT_ACCESS) ] = 0x4f2e, /* LLC Reference */ -+ [ C(RESULT_MISS) ] = 0x412e, /* LLC Misses */ -+ }, -+ }, -+ [ C(DTLB) ] = { -+ [ C(OP_READ) ] = { -+ [ C(RESULT_ACCESS) ] = 0x010b, /* MEM_INST_RETIRED.LOADS */ -+ [ C(RESULT_MISS) ] = 0x0108, /* DTLB_LOAD_MISSES.ANY */ -+ }, -+ [ C(OP_WRITE) ] = { -+ [ C(RESULT_ACCESS) ] = 0x020b, /* MEM_INST_RETURED.STORES */ -+ [ C(RESULT_MISS) ] = 0x010c, /* MEM_STORE_RETIRED.DTLB_MISS */ -+ }, -+ [ C(OP_PREFETCH) ] = { -+ [ C(RESULT_ACCESS) ] = 0x0, -+ [ C(RESULT_MISS) ] = 0x0, -+ }, -+ }, -+ [ C(ITLB) ] = { -+ [ C(OP_READ) ] = { -+ [ C(RESULT_ACCESS) ] = 0x01c0, /* INST_RETIRED.ANY_P */ -+ [ C(RESULT_MISS) ] = 0x0185, /* ITLB_MISSES.ANY */ -+ }, -+ [ C(OP_WRITE) ] = { -+ [ C(RESULT_ACCESS) ] = -1, -+ [ C(RESULT_MISS) ] = -1, -+ }, -+ [ C(OP_PREFETCH) ] = { -+ [ C(RESULT_ACCESS) ] = -1, -+ [ C(RESULT_MISS) ] = -1, -+ }, -+ }, -+ [ C(BPU ) ] = { -+ [ C(OP_READ) ] = { -+ [ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ALL_BRANCHES */ -+ [ C(RESULT_MISS) ] = 0x03e8, /* BPU_CLEARS.ANY */ -+ }, -+ [ C(OP_WRITE) ] = { -+ [ C(RESULT_ACCESS) ] = -1, -+ [ C(RESULT_MISS) ] = -1, -+ }, -+ [ C(OP_PREFETCH) ] = { -+ [ C(RESULT_ACCESS) ] = -1, -+ [ C(RESULT_MISS) ] = -1, -+ }, -+ }, -+}; -+ - static __initconst u64 nehalem_hw_cache_event_ids - [PERF_COUNT_HW_CACHE_MAX] - [PERF_COUNT_HW_CACHE_OP_MAX] -@@ -2118,6 +2209,7 @@ static __init int intel_pmu_init(void) - * Install the hw-cache-events table: - */ - switch (boot_cpu_data.x86_model) { -+ - case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ - case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ - case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ -@@ -2129,7 +2221,9 @@ static __init int intel_pmu_init(void) - event_constraints = intel_core_event_constraints; - break; - default: -- case 26: -+ case 26: /* 45 nm nehalem, "Bloomfield" */ -+ case 30: /* 45 nm nehalem, "Lynnfield" */ -+ case 46: /* 45 nm nehalem-ex, "Beckton" */ - memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids, - sizeof(hw_cache_event_ids)); - -@@ -2142,6 +2236,14 @@ static __init int intel_pmu_init(void) - - pr_cont("Atom events, "); - break; -+ -+ case 37: /* 32 nm nehalem, "Clarkdale" */ -+ case 44: /* 32 nm nehalem, "Gulftown" */ -+ memcpy(hw_cache_event_ids, westmere_hw_cache_event_ids, -+ sizeof(hw_cache_event_ids)); -+ -+ pr_cont("Westmere events, "); -+ break; - } - return 0; - } -diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c -index a4849c1..ebd4c51 100644 ---- a/arch/x86/kernel/crash.c -+++ b/arch/x86/kernel/crash.c -@@ -27,7 +27,6 @@ - #include - #include - #include --#include - - #if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC) - -@@ -103,10 +102,5 @@ void native_machine_crash_shutdown(struct pt_regs *regs) - #ifdef CONFIG_HPET_TIMER - hpet_disable(); - #endif -- --#ifdef CONFIG_X86_64 -- x86_platform.iommu_shutdown(); --#endif -- - crash_save_cpu(regs, safe_smp_processor_id()); - } -diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c -index ad80a1c..773afc9 100644 ---- a/arch/x86/kernel/hpet.c -+++ b/arch/x86/kernel/hpet.c -@@ -399,9 +399,15 @@ static int hpet_next_event(unsigned long delta, - * then we might have a real hardware problem. We can not do - * much about it here, but at least alert the user/admin with - * a prominent warning. -+ * An erratum on some chipsets (ICH9,..), results in comparator read -+ * immediately following a write returning old value. Workaround -+ * for this is to read this value second time, when first -+ * read returns old value. - */ -- WARN_ONCE(hpet_readl(HPET_Tn_CMP(timer)) != cnt, -+ if (unlikely((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt)) { -+ WARN_ONCE(hpet_readl(HPET_Tn_CMP(timer)) != cnt, - KERN_WARNING "hpet: compare register read back failed.\n"); -+ } - - return (s32)(hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0; - } -diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c -index bfba601..b2258ca 100644 ---- a/arch/x86/kernel/kgdb.c -+++ b/arch/x86/kernel/kgdb.c -@@ -618,8 +618,8 @@ int kgdb_arch_init(void) - * portion of kgdb because this operation requires mutexs to - * complete. - */ -+ hw_breakpoint_init(&attr); - attr.bp_addr = (unsigned long)kgdb_arch_init; -- attr.type = PERF_TYPE_BREAKPOINT; - attr.bp_len = HW_BREAKPOINT_LEN_1; - attr.bp_type = HW_BREAKPOINT_W; - attr.disabled = 1; -diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c -index a2c1edd..e81030f 100644 ---- a/arch/x86/kernel/mpparse.c -+++ b/arch/x86/kernel/mpparse.c -@@ -664,7 +664,7 @@ static void __init smp_reserve_memory(struct mpf_intel *mpf) - { - unsigned long size = get_mpc_size(mpf->physptr); - -- reserve_early(mpf->physptr, mpf->physptr+size, "MP-table mpc"); -+ reserve_early_overlap_ok(mpf->physptr, mpf->physptr+size, "MP-table mpc"); - } - - static int __init smp_scan_config(unsigned long base, unsigned long length) -@@ -693,7 +693,7 @@ static int __init smp_scan_config(unsigned long base, unsigned long length) - mpf, (u64)virt_to_phys(mpf)); - - mem = virt_to_phys(mpf); -- reserve_early(mem, mem + sizeof(*mpf), "MP-table mpf"); -+ reserve_early_overlap_ok(mem, mem + sizeof(*mpf), "MP-table mpf"); - if (mpf->physptr) - smp_reserve_memory(mpf); - -diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c -index 34de53b..4f41b29 100644 ---- a/arch/x86/kernel/pci-gart_64.c -+++ b/arch/x86/kernel/pci-gart_64.c -@@ -564,6 +564,9 @@ static void enable_gart_translations(void) - - enable_gart_translation(dev, __pa(agp_gatt_table)); - } -+ -+ /* Flush the GART-TLB to remove stale entries */ -+ k8_flush_garts(); - } - - /* -diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c -index 89a49fb..28c3d81 100644 ---- a/arch/x86/kvm/mmu.c -+++ b/arch/x86/kvm/mmu.c -@@ -1502,8 +1502,8 @@ static int mmu_zap_unsync_children(struct kvm *kvm, - for_each_sp(pages, sp, parents, i) { - kvm_mmu_zap_page(kvm, sp); - mmu_pages_clear_parents(&parents); -+ zapped++; - } -- zapped += pages.nr; - kvm_mmu_pages_init(parent, &parents, &pages); - } - -@@ -1554,14 +1554,16 @@ void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) - */ - - if (used_pages > kvm_nr_mmu_pages) { -- while (used_pages > kvm_nr_mmu_pages) { -+ while (used_pages > kvm_nr_mmu_pages && -+ !list_empty(&kvm->arch.active_mmu_pages)) { - struct kvm_mmu_page *page; - - page = container_of(kvm->arch.active_mmu_pages.prev, - struct kvm_mmu_page, link); -- kvm_mmu_zap_page(kvm, page); -+ used_pages -= kvm_mmu_zap_page(kvm, page); - used_pages--; - } -+ kvm_nr_mmu_pages = used_pages; - kvm->arch.n_free_mmu_pages = 0; - } - else -@@ -1608,7 +1610,8 @@ static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) - && !sp->role.invalid) { - pgprintk("%s: zap %lx %x\n", - __func__, gfn, sp->role.word); -- kvm_mmu_zap_page(kvm, sp); -+ if (kvm_mmu_zap_page(kvm, sp)) -+ nn = bucket->first; - } - } - } -diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c -index 1d9b338..d42e191 100644 ---- a/arch/x86/kvm/svm.c -+++ b/arch/x86/kvm/svm.c -@@ -698,29 +698,28 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id) - if (err) - goto free_svm; - -+ err = -ENOMEM; - page = alloc_page(GFP_KERNEL); -- if (!page) { -- err = -ENOMEM; -+ if (!page) - goto uninit; -- } - -- err = -ENOMEM; - msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER); - if (!msrpm_pages) -- goto uninit; -+ goto free_page1; - - nested_msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER); - if (!nested_msrpm_pages) -- goto uninit; -- -- svm->msrpm = page_address(msrpm_pages); -- svm_vcpu_init_msrpm(svm->msrpm); -+ goto free_page2; - - hsave_page = alloc_page(GFP_KERNEL); - if (!hsave_page) -- goto uninit; -+ goto free_page3; -+ - svm->nested.hsave = page_address(hsave_page); - -+ svm->msrpm = page_address(msrpm_pages); -+ svm_vcpu_init_msrpm(svm->msrpm); -+ - svm->nested.msrpm = page_address(nested_msrpm_pages); - - svm->vmcb = page_address(page); -@@ -737,6 +736,12 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id) - - return &svm->vcpu; - -+free_page3: -+ __free_pages(nested_msrpm_pages, MSRPM_ALLOC_ORDER); -+free_page2: -+ __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER); -+free_page1: -+ __free_page(page); - uninit: - kvm_vcpu_uninit(&svm->vcpu); - free_svm: -diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c -index 8a8e139..3acbe19 100644 ---- a/arch/x86/kvm/vmx.c -+++ b/arch/x86/kvm/vmx.c -@@ -61,6 +61,8 @@ module_param_named(unrestricted_guest, - static int __read_mostly emulate_invalid_guest_state = 0; - module_param(emulate_invalid_guest_state, bool, S_IRUGO); - -+#define RMODE_GUEST_OWNED_EFLAGS_BITS (~(X86_EFLAGS_IOPL | X86_EFLAGS_VM)) -+ - /* - * These 2 parameters are used to config the controls for Pause-Loop Exiting: - * ple_gap: upper bound on the amount of time between two successive -@@ -115,7 +117,7 @@ struct vcpu_vmx { - } host_state; - struct { - int vm86_active; -- u8 save_iopl; -+ ulong save_rflags; - struct kvm_save_segment { - u16 selector; - unsigned long base; -@@ -787,18 +789,23 @@ static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu) - - static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu) - { -- unsigned long rflags; -+ unsigned long rflags, save_rflags; - - rflags = vmcs_readl(GUEST_RFLAGS); -- if (to_vmx(vcpu)->rmode.vm86_active) -- rflags &= ~(unsigned long)(X86_EFLAGS_IOPL | X86_EFLAGS_VM); -+ if (to_vmx(vcpu)->rmode.vm86_active) { -+ rflags &= RMODE_GUEST_OWNED_EFLAGS_BITS; -+ save_rflags = to_vmx(vcpu)->rmode.save_rflags; -+ rflags |= save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS; -+ } - return rflags; - } - - static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags) - { -- if (to_vmx(vcpu)->rmode.vm86_active) -+ if (to_vmx(vcpu)->rmode.vm86_active) { -+ to_vmx(vcpu)->rmode.save_rflags = rflags; - rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM; -+ } - vmcs_writel(GUEST_RFLAGS, rflags); - } - -@@ -1431,8 +1438,8 @@ static void enter_pmode(struct kvm_vcpu *vcpu) - vmcs_write32(GUEST_TR_AR_BYTES, vmx->rmode.tr.ar); - - flags = vmcs_readl(GUEST_RFLAGS); -- flags &= ~(X86_EFLAGS_IOPL | X86_EFLAGS_VM); -- flags |= (vmx->rmode.save_iopl << IOPL_SHIFT); -+ flags &= RMODE_GUEST_OWNED_EFLAGS_BITS; -+ flags |= vmx->rmode.save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS; - vmcs_writel(GUEST_RFLAGS, flags); - - vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) | -@@ -1501,8 +1508,7 @@ static void enter_rmode(struct kvm_vcpu *vcpu) - vmcs_write32(GUEST_TR_AR_BYTES, 0x008b); - - flags = vmcs_readl(GUEST_RFLAGS); -- vmx->rmode.save_iopl -- = (flags & X86_EFLAGS_IOPL) >> IOPL_SHIFT; -+ vmx->rmode.save_rflags = flags; - - flags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM; - -@@ -2719,6 +2725,12 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu, - kvm_queue_exception(vcpu, vec); - return 1; - case BP_VECTOR: -+ /* -+ * Update instruction length as we may reinject the exception -+ * from user space while in guest debugging mode. -+ */ -+ to_vmx(vcpu)->vcpu.arch.event_exit_inst_len = -+ vmcs_read32(VM_EXIT_INSTRUCTION_LEN); - if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) - return 0; - /* fall through */ -@@ -2841,6 +2853,13 @@ static int handle_exception(struct kvm_vcpu *vcpu) - kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7); - /* fall through */ - case BP_VECTOR: -+ /* -+ * Update instruction length as we may reinject #BP from -+ * user space while in guest debugging mode. Reading it for -+ * #DB as well causes no harm, it is not used in that case. -+ */ -+ vmx->vcpu.arch.event_exit_inst_len = -+ vmcs_read32(VM_EXIT_INSTRUCTION_LEN); - kvm_run->exit_reason = KVM_EXIT_DEBUG; - kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip; - kvm_run->debug.arch.exception = ex_no; -diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c -index e900908..dd78927 100644 ---- a/arch/x86/kvm/x86.c -+++ b/arch/x86/kvm/x86.c -@@ -384,21 +384,16 @@ out: - void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) - { - if (cr0 & CR0_RESERVED_BITS) { -- printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n", -- cr0, vcpu->arch.cr0); - kvm_inject_gp(vcpu, 0); - return; - } - - if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) { -- printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n"); - kvm_inject_gp(vcpu, 0); - return; - } - - if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) { -- printk(KERN_DEBUG "set_cr0: #GP, set PG flag " -- "and a clear PE flag\n"); - kvm_inject_gp(vcpu, 0); - return; - } -@@ -409,15 +404,11 @@ void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) - int cs_db, cs_l; - - if (!is_pae(vcpu)) { -- printk(KERN_DEBUG "set_cr0: #GP, start paging " -- "in long mode while PAE is disabled\n"); - kvm_inject_gp(vcpu, 0); - return; - } - kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); - if (cs_l) { -- printk(KERN_DEBUG "set_cr0: #GP, start paging " -- "in long mode while CS.L == 1\n"); - kvm_inject_gp(vcpu, 0); - return; - -@@ -425,8 +416,6 @@ void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) - } else - #endif - if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) { -- printk(KERN_DEBUG "set_cr0: #GP, pdptrs " -- "reserved bits\n"); - kvm_inject_gp(vcpu, 0); - return; - } -@@ -453,28 +442,23 @@ void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) - unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE; - - if (cr4 & CR4_RESERVED_BITS) { -- printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n"); - kvm_inject_gp(vcpu, 0); - return; - } - - if (is_long_mode(vcpu)) { - if (!(cr4 & X86_CR4_PAE)) { -- printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while " -- "in long mode\n"); - kvm_inject_gp(vcpu, 0); - return; - } - } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE) - && ((cr4 ^ old_cr4) & pdptr_bits) - && !load_pdptrs(vcpu, vcpu->arch.cr3)) { -- printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n"); - kvm_inject_gp(vcpu, 0); - return; - } - - if (cr4 & X86_CR4_VMXE) { -- printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n"); - kvm_inject_gp(vcpu, 0); - return; - } -@@ -495,21 +479,16 @@ void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3) - - if (is_long_mode(vcpu)) { - if (cr3 & CR3_L_MODE_RESERVED_BITS) { -- printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n"); - kvm_inject_gp(vcpu, 0); - return; - } - } else { - if (is_pae(vcpu)) { - if (cr3 & CR3_PAE_RESERVED_BITS) { -- printk(KERN_DEBUG -- "set_cr3: #GP, reserved bits\n"); - kvm_inject_gp(vcpu, 0); - return; - } - if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) { -- printk(KERN_DEBUG "set_cr3: #GP, pdptrs " -- "reserved bits\n"); - kvm_inject_gp(vcpu, 0); - return; - } -@@ -541,7 +520,6 @@ EXPORT_SYMBOL_GPL(kvm_set_cr3); - void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8) - { - if (cr8 & CR8_RESERVED_BITS) { -- printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8); - kvm_inject_gp(vcpu, 0); - return; - } -@@ -595,15 +573,12 @@ static u32 emulated_msrs[] = { - static void set_efer(struct kvm_vcpu *vcpu, u64 efer) - { - if (efer & efer_reserved_bits) { -- printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n", -- efer); - kvm_inject_gp(vcpu, 0); - return; - } - - if (is_paging(vcpu) - && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) { -- printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n"); - kvm_inject_gp(vcpu, 0); - return; - } -@@ -613,7 +588,6 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer) - - feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0); - if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) { -- printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n"); - kvm_inject_gp(vcpu, 0); - return; - } -@@ -624,7 +598,6 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer) - - feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0); - if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) { -- printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n"); - kvm_inject_gp(vcpu, 0); - return; - } -@@ -913,9 +886,13 @@ static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data) - if (msr >= MSR_IA32_MC0_CTL && - msr < MSR_IA32_MC0_CTL + 4 * bank_num) { - u32 offset = msr - MSR_IA32_MC0_CTL; -- /* only 0 or all 1s can be written to IA32_MCi_CTL */ -+ /* only 0 or all 1s can be written to IA32_MCi_CTL -+ * some Linux kernels though clear bit 10 in bank 4 to -+ * workaround a BIOS/GART TBL issue on AMD K8s, ignore -+ * this to avoid an uncatched #GP in the guest -+ */ - if ((offset & 0x3) == 0 && -- data != 0 && data != ~(u64)0) -+ data != 0 && (data | (1 << 10)) != ~(u64)0) - return -1; - vcpu->arch.mce_banks[offset] = data; - break; -@@ -2366,7 +2343,7 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, - struct kvm_dirty_log *log) - { - int r; -- int n; -+ unsigned long n; - struct kvm_memory_slot *memslot; - int is_dirty = 0; - -@@ -2382,7 +2359,7 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, - kvm_mmu_slot_remove_write_access(kvm, log->slot); - spin_unlock(&kvm->mmu_lock); - memslot = &kvm->memslots[log->slot]; -- n = ALIGN(memslot->npages, BITS_PER_LONG) / 8; -+ n = kvm_dirty_bitmap_bytes(memslot); - memset(memslot->dirty_bitmap, 0, n); - } - r = 0; -@@ -4599,6 +4576,7 @@ int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason) - int ret = 0; - u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR); - u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR); -+ u32 desc_limit; - - old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base); - -@@ -4621,7 +4599,10 @@ int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason) - } - } - -- if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) { -+ desc_limit = get_desc_limit(&nseg_desc); -+ if (!nseg_desc.p || -+ ((desc_limit < 0x67 && (nseg_desc.type & 8)) || -+ desc_limit < 0x2b)) { - kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc); - return 1; - } -diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile -index cffd754..ddef409 100644 ---- a/arch/x86/lib/Makefile -+++ b/arch/x86/lib/Makefile -@@ -14,7 +14,7 @@ $(obj)/inat.o: $(obj)/inat-tables.c - - clean-files := inat-tables.c - --obj-$(CONFIG_SMP) += msr-smp.o -+obj-$(CONFIG_SMP) += msr-smp.o cache-smp.o - - lib-y := delay.o - lib-y += thunk_$(BITS).o -@@ -39,4 +39,5 @@ else - lib-y += thunk_64.o clear_page_64.o copy_page_64.o - lib-y += memmove_64.o memset_64.o - lib-y += copy_user_64.o rwlock_64.o copy_user_nocache_64.o -+ lib-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += rwsem_64.o - endif -diff --git a/arch/x86/lib/cache-smp.c b/arch/x86/lib/cache-smp.c -new file mode 100644 -index 0000000..a3c6688 ---- /dev/null -+++ b/arch/x86/lib/cache-smp.c -@@ -0,0 +1,19 @@ -+#include -+#include -+ -+static void __wbinvd(void *dummy) -+{ -+ wbinvd(); -+} -+ -+void wbinvd_on_cpu(int cpu) -+{ -+ smp_call_function_single(cpu, __wbinvd, NULL, 1); -+} -+EXPORT_SYMBOL(wbinvd_on_cpu); -+ -+int wbinvd_on_all_cpus(void) -+{ -+ return on_each_cpu(__wbinvd, NULL, 1); -+} -+EXPORT_SYMBOL(wbinvd_on_all_cpus); -diff --git a/arch/x86/lib/rwsem_64.S b/arch/x86/lib/rwsem_64.S -new file mode 100644 -index 0000000..15acecf ---- /dev/null -+++ b/arch/x86/lib/rwsem_64.S -@@ -0,0 +1,81 @@ -+/* -+ * x86-64 rwsem wrappers -+ * -+ * This interfaces the inline asm code to the slow-path -+ * C routines. We need to save the call-clobbered regs -+ * that the asm does not mark as clobbered, and move the -+ * argument from %rax to %rdi. -+ * -+ * NOTE! We don't need to save %rax, because the functions -+ * will always return the semaphore pointer in %rax (which -+ * is also the input argument to these helpers) -+ * -+ * The following can clobber %rdx because the asm clobbers it: -+ * call_rwsem_down_write_failed -+ * call_rwsem_wake -+ * but %rdi, %rsi, %rcx, %r8-r11 always need saving. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#define save_common_regs \ -+ pushq %rdi; \ -+ pushq %rsi; \ -+ pushq %rcx; \ -+ pushq %r8; \ -+ pushq %r9; \ -+ pushq %r10; \ -+ pushq %r11 -+ -+#define restore_common_regs \ -+ popq %r11; \ -+ popq %r10; \ -+ popq %r9; \ -+ popq %r8; \ -+ popq %rcx; \ -+ popq %rsi; \ -+ popq %rdi -+ -+/* Fix up special calling conventions */ -+ENTRY(call_rwsem_down_read_failed) -+ save_common_regs -+ pushq %rdx -+ movq %rax,%rdi -+ call rwsem_down_read_failed -+ popq %rdx -+ restore_common_regs -+ ret -+ ENDPROC(call_rwsem_down_read_failed) -+ -+ENTRY(call_rwsem_down_write_failed) -+ save_common_regs -+ movq %rax,%rdi -+ call rwsem_down_write_failed -+ restore_common_regs -+ ret -+ ENDPROC(call_rwsem_down_write_failed) -+ -+ENTRY(call_rwsem_wake) -+ decw %dx /* do nothing if still outstanding active readers */ -+ jnz 1f -+ save_common_regs -+ movq %rax,%rdi -+ call rwsem_wake -+ restore_common_regs -+1: ret -+ ENDPROC(call_rwsem_wake) -+ -+/* Fix up special calling conventions */ -+ENTRY(call_rwsem_downgrade_wake) -+ save_common_regs -+ pushq %rdx -+ movq %rax,%rdi -+ call rwsem_downgrade_wake -+ popq %rdx -+ restore_common_regs -+ ret -+ ENDPROC(call_rwsem_downgrade_wake) -diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c -index 0696d50..b02f6d8 100644 ---- a/arch/x86/pci/irq.c -+++ b/arch/x86/pci/irq.c -@@ -590,6 +590,8 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route - case PCI_DEVICE_ID_INTEL_ICH10_1: - case PCI_DEVICE_ID_INTEL_ICH10_2: - case PCI_DEVICE_ID_INTEL_ICH10_3: -+ case PCI_DEVICE_ID_INTEL_CPT_LPC1: -+ case PCI_DEVICE_ID_INTEL_CPT_LPC2: - r->name = "PIIX/ICH"; - r->get = pirq_piix_get; - r->set = pirq_piix_set; -diff --git a/arch/x86/power/hibernate_asm_32.S b/arch/x86/power/hibernate_asm_32.S -index b641388..ad47dae 100644 ---- a/arch/x86/power/hibernate_asm_32.S -+++ b/arch/x86/power/hibernate_asm_32.S -@@ -27,10 +27,17 @@ ENTRY(swsusp_arch_suspend) - ret - - ENTRY(restore_image) -+ movl mmu_cr4_features, %ecx - movl resume_pg_dir, %eax - subl $__PAGE_OFFSET, %eax - movl %eax, %cr3 - -+ jecxz 1f # cr4 Pentium and higher, skip if zero -+ andl $~(X86_CR4_PGE), %ecx -+ movl %ecx, %cr4; # turn off PGE -+ movl %cr3, %eax; # flush TLB -+ movl %eax, %cr3 -+1: - movl restore_pblist, %edx - .p2align 4,,7 - -@@ -54,16 +61,8 @@ done: - movl $swapper_pg_dir, %eax - subl $__PAGE_OFFSET, %eax - movl %eax, %cr3 -- /* Flush TLB, including "global" things (vmalloc) */ - movl mmu_cr4_features, %ecx - jecxz 1f # cr4 Pentium and higher, skip if zero -- movl %ecx, %edx -- andl $~(X86_CR4_PGE), %edx -- movl %edx, %cr4; # turn off PGE --1: -- movl %cr3, %eax; # flush TLB -- movl %eax, %cr3 -- jecxz 1f # cr4 Pentium and higher, skip if zero - movl %ecx, %cr4; # turn PGE back on - 1: - -diff --git a/drivers/acpi/acpica/exprep.c b/drivers/acpi/acpica/exprep.c -index 52fec07..83b6252 100644 ---- a/drivers/acpi/acpica/exprep.c -+++ b/drivers/acpi/acpica/exprep.c -@@ -468,6 +468,23 @@ acpi_status acpi_ex_prep_field_value(struct acpi_create_field_info *info) - - acpi_ut_add_reference(obj_desc->field.region_obj); - -+ /* allow full data read from EC address space */ -+ if (obj_desc->field.region_obj->region.space_id == -+ ACPI_ADR_SPACE_EC) { -+ if (obj_desc->common_field.bit_length > 8) { -+ unsigned width = -+ ACPI_ROUND_BITS_UP_TO_BYTES( -+ obj_desc->common_field.bit_length); -+ // access_bit_width is u8, don't overflow it -+ if (width > 8) -+ width = 8; -+ obj_desc->common_field.access_byte_width = -+ width; -+ obj_desc->common_field.access_bit_width = -+ 8 * width; -+ } -+ } -+ - ACPI_DEBUG_PRINT((ACPI_DB_BFIELD, - "RegionField: BitOff %X, Off %X, Gran %X, Region %p\n", - obj_desc->field.start_field_bit_offset, -diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c -index d6471bb..fc67d11 100644 ---- a/drivers/acpi/ec.c -+++ b/drivers/acpi/ec.c -@@ -589,12 +589,12 @@ static u32 acpi_ec_gpe_handler(void *data) - - static acpi_status - acpi_ec_space_handler(u32 function, acpi_physical_address address, -- u32 bits, acpi_integer *value, -+ u32 bits, acpi_integer *value64, - void *handler_context, void *region_context) - { - struct acpi_ec *ec = handler_context; -- int result = 0, i; -- u8 temp = 0; -+ int result = 0, i, bytes = bits / 8; -+ u8 *value = (u8 *)value64; - - if ((address > 0xFF) || !value || !handler_context) - return AE_BAD_PARAMETER; -@@ -602,32 +602,15 @@ acpi_ec_space_handler(u32 function, acpi_physical_address address, - if (function != ACPI_READ && function != ACPI_WRITE) - return AE_BAD_PARAMETER; - -- if (bits != 8 && acpi_strict) -- return AE_BAD_PARAMETER; -- -- if (EC_FLAGS_MSI) -+ if (EC_FLAGS_MSI || bits > 8) - acpi_ec_burst_enable(ec); - -- if (function == ACPI_READ) { -- result = acpi_ec_read(ec, address, &temp); -- *value = temp; -- } else { -- temp = 0xff & (*value); -- result = acpi_ec_write(ec, address, temp); -- } -- -- for (i = 8; unlikely(bits - i > 0); i += 8) { -- ++address; -- if (function == ACPI_READ) { -- result = acpi_ec_read(ec, address, &temp); -- (*value) |= ((acpi_integer)temp) << i; -- } else { -- temp = 0xff & ((*value) >> i); -- result = acpi_ec_write(ec, address, temp); -- } -- } -+ for (i = 0; i < bytes; ++i, ++address, ++value) -+ result = (function == ACPI_READ) ? -+ acpi_ec_read(ec, address, value) : -+ acpi_ec_write(ec, address, *value); - -- if (EC_FLAGS_MSI) -+ if (EC_FLAGS_MSI || bits > 8) - acpi_ec_burst_disable(ec); - - switch (result) { -diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c -index 9e2feb6..462200d 100644 ---- a/drivers/ata/ahci.c -+++ b/drivers/ata/ahci.c -@@ -570,6 +570,12 @@ static const struct pci_device_id ahci_pci_tbl[] = { - { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ - { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */ - { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */ -+ { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */ -+ { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */ -+ { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */ -+ { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */ -+ { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */ -+ { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */ - - /* JMicron 360/1/3/5/6, match class to avoid IDE function */ - { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, -diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c -index 6f3f225..b5f614b 100644 ---- a/drivers/ata/ata_piix.c -+++ b/drivers/ata/ata_piix.c -@@ -291,6 +291,14 @@ static const struct pci_device_id piix_pci_tbl[] = { - { 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, - /* SATA Controller IDE (PCH) */ - { 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, -+ /* SATA Controller IDE (CPT) */ -+ { 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, -+ /* SATA Controller IDE (CPT) */ -+ { 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, -+ /* SATA Controller IDE (CPT) */ -+ { 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, -+ /* SATA Controller IDE (CPT) */ -+ { 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, - { } /* terminate list */ - }; - -diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c -index 6728328..2401c9c 100644 ---- a/drivers/ata/libata-core.c -+++ b/drivers/ata/libata-core.c -@@ -4348,6 +4348,9 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { - { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, - { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, - -+ /* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */ -+ { "C300-CTFDDAC128MAG", "0001", ATA_HORKAGE_NONCQ, }, -+ - /* devices which puke on READ_NATIVE_MAX */ - { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, - { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA }, -diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c -index be7c395..ad64750 100644 ---- a/drivers/ata/pata_via.c -+++ b/drivers/ata/pata_via.c -@@ -697,6 +697,7 @@ static const struct pci_device_id via[] = { - { PCI_VDEVICE(VIA, 0x3164), }, - { PCI_VDEVICE(VIA, 0x5324), }, - { PCI_VDEVICE(VIA, 0xC409), VIA_IDFLAG_SINGLE }, -+ { PCI_VDEVICE(VIA, 0x9001), VIA_IDFLAG_SINGLE }, - - { }, - }; -diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c -index 3999a5f..8a713f1 100644 ---- a/drivers/char/agp/intel-agp.c -+++ b/drivers/char/agp/intel-agp.c -@@ -8,6 +8,7 @@ - #include - #include - #include -+#include - #include "agp.h" - - /* -@@ -815,12 +816,6 @@ static void intel_i830_setup_flush(void) - intel_i830_fini_flush(); - } - --static void --do_wbinvd(void *null) --{ -- wbinvd(); --} -- - /* The chipset_flush interface needs to get data that has already been - * flushed out of the CPU all the way out to main memory, because the GPU - * doesn't snoop those buffers. -@@ -837,12 +832,10 @@ static void intel_i830_chipset_flush(struct agp_bridge_data *bridge) - - memset(pg, 0, 1024); - -- if (cpu_has_clflush) { -+ if (cpu_has_clflush) - clflush_cache_range(pg, 1024); -- } else { -- if (on_each_cpu(do_wbinvd, NULL, 1) != 0) -- printk(KERN_ERR "Timed out waiting for cache flush.\n"); -- } -+ else if (wbinvd_on_all_cpus() != 0) -+ printk(KERN_ERR "Timed out waiting for cache flush.\n"); - } - - /* The intel i830 automatically initializes the agp aperture during POST. -diff --git a/drivers/char/raw.c b/drivers/char/raw.c -index 64acd05..9abc3a1 100644 ---- a/drivers/char/raw.c -+++ b/drivers/char/raw.c -@@ -247,6 +247,7 @@ static const struct file_operations raw_fops = { - .aio_read = generic_file_aio_read, - .write = do_sync_write, - .aio_write = blkdev_aio_write, -+ .fsync = block_fsync, - .open = raw_open, - .release= raw_release, - .ioctl = raw_ioctl, -diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c -index dcb9083..76253cf 100644 ---- a/drivers/char/tty_io.c -+++ b/drivers/char/tty_io.c -@@ -1423,6 +1423,8 @@ static void release_one_tty(struct work_struct *work) - list_del_init(&tty->tty_files); - file_list_unlock(); - -+ put_pid(tty->pgrp); -+ put_pid(tty->session); - free_tty_struct(tty); - } - -diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c -index 7d0f00a..99907c3 100644 ---- a/drivers/gpu/drm/drm_crtc_helper.c -+++ b/drivers/gpu/drm/drm_crtc_helper.c -@@ -104,6 +104,7 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector, - if (connector->status == connector_status_disconnected) { - DRM_DEBUG_KMS("%s is disconnected\n", - drm_get_connector_name(connector)); -+ drm_mode_connector_update_edid_property(connector, NULL); - goto prune; - } - -diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c -index ab6c973..bfd0e4a 100644 ---- a/drivers/gpu/drm/drm_edid.c -+++ b/drivers/gpu/drm/drm_edid.c -@@ -85,6 +85,8 @@ static struct edid_quirk { - - /* Envision Peripherals, Inc. EN-7100e */ - { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, -+ /* Envision EN2028 */ -+ { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, - - /* Funai Electronics PM36B */ - { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | -@@ -707,15 +709,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, - mode->vsync_end = mode->vsync_start + vsync_pulse_width; - mode->vtotal = mode->vdisplay + vblank; - -- /* perform the basic check for the detailed timing */ -- if (mode->hsync_end > mode->htotal || -- mode->vsync_end > mode->vtotal) { -- drm_mode_destroy(dev, mode); -- DRM_DEBUG_KMS("Incorrect detailed timing. " -- "Sync is beyond the blank.\n"); -- return NULL; -- } -- - /* Some EDIDs have bogus h/vtotal values */ - if (mode->hsync_end > mode->htotal) - mode->htotal = mode->hsync_end + 1; -diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c -index 08d14df..4804872 100644 ---- a/drivers/gpu/drm/drm_fops.c -+++ b/drivers/gpu/drm/drm_fops.c -@@ -140,14 +140,16 @@ int drm_open(struct inode *inode, struct file *filp) - spin_unlock(&dev->count_lock); - } - out: -- mutex_lock(&dev->struct_mutex); -- if (minor->type == DRM_MINOR_LEGACY) { -- BUG_ON((dev->dev_mapping != NULL) && -- (dev->dev_mapping != inode->i_mapping)); -- if (dev->dev_mapping == NULL) -- dev->dev_mapping = inode->i_mapping; -+ if (!retcode) { -+ mutex_lock(&dev->struct_mutex); -+ if (minor->type == DRM_MINOR_LEGACY) { -+ if (dev->dev_mapping == NULL) -+ dev->dev_mapping = inode->i_mapping; -+ else if (dev->dev_mapping != inode->i_mapping) -+ retcode = -ENODEV; -+ } -+ mutex_unlock(&dev->struct_mutex); - } -- mutex_unlock(&dev->struct_mutex); - - return retcode; - } -diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c -index 93031a7..1238bc9 100644 ---- a/drivers/gpu/drm/i915/intel_lvds.c -+++ b/drivers/gpu/drm/i915/intel_lvds.c -@@ -899,6 +899,14 @@ static const struct dmi_system_id intel_no_lvds[] = { - DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), - }, - }, -+ { -+ .callback = intel_no_lvds_dmi_callback, -+ .ident = "Clientron U800", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), -+ DMI_MATCH(DMI_PRODUCT_NAME, "U800"), -+ }, -+ }, - - { } /* terminating entry */ - }; -diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c -index d75788f..b1f929d 100644 ---- a/drivers/gpu/drm/radeon/atom.c -+++ b/drivers/gpu/drm/radeon/atom.c -@@ -881,11 +881,16 @@ static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg) - uint8_t attr = U8((*ptr)++), shift; - uint32_t saved, dst; - int dptr = *ptr; -+ uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; - SDEBUG(" dst: "); - dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); -+ /* op needs to full dst value */ -+ dst = saved; - shift = atom_get_src(ctx, attr, ptr); - SDEBUG(" shift: %d\n", shift); - dst <<= shift; -+ dst &= atom_arg_mask[dst_align]; -+ dst >>= atom_arg_shift[dst_align]; - SDEBUG(" dst: "); - atom_put_dst(ctx, arg, attr, &dptr, dst, saved); - } -@@ -895,11 +900,16 @@ static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg) - uint8_t attr = U8((*ptr)++), shift; - uint32_t saved, dst; - int dptr = *ptr; -+ uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; - SDEBUG(" dst: "); - dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); -+ /* op needs to full dst value */ -+ dst = saved; - shift = atom_get_src(ctx, attr, ptr); - SDEBUG(" shift: %d\n", shift); - dst >>= shift; -+ dst &= atom_arg_mask[dst_align]; -+ dst >>= atom_arg_shift[dst_align]; - SDEBUG(" dst: "); - atom_put_dst(ctx, arg, attr, &dptr, dst, saved); - } -diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c -index 43b55a0..5bdfaf2 100644 ---- a/drivers/gpu/drm/radeon/r300.c -+++ b/drivers/gpu/drm/radeon/r300.c -@@ -364,11 +364,12 @@ void r300_gpu_init(struct radeon_device *rdev) - - r100_hdp_reset(rdev); - /* FIXME: rv380 one pipes ? */ -- if ((rdev->family == CHIP_R300) || (rdev->family == CHIP_R350)) { -+ if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) || -+ (rdev->family == CHIP_R350)) { - /* r300,r350 */ - rdev->num_gb_pipes = 2; - } else { -- /* rv350,rv370,rv380 */ -+ /* rv350,rv370,rv380,r300 AD */ - rdev->num_gb_pipes = 1; - } - rdev->num_z_pipes = 1; -diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c -index e7b1944..81b832e 100644 ---- a/drivers/gpu/drm/radeon/radeon_combios.c -+++ b/drivers/gpu/drm/radeon/radeon_combios.c -@@ -670,7 +670,9 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct - dac = RBIOS8(dac_info + 0x3) & 0xf; - p_dac->ps2_pdac_adj = (bg << 8) | (dac); - } -- found = 1; -+ /* if the values are all zeros, use the table */ -+ if (p_dac->ps2_pdac_adj) -+ found = 1; - } - - out: -@@ -812,7 +814,9 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct - bg = RBIOS8(dac_info + 0x10) & 0xf; - dac = RBIOS8(dac_info + 0x11) & 0xf; - tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); -- found = 1; -+ /* if the values are all zeros, use the table */ -+ if (tv_dac->ps2_tvdac_adj) -+ found = 1; - } else if (rev > 1) { - bg = RBIOS8(dac_info + 0xc) & 0xf; - dac = (RBIOS8(dac_info + 0xc) >> 4) & 0xf; -@@ -825,7 +829,9 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct - bg = RBIOS8(dac_info + 0xe) & 0xf; - dac = (RBIOS8(dac_info + 0xe) >> 4) & 0xf; - tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); -- found = 1; -+ /* if the values are all zeros, use the table */ -+ if (tv_dac->ps2_tvdac_adj) -+ found = 1; - } - tv_dac->tv_std = radeon_combios_get_tv_info(rdev); - } -@@ -842,7 +848,9 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct - (bg << 16) | (dac << 20); - tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj; - tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj; -- found = 1; -+ /* if the values are all zeros, use the table */ -+ if (tv_dac->ps2_tvdac_adj) -+ found = 1; - } else { - bg = RBIOS8(dac_info + 0x4) & 0xf; - dac = RBIOS8(dac_info + 0x5) & 0xf; -@@ -850,7 +858,9 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct - (bg << 16) | (dac << 20); - tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj; - tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj; -- found = 1; -+ /* if the values are all zeros, use the table */ -+ if (tv_dac->ps2_tvdac_adj) -+ found = 1; - } - } else { - DRM_INFO("No TV DAC info found in BIOS\n"); -diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c -index 65f8194..2bdfbcd 100644 ---- a/drivers/gpu/drm/radeon/radeon_connectors.c -+++ b/drivers/gpu/drm/radeon/radeon_connectors.c -@@ -162,12 +162,14 @@ radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, - { - struct drm_device *dev = connector->dev; - struct drm_connector *conflict; -+ struct radeon_connector *radeon_conflict; - int i; - - list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { - if (conflict == connector) - continue; - -+ radeon_conflict = to_radeon_connector(conflict); - for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { - if (conflict->encoder_ids[i] == 0) - break; -@@ -177,6 +179,9 @@ radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, - if (conflict->status != connector_status_connected) - continue; - -+ if (radeon_conflict->use_digital) -+ continue; -+ - if (priority == true) { - DRM_INFO("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); - DRM_INFO("in favor of %s\n", drm_get_connector_name(connector)); -@@ -315,7 +320,7 @@ int radeon_connector_set_property(struct drm_connector *connector, struct drm_pr - radeon_encoder = to_radeon_encoder(encoder); - if (!radeon_encoder->enc_priv) - return 0; -- if (rdev->is_atom_bios) { -+ if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { - struct radeon_encoder_atom_dac *dac_int; - dac_int = radeon_encoder->enc_priv; - dac_int->tv_std = val; -diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c -index 06123ba..f129bbb 100644 ---- a/drivers/gpu/drm/radeon/radeon_cp.c -+++ b/drivers/gpu/drm/radeon/radeon_cp.c -@@ -417,8 +417,9 @@ static int radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv) - return -EBUSY; - } - --static void radeon_init_pipes(drm_radeon_private_t *dev_priv) -+static void radeon_init_pipes(struct drm_device *dev) - { -+ drm_radeon_private_t *dev_priv = dev->dev_private; - uint32_t gb_tile_config, gb_pipe_sel = 0; - - if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) { -@@ -436,11 +437,12 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv) - dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; - } else { - /* R3xx */ -- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) || -+ if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300 && -+ dev->pdev->device != 0x4144) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) { - dev_priv->num_gb_pipes = 2; - } else { -- /* R3Vxx */ -+ /* RV3xx/R300 AD */ - dev_priv->num_gb_pipes = 1; - } - } -@@ -736,7 +738,7 @@ static int radeon_do_engine_reset(struct drm_device * dev) - - /* setup the raster pipes */ - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300) -- radeon_init_pipes(dev_priv); -+ radeon_init_pipes(dev); - - /* Reset the CP ring */ - radeon_do_cp_reset(dev_priv); -diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c -index e9d0850..9933c2c 100644 ---- a/drivers/gpu/drm/radeon/radeon_cs.c -+++ b/drivers/gpu/drm/radeon/radeon_cs.c -@@ -193,11 +193,13 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error) - radeon_bo_list_fence(&parser->validated, parser->ib->fence); - } - radeon_bo_list_unreserve(&parser->validated); -- for (i = 0; i < parser->nrelocs; i++) { -- if (parser->relocs[i].gobj) { -- mutex_lock(&parser->rdev->ddev->struct_mutex); -- drm_gem_object_unreference(parser->relocs[i].gobj); -- mutex_unlock(&parser->rdev->ddev->struct_mutex); -+ if (parser->relocs != NULL) { -+ for (i = 0; i < parser->nrelocs; i++) { -+ if (parser->relocs[i].gobj) { -+ mutex_lock(&parser->rdev->ddev->struct_mutex); -+ drm_gem_object_unreference(parser->relocs[i].gobj); -+ mutex_unlock(&parser->rdev->ddev->struct_mutex); -+ } - } - } - kfree(parser->track); -@@ -246,7 +248,8 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) - } - r = radeon_cs_parser_relocs(&parser); - if (r) { -- DRM_ERROR("Failed to parse relocation !\n"); -+ if (r != -ERESTARTSYS) -+ DRM_ERROR("Failed to parse relocation %d!\n", r); - radeon_cs_parser_fini(&parser, r); - mutex_unlock(&rdev->cs_mutex); - return r; -diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c -index 768b150..509ba3f 100644 ---- a/drivers/gpu/drm/radeon/radeon_device.c -+++ b/drivers/gpu/drm/radeon/radeon_device.c -@@ -655,6 +655,14 @@ int radeon_device_init(struct radeon_device *rdev, - return r; - radeon_check_arguments(rdev); - -+ /* all of the newer IGP chips have an internal gart -+ * However some rs4xx report as AGP, so remove that here. -+ */ -+ if ((rdev->family >= CHIP_RS400) && -+ (rdev->flags & RADEON_IS_IGP)) { -+ rdev->flags &= ~RADEON_IS_AGP; -+ } -+ - if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) { - radeon_agp_disable(rdev); - } -diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c -index 3c91724..7626bd5 100644 ---- a/drivers/gpu/drm/radeon/radeon_encoders.c -+++ b/drivers/gpu/drm/radeon/radeon_encoders.c -@@ -1276,8 +1276,12 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, - case ENCODER_OBJECT_ID_INTERNAL_DAC2: - case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: - atombios_dac_setup(encoder, ATOM_ENABLE); -- if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) -- atombios_tv_setup(encoder, ATOM_ENABLE); -+ if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) { -+ if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) -+ atombios_tv_setup(encoder, ATOM_ENABLE); -+ else -+ atombios_tv_setup(encoder, ATOM_DISABLE); -+ } - break; - } - atombios_apply_encoder_quirks(encoder, adjusted_mode); -diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c b/drivers/gpu/drm/radeon/radeon_legacy_tv.c -index 417684d..f2ed27c 100644 ---- a/drivers/gpu/drm/radeon/radeon_legacy_tv.c -+++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c -@@ -57,6 +57,10 @@ - #define NTSC_TV_PLL_N_14 693 - #define NTSC_TV_PLL_P_14 7 - -+#define PAL_TV_PLL_M_14 19 -+#define PAL_TV_PLL_N_14 353 -+#define PAL_TV_PLL_P_14 5 -+ - #define VERT_LEAD_IN_LINES 2 - #define FRAC_BITS 0xe - #define FRAC_MASK 0x3fff -@@ -205,9 +209,24 @@ static const struct radeon_tv_mode_constants available_tv_modes[] = { - 630627, /* defRestart */ - 347, /* crtcPLL_N */ - 14, /* crtcPLL_M */ -- 8, /* crtcPLL_postDiv */ -+ 8, /* crtcPLL_postDiv */ - 1022, /* pixToTV */ - }, -+ { /* PAL timing for 14 Mhz ref clk */ -+ 800, /* horResolution */ -+ 600, /* verResolution */ -+ TV_STD_PAL, /* standard */ -+ 1131, /* horTotal */ -+ 742, /* verTotal */ -+ 813, /* horStart */ -+ 840, /* horSyncStart */ -+ 633, /* verSyncStart */ -+ 708369, /* defRestart */ -+ 211, /* crtcPLL_N */ -+ 9, /* crtcPLL_M */ -+ 8, /* crtcPLL_postDiv */ -+ 759, /* pixToTV */ -+ }, - }; - - #define N_AVAILABLE_MODES ARRAY_SIZE(available_tv_modes) -@@ -242,7 +261,7 @@ static const struct radeon_tv_mode_constants *radeon_legacy_tv_get_std_mode(stru - if (pll->reference_freq == 2700) - const_ptr = &available_tv_modes[1]; - else -- const_ptr = &available_tv_modes[1]; /* FIX ME */ -+ const_ptr = &available_tv_modes[3]; - } - return const_ptr; - } -@@ -685,9 +704,9 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, - n = PAL_TV_PLL_N_27; - p = PAL_TV_PLL_P_27; - } else { -- m = PAL_TV_PLL_M_27; -- n = PAL_TV_PLL_N_27; -- p = PAL_TV_PLL_P_27; -+ m = PAL_TV_PLL_M_14; -+ n = PAL_TV_PLL_N_14; -+ p = PAL_TV_PLL_P_14; - } - } - -diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c -index c381856..a27c09f 100644 ---- a/drivers/gpu/drm/radeon/rs600.c -+++ b/drivers/gpu/drm/radeon/rs600.c -@@ -175,7 +175,7 @@ void rs600_gart_tlb_flush(struct radeon_device *rdev) - WREG32_MC(R_000100_MC_PT0_CNTL, tmp); - - tmp = RREG32_MC(R_000100_MC_PT0_CNTL); -- tmp |= S_000100_INVALIDATE_ALL_L1_TLBS(1) & S_000100_INVALIDATE_L2_CACHE(1); -+ tmp |= S_000100_INVALIDATE_ALL_L1_TLBS(1) | S_000100_INVALIDATE_L2_CACHE(1); - WREG32_MC(R_000100_MC_PT0_CNTL, tmp); - - tmp = RREG32_MC(R_000100_MC_PT0_CNTL); -diff --git a/drivers/hid/hid-gyration.c b/drivers/hid/hid-gyration.c -index cab13e8..62416e6 100644 ---- a/drivers/hid/hid-gyration.c -+++ b/drivers/hid/hid-gyration.c -@@ -53,10 +53,13 @@ static int gyration_input_mapping(struct hid_device *hdev, struct hid_input *hi, - static int gyration_event(struct hid_device *hdev, struct hid_field *field, - struct hid_usage *usage, __s32 value) - { -- struct input_dev *input = field->hidinput->input; -+ -+ if (!(hdev->claimed & HID_CLAIMED_INPUT) || !field->hidinput) -+ return 0; - - if ((usage->hid & HID_USAGE_PAGE) == HID_UP_GENDESK && - (usage->hid & 0xff) == 0x82) { -+ struct input_dev *input = field->hidinput->input; - input_event(input, usage->type, usage->code, 1); - input_sync(input); - input_event(input, usage->type, usage->code, 0); -diff --git a/drivers/hwmon/sht15.c b/drivers/hwmon/sht15.c -index 864a371..fbc997e 100644 ---- a/drivers/hwmon/sht15.c -+++ b/drivers/hwmon/sht15.c -@@ -302,13 +302,13 @@ error_ret: - **/ - static inline int sht15_calc_temp(struct sht15_data *data) - { -- int d1 = 0; -+ int d1 = temppoints[0].d1; - int i; - -- for (i = 1; i < ARRAY_SIZE(temppoints); i++) -+ for (i = ARRAY_SIZE(temppoints) - 1; i > 0; i--) - /* Find pointer to interpolate */ - if (data->supply_uV > temppoints[i - 1].vdd) { -- d1 = (data->supply_uV/1000 - temppoints[i - 1].vdd) -+ d1 = (data->supply_uV - temppoints[i - 1].vdd) - * (temppoints[i].d1 - temppoints[i - 1].d1) - / (temppoints[i].vdd - temppoints[i - 1].vdd) - + temppoints[i - 1].d1; -@@ -541,7 +541,12 @@ static int __devinit sht15_probe(struct platform_device *pdev) - /* If a regulator is available, query what the supply voltage actually is!*/ - data->reg = regulator_get(data->dev, "vcc"); - if (!IS_ERR(data->reg)) { -- data->supply_uV = regulator_get_voltage(data->reg); -+ int voltage; -+ -+ voltage = regulator_get_voltage(data->reg); -+ if (voltage) -+ data->supply_uV = voltage; -+ - regulator_enable(data->reg); - /* setup a notifier block to update this if another device - * causes the voltage to change */ -diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig -index 5f318ce..cb9f95c 100644 ---- a/drivers/i2c/busses/Kconfig -+++ b/drivers/i2c/busses/Kconfig -@@ -77,7 +77,7 @@ config I2C_AMD8111 - will be called i2c-amd8111. - - config I2C_I801 -- tristate "Intel 82801 (ICH)" -+ tristate "Intel 82801 (ICH/PCH)" - depends on PCI - help - If you say yes to this option, support will be included for the Intel -@@ -97,7 +97,8 @@ config I2C_I801 - ICH9 - Tolapai - ICH10 -- PCH -+ 3400/5 Series (PCH) -+ Cougar Point (PCH) - - This driver can also be built as a module. If so, the module - will be called i2c-i801. -diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c -index 5574be2..e361da7 100644 ---- a/drivers/i2c/busses/i2c-i801.c -+++ b/drivers/i2c/busses/i2c-i801.c -@@ -41,7 +41,8 @@ - Tolapai 0x5032 32 hard yes yes yes - ICH10 0x3a30 32 hard yes yes yes - ICH10 0x3a60 32 hard yes yes yes -- PCH 0x3b30 32 hard yes yes yes -+ 3400/5 Series (PCH) 0x3b30 32 hard yes yes yes -+ Cougar Point (PCH) 0x1c22 32 hard yes yes yes - - Features supported by this driver: - Software PEC no -@@ -580,6 +581,7 @@ static struct pci_device_id i801_ids[] = { - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PCH_SMBUS) }, -+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CPT_SMBUS) }, - { 0, } - }; - -@@ -709,6 +711,7 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id - case PCI_DEVICE_ID_INTEL_ICH10_4: - case PCI_DEVICE_ID_INTEL_ICH10_5: - case PCI_DEVICE_ID_INTEL_PCH_SMBUS: -+ case PCI_DEVICE_ID_INTEL_CPT_SMBUS: - i801_features |= FEATURE_I2C_BLOCK_READ; - /* fall through */ - case PCI_DEVICE_ID_INTEL_82801DB_3: -diff --git a/drivers/infiniband/ulp/ipoib/ipoib_cm.c b/drivers/infiniband/ulp/ipoib/ipoib_cm.c -index 30bdf42..f8302c2 100644 ---- a/drivers/infiniband/ulp/ipoib/ipoib_cm.c -+++ b/drivers/infiniband/ulp/ipoib/ipoib_cm.c -@@ -752,6 +752,8 @@ void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_ - if (++priv->tx_outstanding == ipoib_sendq_size) { - ipoib_dbg(priv, "TX ring 0x%x full, stopping kernel net queue\n", - tx->qp->qp_num); -+ if (ib_req_notify_cq(priv->send_cq, IB_CQ_NEXT_COMP)) -+ ipoib_warn(priv, "request notify on send CQ failed\n"); - netif_stop_queue(dev); - } - } -diff --git a/drivers/input/sparse-keymap.c b/drivers/input/sparse-keymap.c -index fbd3987..e8d65b3 100644 ---- a/drivers/input/sparse-keymap.c -+++ b/drivers/input/sparse-keymap.c -@@ -161,7 +161,7 @@ int sparse_keymap_setup(struct input_dev *dev, - return 0; - - err_out: -- kfree(keymap); -+ kfree(map); - return error; - - } -diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c -index 072f33b..e53ddc5 100644 ---- a/drivers/input/tablet/wacom_sys.c -+++ b/drivers/input/tablet/wacom_sys.c -@@ -644,13 +644,15 @@ static int wacom_resume(struct usb_interface *intf) - int rv; - - mutex_lock(&wacom->lock); -- if (wacom->open) { -+ -+ /* switch to wacom mode first */ -+ wacom_query_tablet_data(intf, features); -+ -+ if (wacom->open) - rv = usb_submit_urb(wacom->irq, GFP_NOIO); -- /* switch to wacom mode if needed */ -- if (!wacom_retrieve_hid_descriptor(intf, features)) -- wacom_query_tablet_data(intf, features); -- } else -+ else - rv = 0; -+ - mutex_unlock(&wacom->lock); - - return rv; -diff --git a/drivers/md/dm-ioctl.c b/drivers/md/dm-ioctl.c -index e3cf568..d7500e1 100644 ---- a/drivers/md/dm-ioctl.c -+++ b/drivers/md/dm-ioctl.c -@@ -285,7 +285,8 @@ retry: - up_write(&_hash_lock); - } - --static int dm_hash_rename(uint32_t cookie, const char *old, const char *new) -+static int dm_hash_rename(uint32_t cookie, uint32_t *flags, const char *old, -+ const char *new) - { - char *new_name, *old_name; - struct hash_cell *hc; -@@ -344,7 +345,8 @@ static int dm_hash_rename(uint32_t cookie, const char *old, const char *new) - dm_table_put(table); - } - -- dm_kobject_uevent(hc->md, KOBJ_CHANGE, cookie); -+ if (!dm_kobject_uevent(hc->md, KOBJ_CHANGE, cookie)) -+ *flags |= DM_UEVENT_GENERATED_FLAG; - - dm_put(hc->md); - up_write(&_hash_lock); -@@ -736,10 +738,10 @@ static int dev_remove(struct dm_ioctl *param, size_t param_size) - __hash_remove(hc); - up_write(&_hash_lock); - -- dm_kobject_uevent(md, KOBJ_REMOVE, param->event_nr); -+ if (!dm_kobject_uevent(md, KOBJ_REMOVE, param->event_nr)) -+ param->flags |= DM_UEVENT_GENERATED_FLAG; - - dm_put(md); -- param->data_size = 0; - return 0; - } - -@@ -773,7 +775,9 @@ static int dev_rename(struct dm_ioctl *param, size_t param_size) - return r; - - param->data_size = 0; -- return dm_hash_rename(param->event_nr, param->name, new_name); -+ -+ return dm_hash_rename(param->event_nr, ¶m->flags, param->name, -+ new_name); - } - - static int dev_set_geometry(struct dm_ioctl *param, size_t param_size) -@@ -899,8 +903,8 @@ static int do_resume(struct dm_ioctl *param) - - if (dm_suspended_md(md)) { - r = dm_resume(md); -- if (!r) -- dm_kobject_uevent(md, KOBJ_CHANGE, param->event_nr); -+ if (!r && !dm_kobject_uevent(md, KOBJ_CHANGE, param->event_nr)) -+ param->flags |= DM_UEVENT_GENERATED_FLAG; - } - - if (old_map) -@@ -1477,6 +1481,7 @@ static int validate_params(uint cmd, struct dm_ioctl *param) - { - /* Always clear this flag */ - param->flags &= ~DM_BUFFER_FULL_FLAG; -+ param->flags &= ~DM_UEVENT_GENERATED_FLAG; - - /* Ignores parameters */ - if (cmd == DM_REMOVE_ALL_CMD || -diff --git a/drivers/md/dm.c b/drivers/md/dm.c -index fa786b9..fe8889e 100644 ---- a/drivers/md/dm.c -+++ b/drivers/md/dm.c -@@ -2618,18 +2618,19 @@ out: - /*----------------------------------------------------------------- - * Event notification. - *---------------------------------------------------------------*/ --void dm_kobject_uevent(struct mapped_device *md, enum kobject_action action, -+int dm_kobject_uevent(struct mapped_device *md, enum kobject_action action, - unsigned cookie) - { - char udev_cookie[DM_COOKIE_LENGTH]; - char *envp[] = { udev_cookie, NULL }; - - if (!cookie) -- kobject_uevent(&disk_to_dev(md->disk)->kobj, action); -+ return kobject_uevent(&disk_to_dev(md->disk)->kobj, action); - else { - snprintf(udev_cookie, DM_COOKIE_LENGTH, "%s=%u", - DM_COOKIE_ENV_VAR_NAME, cookie); -- kobject_uevent_env(&disk_to_dev(md->disk)->kobj, action, envp); -+ return kobject_uevent_env(&disk_to_dev(md->disk)->kobj, -+ action, envp); - } - } - -diff --git a/drivers/md/dm.h b/drivers/md/dm.h -index 8dadaa5..bad1724 100644 ---- a/drivers/md/dm.h -+++ b/drivers/md/dm.h -@@ -125,8 +125,8 @@ void dm_stripe_exit(void); - int dm_open_count(struct mapped_device *md); - int dm_lock_for_deletion(struct mapped_device *md); - --void dm_kobject_uevent(struct mapped_device *md, enum kobject_action action, -- unsigned cookie); -+int dm_kobject_uevent(struct mapped_device *md, enum kobject_action action, -+ unsigned cookie); - - int dm_io_init(void); - void dm_io_exit(void); -diff --git a/drivers/md/linear.c b/drivers/md/linear.c -index 00435bd..001317b 100644 ---- a/drivers/md/linear.c -+++ b/drivers/md/linear.c -@@ -172,12 +172,14 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks) - disk_stack_limits(mddev->gendisk, rdev->bdev, - rdev->data_offset << 9); - /* as we don't honour merge_bvec_fn, we must never risk -- * violating it, so limit ->max_sector to one PAGE, as -- * a one page request is never in violation. -+ * violating it, so limit max_phys_segments to 1 lying within -+ * a single page. - */ -- if (rdev->bdev->bd_disk->queue->merge_bvec_fn && -- queue_max_sectors(mddev->queue) > (PAGE_SIZE>>9)) -- blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9); -+ if (rdev->bdev->bd_disk->queue->merge_bvec_fn) { -+ blk_queue_max_phys_segments(mddev->queue, 1); -+ blk_queue_segment_boundary(mddev->queue, -+ PAGE_CACHE_SIZE - 1); -+ } - - conf->array_sectors += rdev->sectors; - cnt++; -diff --git a/drivers/md/multipath.c b/drivers/md/multipath.c -index 32a662f..f9ee99f 100644 ---- a/drivers/md/multipath.c -+++ b/drivers/md/multipath.c -@@ -301,14 +301,16 @@ static int multipath_add_disk(mddev_t *mddev, mdk_rdev_t *rdev) - rdev->data_offset << 9); - - /* as we don't honour merge_bvec_fn, we must never risk -- * violating it, so limit ->max_sector to one PAGE, as -- * a one page request is never in violation. -+ * violating it, so limit ->max_phys_segments to one, lying -+ * within a single page. - * (Note: it is very unlikely that a device with - * merge_bvec_fn will be involved in multipath.) - */ -- if (q->merge_bvec_fn && -- queue_max_sectors(q) > (PAGE_SIZE>>9)) -- blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9); -+ if (q->merge_bvec_fn) { -+ blk_queue_max_phys_segments(mddev->queue, 1); -+ blk_queue_segment_boundary(mddev->queue, -+ PAGE_CACHE_SIZE - 1); -+ } - - conf->working_disks++; - mddev->degraded--; -@@ -476,9 +478,11 @@ static int multipath_run (mddev_t *mddev) - /* as we don't honour merge_bvec_fn, we must never risk - * violating it, not that we ever expect a device with - * a merge_bvec_fn to be involved in multipath */ -- if (rdev->bdev->bd_disk->queue->merge_bvec_fn && -- queue_max_sectors(mddev->queue) > (PAGE_SIZE>>9)) -- blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9); -+ if (rdev->bdev->bd_disk->queue->merge_bvec_fn) { -+ blk_queue_max_phys_segments(mddev->queue, 1); -+ blk_queue_segment_boundary(mddev->queue, -+ PAGE_CACHE_SIZE - 1); -+ } - - if (!test_bit(Faulty, &rdev->flags)) - conf->working_disks++; -diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c -index 77605cd..41ee9de 100644 ---- a/drivers/md/raid0.c -+++ b/drivers/md/raid0.c -@@ -176,14 +176,15 @@ static int create_strip_zones(mddev_t *mddev) - disk_stack_limits(mddev->gendisk, rdev1->bdev, - rdev1->data_offset << 9); - /* as we don't honour merge_bvec_fn, we must never risk -- * violating it, so limit ->max_sector to one PAGE, as -- * a one page request is never in violation. -+ * violating it, so limit ->max_phys_segments to 1, lying within -+ * a single page. - */ - -- if (rdev1->bdev->bd_disk->queue->merge_bvec_fn && -- queue_max_sectors(mddev->queue) > (PAGE_SIZE>>9)) -- blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9); -- -+ if (rdev1->bdev->bd_disk->queue->merge_bvec_fn) { -+ blk_queue_max_phys_segments(mddev->queue, 1); -+ blk_queue_segment_boundary(mddev->queue, -+ PAGE_CACHE_SIZE - 1); -+ } - if (!smallest || (rdev1->sectors < smallest->sectors)) - smallest = rdev1; - cnt++; -diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c -index d119b7b..047c468 100644 ---- a/drivers/md/raid10.c -+++ b/drivers/md/raid10.c -@@ -1155,13 +1155,17 @@ static int raid10_add_disk(mddev_t *mddev, mdk_rdev_t *rdev) - - disk_stack_limits(mddev->gendisk, rdev->bdev, - rdev->data_offset << 9); -- /* as we don't honour merge_bvec_fn, we must never risk -- * violating it, so limit ->max_sector to one PAGE, as -- * a one page request is never in violation. -+ /* as we don't honour merge_bvec_fn, we must -+ * never risk violating it, so limit -+ * ->max_phys_segments to one lying with a single -+ * page, as a one page request is never in -+ * violation. - */ -- if (rdev->bdev->bd_disk->queue->merge_bvec_fn && -- queue_max_sectors(mddev->queue) > (PAGE_SIZE>>9)) -- blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9); -+ if (rdev->bdev->bd_disk->queue->merge_bvec_fn) { -+ blk_queue_max_phys_segments(mddev->queue, 1); -+ blk_queue_segment_boundary(mddev->queue, -+ PAGE_CACHE_SIZE - 1); -+ } - - p->head_position = 0; - rdev->raid_disk = mirror; -@@ -2255,12 +2259,14 @@ static int run(mddev_t *mddev) - disk_stack_limits(mddev->gendisk, rdev->bdev, - rdev->data_offset << 9); - /* as we don't honour merge_bvec_fn, we must never risk -- * violating it, so limit ->max_sector to one PAGE, as -- * a one page request is never in violation. -+ * violating it, so limit max_phys_segments to 1 lying -+ * within a single page. - */ -- if (rdev->bdev->bd_disk->queue->merge_bvec_fn && -- queue_max_sectors(mddev->queue) > (PAGE_SIZE>>9)) -- blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9); -+ if (rdev->bdev->bd_disk->queue->merge_bvec_fn) { -+ blk_queue_max_phys_segments(mddev->queue, 1); -+ blk_queue_segment_boundary(mddev->queue, -+ PAGE_CACHE_SIZE - 1); -+ } - - disk->head_position = 0; - } -diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c -index 57f149b..4d353d2 100644 ---- a/drivers/net/e1000e/netdev.c -+++ b/drivers/net/e1000e/netdev.c -@@ -660,6 +660,8 @@ static bool e1000_clean_tx_irq(struct e1000_adapter *adapter) - i = 0; - } - -+ if (i == tx_ring->next_to_use) -+ break; - eop = tx_ring->buffer_info[i].next_to_watch; - eop_desc = E1000_TX_DESC(*tx_ring, eop); - } -diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c -index 67d414b..3db85da 100644 ---- a/drivers/net/r8169.c -+++ b/drivers/net/r8169.c -@@ -3255,8 +3255,8 @@ static void rtl8169_set_rxbufsize(struct rtl8169_private *tp, - unsigned int max_frame = mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; - - if (max_frame != 16383) -- printk(KERN_WARNING "WARNING! Changing of MTU on this NIC" -- "May lead to frame reception errors!\n"); -+ printk(KERN_WARNING PFX "WARNING! Changing of MTU on this " -+ "NIC may lead to frame reception errors!\n"); - - tp->rx_buf_sz = (max_frame > RX_BUF_SIZE) ? max_frame : RX_BUF_SIZE; - } -diff --git a/drivers/net/wireless/ath/ar9170/usb.c b/drivers/net/wireless/ath/ar9170/usb.c -index e0799d9..0387658 100644 ---- a/drivers/net/wireless/ath/ar9170/usb.c -+++ b/drivers/net/wireless/ath/ar9170/usb.c -@@ -414,7 +414,7 @@ static int ar9170_usb_exec_cmd(struct ar9170 *ar, enum ar9170_cmd cmd, - spin_unlock_irqrestore(&aru->common.cmdlock, flags); - - usb_fill_int_urb(urb, aru->udev, -- usb_sndbulkpipe(aru->udev, AR9170_EP_CMD), -+ usb_sndintpipe(aru->udev, AR9170_EP_CMD), - aru->common.cmdbuf, plen + 4, - ar9170_usb_tx_urb_complete, NULL, 1); - -diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c -index 33a1071..7b1eab4 100644 ---- a/drivers/net/wireless/ath/ath9k/main.c -+++ b/drivers/net/wireless/ath/ath9k/main.c -@@ -2721,8 +2721,7 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) - all_wiphys_idle = ath9k_all_wiphys_idle(sc); - ath9k_set_wiphy_idle(aphy, idle); - -- if (!idle && all_wiphys_idle) -- enable_radio = true; -+ enable_radio = (!idle && all_wiphys_idle); - - /* - * After we unlock here its possible another wiphy -diff --git a/drivers/net/wireless/b43/Kconfig b/drivers/net/wireless/b43/Kconfig -index 64c12e1..0a00d42 100644 ---- a/drivers/net/wireless/b43/Kconfig -+++ b/drivers/net/wireless/b43/Kconfig -@@ -78,11 +78,11 @@ config B43_SDIO - - If unsure, say N. - --# Data transfers to the device via PIO --# This is only needed on PCMCIA and SDIO devices. All others can do DMA properly. -+#Data transfers to the device via PIO. We want it as a fallback even -+# if we can do DMA. - config B43_PIO - bool -- depends on B43 && (B43_SDIO || B43_PCMCIA || B43_FORCE_PIO) -+ depends on B43 - select SSB_BLOCKIO - default y - -diff --git a/drivers/net/wireless/b43/Makefile b/drivers/net/wireless/b43/Makefile -index 84772a2..5e83b6f 100644 ---- a/drivers/net/wireless/b43/Makefile -+++ b/drivers/net/wireless/b43/Makefile -@@ -12,7 +12,7 @@ b43-y += xmit.o - b43-y += lo.o - b43-y += wa.o - b43-y += dma.o --b43-$(CONFIG_B43_PIO) += pio.o -+b43-y += pio.o - b43-y += rfkill.o - b43-$(CONFIG_B43_LEDS) += leds.o - b43-$(CONFIG_B43_PCMCIA) += pcmcia.o -diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h -index c484cc2..7df822e 100644 ---- a/drivers/net/wireless/b43/b43.h -+++ b/drivers/net/wireless/b43/b43.h -@@ -694,6 +694,7 @@ struct b43_wldev { - bool radio_hw_enable; /* saved state of radio hardware enabled state */ - bool qos_enabled; /* TRUE, if QoS is used. */ - bool hwcrypto_enabled; /* TRUE, if HW crypto acceleration is enabled. */ -+ bool use_pio; /* TRUE if next init should use PIO */ - - /* PHY/Radio device. */ - struct b43_phy phy; -@@ -822,11 +823,9 @@ struct b43_wl { - /* The device LEDs. */ - struct b43_leds leds; - --#ifdef CONFIG_B43_PIO - /* Kmalloc'ed scratch space for PIO TX/RX. Protected by wl->mutex. */ - u8 pio_scratchspace[110] __attribute__((__aligned__(8))); - u8 pio_tailspace[4] __attribute__((__aligned__(8))); --#endif /* CONFIG_B43_PIO */ - }; - - static inline struct b43_wl *hw_to_b43_wl(struct ieee80211_hw *hw) -@@ -877,20 +876,15 @@ static inline void b43_write32(struct b43_wldev *dev, u16 offset, u32 value) - - static inline bool b43_using_pio_transfers(struct b43_wldev *dev) - { --#ifdef CONFIG_B43_PIO - return dev->__using_pio_transfers; --#else -- return 0; --#endif - } - - #ifdef CONFIG_B43_FORCE_PIO --# define B43_FORCE_PIO 1 -+# define B43_PIO_DEFAULT 1 - #else --# define B43_FORCE_PIO 0 -+# define B43_PIO_DEFAULT 0 - #endif - -- - /* Message printing */ - void b43info(struct b43_wl *wl, const char *fmt, ...) - __attribute__ ((format(printf, 2, 3))); -diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c -index 88d1fd0..615af22 100644 ---- a/drivers/net/wireless/b43/dma.c -+++ b/drivers/net/wireless/b43/dma.c -@@ -1653,7 +1653,6 @@ void b43_dma_tx_resume(struct b43_wldev *dev) - b43_power_saving_ctl_bits(dev, 0); - } - --#ifdef CONFIG_B43_PIO - static void direct_fifo_rx(struct b43_wldev *dev, enum b43_dmatype type, - u16 mmio_base, bool enable) - { -@@ -1687,4 +1686,3 @@ void b43_dma_direct_fifo_rx(struct b43_wldev *dev, - mmio_base = b43_dmacontroller_base(type, engine_index); - direct_fifo_rx(dev, type, mmio_base, enable); - } --#endif /* CONFIG_B43_PIO */ -diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c -index 629c166..9eb4f5e 100644 ---- a/drivers/net/wireless/b43/main.c -+++ b/drivers/net/wireless/b43/main.c -@@ -102,6 +102,9 @@ int b43_modparam_verbose = B43_VERBOSITY_DEFAULT; - module_param_named(verbose, b43_modparam_verbose, int, 0644); - MODULE_PARM_DESC(verbose, "Log message verbosity: 0=error, 1=warn, 2=info(default), 3=debug"); - -+int b43_modparam_pio = B43_PIO_DEFAULT; -+module_param_named(pio, b43_modparam_pio, int, 0644); -+MODULE_PARM_DESC(pio, "Use PIO accesses by default: 0=DMA, 1=PIO"); - - static const struct ssb_device_id b43_ssb_tbl[] = { - SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 5), -@@ -1790,8 +1793,9 @@ static void b43_do_interrupt_thread(struct b43_wldev *dev) - dma_reason[4], dma_reason[5]); - b43err(dev->wl, "This device does not support DMA " - "on your system. Please use PIO instead.\n"); -- b43err(dev->wl, "CONFIG_B43_FORCE_PIO must be set in " -- "your kernel configuration.\n"); -+ /* Fall back to PIO transfers if we get fatal DMA errors! */ -+ dev->use_pio = 1; -+ b43_controller_restart(dev, "DMA error"); - return; - } - if (merged_dma_reason & B43_DMAIRQ_NONFATALMASK) { -@@ -4358,7 +4362,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev) - - if ((dev->dev->bus->bustype == SSB_BUSTYPE_PCMCIA) || - (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) || -- B43_FORCE_PIO) { -+ dev->use_pio) { - dev->__using_pio_transfers = 1; - err = b43_pio_init(dev); - } else { -@@ -4826,6 +4830,7 @@ static int b43_one_core_attach(struct ssb_device *dev, struct b43_wl *wl) - if (!wldev) - goto out; - -+ wldev->use_pio = b43_modparam_pio; - wldev->dev = dev; - wldev->wl = wl; - b43_set_status(wldev, B43_STAT_UNINIT); -diff --git a/drivers/net/wireless/b43/pio.h b/drivers/net/wireless/b43/pio.h -index 7dd649c..7b3c42f 100644 ---- a/drivers/net/wireless/b43/pio.h -+++ b/drivers/net/wireless/b43/pio.h -@@ -55,8 +55,6 @@ - #define B43_PIO_MAX_NR_TXPACKETS 32 - - --#ifdef CONFIG_B43_PIO -- - struct b43_pio_txpacket { - /* Pointer to the TX queue we belong to. */ - struct b43_pio_txqueue *queue; -@@ -169,42 +167,4 @@ void b43_pio_rx(struct b43_pio_rxqueue *q); - void b43_pio_tx_suspend(struct b43_wldev *dev); - void b43_pio_tx_resume(struct b43_wldev *dev); - -- --#else /* CONFIG_B43_PIO */ -- -- --static inline int b43_pio_init(struct b43_wldev *dev) --{ -- return 0; --} --static inline void b43_pio_free(struct b43_wldev *dev) --{ --} --static inline void b43_pio_stop(struct b43_wldev *dev) --{ --} --static inline int b43_pio_tx(struct b43_wldev *dev, -- struct sk_buff *skb) --{ -- return 0; --} --static inline void b43_pio_handle_txstatus(struct b43_wldev *dev, -- const struct b43_txstatus *status) --{ --} --static inline void b43_pio_get_tx_stats(struct b43_wldev *dev, -- struct ieee80211_tx_queue_stats *stats) --{ --} --static inline void b43_pio_rx(struct b43_pio_rxqueue *q) --{ --} --static inline void b43_pio_tx_suspend(struct b43_wldev *dev) --{ --} --static inline void b43_pio_tx_resume(struct b43_wldev *dev) --{ --} -- --#endif /* CONFIG_B43_PIO */ - #endif /* B43_PIO_H_ */ -diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c -index 3146281..3b4c5a4 100644 ---- a/drivers/net/wireless/iwlwifi/iwl-4965.c -+++ b/drivers/net/wireless/iwlwifi/iwl-4965.c -@@ -581,6 +581,8 @@ static int iwl4965_alive_notify(struct iwl_priv *priv) - - iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0); - -+ /* reset to 0 to enable all the queue first */ -+ priv->txq_ctx_active_msk = 0; - /* Map each Tx/cmd queue to its corresponding fifo */ - for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) { - int ac = default_queue_to_tx_fifo[i]; -@@ -2008,7 +2010,9 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, - IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn " - "%d index %d\n", scd_ssn , index); - freed = iwl_tx_queue_reclaim(priv, txq_id, index); -- iwl_free_tfds_in_queue(priv, sta_id, tid, freed); -+ if (qc) -+ iwl_free_tfds_in_queue(priv, sta_id, -+ tid, freed); - - if (priv->mac80211_registered && - (iwl_queue_space(&txq->q) > txq->q.low_mark) && -@@ -2035,13 +2039,14 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, - - freed = iwl_tx_queue_reclaim(priv, txq_id, index); - if (qc && likely(sta_id != IWL_INVALID_STATION)) -- priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; -+ iwl_free_tfds_in_queue(priv, sta_id, tid, freed); -+ else if (sta_id == IWL_INVALID_STATION) -+ IWL_DEBUG_TX_REPLY(priv, "Station not known\n"); - - if (priv->mac80211_registered && - (iwl_queue_space(&txq->q) > txq->q.low_mark)) - iwl_wake_queue(priv, txq_id); - } -- - if (qc && likely(sta_id != IWL_INVALID_STATION)) - iwl_txq_check_empty(priv, sta_id, tid, txq_id); - -diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c -index cffaae7..c610e5f 100644 ---- a/drivers/net/wireless/iwlwifi/iwl-5000.c -+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c -@@ -657,6 +657,8 @@ int iwl5000_alive_notify(struct iwl_priv *priv) - - iwl5000_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0); - -+ /* reset to 0 to enable all the queue first */ -+ priv->txq_ctx_active_msk = 0; - /* map qos queues to fifos one-to-one */ - for (i = 0; i < ARRAY_SIZE(iwl5000_default_queue_to_tx_fifo); i++) { - int ac = iwl5000_default_queue_to_tx_fifo[i]; -diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c -index 1c9866d..5622a55 100644 ---- a/drivers/net/wireless/iwlwifi/iwl-agn.c -+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c -@@ -2461,7 +2461,7 @@ static int iwl_setup_mac(struct iwl_priv *priv) - BIT(NL80211_IFTYPE_STATION) | - BIT(NL80211_IFTYPE_ADHOC); - -- hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY | -+ hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY | - WIPHY_FLAG_DISABLE_BEACON_HINTS; - - /* -diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c -index fa1c89b..8f1b850 100644 ---- a/drivers/net/wireless/iwlwifi/iwl-scan.c -+++ b/drivers/net/wireless/iwlwifi/iwl-scan.c -@@ -404,21 +404,6 @@ EXPORT_SYMBOL(iwl_init_scan_params); - - static int iwl_scan_initiate(struct iwl_priv *priv) - { -- if (!iwl_is_ready_rf(priv)) { -- IWL_DEBUG_SCAN(priv, "Aborting scan due to not ready.\n"); -- return -EIO; -- } -- -- if (test_bit(STATUS_SCANNING, &priv->status)) { -- IWL_DEBUG_SCAN(priv, "Scan already in progress.\n"); -- return -EAGAIN; -- } -- -- if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { -- IWL_DEBUG_SCAN(priv, "Scan request while abort pending\n"); -- return -EAGAIN; -- } -- - IWL_DEBUG_INFO(priv, "Starting scan...\n"); - set_bit(STATUS_SCANNING, &priv->status); - priv->scan_start = jiffies; -@@ -449,6 +434,18 @@ int iwl_mac_hw_scan(struct ieee80211_hw *hw, - goto out_unlock; - } - -+ if (test_bit(STATUS_SCANNING, &priv->status)) { -+ IWL_DEBUG_SCAN(priv, "Scan already in progress.\n"); -+ ret = -EAGAIN; -+ goto out_unlock; -+ } -+ -+ if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { -+ IWL_DEBUG_SCAN(priv, "Scan request while abort pending\n"); -+ ret = -EAGAIN; -+ goto out_unlock; -+ } -+ - /* We don't schedule scan within next_scan_jiffies period. - * Avoid scanning during possible EAPOL exchange, return - * success immediately. -diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c -index f297865..adbb3ea 100644 ---- a/drivers/net/wireless/iwlwifi/iwl3945-base.c -+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c -@@ -1926,7 +1926,7 @@ static void iwl3945_init_hw_rates(struct iwl_priv *priv, - { - int i; - -- for (i = 0; i < IWL_RATE_COUNT; i++) { -+ for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) { - rates[i].bitrate = iwl3945_rates[i].ieee * 5; - rates[i].hw_value = i; /* Rate scaling will work on indexes */ - rates[i].hw_value_short = i; -@@ -3903,7 +3903,7 @@ static int iwl3945_setup_mac(struct iwl_priv *priv) - BIT(NL80211_IFTYPE_STATION) | - BIT(NL80211_IFTYPE_ADHOC); - -- hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY | -+ hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY | - WIPHY_FLAG_DISABLE_BEACON_HINTS; - - hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945; -diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c -index 3245d33..c4fead1 100644 ---- a/drivers/pci/pci.c -+++ b/drivers/pci/pci.c -@@ -2612,6 +2612,23 @@ int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type) - return 0; - } - -+/* Some architectures require additional programming to enable VGA */ -+static arch_set_vga_state_t arch_set_vga_state; -+ -+void __init pci_register_set_vga_state(arch_set_vga_state_t func) -+{ -+ arch_set_vga_state = func; /* NULL disables */ -+} -+ -+static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode, -+ unsigned int command_bits, bool change_bridge) -+{ -+ if (arch_set_vga_state) -+ return arch_set_vga_state(dev, decode, command_bits, -+ change_bridge); -+ return 0; -+} -+ - /** - * pci_set_vga_state - set VGA decode state on device and parents if requested - * @dev: the PCI device -@@ -2625,9 +2642,15 @@ int pci_set_vga_state(struct pci_dev *dev, bool decode, - struct pci_bus *bus; - struct pci_dev *bridge; - u16 cmd; -+ int rc; - - WARN_ON(command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY)); - -+ /* ARCH specific VGA enables */ -+ rc = pci_set_vga_state_arch(dev, decode, command_bits, change_bridge); -+ if (rc) -+ return rc; -+ - pci_read_config_word(dev, PCI_COMMAND, &cmd); - if (decode == true) - cmd |= command_bits; -@@ -2874,4 +2897,3 @@ EXPORT_SYMBOL(pci_target_state); - EXPORT_SYMBOL(pci_prepare_to_sleep); - EXPORT_SYMBOL(pci_back_from_sleep); - EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state); -- -diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c -index c28a712..e6b67f2 100644 ---- a/drivers/scsi/libiscsi.c -+++ b/drivers/scsi/libiscsi.c -@@ -3027,14 +3027,15 @@ static void iscsi_start_session_recovery(struct iscsi_session *session, - session->state = ISCSI_STATE_TERMINATE; - else if (conn->stop_stage != STOP_CONN_RECOVER) - session->state = ISCSI_STATE_IN_RECOVERY; -+ -+ old_stop_stage = conn->stop_stage; -+ conn->stop_stage = flag; - spin_unlock_bh(&session->lock); - - del_timer_sync(&conn->transport_timer); - iscsi_suspend_tx(conn); - - spin_lock_bh(&session->lock); -- old_stop_stage = conn->stop_stage; -- conn->stop_stage = flag; - conn->c_stage = ISCSI_CONN_STOPPED; - spin_unlock_bh(&session->lock); - -diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c -index 34d4eb9..db6b071 100644 ---- a/drivers/usb/class/cdc-acm.c -+++ b/drivers/usb/class/cdc-acm.c -@@ -170,6 +170,7 @@ static void acm_write_done(struct acm *acm, struct acm_wb *wb) - { - wb->use = 0; - acm->transmitting--; -+ usb_autopm_put_interface_async(acm->control); - } - - /* -@@ -211,9 +212,12 @@ static int acm_write_start(struct acm *acm, int wbn) - } - - dbg("%s susp_count: %d", __func__, acm->susp_count); -+ usb_autopm_get_interface_async(acm->control); - if (acm->susp_count) { -- acm->delayed_wb = wb; -- schedule_work(&acm->waker); -+ if (!acm->delayed_wb) -+ acm->delayed_wb = wb; -+ else -+ usb_autopm_put_interface_async(acm->control); - spin_unlock_irqrestore(&acm->write_lock, flags); - return 0; /* A white lie */ - } -@@ -534,23 +538,6 @@ static void acm_softint(struct work_struct *work) - tty_kref_put(tty); - } - --static void acm_waker(struct work_struct *waker) --{ -- struct acm *acm = container_of(waker, struct acm, waker); -- int rv; -- -- rv = usb_autopm_get_interface(acm->control); -- if (rv < 0) { -- dev_err(&acm->dev->dev, "Autopm failure in %s\n", __func__); -- return; -- } -- if (acm->delayed_wb) { -- acm_start_wb(acm, acm->delayed_wb); -- acm->delayed_wb = NULL; -- } -- usb_autopm_put_interface(acm->control); --} -- - /* - * TTY handlers - */ -@@ -1178,7 +1165,6 @@ made_compressed_probe: - acm->urb_task.func = acm_rx_tasklet; - acm->urb_task.data = (unsigned long) acm; - INIT_WORK(&acm->work, acm_softint); -- INIT_WORK(&acm->waker, acm_waker); - init_waitqueue_head(&acm->drain_wait); - spin_lock_init(&acm->throttle_lock); - spin_lock_init(&acm->write_lock); -@@ -1343,7 +1329,6 @@ static void stop_data_traffic(struct acm *acm) - tasklet_enable(&acm->urb_task); - - cancel_work_sync(&acm->work); -- cancel_work_sync(&acm->waker); - } - - static void acm_disconnect(struct usb_interface *intf) -@@ -1435,6 +1420,7 @@ static int acm_suspend(struct usb_interface *intf, pm_message_t message) - static int acm_resume(struct usb_interface *intf) - { - struct acm *acm = usb_get_intfdata(intf); -+ struct acm_wb *wb; - int rv = 0; - int cnt; - -@@ -1449,6 +1435,21 @@ static int acm_resume(struct usb_interface *intf) - mutex_lock(&acm->mutex); - if (acm->port.count) { - rv = usb_submit_urb(acm->ctrlurb, GFP_NOIO); -+ -+ spin_lock_irq(&acm->write_lock); -+ if (acm->delayed_wb) { -+ wb = acm->delayed_wb; -+ acm->delayed_wb = NULL; -+ spin_unlock_irq(&acm->write_lock); -+ acm_start_wb(acm, wb); -+ } else { -+ spin_unlock_irq(&acm->write_lock); -+ } -+ -+ /* -+ * delayed error checking because we must -+ * do the write path at all cost -+ */ - if (rv < 0) - goto err_out; - -diff --git a/drivers/usb/class/cdc-acm.h b/drivers/usb/class/cdc-acm.h -index c4a0ee8..519eb63 100644 ---- a/drivers/usb/class/cdc-acm.h -+++ b/drivers/usb/class/cdc-acm.h -@@ -112,7 +112,6 @@ struct acm { - struct mutex mutex; - struct usb_cdc_line_coding line; /* bits, stop, parity */ - struct work_struct work; /* work queue entry for line discipline waking up */ -- struct work_struct waker; - wait_queue_head_t drain_wait; /* close processing */ - struct tasklet_struct urb_task; /* rx processing */ - spinlock_t throttle_lock; /* synchronize throtteling and read callback */ -diff --git a/drivers/video/backlight/mbp_nvidia_bl.c b/drivers/video/backlight/mbp_nvidia_bl.c -index 2e78b07..9804ee9 100644 ---- a/drivers/video/backlight/mbp_nvidia_bl.c -+++ b/drivers/video/backlight/mbp_nvidia_bl.c -@@ -139,6 +139,51 @@ static int mbp_dmi_match(const struct dmi_system_id *id) - static const struct dmi_system_id __initdata mbp_device_table[] = { - { - .callback = mbp_dmi_match, -+ .ident = "MacBook 1,1", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), -+ DMI_MATCH(DMI_PRODUCT_NAME, "MacBook1,1"), -+ }, -+ .driver_data = (void *)&intel_chipset_data, -+ }, -+ { -+ .callback = mbp_dmi_match, -+ .ident = "MacBook 2,1", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), -+ DMI_MATCH(DMI_PRODUCT_NAME, "MacBook2,1"), -+ }, -+ .driver_data = (void *)&intel_chipset_data, -+ }, -+ { -+ .callback = mbp_dmi_match, -+ .ident = "MacBook 3,1", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), -+ DMI_MATCH(DMI_PRODUCT_NAME, "MacBook3,1"), -+ }, -+ .driver_data = (void *)&intel_chipset_data, -+ }, -+ { -+ .callback = mbp_dmi_match, -+ .ident = "MacBook 4,1", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), -+ DMI_MATCH(DMI_PRODUCT_NAME, "MacBook4,1"), -+ }, -+ .driver_data = (void *)&intel_chipset_data, -+ }, -+ { -+ .callback = mbp_dmi_match, -+ .ident = "MacBook 4,2", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), -+ DMI_MATCH(DMI_PRODUCT_NAME, "MacBook4,2"), -+ }, -+ .driver_data = (void *)&intel_chipset_data, -+ }, -+ { -+ .callback = mbp_dmi_match, - .ident = "MacBookPro 3,1", - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), -diff --git a/drivers/video/sunxvr500.c b/drivers/video/sunxvr500.c -index 4cd5049..3803745 100644 ---- a/drivers/video/sunxvr500.c -+++ b/drivers/video/sunxvr500.c -@@ -242,11 +242,27 @@ static int __devinit e3d_set_fbinfo(struct e3d_info *ep) - static int __devinit e3d_pci_register(struct pci_dev *pdev, - const struct pci_device_id *ent) - { -+ struct device_node *of_node; -+ const char *device_type; - struct fb_info *info; - struct e3d_info *ep; - unsigned int line_length; - int err; - -+ of_node = pci_device_to_OF_node(pdev); -+ if (!of_node) { -+ printk(KERN_ERR "e3d: Cannot find OF node of %s\n", -+ pci_name(pdev)); -+ return -ENODEV; -+ } -+ -+ device_type = of_get_property(of_node, "device_type", NULL); -+ if (!device_type) { -+ printk(KERN_INFO "e3d: Ignoring secondary output device " -+ "at %s\n", pci_name(pdev)); -+ return -ENODEV; -+ } -+ - err = pci_enable_device(pdev); - if (err < 0) { - printk(KERN_ERR "e3d: Cannot enable PCI device %s\n", -@@ -265,13 +281,7 @@ static int __devinit e3d_pci_register(struct pci_dev *pdev, - ep->info = info; - ep->pdev = pdev; - spin_lock_init(&ep->lock); -- ep->of_node = pci_device_to_OF_node(pdev); -- if (!ep->of_node) { -- printk(KERN_ERR "e3d: Cannot find OF node of %s\n", -- pci_name(pdev)); -- err = -ENODEV; -- goto err_release_fb; -- } -+ ep->of_node = of_node; - - /* Read the PCI base register of the frame buffer, which we - * need in order to interpret the RAMDAC_VID_*FB* values in -diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c -index a6c5674..0b91907 100644 ---- a/drivers/watchdog/hpwdt.c -+++ b/drivers/watchdog/hpwdt.c -@@ -443,7 +443,7 @@ static void hpwdt_ping(void) - static int hpwdt_change_timer(int new_margin) - { - /* Arbitrary, can't find the card's limits */ -- if (new_margin < 30 || new_margin > 600) { -+ if (new_margin < 5 || new_margin > 600) { - printk(KERN_WARNING - "hpwdt: New value passed in is invalid: %d seconds.\n", - new_margin); -diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c -index 4bdb7f1..e2ebe08 100644 ---- a/drivers/watchdog/iTCO_wdt.c -+++ b/drivers/watchdog/iTCO_wdt.c -@@ -115,8 +115,37 @@ enum iTCO_chipsets { - TCO_3420, /* 3420 */ - TCO_3450, /* 3450 */ - TCO_EP80579, /* EP80579 */ -- TCO_CPTD, /* CPT Desktop */ -- TCO_CPTM, /* CPT Mobile */ -+ TCO_CPT1, /* Cougar Point */ -+ TCO_CPT2, /* Cougar Point Desktop */ -+ TCO_CPT3, /* Cougar Point Mobile */ -+ TCO_CPT4, /* Cougar Point */ -+ TCO_CPT5, /* Cougar Point */ -+ TCO_CPT6, /* Cougar Point */ -+ TCO_CPT7, /* Cougar Point */ -+ TCO_CPT8, /* Cougar Point */ -+ TCO_CPT9, /* Cougar Point */ -+ TCO_CPT10, /* Cougar Point */ -+ TCO_CPT11, /* Cougar Point */ -+ TCO_CPT12, /* Cougar Point */ -+ TCO_CPT13, /* Cougar Point */ -+ TCO_CPT14, /* Cougar Point */ -+ TCO_CPT15, /* Cougar Point */ -+ TCO_CPT16, /* Cougar Point */ -+ TCO_CPT17, /* Cougar Point */ -+ TCO_CPT18, /* Cougar Point */ -+ TCO_CPT19, /* Cougar Point */ -+ TCO_CPT20, /* Cougar Point */ -+ TCO_CPT21, /* Cougar Point */ -+ TCO_CPT22, /* Cougar Point */ -+ TCO_CPT23, /* Cougar Point */ -+ TCO_CPT24, /* Cougar Point */ -+ TCO_CPT25, /* Cougar Point */ -+ TCO_CPT26, /* Cougar Point */ -+ TCO_CPT27, /* Cougar Point */ -+ TCO_CPT28, /* Cougar Point */ -+ TCO_CPT29, /* Cougar Point */ -+ TCO_CPT30, /* Cougar Point */ -+ TCO_CPT31, /* Cougar Point */ - }; - - static struct { -@@ -173,8 +202,37 @@ static struct { - {"3420", 2}, - {"3450", 2}, - {"EP80579", 2}, -- {"CPT Desktop", 2}, -- {"CPT Mobile", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, -+ {"Cougar Point", 2}, - {NULL, 0} - }; - -@@ -259,8 +317,37 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = { - { ITCO_PCI_DEVICE(0x3b14, TCO_3420)}, - { ITCO_PCI_DEVICE(0x3b16, TCO_3450)}, - { ITCO_PCI_DEVICE(0x5031, TCO_EP80579)}, -- { ITCO_PCI_DEVICE(0x1c42, TCO_CPTD)}, -- { ITCO_PCI_DEVICE(0x1c43, TCO_CPTM)}, -+ { ITCO_PCI_DEVICE(0x1c41, TCO_CPT1)}, -+ { ITCO_PCI_DEVICE(0x1c42, TCO_CPT2)}, -+ { ITCO_PCI_DEVICE(0x1c43, TCO_CPT3)}, -+ { ITCO_PCI_DEVICE(0x1c44, TCO_CPT4)}, -+ { ITCO_PCI_DEVICE(0x1c45, TCO_CPT5)}, -+ { ITCO_PCI_DEVICE(0x1c46, TCO_CPT6)}, -+ { ITCO_PCI_DEVICE(0x1c47, TCO_CPT7)}, -+ { ITCO_PCI_DEVICE(0x1c48, TCO_CPT8)}, -+ { ITCO_PCI_DEVICE(0x1c49, TCO_CPT9)}, -+ { ITCO_PCI_DEVICE(0x1c4a, TCO_CPT10)}, -+ { ITCO_PCI_DEVICE(0x1c4b, TCO_CPT11)}, -+ { ITCO_PCI_DEVICE(0x1c4c, TCO_CPT12)}, -+ { ITCO_PCI_DEVICE(0x1c4d, TCO_CPT13)}, -+ { ITCO_PCI_DEVICE(0x1c4e, TCO_CPT14)}, -+ { ITCO_PCI_DEVICE(0x1c4f, TCO_CPT15)}, -+ { ITCO_PCI_DEVICE(0x1c50, TCO_CPT16)}, -+ { ITCO_PCI_DEVICE(0x1c51, TCO_CPT17)}, -+ { ITCO_PCI_DEVICE(0x1c52, TCO_CPT18)}, -+ { ITCO_PCI_DEVICE(0x1c53, TCO_CPT19)}, -+ { ITCO_PCI_DEVICE(0x1c54, TCO_CPT20)}, -+ { ITCO_PCI_DEVICE(0x1c55, TCO_CPT21)}, -+ { ITCO_PCI_DEVICE(0x1c56, TCO_CPT22)}, -+ { ITCO_PCI_DEVICE(0x1c57, TCO_CPT23)}, -+ { ITCO_PCI_DEVICE(0x1c58, TCO_CPT24)}, -+ { ITCO_PCI_DEVICE(0x1c59, TCO_CPT25)}, -+ { ITCO_PCI_DEVICE(0x1c5a, TCO_CPT26)}, -+ { ITCO_PCI_DEVICE(0x1c5b, TCO_CPT27)}, -+ { ITCO_PCI_DEVICE(0x1c5c, TCO_CPT28)}, -+ { ITCO_PCI_DEVICE(0x1c5d, TCO_CPT29)}, -+ { ITCO_PCI_DEVICE(0x1c5e, TCO_CPT30)}, -+ { ITCO_PCI_DEVICE(0x1c5f, TCO_CPT31)}, - { 0, }, /* End of list */ - }; - MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl); -diff --git a/fs/9p/vfs_file.c b/fs/9p/vfs_file.c -index 74a0461..92f9590 100644 ---- a/fs/9p/vfs_file.c -+++ b/fs/9p/vfs_file.c -@@ -114,7 +114,7 @@ static int v9fs_file_lock(struct file *filp, int cmd, struct file_lock *fl) - P9_DPRINTK(P9_DEBUG_VFS, "filp: %p lock: %p\n", filp, fl); - - /* No mandatory locks */ -- if (__mandatory_lock(inode)) -+ if (__mandatory_lock(inode) && fl->fl_type != F_UNLCK) - return -ENOLCK; - - if ((IS_SETLK(cmd) || IS_SETLKW(cmd)) && fl->fl_type != F_UNLCK) { -diff --git a/fs/block_dev.c b/fs/block_dev.c -index d11d028..8db62b2 100644 ---- a/fs/block_dev.c -+++ b/fs/block_dev.c -@@ -404,7 +404,7 @@ static loff_t block_llseek(struct file *file, loff_t offset, int origin) - * NULL first argument is nfsd_sync_dir() and that's not a directory. - */ - --static int block_fsync(struct file *filp, struct dentry *dentry, int datasync) -+int block_fsync(struct file *filp, struct dentry *dentry, int datasync) - { - struct block_device *bdev = I_BDEV(filp->f_mapping->host); - int error; -@@ -418,6 +418,7 @@ static int block_fsync(struct file *filp, struct dentry *dentry, int datasync) - error = 0; - return error; - } -+EXPORT_SYMBOL(block_fsync); - - /* - * pseudo-fs -diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c -index 941441d..4e6dbab 100644 ---- a/fs/cifs/cifssmb.c -+++ b/fs/cifs/cifssmb.c -@@ -1430,6 +1430,8 @@ CIFSSMBWrite(const int xid, struct cifsTconInfo *tcon, - __u32 bytes_sent; - __u16 byte_count; - -+ *nbytes = 0; -+ - /* cFYI(1, ("write at %lld %d bytes", offset, count));*/ - if (tcon->ses == NULL) - return -ECONNABORTED; -@@ -1512,11 +1514,18 @@ CIFSSMBWrite(const int xid, struct cifsTconInfo *tcon, - cifs_stats_inc(&tcon->num_writes); - if (rc) { - cFYI(1, ("Send error in write = %d", rc)); -- *nbytes = 0; - } else { - *nbytes = le16_to_cpu(pSMBr->CountHigh); - *nbytes = (*nbytes) << 16; - *nbytes += le16_to_cpu(pSMBr->Count); -+ -+ /* -+ * Mask off high 16 bits when bytes written as returned by the -+ * server is greater than bytes requested by the client. Some -+ * OS/2 servers are known to set incorrect CountHigh values. -+ */ -+ if (*nbytes > count) -+ *nbytes &= 0xFFFF; - } - - cifs_buf_release(pSMB); -@@ -1605,6 +1614,14 @@ CIFSSMBWrite2(const int xid, struct cifsTconInfo *tcon, - *nbytes = le16_to_cpu(pSMBr->CountHigh); - *nbytes = (*nbytes) << 16; - *nbytes += le16_to_cpu(pSMBr->Count); -+ -+ /* -+ * Mask off high 16 bits when bytes written as returned by the -+ * server is greater than bytes requested by the client. OS/2 -+ * servers are known to set incorrect CountHigh values. -+ */ -+ if (*nbytes > count) -+ *nbytes &= 0xFFFF; - } - - /* cifs_small_buf_release(pSMB); */ /* Freed earlier now in SendReceive2 */ -diff --git a/fs/ecryptfs/inode.c b/fs/ecryptfs/inode.c -index 4a430ab..23dc2af 100644 ---- a/fs/ecryptfs/inode.c -+++ b/fs/ecryptfs/inode.c -@@ -647,38 +647,17 @@ out_lock: - return rc; - } - --static int --ecryptfs_readlink(struct dentry *dentry, char __user *buf, int bufsiz) -+static int ecryptfs_readlink_lower(struct dentry *dentry, char **buf, -+ size_t *bufsiz) - { -+ struct dentry *lower_dentry = ecryptfs_dentry_to_lower(dentry); - char *lower_buf; -- size_t lower_bufsiz; -- struct dentry *lower_dentry; -- struct ecryptfs_mount_crypt_stat *mount_crypt_stat; -- char *plaintext_name; -- size_t plaintext_name_size; -+ size_t lower_bufsiz = PATH_MAX; - mm_segment_t old_fs; - int rc; - -- lower_dentry = ecryptfs_dentry_to_lower(dentry); -- if (!lower_dentry->d_inode->i_op->readlink) { -- rc = -EINVAL; -- goto out; -- } -- mount_crypt_stat = &ecryptfs_superblock_to_private( -- dentry->d_sb)->mount_crypt_stat; -- /* -- * If the lower filename is encrypted, it will result in a significantly -- * longer name. If needed, truncate the name after decode and decrypt. -- */ -- if (mount_crypt_stat->flags & ECRYPTFS_GLOBAL_ENCRYPT_FILENAMES) -- lower_bufsiz = PATH_MAX; -- else -- lower_bufsiz = bufsiz; -- /* Released in this function */ - lower_buf = kmalloc(lower_bufsiz, GFP_KERNEL); -- if (lower_buf == NULL) { -- printk(KERN_ERR "%s: Out of memory whilst attempting to " -- "kmalloc [%zd] bytes\n", __func__, lower_bufsiz); -+ if (!lower_buf) { - rc = -ENOMEM; - goto out; - } -@@ -688,29 +667,31 @@ ecryptfs_readlink(struct dentry *dentry, char __user *buf, int bufsiz) - (char __user *)lower_buf, - lower_bufsiz); - set_fs(old_fs); -- if (rc >= 0) { -- rc = ecryptfs_decode_and_decrypt_filename(&plaintext_name, -- &plaintext_name_size, -- dentry, lower_buf, -- rc); -- if (rc) { -- printk(KERN_ERR "%s: Error attempting to decode and " -- "decrypt filename; rc = [%d]\n", __func__, -- rc); -- goto out_free_lower_buf; -- } -- /* Check for bufsiz <= 0 done in sys_readlinkat() */ -- rc = copy_to_user(buf, plaintext_name, -- min((size_t) bufsiz, plaintext_name_size)); -- if (rc) -- rc = -EFAULT; -- else -- rc = plaintext_name_size; -- kfree(plaintext_name); -- fsstack_copy_attr_atime(dentry->d_inode, lower_dentry->d_inode); -- } --out_free_lower_buf: -+ if (rc < 0) -+ goto out; -+ lower_bufsiz = rc; -+ rc = ecryptfs_decode_and_decrypt_filename(buf, bufsiz, dentry, -+ lower_buf, lower_bufsiz); -+out: - kfree(lower_buf); -+ return rc; -+} -+ -+static int -+ecryptfs_readlink(struct dentry *dentry, char __user *buf, int bufsiz) -+{ -+ char *kbuf; -+ size_t kbufsiz, copied; -+ int rc; -+ -+ rc = ecryptfs_readlink_lower(dentry, &kbuf, &kbufsiz); -+ if (rc) -+ goto out; -+ copied = min_t(size_t, bufsiz, kbufsiz); -+ rc = copy_to_user(buf, kbuf, copied) ? -EFAULT : copied; -+ kfree(kbuf); -+ fsstack_copy_attr_atime(dentry->d_inode, -+ ecryptfs_dentry_to_lower(dentry)->d_inode); - out: - return rc; - } -@@ -1015,6 +996,28 @@ out: - return rc; - } - -+int ecryptfs_getattr_link(struct vfsmount *mnt, struct dentry *dentry, -+ struct kstat *stat) -+{ -+ struct ecryptfs_mount_crypt_stat *mount_crypt_stat; -+ int rc = 0; -+ -+ mount_crypt_stat = &ecryptfs_superblock_to_private( -+ dentry->d_sb)->mount_crypt_stat; -+ generic_fillattr(dentry->d_inode, stat); -+ if (mount_crypt_stat->flags & ECRYPTFS_GLOBAL_ENCRYPT_FILENAMES) { -+ char *target; -+ size_t targetsiz; -+ -+ rc = ecryptfs_readlink_lower(dentry, &target, &targetsiz); -+ if (!rc) { -+ kfree(target); -+ stat->size = targetsiz; -+ } -+ } -+ return rc; -+} -+ - int ecryptfs_getattr(struct vfsmount *mnt, struct dentry *dentry, - struct kstat *stat) - { -@@ -1039,7 +1042,7 @@ ecryptfs_setxattr(struct dentry *dentry, const char *name, const void *value, - - lower_dentry = ecryptfs_dentry_to_lower(dentry); - if (!lower_dentry->d_inode->i_op->setxattr) { -- rc = -ENOSYS; -+ rc = -EOPNOTSUPP; - goto out; - } - mutex_lock(&lower_dentry->d_inode->i_mutex); -@@ -1057,7 +1060,7 @@ ecryptfs_getxattr_lower(struct dentry *lower_dentry, const char *name, - int rc = 0; - - if (!lower_dentry->d_inode->i_op->getxattr) { -- rc = -ENOSYS; -+ rc = -EOPNOTSUPP; - goto out; - } - mutex_lock(&lower_dentry->d_inode->i_mutex); -@@ -1084,7 +1087,7 @@ ecryptfs_listxattr(struct dentry *dentry, char *list, size_t size) - - lower_dentry = ecryptfs_dentry_to_lower(dentry); - if (!lower_dentry->d_inode->i_op->listxattr) { -- rc = -ENOSYS; -+ rc = -EOPNOTSUPP; - goto out; - } - mutex_lock(&lower_dentry->d_inode->i_mutex); -@@ -1101,7 +1104,7 @@ static int ecryptfs_removexattr(struct dentry *dentry, const char *name) - - lower_dentry = ecryptfs_dentry_to_lower(dentry); - if (!lower_dentry->d_inode->i_op->removexattr) { -- rc = -ENOSYS; -+ rc = -EOPNOTSUPP; - goto out; - } - mutex_lock(&lower_dentry->d_inode->i_mutex); -@@ -1132,6 +1135,7 @@ const struct inode_operations ecryptfs_symlink_iops = { - .put_link = ecryptfs_put_link, - .permission = ecryptfs_permission, - .setattr = ecryptfs_setattr, -+ .getattr = ecryptfs_getattr_link, - .setxattr = ecryptfs_setxattr, - .getxattr = ecryptfs_getxattr, - .listxattr = ecryptfs_listxattr, -diff --git a/fs/ecryptfs/super.c b/fs/ecryptfs/super.c -index b15a43a..1a037f7 100644 ---- a/fs/ecryptfs/super.c -+++ b/fs/ecryptfs/super.c -@@ -85,7 +85,6 @@ static void ecryptfs_destroy_inode(struct inode *inode) - if (lower_dentry->d_inode) { - fput(inode_info->lower_file); - inode_info->lower_file = NULL; -- d_drop(lower_dentry); - } - } - ecryptfs_destroy_crypt_stat(&inode_info->crypt_stat); -diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h -index 874d169..602d5ad 100644 ---- a/fs/ext4/ext4.h -+++ b/fs/ext4/ext4.h -@@ -139,8 +139,8 @@ typedef struct ext4_io_end { - struct inode *inode; /* file being written to */ - unsigned int flag; /* unwritten or not */ - int error; /* I/O error code */ -- ext4_lblk_t offset; /* offset in the file */ -- size_t size; /* size of the extent */ -+ loff_t offset; /* offset in the file */ -+ ssize_t size; /* size of the extent */ - struct work_struct work; /* data work queue */ - } ext4_io_end_t; - -@@ -1744,7 +1744,7 @@ extern void ext4_ext_release(struct super_block *); - extern long ext4_fallocate(struct inode *inode, int mode, loff_t offset, - loff_t len); - extern int ext4_convert_unwritten_extents(struct inode *inode, loff_t offset, -- loff_t len); -+ ssize_t len); - extern int ext4_get_blocks(handle_t *handle, struct inode *inode, - sector_t block, unsigned int max_blocks, - struct buffer_head *bh, int flags); -diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c -index 765a482..c568779 100644 ---- a/fs/ext4/extents.c -+++ b/fs/ext4/extents.c -@@ -3603,7 +3603,7 @@ retry: - * Returns 0 on success. - */ - int ext4_convert_unwritten_extents(struct inode *inode, loff_t offset, -- loff_t len) -+ ssize_t len) - { - handle_t *handle; - ext4_lblk_t block; -diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c -index e119524..2059c34 100644 ---- a/fs/ext4/inode.c -+++ b/fs/ext4/inode.c -@@ -3551,7 +3551,7 @@ static int ext4_end_aio_dio_nolock(ext4_io_end_t *io) - { - struct inode *inode = io->inode; - loff_t offset = io->offset; -- size_t size = io->size; -+ ssize_t size = io->size; - int ret = 0; - - ext4_debug("end_aio_dio_onlock: io 0x%p from inode %lu,list->next 0x%p," -diff --git a/fs/fat/namei_vfat.c b/fs/fat/namei_vfat.c -index f565f24..72646e2 100644 ---- a/fs/fat/namei_vfat.c -+++ b/fs/fat/namei_vfat.c -@@ -309,7 +309,7 @@ static int vfat_create_shortname(struct inode *dir, struct nls_table *nls, - { - struct fat_mount_options *opts = &MSDOS_SB(dir->i_sb)->options; - wchar_t *ip, *ext_start, *end, *name_start; -- unsigned char base[9], ext[4], buf[8], *p; -+ unsigned char base[9], ext[4], buf[5], *p; - unsigned char charbuf[NLS_MAX_CHARSET_SIZE]; - int chl, chi; - int sz = 0, extlen, baselen, i, numtail_baselen, numtail2_baselen; -@@ -467,7 +467,7 @@ static int vfat_create_shortname(struct inode *dir, struct nls_table *nls, - return 0; - } - -- i = jiffies & 0xffff; -+ i = jiffies; - sz = (jiffies >> 16) & 0x7; - if (baselen > 2) { - baselen = numtail2_baselen; -@@ -476,7 +476,7 @@ static int vfat_create_shortname(struct inode *dir, struct nls_table *nls, - name_res[baselen + 4] = '~'; - name_res[baselen + 5] = '1' + sz; - while (1) { -- sprintf(buf, "%04X", i); -+ snprintf(buf, sizeof(buf), "%04X", i & 0xffff); - memcpy(&name_res[baselen], buf, 4); - if (vfat_find_form(dir, name_res) < 0) - break; -diff --git a/fs/nfs/client.c b/fs/nfs/client.c -index ee77713..bd39abc 100644 ---- a/fs/nfs/client.c -+++ b/fs/nfs/client.c -@@ -1293,7 +1293,8 @@ static int nfs4_init_server(struct nfs_server *server, - - /* Initialise the client representation from the mount data */ - server->flags = data->flags; -- server->caps |= NFS_CAP_ATOMIC_OPEN|NFS_CAP_CHANGE_ATTR; -+ server->caps |= NFS_CAP_ATOMIC_OPEN|NFS_CAP_CHANGE_ATTR| -+ NFS_CAP_POSIX_LOCK; - server->options = data->options; - - /* Get a client record */ -diff --git a/fs/nfs/dir.c b/fs/nfs/dir.c -index 8b5382e..af6948d 100644 ---- a/fs/nfs/dir.c -+++ b/fs/nfs/dir.c -@@ -1025,12 +1025,12 @@ static struct dentry *nfs_atomic_lookup(struct inode *dir, struct dentry *dentry - res = NULL; - goto out; - /* This turned out not to be a regular file */ -+ case -EISDIR: - case -ENOTDIR: - goto no_open; - case -ELOOP: - if (!(nd->intent.open.flags & O_NOFOLLOW)) - goto no_open; -- /* case -EISDIR: */ - /* case -EINVAL: */ - default: - goto out; -diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c -index 375f0fa..ecf6602 100644 ---- a/fs/nfs/nfs4proc.c -+++ b/fs/nfs/nfs4proc.c -@@ -1520,6 +1520,8 @@ static int _nfs4_proc_open(struct nfs4_opendata *data) - nfs_post_op_update_inode(dir, o_res->dir_attr); - } else - nfs_refresh_inode(dir, o_res->dir_attr); -+ if ((o_res->rflags & NFS4_OPEN_RESULT_LOCKTYPE_POSIX) == 0) -+ server->caps &= ~NFS_CAP_POSIX_LOCK; - if(o_res->rflags & NFS4_OPEN_RESULT_CONFIRM) { - status = _nfs4_proc_open_confirm(data); - if (status != 0) -@@ -1660,7 +1662,7 @@ static int _nfs4_do_open(struct inode *dir, struct path *path, fmode_t fmode, in - status = PTR_ERR(state); - if (IS_ERR(state)) - goto err_opendata_put; -- if ((opendata->o_res.rflags & NFS4_OPEN_RESULT_LOCKTYPE_POSIX) != 0) -+ if (server->caps & NFS_CAP_POSIX_LOCK) - set_bit(NFS_STATE_POSIX_LOCKS, &state->flags); - nfs4_opendata_put(opendata); - nfs4_put_state_owner(sp); -diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c -index a8587e9..bbf72d8 100644 ---- a/fs/nfsd/nfs4xdr.c -+++ b/fs/nfsd/nfs4xdr.c -@@ -2121,9 +2121,15 @@ out_acl: - * and this is the root of a cross-mounted filesystem. - */ - if (ignore_crossmnt == 0 && -- exp->ex_path.mnt->mnt_root->d_inode == dentry->d_inode) { -- err = vfs_getattr(exp->ex_path.mnt->mnt_parent, -- exp->ex_path.mnt->mnt_mountpoint, &stat); -+ dentry == exp->ex_path.mnt->mnt_root) { -+ struct path path = exp->ex_path; -+ path_get(&path); -+ while (follow_up(&path)) { -+ if (path.dentry != path.mnt->mnt_root) -+ break; -+ } -+ err = vfs_getattr(path.mnt, path.dentry, &stat); -+ path_put(&path); - if (err) - goto out_nfserr; - } -diff --git a/fs/ocfs2/acl.c b/fs/ocfs2/acl.c -index 0501974..8ccf0f8 100644 ---- a/fs/ocfs2/acl.c -+++ b/fs/ocfs2/acl.c -@@ -30,6 +30,8 @@ - #include "alloc.h" - #include "dlmglue.h" - #include "file.h" -+#include "inode.h" -+#include "journal.h" - #include "ocfs2_fs.h" - - #include "xattr.h" -@@ -166,6 +168,60 @@ static struct posix_acl *ocfs2_get_acl(struct inode *inode, int type) - } - - /* -+ * Helper function to set i_mode in memory and disk. Some call paths -+ * will not have di_bh or a journal handle to pass, in which case it -+ * will create it's own. -+ */ -+static int ocfs2_acl_set_mode(struct inode *inode, struct buffer_head *di_bh, -+ handle_t *handle, umode_t new_mode) -+{ -+ int ret, commit_handle = 0; -+ struct ocfs2_dinode *di; -+ -+ if (di_bh == NULL) { -+ ret = ocfs2_read_inode_block(inode, &di_bh); -+ if (ret) { -+ mlog_errno(ret); -+ goto out; -+ } -+ } else -+ get_bh(di_bh); -+ -+ if (handle == NULL) { -+ handle = ocfs2_start_trans(OCFS2_SB(inode->i_sb), -+ OCFS2_INODE_UPDATE_CREDITS); -+ if (IS_ERR(handle)) { -+ ret = PTR_ERR(handle); -+ mlog_errno(ret); -+ goto out_brelse; -+ } -+ -+ commit_handle = 1; -+ } -+ -+ di = (struct ocfs2_dinode *)di_bh->b_data; -+ ret = ocfs2_journal_access_di(handle, INODE_CACHE(inode), di_bh, -+ OCFS2_JOURNAL_ACCESS_WRITE); -+ if (ret) { -+ mlog_errno(ret); -+ goto out_commit; -+ } -+ -+ inode->i_mode = new_mode; -+ di->i_mode = cpu_to_le16(inode->i_mode); -+ -+ ocfs2_journal_dirty(handle, di_bh); -+ -+out_commit: -+ if (commit_handle) -+ ocfs2_commit_trans(OCFS2_SB(inode->i_sb), handle); -+out_brelse: -+ brelse(di_bh); -+out: -+ return ret; -+} -+ -+/* - * Set the access or default ACL of an inode. - */ - static int ocfs2_set_acl(handle_t *handle, -@@ -193,9 +249,14 @@ static int ocfs2_set_acl(handle_t *handle, - if (ret < 0) - return ret; - else { -- inode->i_mode = mode; - if (ret == 0) - acl = NULL; -+ -+ ret = ocfs2_acl_set_mode(inode, di_bh, -+ handle, mode); -+ if (ret) -+ return ret; -+ - } - } - break; -@@ -283,6 +344,7 @@ int ocfs2_init_acl(handle_t *handle, - struct ocfs2_super *osb = OCFS2_SB(inode->i_sb); - struct posix_acl *acl = NULL; - int ret = 0; -+ mode_t mode; - - if (!S_ISLNK(inode->i_mode)) { - if (osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL) { -@@ -291,12 +353,17 @@ int ocfs2_init_acl(handle_t *handle, - if (IS_ERR(acl)) - return PTR_ERR(acl); - } -- if (!acl) -- inode->i_mode &= ~current_umask(); -+ if (!acl) { -+ mode = inode->i_mode & ~current_umask(); -+ ret = ocfs2_acl_set_mode(inode, di_bh, handle, mode); -+ if (ret) { -+ mlog_errno(ret); -+ goto cleanup; -+ } -+ } - } - if ((osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL) && acl) { - struct posix_acl *clone; -- mode_t mode; - - if (S_ISDIR(inode->i_mode)) { - ret = ocfs2_set_acl(handle, inode, di_bh, -@@ -313,7 +380,7 @@ int ocfs2_init_acl(handle_t *handle, - mode = inode->i_mode; - ret = posix_acl_create_masq(clone, &mode); - if (ret >= 0) { -- inode->i_mode = mode; -+ ret = ocfs2_acl_set_mode(inode, di_bh, handle, mode); - if (ret > 0) { - ret = ocfs2_set_acl(handle, inode, - di_bh, ACL_TYPE_ACCESS, -diff --git a/fs/ocfs2/suballoc.c b/fs/ocfs2/suballoc.c -index c30b644..79b5dac 100644 ---- a/fs/ocfs2/suballoc.c -+++ b/fs/ocfs2/suballoc.c -@@ -152,7 +152,7 @@ static u32 ocfs2_bits_per_group(struct ocfs2_chain_list *cl) - - #define do_error(fmt, ...) \ - do{ \ -- if (clean_error) \ -+ if (resize) \ - mlog(ML_ERROR, fmt "\n", ##__VA_ARGS__); \ - else \ - ocfs2_error(sb, fmt, ##__VA_ARGS__); \ -@@ -160,7 +160,7 @@ static u32 ocfs2_bits_per_group(struct ocfs2_chain_list *cl) - - static int ocfs2_validate_gd_self(struct super_block *sb, - struct buffer_head *bh, -- int clean_error) -+ int resize) - { - struct ocfs2_group_desc *gd = (struct ocfs2_group_desc *)bh->b_data; - -@@ -211,7 +211,7 @@ static int ocfs2_validate_gd_self(struct super_block *sb, - static int ocfs2_validate_gd_parent(struct super_block *sb, - struct ocfs2_dinode *di, - struct buffer_head *bh, -- int clean_error) -+ int resize) - { - unsigned int max_bits; - struct ocfs2_group_desc *gd = (struct ocfs2_group_desc *)bh->b_data; -@@ -233,8 +233,11 @@ static int ocfs2_validate_gd_parent(struct super_block *sb, - return -EINVAL; - } - -- if (le16_to_cpu(gd->bg_chain) >= -- le16_to_cpu(di->id2.i_chain.cl_next_free_rec)) { -+ /* In resize, we may meet the case bg_chain == cl_next_free_rec. */ -+ if ((le16_to_cpu(gd->bg_chain) > -+ le16_to_cpu(di->id2.i_chain.cl_next_free_rec)) || -+ ((le16_to_cpu(gd->bg_chain) == -+ le16_to_cpu(di->id2.i_chain.cl_next_free_rec)) && !resize)) { - do_error("Group descriptor #%llu has bad chain %u", - (unsigned long long)bh->b_blocknr, - le16_to_cpu(gd->bg_chain)); -diff --git a/fs/proc/base.c b/fs/proc/base.c -index 58324c2..3cd449d 100644 ---- a/fs/proc/base.c -+++ b/fs/proc/base.c -@@ -442,12 +442,13 @@ static const struct file_operations proc_lstats_operations = { - unsigned long badness(struct task_struct *p, unsigned long uptime); - static int proc_oom_score(struct task_struct *task, char *buffer) - { -- unsigned long points; -+ unsigned long points = 0; - struct timespec uptime; - - do_posix_clock_monotonic_gettime(&uptime); - read_lock(&tasklist_lock); -- points = badness(task->group_leader, uptime.tv_sec); -+ if (pid_alive(task)) -+ points = badness(task, uptime.tv_sec); - read_unlock(&tasklist_lock); - return sprintf(buffer, "%lu\n", points); - } -diff --git a/fs/quota/dquot.c b/fs/quota/dquot.c -index 6e722c1..6c9da00 100644 ---- a/fs/quota/dquot.c -+++ b/fs/quota/dquot.c -@@ -2321,34 +2321,34 @@ static int do_set_dqblk(struct dquot *dquot, struct if_dqblk *di) - if (di->dqb_valid & QIF_SPACE) { - dm->dqb_curspace = di->dqb_curspace - dm->dqb_rsvspace; - check_blim = 1; -- __set_bit(DQ_LASTSET_B + QIF_SPACE_B, &dquot->dq_flags); -+ set_bit(DQ_LASTSET_B + QIF_SPACE_B, &dquot->dq_flags); - } - if (di->dqb_valid & QIF_BLIMITS) { - dm->dqb_bsoftlimit = qbtos(di->dqb_bsoftlimit); - dm->dqb_bhardlimit = qbtos(di->dqb_bhardlimit); - check_blim = 1; -- __set_bit(DQ_LASTSET_B + QIF_BLIMITS_B, &dquot->dq_flags); -+ set_bit(DQ_LASTSET_B + QIF_BLIMITS_B, &dquot->dq_flags); - } - if (di->dqb_valid & QIF_INODES) { - dm->dqb_curinodes = di->dqb_curinodes; - check_ilim = 1; -- __set_bit(DQ_LASTSET_B + QIF_INODES_B, &dquot->dq_flags); -+ set_bit(DQ_LASTSET_B + QIF_INODES_B, &dquot->dq_flags); - } - if (di->dqb_valid & QIF_ILIMITS) { - dm->dqb_isoftlimit = di->dqb_isoftlimit; - dm->dqb_ihardlimit = di->dqb_ihardlimit; - check_ilim = 1; -- __set_bit(DQ_LASTSET_B + QIF_ILIMITS_B, &dquot->dq_flags); -+ set_bit(DQ_LASTSET_B + QIF_ILIMITS_B, &dquot->dq_flags); - } - if (di->dqb_valid & QIF_BTIME) { - dm->dqb_btime = di->dqb_btime; - check_blim = 1; -- __set_bit(DQ_LASTSET_B + QIF_BTIME_B, &dquot->dq_flags); -+ set_bit(DQ_LASTSET_B + QIF_BTIME_B, &dquot->dq_flags); - } - if (di->dqb_valid & QIF_ITIME) { - dm->dqb_itime = di->dqb_itime; - check_ilim = 1; -- __set_bit(DQ_LASTSET_B + QIF_ITIME_B, &dquot->dq_flags); -+ set_bit(DQ_LASTSET_B + QIF_ITIME_B, &dquot->dq_flags); - } - - if (check_blim) { -diff --git a/fs/reiserfs/super.c b/fs/reiserfs/super.c -index b4a7dd0..33bc410 100644 ---- a/fs/reiserfs/super.c -+++ b/fs/reiserfs/super.c -@@ -1619,10 +1619,8 @@ static int reiserfs_fill_super(struct super_block *s, void *data, int silent) - save_mount_options(s, data); - - sbi = kzalloc(sizeof(struct reiserfs_sb_info), GFP_KERNEL); -- if (!sbi) { -- errval = -ENOMEM; -- goto error_alloc; -- } -+ if (!sbi) -+ return -ENOMEM; - s->s_fs_info = sbi; - /* Set default values for options: non-aggressive tails, RO on errors */ - REISERFS_SB(s)->s_mount_opt |= (1 << REISERFS_SMALLTAIL); -@@ -1879,12 +1877,12 @@ static int reiserfs_fill_super(struct super_block *s, void *data, int silent) - return (0); - - error: -- reiserfs_write_unlock(s); --error_alloc: - if (jinit_done) { /* kill the commit thread, free journal ram */ - journal_release_error(NULL, s); - } - -+ reiserfs_write_unlock(s); -+ - reiserfs_free_bitmap_cache(s); - if (SB_BUFFER_WITH_SB(s)) - brelse(SB_BUFFER_WITH_SB(s)); -diff --git a/fs/xfs/linux-2.6/xfs_aops.c b/fs/xfs/linux-2.6/xfs_aops.c -index 66abe36..1c65a2b 100644 ---- a/fs/xfs/linux-2.6/xfs_aops.c -+++ b/fs/xfs/linux-2.6/xfs_aops.c -@@ -163,14 +163,17 @@ xfs_ioend_new_eof( - } - - /* -- * Update on-disk file size now that data has been written to disk. -- * The current in-memory file size is i_size. If a write is beyond -- * eof i_new_size will be the intended file size until i_size is -- * updated. If this write does not extend all the way to the valid -- * file size then restrict this update to the end of the write. -+ * Update on-disk file size now that data has been written to disk. The -+ * current in-memory file size is i_size. If a write is beyond eof i_new_size -+ * will be the intended file size until i_size is updated. If this write does -+ * not extend all the way to the valid file size then restrict this update to -+ * the end of the write. -+ * -+ * This function does not block as blocking on the inode lock in IO completion -+ * can lead to IO completion order dependency deadlocks.. If it can't get the -+ * inode ilock it will return EAGAIN. Callers must handle this. - */ -- --STATIC void -+STATIC int - xfs_setfilesize( - xfs_ioend_t *ioend) - { -@@ -181,9 +184,11 @@ xfs_setfilesize( - ASSERT(ioend->io_type != IOMAP_READ); - - if (unlikely(ioend->io_error)) -- return; -+ return 0; -+ -+ if (!xfs_ilock_nowait(ip, XFS_ILOCK_EXCL)) -+ return EAGAIN; - -- xfs_ilock(ip, XFS_ILOCK_EXCL); - isize = xfs_ioend_new_eof(ioend); - if (isize) { - ip->i_d.di_size = isize; -@@ -191,6 +196,28 @@ xfs_setfilesize( - } - - xfs_iunlock(ip, XFS_ILOCK_EXCL); -+ return 0; -+} -+ -+/* -+ * Schedule IO completion handling on a xfsdatad if this was -+ * the final hold on this ioend. If we are asked to wait, -+ * flush the workqueue. -+ */ -+STATIC void -+xfs_finish_ioend( -+ xfs_ioend_t *ioend, -+ int wait) -+{ -+ if (atomic_dec_and_test(&ioend->io_remaining)) { -+ struct workqueue_struct *wq; -+ -+ wq = (ioend->io_type == IOMAP_UNWRITTEN) ? -+ xfsconvertd_workqueue : xfsdatad_workqueue; -+ queue_work(wq, &ioend->io_work); -+ if (wait) -+ flush_workqueue(wq); -+ } - } - - /* -@@ -198,11 +225,11 @@ xfs_setfilesize( - */ - STATIC void - xfs_end_io( -- struct work_struct *work) -+ struct work_struct *work) - { -- xfs_ioend_t *ioend = -- container_of(work, xfs_ioend_t, io_work); -- struct xfs_inode *ip = XFS_I(ioend->io_inode); -+ xfs_ioend_t *ioend = container_of(work, xfs_ioend_t, io_work); -+ struct xfs_inode *ip = XFS_I(ioend->io_inode); -+ int error; - - /* - * For unwritten extents we need to issue transactions to convert a -@@ -210,7 +237,6 @@ xfs_end_io( - */ - if (ioend->io_type == IOMAP_UNWRITTEN && - likely(!ioend->io_error && !XFS_FORCED_SHUTDOWN(ip->i_mount))) { -- int error; - - error = xfs_iomap_write_unwritten(ip, ioend->io_offset, - ioend->io_size); -@@ -222,30 +248,23 @@ xfs_end_io( - * We might have to update the on-disk file size after extending - * writes. - */ -- if (ioend->io_type != IOMAP_READ) -- xfs_setfilesize(ioend); -- xfs_destroy_ioend(ioend); --} -- --/* -- * Schedule IO completion handling on a xfsdatad if this was -- * the final hold on this ioend. If we are asked to wait, -- * flush the workqueue. -- */ --STATIC void --xfs_finish_ioend( -- xfs_ioend_t *ioend, -- int wait) --{ -- if (atomic_dec_and_test(&ioend->io_remaining)) { -- struct workqueue_struct *wq; -- -- wq = (ioend->io_type == IOMAP_UNWRITTEN) ? -- xfsconvertd_workqueue : xfsdatad_workqueue; -- queue_work(wq, &ioend->io_work); -- if (wait) -- flush_workqueue(wq); -+ if (ioend->io_type != IOMAP_READ) { -+ error = xfs_setfilesize(ioend); -+ ASSERT(!error || error == EAGAIN); - } -+ -+ /* -+ * If we didn't complete processing of the ioend, requeue it to the -+ * tail of the workqueue for another attempt later. Otherwise destroy -+ * it. -+ */ -+ if (error == EAGAIN) { -+ atomic_inc(&ioend->io_remaining); -+ xfs_finish_ioend(ioend, 0); -+ /* ensure we don't spin on blocked ioends */ -+ delay(1); -+ } else -+ xfs_destroy_ioend(ioend); - } - - /* -diff --git a/fs/xfs/linux-2.6/xfs_sync.c b/fs/xfs/linux-2.6/xfs_sync.c -index 1f5e4bb..6b6b394 100644 ---- a/fs/xfs/linux-2.6/xfs_sync.c -+++ b/fs/xfs/linux-2.6/xfs_sync.c -@@ -613,7 +613,8 @@ xfssyncd( - set_freezable(); - timeleft = xfs_syncd_centisecs * msecs_to_jiffies(10); - for (;;) { -- timeleft = schedule_timeout_interruptible(timeleft); -+ if (list_empty(&mp->m_sync_list)) -+ timeleft = schedule_timeout_interruptible(timeleft); - /* swsusp */ - try_to_freeze(); - if (kthread_should_stop() && list_empty(&mp->m_sync_list)) -@@ -633,8 +634,7 @@ xfssyncd( - list_add_tail(&mp->m_sync_work.w_list, - &mp->m_sync_list); - } -- list_for_each_entry_safe(work, n, &mp->m_sync_list, w_list) -- list_move(&work->w_list, &tmp); -+ list_splice_init(&mp->m_sync_list, &tmp); - spin_unlock(&mp->m_sync_lock); - - list_for_each_entry_safe(work, n, &tmp, w_list) { -@@ -693,12 +693,12 @@ xfs_inode_set_reclaim_tag( - xfs_mount_t *mp = ip->i_mount; - xfs_perag_t *pag = xfs_get_perag(mp, ip->i_ino); - -- read_lock(&pag->pag_ici_lock); -+ write_lock(&pag->pag_ici_lock); - spin_lock(&ip->i_flags_lock); - __xfs_inode_set_reclaim_tag(pag, ip); - __xfs_iflags_set(ip, XFS_IRECLAIMABLE); - spin_unlock(&ip->i_flags_lock); -- read_unlock(&pag->pag_ici_lock); -+ write_unlock(&pag->pag_ici_lock); - xfs_put_perag(mp, pag); - } - -diff --git a/fs/xfs/xfs_iget.c b/fs/xfs/xfs_iget.c -index 155e798..fd21160 100644 ---- a/fs/xfs/xfs_iget.c -+++ b/fs/xfs/xfs_iget.c -@@ -190,13 +190,12 @@ xfs_iget_cache_hit( - trace_xfs_iget_reclaim(ip); - - /* -- * We need to set XFS_INEW atomically with clearing the -- * reclaimable tag so that we do have an indicator of the -- * inode still being initialized. -+ * We need to set XFS_IRECLAIM to prevent xfs_reclaim_inode -+ * from stomping over us while we recycle the inode. We can't -+ * clear the radix tree reclaimable tag yet as it requires -+ * pag_ici_lock to be held exclusive. - */ -- ip->i_flags |= XFS_INEW; -- ip->i_flags &= ~XFS_IRECLAIMABLE; -- __xfs_inode_clear_reclaim_tag(mp, pag, ip); -+ ip->i_flags |= XFS_IRECLAIM; - - spin_unlock(&ip->i_flags_lock); - read_unlock(&pag->pag_ici_lock); -@@ -216,7 +215,15 @@ xfs_iget_cache_hit( - trace_xfs_iget_reclaim(ip); - goto out_error; - } -+ -+ write_lock(&pag->pag_ici_lock); -+ spin_lock(&ip->i_flags_lock); -+ ip->i_flags &= ~(XFS_IRECLAIMABLE | XFS_IRECLAIM); -+ ip->i_flags |= XFS_INEW; -+ __xfs_inode_clear_reclaim_tag(mp, pag, ip); - inode->i_state = I_NEW; -+ spin_unlock(&ip->i_flags_lock); -+ write_unlock(&pag->pag_ici_lock); - } else { - /* If the VFS inode is being torn down, pause and try again. */ - if (!igrab(inode)) { -diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h -index e6f3b12..0cbdccc 100644 ---- a/include/drm/drm_pciids.h -+++ b/include/drm/drm_pciids.h -@@ -6,6 +6,7 @@ - {0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ - {0x1002, 0x3152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x3154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x3155, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x3E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x3E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|RADEON_IS_IGP}, \ -@@ -375,6 +376,7 @@ - {0x1002, 0x9712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9713, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9714, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9715, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0, 0, 0} - - #define r128_PCI_IDS \ -diff --git a/include/linux/dm-ioctl.h b/include/linux/dm-ioctl.h -index aa95508..2c445e1 100644 ---- a/include/linux/dm-ioctl.h -+++ b/include/linux/dm-ioctl.h -@@ -266,9 +266,9 @@ enum { - #define DM_DEV_SET_GEOMETRY _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl) - - #define DM_VERSION_MAJOR 4 --#define DM_VERSION_MINOR 16 -+#define DM_VERSION_MINOR 17 - #define DM_VERSION_PATCHLEVEL 0 --#define DM_VERSION_EXTRA "-ioctl (2009-11-05)" -+#define DM_VERSION_EXTRA "-ioctl (2010-03-05)" - - /* Status bits */ - #define DM_READONLY_FLAG (1 << 0) /* In/Out */ -@@ -316,4 +316,9 @@ enum { - */ - #define DM_QUERY_INACTIVE_TABLE_FLAG (1 << 12) /* In */ - -+/* -+ * If set, a uevent was generated for which the caller may need to wait. -+ */ -+#define DM_UEVENT_GENERATED_FLAG (1 << 13) /* Out */ -+ - #endif /* _LINUX_DM_IOCTL_H */ -diff --git a/include/linux/freezer.h b/include/linux/freezer.h -index 5a361f8..da7e52b 100644 ---- a/include/linux/freezer.h -+++ b/include/linux/freezer.h -@@ -64,9 +64,12 @@ extern bool freeze_task(struct task_struct *p, bool sig_only); - extern void cancel_freezing(struct task_struct *p); - - #ifdef CONFIG_CGROUP_FREEZER --extern int cgroup_frozen(struct task_struct *task); -+extern int cgroup_freezing_or_frozen(struct task_struct *task); - #else /* !CONFIG_CGROUP_FREEZER */ --static inline int cgroup_frozen(struct task_struct *task) { return 0; } -+static inline int cgroup_freezing_or_frozen(struct task_struct *task) -+{ -+ return 0; -+} - #endif /* !CONFIG_CGROUP_FREEZER */ - - /* -diff --git a/include/linux/fs.h b/include/linux/fs.h -index f2f68ce..66b0705 100644 ---- a/include/linux/fs.h -+++ b/include/linux/fs.h -@@ -2214,6 +2214,7 @@ extern int generic_segment_checks(const struct iovec *iov, - /* fs/block_dev.c */ - extern ssize_t blkdev_aio_write(struct kiocb *iocb, const struct iovec *iov, - unsigned long nr_segs, loff_t pos); -+extern int block_fsync(struct file *filp, struct dentry *dentry, int datasync); - - /* fs/splice.c */ - extern ssize_t generic_file_splice_read(struct file *, loff_t *, -diff --git a/include/linux/kfifo.h b/include/linux/kfifo.h -index ece0b1c..e117b1a 100644 ---- a/include/linux/kfifo.h -+++ b/include/linux/kfifo.h -@@ -86,7 +86,8 @@ union { \ - */ - #define INIT_KFIFO(name) \ - name = __kfifo_initializer(sizeof(name##kfifo_buffer) - \ -- sizeof(struct kfifo), name##kfifo_buffer) -+ sizeof(struct kfifo), \ -+ name##kfifo_buffer + sizeof(struct kfifo)) - - /** - * DEFINE_KFIFO - macro to define and initialize a kfifo -diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h -index bd5a616..1fe293e 100644 ---- a/include/linux/kvm_host.h -+++ b/include/linux/kvm_host.h -@@ -53,7 +53,7 @@ extern struct kmem_cache *kvm_vcpu_cache; - */ - struct kvm_io_bus { - int dev_count; --#define NR_IOBUS_DEVS 6 -+#define NR_IOBUS_DEVS 200 - struct kvm_io_device *devs[NR_IOBUS_DEVS]; - }; - -@@ -116,6 +116,11 @@ struct kvm_memory_slot { - int user_alloc; - }; - -+static inline unsigned long kvm_dirty_bitmap_bytes(struct kvm_memory_slot *memslot) -+{ -+ return ALIGN(memslot->npages, BITS_PER_LONG) / 8; -+} -+ - struct kvm_kernel_irq_routing_entry { - u32 gsi; - u32 type; -diff --git a/include/linux/module.h b/include/linux/module.h -index 6cb1a3c..bd465d4 100644 ---- a/include/linux/module.h -+++ b/include/linux/module.h -@@ -457,7 +457,7 @@ void symbol_put_addr(void *addr); - static inline local_t *__module_ref_addr(struct module *mod, int cpu) - { - #ifdef CONFIG_SMP -- return (local_t *) (mod->refptr + per_cpu_offset(cpu)); -+ return (local_t *) per_cpu_ptr(mod->refptr, cpu); - #else - return &mod->ref; - #endif -diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h -index 34fc6be..ebc4809 100644 ---- a/include/linux/nfs_fs_sb.h -+++ b/include/linux/nfs_fs_sb.h -@@ -176,6 +176,7 @@ struct nfs_server { - #define NFS_CAP_ATIME (1U << 11) - #define NFS_CAP_CTIME (1U << 12) - #define NFS_CAP_MTIME (1U << 13) -+#define NFS_CAP_POSIX_LOCK (1U << 14) - - - /* maximum number of slots to use */ -diff --git a/include/linux/pci.h b/include/linux/pci.h -index c1968f4..0afb527 100644 ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -959,6 +959,11 @@ static inline int pci_proc_domain(struct pci_bus *bus) - } - #endif /* CONFIG_PCI_DOMAINS */ - -+/* some architectures require additional setup to direct VGA traffic */ -+typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode, -+ unsigned int command_bits, bool change_bridge); -+extern void pci_register_set_vga_state(arch_set_vga_state_t func); -+ - #else /* CONFIG_PCI is not enabled */ - - /* -diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h -index cca8a04..0be8243 100644 ---- a/include/linux/pci_ids.h -+++ b/include/linux/pci_ids.h -@@ -2417,6 +2417,9 @@ - #define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21 - #define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 - #define PCI_DEVICE_ID_INTEL_IOAT 0x1a38 -+#define PCI_DEVICE_ID_INTEL_CPT_SMBUS 0x1c22 -+#define PCI_DEVICE_ID_INTEL_CPT_LPC1 0x1c42 -+#define PCI_DEVICE_ID_INTEL_CPT_LPC2 0x1c43 - #define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 - #define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411 - #define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413 -diff --git a/kernel/cgroup_freezer.c b/kernel/cgroup_freezer.c -index 59e9ef6..eb3f34d 100644 ---- a/kernel/cgroup_freezer.c -+++ b/kernel/cgroup_freezer.c -@@ -47,17 +47,20 @@ static inline struct freezer *task_freezer(struct task_struct *task) - struct freezer, css); - } - --int cgroup_frozen(struct task_struct *task) -+int cgroup_freezing_or_frozen(struct task_struct *task) - { - struct freezer *freezer; - enum freezer_state state; - - task_lock(task); - freezer = task_freezer(task); -- state = freezer->state; -+ if (!freezer->css.cgroup->parent) -+ state = CGROUP_THAWED; /* root cgroup can't be frozen */ -+ else -+ state = freezer->state; - task_unlock(task); - -- return state == CGROUP_FROZEN; -+ return (state == CGROUP_FREEZING) || (state == CGROUP_FROZEN); - } - - /* -diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c -index 69a3d7b..0b23ff7 100644 ---- a/kernel/irq/manage.c -+++ b/kernel/irq/manage.c -@@ -753,6 +753,16 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) - if (new->flags & IRQF_ONESHOT) - desc->status |= IRQ_ONESHOT; - -+ /* -+ * Force MSI interrupts to run with interrupts -+ * disabled. The multi vector cards can cause stack -+ * overflows due to nested interrupts when enough of -+ * them are directed to a core and fire at the same -+ * time. -+ */ -+ if (desc->msi_desc) -+ new->flags |= IRQF_DISABLED; -+ - if (!(desc->status & IRQ_NOAUTOEN)) { - desc->depth = 0; - desc->status &= ~IRQ_DISABLED; -diff --git a/kernel/lockdep.c b/kernel/lockdep.c -index c62ec14..493a0ef 100644 ---- a/kernel/lockdep.c -+++ b/kernel/lockdep.c -@@ -600,9 +600,9 @@ static int static_obj(void *obj) - * percpu var? - */ - for_each_possible_cpu(i) { -- start = (unsigned long) &__per_cpu_start + per_cpu_offset(i); -- end = (unsigned long) &__per_cpu_start + PERCPU_ENOUGH_ROOM -- + per_cpu_offset(i); -+ start = (unsigned long) per_cpu_ptr(&__per_cpu_start, i); -+ end = (unsigned long) per_cpu_ptr(&__per_cpu_start, i) -+ + PERCPU_ENOUGH_ROOM; - - if ((addr >= start) && (addr < end)) - return 1; -diff --git a/kernel/module.c b/kernel/module.c -index f82386b..5b6ce39 100644 ---- a/kernel/module.c -+++ b/kernel/module.c -@@ -405,7 +405,7 @@ static void percpu_modcopy(void *pcpudest, const void *from, unsigned long size) - int cpu; - - for_each_possible_cpu(cpu) -- memcpy(pcpudest + per_cpu_offset(cpu), from, size); -+ memcpy(per_cpu_ptr(pcpudest, cpu), from, size); - } - - #else /* ... !CONFIG_SMP */ -diff --git a/kernel/power/process.c b/kernel/power/process.c -index 5ade1bd..de53015 100644 ---- a/kernel/power/process.c -+++ b/kernel/power/process.c -@@ -145,7 +145,7 @@ static void thaw_tasks(bool nosig_only) - if (nosig_only && should_send_signal(p)) - continue; - -- if (cgroup_frozen(p)) -+ if (cgroup_freezing_or_frozen(p)) - continue; - - thaw_process(p); -diff --git a/kernel/sched.c b/kernel/sched.c -index 7ca9345..da19c1e 100644 ---- a/kernel/sched.c -+++ b/kernel/sched.c -@@ -6717,7 +6717,9 @@ SYSCALL_DEFINE3(sched_getaffinity, pid_t, pid, unsigned int, len, - int ret; - cpumask_var_t mask; - -- if (len < cpumask_size()) -+ if ((len * BITS_PER_BYTE) < nr_cpu_ids) -+ return -EINVAL; -+ if (len & (sizeof(unsigned long)-1)) - return -EINVAL; - - if (!alloc_cpumask_var(&mask, GFP_KERNEL)) -@@ -6725,10 +6727,12 @@ SYSCALL_DEFINE3(sched_getaffinity, pid_t, pid, unsigned int, len, - - ret = sched_getaffinity(pid, mask); - if (ret == 0) { -- if (copy_to_user(user_mask_ptr, mask, cpumask_size())) -+ size_t retlen = min_t(size_t, len, cpumask_size()); -+ -+ if (copy_to_user(user_mask_ptr, mask, retlen)) - ret = -EFAULT; - else -- ret = cpumask_size(); -+ ret = retlen; - } - free_cpumask_var(mask); - -diff --git a/mm/readahead.c b/mm/readahead.c -index 337b20e..fe1a069 100644 ---- a/mm/readahead.c -+++ b/mm/readahead.c -@@ -502,7 +502,7 @@ void page_cache_sync_readahead(struct address_space *mapping, - return; - - /* be dumb */ -- if (filp->f_mode & FMODE_RANDOM) { -+ if (filp && (filp->f_mode & FMODE_RANDOM)) { - force_page_cache_readahead(mapping, filp, offset, req_size); - return; - } -diff --git a/net/mac80211/mesh.c b/net/mac80211/mesh.c -index 6a43314..ba1fadb 100644 ---- a/net/mac80211/mesh.c -+++ b/net/mac80211/mesh.c -@@ -749,9 +749,6 @@ ieee80211_mesh_rx_mgmt(struct ieee80211_sub_if_data *sdata, struct sk_buff *skb) - - switch (fc & IEEE80211_FCTL_STYPE) { - case IEEE80211_STYPE_ACTION: -- if (skb->len < IEEE80211_MIN_ACTION_SIZE) -- return RX_DROP_MONITOR; -- /* fall through */ - case IEEE80211_STYPE_PROBE_RESP: - case IEEE80211_STYPE_BEACON: - skb_queue_tail(&ifmsh->skb_queue, skb); -diff --git a/net/mac80211/mesh_hwmp.c b/net/mac80211/mesh_hwmp.c -index d28acb6..4eed81b 100644 ---- a/net/mac80211/mesh_hwmp.c -+++ b/net/mac80211/mesh_hwmp.c -@@ -391,7 +391,7 @@ static u32 hwmp_route_info_get(struct ieee80211_sub_if_data *sdata, - if (SN_GT(mpath->sn, orig_sn) || - (mpath->sn == orig_sn && - action == MPATH_PREQ && -- new_metric > mpath->metric)) { -+ new_metric >= mpath->metric)) { - process = false; - fresh_info = false; - } -@@ -611,7 +611,7 @@ static void hwmp_prep_frame_process(struct ieee80211_sub_if_data *sdata, - - mesh_path_sel_frame_tx(MPATH_PREP, flags, orig_addr, - cpu_to_le32(orig_sn), 0, target_addr, -- cpu_to_le32(target_sn), mpath->next_hop->sta.addr, hopcount, -+ cpu_to_le32(target_sn), next_hop, hopcount, - ttl, cpu_to_le32(lifetime), cpu_to_le32(metric), - 0, sdata); - rcu_read_unlock(); -diff --git a/net/mac80211/rx.c b/net/mac80211/rx.c -index da92cde..edfa036 100644 ---- a/net/mac80211/rx.c -+++ b/net/mac80211/rx.c -@@ -2355,6 +2355,11 @@ static int prepare_for_handlers(struct ieee80211_sub_if_data *sdata, - /* should never get here */ - WARN_ON(1); - break; -+ case MESH_PLINK_CATEGORY: -+ case MESH_PATH_SEL_CATEGORY: -+ if (ieee80211_vif_is_mesh(&sdata->vif)) -+ return ieee80211_mesh_rx_mgmt(sdata, rx->skb); -+ break; - } - - return 1; -diff --git a/net/mac80211/tx.c b/net/mac80211/tx.c -index 70c79c3..1fdc0a5 100644 ---- a/net/mac80211/tx.c -+++ b/net/mac80211/tx.c -@@ -1945,6 +1945,7 @@ static bool ieee80211_tx_pending_skb(struct ieee80211_local *local, - void ieee80211_tx_pending(unsigned long data) - { - struct ieee80211_local *local = (struct ieee80211_local *)data; -+ struct ieee80211_sub_if_data *sdata; - unsigned long flags; - int i; - bool txok; -@@ -1983,6 +1984,11 @@ void ieee80211_tx_pending(unsigned long data) - if (!txok) - break; - } -+ -+ if (skb_queue_empty(&local->pending[i])) -+ list_for_each_entry_rcu(sdata, &local->interfaces, list) -+ netif_tx_wake_queue( -+ netdev_get_tx_queue(sdata->dev, i)); - } - spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags); - -diff --git a/net/mac80211/util.c b/net/mac80211/util.c -index 3848140..27212e8 100644 ---- a/net/mac80211/util.c -+++ b/net/mac80211/util.c -@@ -280,13 +280,13 @@ static void __ieee80211_wake_queue(struct ieee80211_hw *hw, int queue, - /* someone still has this queue stopped */ - return; - -- if (!skb_queue_empty(&local->pending[queue])) -+ if (skb_queue_empty(&local->pending[queue])) { -+ rcu_read_lock(); -+ list_for_each_entry_rcu(sdata, &local->interfaces, list) -+ netif_tx_wake_queue(netdev_get_tx_queue(sdata->dev, queue)); -+ rcu_read_unlock(); -+ } else - tasklet_schedule(&local->tx_pending_tasklet); -- -- rcu_read_lock(); -- list_for_each_entry_rcu(sdata, &local->interfaces, list) -- netif_tx_wake_queue(netdev_get_tx_queue(sdata->dev, queue)); -- rcu_read_unlock(); - } - - void ieee80211_wake_queue_by_reason(struct ieee80211_hw *hw, int queue, -@@ -1145,6 +1145,14 @@ int ieee80211_reconfig(struct ieee80211_local *local) - } - } - -+ rcu_read_lock(); -+ if (hw->flags & IEEE80211_HW_AMPDU_AGGREGATION) { -+ list_for_each_entry_rcu(sta, &local->sta_list, list) { -+ ieee80211_sta_tear_down_BA_sessions(sta); -+ } -+ } -+ rcu_read_unlock(); -+ - /* add back keys */ - list_for_each_entry(sdata, &local->interfaces, list) - if (netif_running(sdata->dev)) -diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c -index 9ace8eb..062a8b0 100644 ---- a/sound/pci/hda/hda_intel.c -+++ b/sound/pci/hda/hda_intel.c -@@ -125,6 +125,7 @@ MODULE_SUPPORTED_DEVICE("{{Intel, ICH6}," - "{Intel, ICH9}," - "{Intel, ICH10}," - "{Intel, PCH}," -+ "{Intel, CPT}," - "{Intel, SCH}," - "{ATI, SB450}," - "{ATI, SB600}," -@@ -449,6 +450,7 @@ struct azx { - /* driver types */ - enum { - AZX_DRIVER_ICH, -+ AZX_DRIVER_PCH, - AZX_DRIVER_SCH, - AZX_DRIVER_ATI, - AZX_DRIVER_ATIHDMI, -@@ -463,6 +465,7 @@ enum { - - static char *driver_short_names[] __devinitdata = { - [AZX_DRIVER_ICH] = "HDA Intel", -+ [AZX_DRIVER_PCH] = "HDA Intel PCH", - [AZX_DRIVER_SCH] = "HDA Intel MID", - [AZX_DRIVER_ATI] = "HDA ATI SB", - [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI", -@@ -1065,6 +1068,7 @@ static void azx_init_pci(struct azx *chip) - 0x01, NVIDIA_HDA_ENABLE_COHBIT); - break; - case AZX_DRIVER_SCH: -+ case AZX_DRIVER_PCH: - pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop); - if (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) { - pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, -@@ -2268,6 +2272,7 @@ static struct snd_pci_quirk position_fix_list[] __devinitdata = { - SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB), - SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB), - SND_PCI_QUIRK(0x1565, 0x820f, "Biostar Microtech", POS_FIX_LPIB), -+ SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB), - SND_PCI_QUIRK(0x8086, 0xd601, "eMachines T5212", POS_FIX_LPIB), - {} - }; -@@ -2357,6 +2362,8 @@ static struct snd_pci_quirk msi_black_list[] __devinitdata = { - SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */ - SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */ - SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */ -+ SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */ -+ SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */ - {} - }; - -@@ -2431,6 +2438,7 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, - if (bdl_pos_adj[dev] < 0) { - switch (chip->driver_type) { - case AZX_DRIVER_ICH: -+ case AZX_DRIVER_PCH: - bdl_pos_adj[dev] = 1; - break; - default: -@@ -2709,6 +2717,8 @@ static struct pci_device_id azx_ids[] = { - { PCI_DEVICE(0x8086, 0x3a6e), .driver_data = AZX_DRIVER_ICH }, - /* PCH */ - { PCI_DEVICE(0x8086, 0x3b56), .driver_data = AZX_DRIVER_ICH }, -+ /* CPT */ -+ { PCI_DEVICE(0x8086, 0x1c20), .driver_data = AZX_DRIVER_PCH }, - /* SCH */ - { PCI_DEVICE(0x8086, 0x811b), .driver_data = AZX_DRIVER_SCH }, - /* ATI SB 450/600 */ -diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c -index 7069441..263bf3b 100644 ---- a/sound/pci/hda/patch_analog.c -+++ b/sound/pci/hda/patch_analog.c -@@ -1805,6 +1805,14 @@ static int patch_ad1981(struct hda_codec *codec) - case AD1981_THINKPAD: - spec->mixers[0] = ad1981_thinkpad_mixers; - spec->input_mux = &ad1981_thinkpad_capture_source; -+ /* set the upper-limit for mixer amp to 0dB for avoiding the -+ * possible damage by overloading -+ */ -+ snd_hda_override_amp_caps(codec, 0x11, HDA_INPUT, -+ (0x17 << AC_AMPCAP_OFFSET_SHIFT) | -+ (0x17 << AC_AMPCAP_NUM_STEPS_SHIFT) | -+ (0x05 << AC_AMPCAP_STEP_SIZE_SHIFT) | -+ (1 << AC_AMPCAP_MUTE_SHIFT)); - break; - case AD1981_TOSHIBA: - spec->mixers[0] = ad1981_hp_mixers; -diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c -index a79f841..bd8a567 100644 ---- a/sound/pci/hda/patch_realtek.c -+++ b/sound/pci/hda/patch_realtek.c -@@ -9074,6 +9074,7 @@ static struct snd_pci_quirk alc882_cfg_tbl[] = { - SND_PCI_QUIRK(0x1462, 0xaa08, "MSI", ALC883_TARGA_2ch_DIG), - - SND_PCI_QUIRK(0x147b, 0x1083, "Abit IP35-PRO", ALC883_6ST_DIG), -+ SND_PCI_QUIRK(0x1558, 0x0571, "Clevo laptop M570U", ALC883_3ST_6ch_DIG), - SND_PCI_QUIRK(0x1558, 0x0721, "Clevo laptop M720R", ALC883_CLEVO_M720), - SND_PCI_QUIRK(0x1558, 0x0722, "Clevo laptop M720SR", ALC883_CLEVO_M720), - SND_PCI_QUIRK(0x1558, 0x5409, "Clevo laptop M540R", ALC883_CLEVO_M540R), -diff --git a/sound/pci/mixart/mixart.c b/sound/pci/mixart/mixart.c -index a83d196..32f9853 100644 ---- a/sound/pci/mixart/mixart.c -+++ b/sound/pci/mixart/mixart.c -@@ -1161,13 +1161,15 @@ static long snd_mixart_BA0_read(struct snd_info_entry *entry, void *file_private - unsigned long count, unsigned long pos) - { - struct mixart_mgr *mgr = entry->private_data; -+ unsigned long maxsize; - -- count = count & ~3; /* make sure the read size is a multiple of 4 bytes */ -- if(count <= 0) -+ if (pos >= MIXART_BA0_SIZE) - return 0; -- if(pos + count > MIXART_BA0_SIZE) -- count = (long)(MIXART_BA0_SIZE - pos); -- if(copy_to_user_fromio(buf, MIXART_MEM( mgr, pos ), count)) -+ maxsize = MIXART_BA0_SIZE - pos; -+ if (count > maxsize) -+ count = maxsize; -+ count = count & ~3; /* make sure the read size is a multiple of 4 bytes */ -+ if (copy_to_user_fromio(buf, MIXART_MEM(mgr, pos), count)) - return -EFAULT; - return count; - } -@@ -1180,13 +1182,15 @@ static long snd_mixart_BA1_read(struct snd_info_entry *entry, void *file_private - unsigned long count, unsigned long pos) - { - struct mixart_mgr *mgr = entry->private_data; -+ unsigned long maxsize; - -- count = count & ~3; /* make sure the read size is a multiple of 4 bytes */ -- if(count <= 0) -+ if (pos > MIXART_BA1_SIZE) - return 0; -- if(pos + count > MIXART_BA1_SIZE) -- count = (long)(MIXART_BA1_SIZE - pos); -- if(copy_to_user_fromio(buf, MIXART_REG( mgr, pos ), count)) -+ maxsize = MIXART_BA1_SIZE - pos; -+ if (count > maxsize) -+ count = maxsize; -+ count = count & ~3; /* make sure the read size is a multiple of 4 bytes */ -+ if (copy_to_user_fromio(buf, MIXART_REG(mgr, pos), count)) - return -EFAULT; - return count; - } -diff --git a/sound/usb/usbmidi.c b/sound/usb/usbmidi.c -index b2da478..c7cb207 100644 ---- a/sound/usb/usbmidi.c -+++ b/sound/usb/usbmidi.c -@@ -984,6 +984,8 @@ static void snd_usbmidi_output_drain(struct snd_rawmidi_substream *substream) - DEFINE_WAIT(wait); - long timeout = msecs_to_jiffies(50); - -+ if (ep->umidi->disconnected) -+ return; - /* - * The substream buffer is empty, but some data might still be in the - * currently active URBs, so we have to wait for those to complete. -@@ -1121,14 +1123,21 @@ static int snd_usbmidi_in_endpoint_create(struct snd_usb_midi* umidi, - * Frees an output endpoint. - * May be called when ep hasn't been initialized completely. - */ --static void snd_usbmidi_out_endpoint_delete(struct snd_usb_midi_out_endpoint* ep) -+static void snd_usbmidi_out_endpoint_clear(struct snd_usb_midi_out_endpoint *ep) - { - unsigned int i; - - for (i = 0; i < OUTPUT_URBS; ++i) -- if (ep->urbs[i].urb) -+ if (ep->urbs[i].urb) { - free_urb_and_buffer(ep->umidi, ep->urbs[i].urb, - ep->max_transfer); -+ ep->urbs[i].urb = NULL; -+ } -+} -+ -+static void snd_usbmidi_out_endpoint_delete(struct snd_usb_midi_out_endpoint *ep) -+{ -+ snd_usbmidi_out_endpoint_clear(ep); - kfree(ep); - } - -@@ -1260,15 +1269,18 @@ void snd_usbmidi_disconnect(struct list_head* p) - usb_kill_urb(ep->out->urbs[j].urb); - if (umidi->usb_protocol_ops->finish_out_endpoint) - umidi->usb_protocol_ops->finish_out_endpoint(ep->out); -+ ep->out->active_urbs = 0; -+ if (ep->out->drain_urbs) { -+ ep->out->drain_urbs = 0; -+ wake_up(&ep->out->drain_wait); -+ } - } - if (ep->in) - for (j = 0; j < INPUT_URBS; ++j) - usb_kill_urb(ep->in->urbs[j]); - /* free endpoints here; later call can result in Oops */ -- if (ep->out) { -- snd_usbmidi_out_endpoint_delete(ep->out); -- ep->out = NULL; -- } -+ if (ep->out) -+ snd_usbmidi_out_endpoint_clear(ep->out); - if (ep->in) { - snd_usbmidi_in_endpoint_delete(ep->in); - ep->in = NULL; -diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c -index a944be3..9dd98cb 100644 ---- a/virt/kvm/kvm_main.c -+++ b/virt/kvm/kvm_main.c -@@ -636,7 +636,7 @@ skip_lpage: - - /* Allocate page dirty bitmap if needed */ - if ((new.flags & KVM_MEM_LOG_DIRTY_PAGES) && !new.dirty_bitmap) { -- unsigned dirty_bytes = ALIGN(npages, BITS_PER_LONG) / 8; -+ unsigned long dirty_bytes = kvm_dirty_bitmap_bytes(&new); - - new.dirty_bitmap = vmalloc(dirty_bytes); - if (!new.dirty_bitmap) -@@ -719,7 +719,7 @@ int kvm_get_dirty_log(struct kvm *kvm, - { - struct kvm_memory_slot *memslot; - int r, i; -- int n; -+ unsigned long n; - unsigned long any = 0; - - r = -EINVAL; -@@ -731,7 +731,7 @@ int kvm_get_dirty_log(struct kvm *kvm, - if (!memslot->dirty_bitmap) - goto out; - -- n = ALIGN(memslot->npages, BITS_PER_LONG) / 8; -+ n = kvm_dirty_bitmap_bytes(memslot); - - for (i = 0; !any && i < n/sizeof(long); ++i) - any = memslot->dirty_bitmap[i]; -@@ -1073,10 +1073,13 @@ void mark_page_dirty(struct kvm *kvm, gfn_t gfn) - memslot = gfn_to_memslot_unaliased(kvm, gfn); - if (memslot && memslot->dirty_bitmap) { - unsigned long rel_gfn = gfn - memslot->base_gfn; -+ unsigned long *p = memslot->dirty_bitmap + -+ rel_gfn / BITS_PER_LONG; -+ int offset = rel_gfn % BITS_PER_LONG; - - /* avoid RMW */ -- if (!generic_test_le_bit(rel_gfn, memslot->dirty_bitmap)) -- generic___set_le_bit(rel_gfn, memslot->dirty_bitmap); -+ if (!generic_test_le_bit(offset, p)) -+ generic___set_le_bit(offset, p); - } - } - diff --git a/debian/patches/bugfix/all/tipc-fix-oops-on-send-prior-to-entering-networked-mode.patch b/debian/patches/bugfix/all/tipc-fix-oops-on-send-prior-to-entering-networked-mode.patch deleted file mode 100644 index 9f95b59f4..000000000 --- a/debian/patches/bugfix/all/tipc-fix-oops-on-send-prior-to-entering-networked-mode.patch +++ /dev/null @@ -1,209 +0,0 @@ -commit d0021b252eaf65ca07ed14f0d66425dd9ccab9a6 -Author: Neil Horman -Date: Wed Mar 3 08:31:23 2010 +0000 - - tipc: Fix oops on send prior to entering networked mode (v3) - - Fix TIPC to disallow sending to remote addresses prior to entering NET_MODE - - user programs can oops the kernel by sending datagrams via AF_TIPC prior to - entering networked mode. The following backtrace has been observed: - - ID: 13459 TASK: ffff810014640040 CPU: 0 COMMAND: "tipc-client" - [exception RIP: tipc_node_select_next_hop+90] - RIP: ffffffff8869d3c3 RSP: ffff81002d9a5ab8 RFLAGS: 00010202 - RAX: 0000000000000001 RBX: 0000000000000001 RCX: 0000000000000001 - RDX: 0000000000000000 RSI: 0000000000000001 RDI: 0000000001001001 - RBP: 0000000001001001 R8: 0074736575716552 R9: 0000000000000000 - R10: ffff81003fbd0680 R11: 00000000000000c8 R12: 0000000000000008 - R13: 0000000000000001 R14: 0000000000000001 R15: ffff810015c6ca00 - ORIG_RAX: ffffffffffffffff CS: 0010 SS: 0018 - RIP: 0000003cbd8d49a3 RSP: 00007fffc84e0be8 RFLAGS: 00010206 - RAX: 000000000000002c RBX: ffffffff8005d116 RCX: 0000000000000000 - RDX: 0000000000000008 RSI: 00007fffc84e0c00 RDI: 0000000000000003 - RBP: 0000000000000000 R8: 00007fffc84e0c10 R9: 0000000000000010 - R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000 - R13: 00007fffc84e0d10 R14: 0000000000000000 R15: 00007fffc84e0c30 - ORIG_RAX: 000000000000002c CS: 0033 SS: 002b - - What happens is that, when the tipc module in inserted it enters a standalone - node mode in which communication to its own address is allowed <0.0.0> but not - to other addresses, since the appropriate data structures have not been - allocated yet (specifically the tipc_net pointer). There is nothing stopping a - client from trying to send such a message however, and if that happens, we - attempt to dereference tipc_net.zones while the pointer is still NULL, and - explode. The fix is pretty straightforward. Since these oopses all arise from - the dereference of global pointers prior to their assignment to allocated - values, and since these allocations are small (about 2k total), lets convert - these pointers to static arrays of the appropriate size. All the accesses to - these bits consider 0/NULL to be a non match when searching, so all the lookups - still work properly, and there is no longer a chance of a bad dererence - anywhere. As a bonus, this lets us eliminate the setup/teardown routines for - those pointers, and elimnates the need to preform any locking around them to - prevent access while their being allocated/freed. - - I've updated the tipc_net structure to behave this way to fix the exact reported - problem, and also fixed up the tipc_bearers and media_list arrays to fix an - obvious simmilar problem that arises from issuing tipc-config commands to - manipulate bearers/links prior to entering networked mode - - I've tested this for a few hours by running the sanity tests and stress test - with the tipcutils suite, and nothing has fallen over. There have been a few - lockdep warnings, but those were there before, and can be addressed later, as - they didn't actually result in any deadlock. - - Signed-off-by: Neil Horman - CC: Allan Stephens - CC: David S. Miller - CC: tipc-discussion@lists.sourceforge.net - - bearer.c | 37 ++++++------------------------------- - bearer.h | 2 +- - net.c | 25 ++++--------------------- - 3 files changed, 11 insertions(+), 53 deletions(-) - Signed-off-by: David S. Miller - -diff --git a/net/tipc/bearer.c b/net/tipc/bearer.c -index 327011f..7809137 100644 ---- a/net/tipc/bearer.c -+++ b/net/tipc/bearer.c -@@ -45,10 +45,10 @@ - - #define MAX_ADDR_STR 32 - --static struct media *media_list = NULL; -+static struct media media_list[MAX_MEDIA]; - static u32 media_count = 0; - --struct bearer *tipc_bearers = NULL; -+struct bearer tipc_bearers[MAX_BEARERS]; - - /** - * media_name_valid - validate media name -@@ -108,9 +108,11 @@ int tipc_register_media(u32 media_type, - int res = -EINVAL; - - write_lock_bh(&tipc_net_lock); -- if (!media_list) -- goto exit; - -+ if (tipc_mode != TIPC_NET_MODE) { -+ warn("Media <%s> rejected, not in networked mode yet\n", name); -+ goto exit; -+ } - if (!media_name_valid(name)) { - warn("Media <%s> rejected, illegal name\n", name); - goto exit; -@@ -660,33 +662,10 @@ int tipc_disable_bearer(const char *name) - - - --int tipc_bearer_init(void) --{ -- int res; -- -- write_lock_bh(&tipc_net_lock); -- tipc_bearers = kcalloc(MAX_BEARERS, sizeof(struct bearer), GFP_ATOMIC); -- media_list = kcalloc(MAX_MEDIA, sizeof(struct media), GFP_ATOMIC); -- if (tipc_bearers && media_list) { -- res = 0; -- } else { -- kfree(tipc_bearers); -- kfree(media_list); -- tipc_bearers = NULL; -- media_list = NULL; -- res = -ENOMEM; -- } -- write_unlock_bh(&tipc_net_lock); -- return res; --} -- - void tipc_bearer_stop(void) - { - u32 i; - -- if (!tipc_bearers) -- return; -- - for (i = 0; i < MAX_BEARERS; i++) { - if (tipc_bearers[i].active) - tipc_bearers[i].publ.blocked = 1; -@@ -695,10 +674,6 @@ void tipc_bearer_stop(void) - if (tipc_bearers[i].active) - bearer_disable(tipc_bearers[i].publ.name); - } -- kfree(tipc_bearers); -- kfree(media_list); -- tipc_bearers = NULL; -- media_list = NULL; - media_count = 0; - } - -diff --git a/net/tipc/bearer.h b/net/tipc/bearer.h -index ca57348..000228e 100644 ---- a/net/tipc/bearer.h -+++ b/net/tipc/bearer.h -@@ -114,7 +114,7 @@ struct bearer_name { - - struct link; - --extern struct bearer *tipc_bearers; -+extern struct bearer tipc_bearers[]; - - void tipc_media_addr_printf(struct print_buf *pb, struct tipc_media_addr *a); - struct sk_buff *tipc_media_get_names(void); -diff --git a/net/tipc/net.c b/net/tipc/net.c -index 7906608..f25b1cd 100644 ---- a/net/tipc/net.c -+++ b/net/tipc/net.c -@@ -116,7 +116,8 @@ - */ - - DEFINE_RWLOCK(tipc_net_lock); --struct network tipc_net = { NULL }; -+struct _zone *tipc_zones[256] = { NULL, }; -+struct network tipc_net = { tipc_zones }; - - struct tipc_node *tipc_net_select_remote_node(u32 addr, u32 ref) - { -@@ -158,28 +159,12 @@ void tipc_net_send_external_routes(u32 dest) - } - } - --static int net_init(void) --{ -- memset(&tipc_net, 0, sizeof(tipc_net)); -- tipc_net.zones = kcalloc(tipc_max_zones + 1, sizeof(struct _zone *), GFP_ATOMIC); -- if (!tipc_net.zones) { -- return -ENOMEM; -- } -- return 0; --} -- - static void net_stop(void) - { - u32 z_num; - -- if (!tipc_net.zones) -- return; -- -- for (z_num = 1; z_num <= tipc_max_zones; z_num++) { -+ for (z_num = 1; z_num <= tipc_max_zones; z_num++) - tipc_zone_delete(tipc_net.zones[z_num]); -- } -- kfree(tipc_net.zones); -- tipc_net.zones = NULL; - } - - static void net_route_named_msg(struct sk_buff *buf) -@@ -282,9 +267,7 @@ int tipc_net_start(u32 addr) - tipc_named_reinit(); - tipc_port_reinit(); - -- if ((res = tipc_bearer_init()) || -- (res = net_init()) || -- (res = tipc_cltr_init()) || -+ if ((res = tipc_cltr_init()) || - (res = tipc_bclink_init())) { - return res; - } diff --git a/debian/patches/bugfix/powerpc/kgdb-dont-needlessly-skip-PAGE_USER-test-for-Fsl-booke.patch b/debian/patches/bugfix/powerpc/kgdb-dont-needlessly-skip-PAGE_USER-test-for-Fsl-booke.patch deleted file mode 100644 index 758531f43..000000000 --- a/debian/patches/bugfix/powerpc/kgdb-dont-needlessly-skip-PAGE_USER-test-for-Fsl-booke.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 56151e753468e34aeb322af4b0309ab727c97d2e Mon Sep 17 00:00:00 2001 -From: Wufei -Date: Wed, 28 Apr 2010 17:42:32 -0400 -Subject: [PATCH] kgdb: don't needlessly skip PAGE_USER test for Fsl booke - -The bypassing of this test is a leftover from 2.4 vintage -kernels, and is no longer appropriate, or even used by KGDB. -Currently KGDB uses probe_kernel_write() for all access to -memory via the KGDB core, so it can simply be deleted. - -This fixes CVE-2010-1446. - -CC: Benjamin Herrenschmidt -CC: Paul Mackerras -CC: Kumar Gala -Signed-off-by: Wufei -Signed-off-by: Jason Wessel ---- - arch/powerpc/mm/fsl_booke_mmu.c | 5 ----- - 1 files changed, 0 insertions(+), 5 deletions(-) - -diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c -index c539472..1ce9dd5 100644 ---- a/arch/powerpc/mm/fsl_booke_mmu.c -+++ b/arch/powerpc/mm/fsl_booke_mmu.c -@@ -155,15 +155,10 @@ static void settlbcam(int index, unsigned long virt, phys_addr_t phys, - if (cur_cpu_spec->cpu_features & MMU_FTR_BIG_PHYS) - TLBCAM[index].MAS7 = (u64)phys >> 32; - --#ifndef CONFIG_KGDB /* want user access for breakpoints */ - if (flags & _PAGE_USER) { - TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR; - TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0); - } --#else -- TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR; -- TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0); --#endif - - tlbcam_addrs[index].start = virt; - tlbcam_addrs[index].limit = virt + size - 1; --- -1.7.0.3 - diff --git a/debian/patches/debian/dfsg/drivers-staging-otus-disable.patch b/debian/patches/debian/dfsg/drivers-staging-otus-disable.patch index b7dc8b190..7d360ce2c 100644 --- a/debian/patches/debian/dfsg/drivers-staging-otus-disable.patch +++ b/debian/patches/debian/dfsg/drivers-staging-otus-disable.patch @@ -5,5 +5,5 @@ tristate "Atheros OTUS 802.11n USB wireless support" + depends on BROKEN depends on USB && WLAN && MAC80211 - default N - ---help--- + select WIRELESS_EXT + select WEXT_PRIV diff --git a/debian/patches/debian/dfsg/drivers-staging-rtl8192su-disable.patch b/debian/patches/debian/dfsg/drivers-staging-rtl8192su-disable.patch index e4fd5b065..393bd9973 100644 --- a/debian/patches/debian/dfsg/drivers-staging-rtl8192su-disable.patch +++ b/debian/patches/debian/dfsg/drivers-staging-rtl8192su-disable.patch @@ -5,7 +5,6 @@ index 123fa6d..5e081b1 100644 @@ -2,5 +2,6 @@ config RTL8192SU tristate "RealTek RTL8192SU Wireless LAN NIC driver" depends on PCI && WLAN && USB - depends on WIRELESS_EXT + depends on BROKEN - default N - ---help--- + select WIRELESS_EXT + select WEXT_PRIV diff --git a/debian/patches/debian/dfsg/firmware-cleanup.patch b/debian/patches/debian/dfsg/firmware-cleanup.patch index 8a44a99b6..42c60a9bc 100644 --- a/debian/patches/debian/dfsg/firmware-cleanup.patch +++ b/debian/patches/debian/dfsg/firmware-cleanup.patch @@ -18,11 +18,11 @@ index 1c00d05..3bf888d 100644 - adaptec/starfire_tx.bin fw-shipped-$(CONFIG_ATARI_DSP56K) += dsp56k/bootstrap.bin -fw-shipped-$(CONFIG_ATM_AMBASSADOR) += atmsar11.fw --fw-shipped-$(CONFIG_BNX2X) += bnx2x-e1-5.2.7.0.fw bnx2x-e1h-5.2.7.0.fw --fw-shipped-$(CONFIG_BNX2) += bnx2/bnx2-mips-09-5.0.0.j3.fw \ -- bnx2/bnx2-rv2p-09-5.0.0.j3.fw \ -- bnx2/bnx2-rv2p-09ax-5.0.0.j3.fw \ -- bnx2/bnx2-mips-06-5.0.0.j3.fw \ +-fw-shipped-$(CONFIG_BNX2X) += bnx2x-e1-5.2.13.0.fw bnx2x-e1h-5.2.13.0.fw +-fw-shipped-$(CONFIG_BNX2) += bnx2/bnx2-mips-09-5.0.0.j9.fw \ +- bnx2/bnx2-rv2p-09-5.0.0.j10.fw \ +- bnx2/bnx2-rv2p-09ax-5.0.0.j10.fw \ +- bnx2/bnx2-mips-06-5.0.0.j6.fw \ - bnx2/bnx2-rv2p-06-5.0.0.j3.fw -fw-shipped-$(CONFIG_CASSINI) += sun/cassini.bin -fw-shipped-$(CONFIG_COMPUTONE) += intelliport2.bin diff --git a/debian/patches/debian/dfsg/radeon-add-clarifying-comment-to-r600-blit.patch b/debian/patches/debian/dfsg/radeon-add-clarifying-comment-to-r600-blit.patch deleted file mode 100644 index 6d7726785..000000000 --- a/debian/patches/debian/dfsg/radeon-add-clarifying-comment-to-r600-blit.patch +++ /dev/null @@ -1,42 +0,0 @@ -From ef75f31784181c33ee7d42e361ad8d04947a2153 Mon Sep 17 00:00:00 2001 -From: Alex Deucher -Date: Mon, 2 Nov 2009 19:51:42 -0500 -Subject: [PATCH] drm/radeon/r600: add clarifying comment to r600 blit code - -R6xx+ cards need to use the 3D engine to blit data which requires -quite a bit of hw state setup. Rather than pull the whole 3D driver -(which normally generates the 3D state) into the DRM, we opt to use -statically generated state tables. The regsiter state and shaders -were hand generated to support blitting functionality. See the 3D -driver or documentation for descriptions of the registers and -shader instructions. - -Signed-off-by: Alex Deucher ---- - drivers/gpu/drm/radeon/r600_blit_shaders.c | 10 ++++++++++ - 1 files changed, 10 insertions(+), 0 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gpu/drm/radeon/r600_blit_shaders.c -index d745e81..5d479cf 100644 ---- a/drivers/gpu/drm/radeon/r600_blit_shaders.c -+++ b/drivers/gpu/drm/radeon/r600_blit_shaders.c -@@ -2,6 +2,16 @@ - #include - #include - -+/* -+ * R6xx+ cards need to use the 3D engine to blit data which requires -+ * quite a bit of hw state setup. Rather than pull the whole 3D driver -+ * (which normally generates the 3D state) into the DRM, we opt to use -+ * statically generated state tables. The regsiter state and shaders -+ * were hand generated to support blitting functionality. See the 3D -+ * driver or documentation for descriptions of the registers and -+ * shader instructions. -+ */ -+ - const u32 r6xx_default_state[] = - { - 0xc0002400, --- -1.5.6.3 - diff --git a/debian/patches/features/all/drm-radeon-evergreen.patch b/debian/patches/features/all/drm-radeon-evergreen.patch deleted file mode 100644 index ac608851e..000000000 --- a/debian/patches/features/all/drm-radeon-evergreen.patch +++ /dev/null @@ -1,11729 +0,0 @@ -From: Dave Airlie -Date: Thu Apr 8 03:08:33 2010 UTC -Subject: Backport radeon r800 modesetting support -diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile -index 1cc7b93..83c5907 100644 ---- a/drivers/gpu/drm/radeon/Makefile -+++ b/drivers/gpu/drm/radeon/Makefile -@@ -54,7 +54,8 @@ radeon-y += radeon_device.o radeon_kms.o \ - radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ - rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \ - r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \ -- r600_blit_kms.o radeon_pm.o atombios_dp.o r600_audio.o r600_hdmi.o -+ r600_blit_kms.o radeon_pm.o atombios_dp.o r600_audio.o r600_hdmi.o \ -+ evergreen.o - - radeon-$(CONFIG_COMPAT) += radeon_ioc32.o - -diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c -index d75788f..b7fe660 100644 ---- a/drivers/gpu/drm/radeon/atom.c -+++ b/drivers/gpu/drm/radeon/atom.c -@@ -52,15 +52,17 @@ - - typedef struct { - struct atom_context *ctx; -- - uint32_t *ps, *ws; - int ps_shift; - uint16_t start; -+ unsigned last_jump; -+ unsigned long last_jump_jiffies; -+ bool abort; - } atom_exec_context; - - int atom_debug = 0; --static void atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params); --void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params); -+static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params); -+int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params); - - static uint32_t atom_arg_mask[8] = - { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000, -@@ -604,12 +606,17 @@ static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg) - static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg) - { - int idx = U8((*ptr)++); -+ int r = 0; -+ - if (idx < ATOM_TABLE_NAMES_CNT) - SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]); - else - SDEBUG(" table: %d\n", idx); - if (U16(ctx->ctx->cmd_table + 4 + 2 * idx)) -- atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift); -+ r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift); -+ if (r) { -+ ctx->abort = true; -+ } - } - - static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg) -@@ -673,6 +680,8 @@ static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg) - static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg) - { - int execute = 0, target = U16(*ptr); -+ unsigned long cjiffies; -+ - (*ptr) += 2; - switch (arg) { - case ATOM_COND_ABOVE: -@@ -700,8 +709,25 @@ static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg) - if (arg != ATOM_COND_ALWAYS) - SDEBUG(" taken: %s\n", execute ? "yes" : "no"); - SDEBUG(" target: 0x%04X\n", target); -- if (execute) -+ if (execute) { -+ if (ctx->last_jump == (ctx->start + target)) { -+ cjiffies = jiffies; -+ if (time_after(cjiffies, ctx->last_jump_jiffies)) { -+ cjiffies -= ctx->last_jump_jiffies; -+ if ((jiffies_to_msecs(cjiffies) > 1000)) { -+ DRM_ERROR("atombios stuck in loop for more than 1sec aborting\n"); -+ ctx->abort = true; -+ } -+ } else { -+ /* jiffies wrap around we will just wait a little longer */ -+ ctx->last_jump_jiffies = jiffies; -+ } -+ } else { -+ ctx->last_jump = ctx->start + target; -+ ctx->last_jump_jiffies = jiffies; -+ } - *ptr = ctx->start + target; -+ } - } - - static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg) -@@ -1104,7 +1130,7 @@ static struct { - atom_op_shr, ATOM_ARG_MC}, { - atom_op_debug, 0},}; - --static void atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params) -+static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params) - { - int base = CU16(ctx->cmd_table + 4 + 2 * index); - int len, ws, ps, ptr; -@@ -1112,7 +1138,7 @@ static void atom_execute_table_locked(struct atom_context *ctx, int index, uint3 - atom_exec_context ectx; - - if (!base) -- return; -+ return -EINVAL; - - len = CU16(base + ATOM_CT_SIZE_PTR); - ws = CU8(base + ATOM_CT_WS_PTR); -@@ -1125,6 +1151,8 @@ static void atom_execute_table_locked(struct atom_context *ctx, int index, uint3 - ectx.ps_shift = ps / 4; - ectx.start = base; - ectx.ps = params; -+ ectx.abort = false; -+ ectx.last_jump = 0; - if (ws) - ectx.ws = kzalloc(4 * ws, GFP_KERNEL); - else -@@ -1137,6 +1165,11 @@ static void atom_execute_table_locked(struct atom_context *ctx, int index, uint3 - SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1); - else - SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1); -+ if (ectx.abort) { -+ DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n", -+ base, len, ws, ps, ptr - 1); -+ return -EINVAL; -+ } - - if (op < ATOM_OP_CNT && op > 0) - opcode_table[op].func(&ectx, &ptr, -@@ -1152,10 +1185,13 @@ static void atom_execute_table_locked(struct atom_context *ctx, int index, uint3 - - if (ws) - kfree(ectx.ws); -+ return 0; - } - --void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) -+int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) - { -+ int r; -+ - mutex_lock(&ctx->mutex); - /* reset reg block */ - ctx->reg_block = 0; -@@ -1163,8 +1199,9 @@ void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) - ctx->fb_base = 0; - /* reset io mode */ - ctx->io_mode = ATOM_IO_MM; -- atom_execute_table_locked(ctx, index, params); -+ r = atom_execute_table_locked(ctx, index, params); - mutex_unlock(&ctx->mutex); -+ return r; - } - - static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 }; -@@ -1248,9 +1285,7 @@ int atom_asic_init(struct atom_context *ctx) - - if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT)) - return 1; -- atom_execute_table(ctx, ATOM_CMD_INIT, ps); -- -- return 0; -+ return atom_execute_table(ctx, ATOM_CMD_INIT, ps); - } - - void atom_destroy(struct atom_context *ctx) -diff --git a/drivers/gpu/drm/radeon/atom.h b/drivers/gpu/drm/radeon/atom.h -index bc73781..1b26263 100644 ---- a/drivers/gpu/drm/radeon/atom.h -+++ b/drivers/gpu/drm/radeon/atom.h -@@ -140,7 +140,7 @@ struct atom_context { - extern int atom_debug; - - struct atom_context *atom_parse(struct card_info *, void *); --void atom_execute_table(struct atom_context *, int, uint32_t *); -+int atom_execute_table(struct atom_context *, int, uint32_t *); - int atom_asic_init(struct atom_context *); - void atom_destroy(struct atom_context *); - void atom_parse_data_header(struct atom_context *ctx, int index, uint16_t *size, uint8_t *frev, uint8_t *crev, uint16_t *data_start); -diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h -index 91ad0d1..6732b5d 100644 ---- a/drivers/gpu/drm/radeon/atombios.h -+++ b/drivers/gpu/drm/radeon/atombios.h -@@ -1,5 +1,5 @@ - /* -- * Copyright 2006-2007 Advanced Micro Devices, Inc. -+ * Copyright 2006-2007 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), -@@ -20,10 +20,12 @@ - * OTHER DEALINGS IN THE SOFTWARE. - */ - --/****************************************************************************/ -+ -+/****************************************************************************/ - /*Portion I: Definitions shared between VBIOS and Driver */ - /****************************************************************************/ - -+ - #ifndef _ATOMBIOS_H - #define _ATOMBIOS_H - -@@ -40,39 +42,46 @@ - #endif - - #ifdef _H2INC --#ifndef ULONG --typedef unsigned long ULONG; --#endif -+ #ifndef ULONG -+ typedef unsigned long ULONG; -+ #endif - --#ifndef UCHAR --typedef unsigned char UCHAR; --#endif -+ #ifndef UCHAR -+ typedef unsigned char UCHAR; -+ #endif - --#ifndef USHORT --typedef unsigned short USHORT; --#endif -+ #ifndef USHORT -+ typedef unsigned short USHORT; -+ #endif - #endif -- --#define ATOM_DAC_A 0 -+ -+#define ATOM_DAC_A 0 - #define ATOM_DAC_B 1 - #define ATOM_EXT_DAC 2 - - #define ATOM_CRTC1 0 - #define ATOM_CRTC2 1 -+#define ATOM_CRTC3 2 -+#define ATOM_CRTC4 3 -+#define ATOM_CRTC5 4 -+#define ATOM_CRTC6 5 -+#define ATOM_CRTC_INVALID 0xFF - - #define ATOM_DIGA 0 - #define ATOM_DIGB 1 - - #define ATOM_PPLL1 0 - #define ATOM_PPLL2 1 -+#define ATOM_DCPLL 2 -+#define ATOM_PPLL_INVALID 0xFF - - #define ATOM_SCALER1 0 - #define ATOM_SCALER2 1 - --#define ATOM_SCALER_DISABLE 0 --#define ATOM_SCALER_CENTER 1 --#define ATOM_SCALER_EXPANSION 2 --#define ATOM_SCALER_MULTI_EX 3 -+#define ATOM_SCALER_DISABLE 0 -+#define ATOM_SCALER_CENTER 1 -+#define ATOM_SCALER_EXPANSION 2 -+#define ATOM_SCALER_MULTI_EX 3 - - #define ATOM_DISABLE 0 - #define ATOM_ENABLE 1 -@@ -82,6 +91,7 @@ typedef unsigned short USHORT; - #define ATOM_LCD_SELFTEST_START (ATOM_DISABLE+5) - #define ATOM_LCD_SELFTEST_STOP (ATOM_ENABLE+5) - #define ATOM_ENCODER_INIT (ATOM_DISABLE+7) -+#define ATOM_GET_STATUS (ATOM_DISABLE+8) - - #define ATOM_BLANKING 1 - #define ATOM_BLANKING_OFF 0 -@@ -114,7 +124,7 @@ typedef unsigned short USHORT; - #define ATOM_DAC2_CV ATOM_DAC1_CV - #define ATOM_DAC2_NTSC ATOM_DAC1_NTSC - #define ATOM_DAC2_PAL ATOM_DAC1_PAL -- -+ - #define ATOM_PM_ON 0 - #define ATOM_PM_STANDBY 1 - #define ATOM_PM_SUSPEND 2 -@@ -134,6 +144,7 @@ typedef unsigned short USHORT; - #define ATOM_PANEL_MISC_TEMPORAL 0x00000040 - #define ATOM_PANEL_MISC_API_ENABLED 0x00000080 - -+ - #define MEMTYPE_DDR1 "DDR1" - #define MEMTYPE_DDR2 "DDR2" - #define MEMTYPE_DDR3 "DDR3" -@@ -145,19 +156,19 @@ typedef unsigned short USHORT; - - /* Maximum size of that FireGL flag string */ - --#define ATOM_FIREGL_FLAG_STRING "FGL" /* Flag used to enable FireGL Support */ --#define ATOM_MAX_SIZE_OF_FIREGL_FLAG_STRING 3 /* sizeof( ATOM_FIREGL_FLAG_STRING ) */ -+#define ATOM_FIREGL_FLAG_STRING "FGL" //Flag used to enable FireGL Support -+#define ATOM_MAX_SIZE_OF_FIREGL_FLAG_STRING 3 //sizeof( ATOM_FIREGL_FLAG_STRING ) - --#define ATOM_FAKE_DESKTOP_STRING "DSK" /* Flag used to enable mobile ASIC on Desktop */ --#define ATOM_MAX_SIZE_OF_FAKE_DESKTOP_STRING ATOM_MAX_SIZE_OF_FIREGL_FLAG_STRING -+#define ATOM_FAKE_DESKTOP_STRING "DSK" //Flag used to enable mobile ASIC on Desktop -+#define ATOM_MAX_SIZE_OF_FAKE_DESKTOP_STRING ATOM_MAX_SIZE_OF_FIREGL_FLAG_STRING - --#define ATOM_M54T_FLAG_STRING "M54T" /* Flag used to enable M54T Support */ --#define ATOM_MAX_SIZE_OF_M54T_FLAG_STRING 4 /* sizeof( ATOM_M54T_FLAG_STRING ) */ -+#define ATOM_M54T_FLAG_STRING "M54T" //Flag used to enable M54T Support -+#define ATOM_MAX_SIZE_OF_M54T_FLAG_STRING 4 //sizeof( ATOM_M54T_FLAG_STRING ) - - #define HW_ASSISTED_I2C_STATUS_FAILURE 2 - #define HW_ASSISTED_I2C_STATUS_SUCCESS 1 - --#pragma pack(1) /* BIOS data must use byte aligment */ -+#pragma pack(1) /* BIOS data must use byte aligment */ - - /* Define offset to location of ROM header. */ - -@@ -165,367 +176,410 @@ typedef unsigned short USHORT; - #define OFFSET_TO_ATOM_ROM_IMAGE_SIZE 0x00000002L - - #define OFFSET_TO_ATOMBIOS_ASIC_BUS_MEM_TYPE 0x94 --#define MAXSIZE_OF_ATOMBIOS_ASIC_BUS_MEM_TYPE 20 /* including the terminator 0x0! */ -+#define MAXSIZE_OF_ATOMBIOS_ASIC_BUS_MEM_TYPE 20 /* including the terminator 0x0! */ - #define OFFSET_TO_GET_ATOMBIOS_STRINGS_NUMBER 0x002f - #define OFFSET_TO_GET_ATOMBIOS_STRINGS_START 0x006e - - /* Common header for all ROM Data tables. -- Every table pointed _ATOM_MASTER_DATA_TABLE has this common header. -+ Every table pointed _ATOM_MASTER_DATA_TABLE has this common header. - And the pointer actually points to this header. */ - --typedef struct _ATOM_COMMON_TABLE_HEADER { -- USHORT usStructureSize; -- UCHAR ucTableFormatRevision; /*Change it when the Parser is not backward compatible */ -- UCHAR ucTableContentRevision; /*Change it only when the table needs to change but the firmware */ -- /*Image can't be updated, while Driver needs to carry the new table! */ --} ATOM_COMMON_TABLE_HEADER; -- --typedef struct _ATOM_ROM_HEADER { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios, -- atombios should init it as "ATOM", don't change the position */ -- USHORT usBiosRuntimeSegmentAddress; -- USHORT usProtectedModeInfoOffset; -- USHORT usConfigFilenameOffset; -- USHORT usCRC_BlockOffset; -- USHORT usBIOS_BootupMessageOffset; -- USHORT usInt10Offset; -- USHORT usPciBusDevInitCode; -- USHORT usIoBaseAddress; -- USHORT usSubsystemVendorID; -- USHORT usSubsystemID; -- USHORT usPCI_InfoOffset; -- USHORT usMasterCommandTableOffset; /*Offset for SW to get all command table offsets, Don't change the position */ -- USHORT usMasterDataTableOffset; /*Offset for SW to get all data table offsets, Don't change the position */ -- UCHAR ucExtendedFunctionCode; -- UCHAR ucReserved; --} ATOM_ROM_HEADER; -+typedef struct _ATOM_COMMON_TABLE_HEADER -+{ -+ USHORT usStructureSize; -+ UCHAR ucTableFormatRevision; /*Change it when the Parser is not backward compatible */ -+ UCHAR ucTableContentRevision; /*Change it only when the table needs to change but the firmware */ -+ /*Image can't be updated, while Driver needs to carry the new table! */ -+}ATOM_COMMON_TABLE_HEADER; -+ -+typedef struct _ATOM_ROM_HEADER -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios, -+ atombios should init it as "ATOM", don't change the position */ -+ USHORT usBiosRuntimeSegmentAddress; -+ USHORT usProtectedModeInfoOffset; -+ USHORT usConfigFilenameOffset; -+ USHORT usCRC_BlockOffset; -+ USHORT usBIOS_BootupMessageOffset; -+ USHORT usInt10Offset; -+ USHORT usPciBusDevInitCode; -+ USHORT usIoBaseAddress; -+ USHORT usSubsystemVendorID; -+ USHORT usSubsystemID; -+ USHORT usPCI_InfoOffset; -+ USHORT usMasterCommandTableOffset; /*Offset for SW to get all command table offsets, Don't change the position */ -+ USHORT usMasterDataTableOffset; /*Offset for SW to get all data table offsets, Don't change the position */ -+ UCHAR ucExtendedFunctionCode; -+ UCHAR ucReserved; -+}ATOM_ROM_HEADER; - - /*==============================Command Table Portion==================================== */ - - #ifdef UEFI_BUILD --#define UTEMP USHORT --#define USHORT void* -+ #define UTEMP USHORT -+ #define USHORT void* - #endif - --typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES { -- USHORT ASIC_Init; /* Function Table, used by various SW components,latest version 1.1 */ -- USHORT GetDisplaySurfaceSize; /* Atomic Table, Used by Bios when enabling HW ICON */ -- USHORT ASIC_RegistersInit; /* Atomic Table, indirectly used by various SW components,called from ASIC_Init */ -- USHORT VRAM_BlockVenderDetection; /* Atomic Table, used only by Bios */ -- USHORT DIGxEncoderControl; /* Only used by Bios */ -- USHORT MemoryControllerInit; /* Atomic Table, indirectly used by various SW components,called from ASIC_Init */ -- USHORT EnableCRTCMemReq; /* Function Table,directly used by various SW components,latest version 2.1 */ -- USHORT MemoryParamAdjust; /* Atomic Table, indirectly used by various SW components,called from SetMemoryClock if needed */ -- USHORT DVOEncoderControl; /* Function Table,directly used by various SW components,latest version 1.2 */ -- USHORT GPIOPinControl; /* Atomic Table, only used by Bios */ -- USHORT SetEngineClock; /*Function Table,directly used by various SW components,latest version 1.1 */ -- USHORT SetMemoryClock; /* Function Table,directly used by various SW components,latest version 1.1 */ -- USHORT SetPixelClock; /*Function Table,directly used by various SW components,latest version 1.2 */ -- USHORT DynamicClockGating; /* Atomic Table, indirectly used by various SW components,called from ASIC_Init */ -- USHORT ResetMemoryDLL; /* Atomic Table, indirectly used by various SW components,called from SetMemoryClock */ -- USHORT ResetMemoryDevice; /* Atomic Table, indirectly used by various SW components,called from SetMemoryClock */ -- USHORT MemoryPLLInit; -- USHORT AdjustDisplayPll; /* only used by Bios */ -- USHORT AdjustMemoryController; /* Atomic Table, indirectly used by various SW components,called from SetMemoryClock */ -- USHORT EnableASIC_StaticPwrMgt; /* Atomic Table, only used by Bios */ -- USHORT ASIC_StaticPwrMgtStatusChange; /* Obsolete, only used by Bios */ -- USHORT DAC_LoadDetection; /* Atomic Table, directly used by various SW components,latest version 1.2 */ -- USHORT LVTMAEncoderControl; /* Atomic Table,directly used by various SW components,latest version 1.3 */ -- USHORT LCD1OutputControl; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT DAC1EncoderControl; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT DAC2EncoderControl; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT DVOOutputControl; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT CV1OutputControl; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT GetConditionalGoldenSetting; /* only used by Bios */ -- USHORT TVEncoderControl; /* Function Table,directly used by various SW components,latest version 1.1 */ -- USHORT TMDSAEncoderControl; /* Atomic Table, directly used by various SW components,latest version 1.3 */ -- USHORT LVDSEncoderControl; /* Atomic Table, directly used by various SW components,latest version 1.3 */ -- USHORT TV1OutputControl; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT EnableScaler; /* Atomic Table, used only by Bios */ -- USHORT BlankCRTC; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT EnableCRTC; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT GetPixelClock; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT EnableVGA_Render; /* Function Table,directly used by various SW components,latest version 1.1 */ -- USHORT EnableVGA_Access; /* Obsolete , only used by Bios */ -- USHORT SetCRTC_Timing; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT SetCRTC_OverScan; /* Atomic Table, used by various SW components,latest version 1.1 */ -- USHORT SetCRTC_Replication; /* Atomic Table, used only by Bios */ -- USHORT SelectCRTC_Source; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT EnableGraphSurfaces; /* Atomic Table, used only by Bios */ -- USHORT UpdateCRTC_DoubleBufferRegisters; -- USHORT LUT_AutoFill; /* Atomic Table, only used by Bios */ -- USHORT EnableHW_IconCursor; /* Atomic Table, only used by Bios */ -- USHORT GetMemoryClock; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT GetEngineClock; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT SetCRTC_UsingDTDTiming; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT ExternalEncoderControl; /* Atomic Table, directly used by various SW components,latest version 2.1 */ -- USHORT LVTMAOutputControl; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT VRAM_BlockDetectionByStrap; /* Atomic Table, used only by Bios */ -- USHORT MemoryCleanUp; /* Atomic Table, only used by Bios */ -- USHORT ProcessI2cChannelTransaction; /* Function Table,only used by Bios */ -- USHORT WriteOneByteToHWAssistedI2C; /* Function Table,indirectly used by various SW components */ -- USHORT ReadHWAssistedI2CStatus; /* Atomic Table, indirectly used by various SW components */ -- USHORT SpeedFanControl; /* Function Table,indirectly used by various SW components,called from ASIC_Init */ -- USHORT PowerConnectorDetection; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT MC_Synchronization; /* Atomic Table, indirectly used by various SW components,called from SetMemoryClock */ -- USHORT ComputeMemoryEnginePLL; /* Atomic Table, indirectly used by various SW components,called from SetMemory/EngineClock */ -- USHORT MemoryRefreshConversion; /* Atomic Table, indirectly used by various SW components,called from SetMemory or SetEngineClock */ -- USHORT VRAM_GetCurrentInfoBlock; /* Atomic Table, used only by Bios */ -- USHORT DynamicMemorySettings; /* Atomic Table, indirectly used by various SW components,called from SetMemoryClock */ -- USHORT MemoryTraining; /* Atomic Table, used only by Bios */ -- USHORT EnableSpreadSpectrumOnPPLL; /* Atomic Table, directly used by various SW components,latest version 1.2 */ -- USHORT TMDSAOutputControl; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT SetVoltage; /* Function Table,directly and/or indirectly used by various SW components,latest version 1.1 */ -- USHORT DAC1OutputControl; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT DAC2OutputControl; /* Atomic Table, directly used by various SW components,latest version 1.1 */ -- USHORT SetupHWAssistedI2CStatus; /* Function Table,only used by Bios, obsolete soon.Switch to use "ReadEDIDFromHWAssistedI2C" */ -- USHORT ClockSource; /* Atomic Table, indirectly used by various SW components,called from ASIC_Init */ -- USHORT MemoryDeviceInit; /* Atomic Table, indirectly used by various SW components,called from SetMemoryClock */ -- USHORT EnableYUV; /* Atomic Table, indirectly used by various SW components,called from EnableVGARender */ -- USHORT DIG1EncoderControl; /* Atomic Table,directly used by various SW components,latest version 1.1 */ -- USHORT DIG2EncoderControl; /* Atomic Table,directly used by various SW components,latest version 1.1 */ -- USHORT DIG1TransmitterControl; /* Atomic Table,directly used by various SW components,latest version 1.1 */ -- USHORT DIG2TransmitterControl; /* Atomic Table,directly used by various SW components,latest version 1.1 */ -- USHORT ProcessAuxChannelTransaction; /* Function Table,only used by Bios */ -- USHORT DPEncoderService; /* Function Table,only used by Bios */ --} ATOM_MASTER_LIST_OF_COMMAND_TABLES; -- --/* For backward compatible */ -+typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES{ -+ USHORT ASIC_Init; //Function Table, used by various SW components,latest version 1.1 -+ USHORT GetDisplaySurfaceSize; //Atomic Table, Used by Bios when enabling HW ICON -+ USHORT ASIC_RegistersInit; //Atomic Table, indirectly used by various SW components,called from ASIC_Init -+ USHORT VRAM_BlockVenderDetection; //Atomic Table, used only by Bios -+ USHORT DIGxEncoderControl; //Only used by Bios -+ USHORT MemoryControllerInit; //Atomic Table, indirectly used by various SW components,called from ASIC_Init -+ USHORT EnableCRTCMemReq; //Function Table,directly used by various SW components,latest version 2.1 -+ USHORT MemoryParamAdjust; //Atomic Table, indirectly used by various SW components,called from SetMemoryClock if needed -+ USHORT DVOEncoderControl; //Function Table,directly used by various SW components,latest version 1.2 -+ USHORT GPIOPinControl; //Atomic Table, only used by Bios -+ USHORT SetEngineClock; //Function Table,directly used by various SW components,latest version 1.1 -+ USHORT SetMemoryClock; //Function Table,directly used by various SW components,latest version 1.1 -+ USHORT SetPixelClock; //Function Table,directly used by various SW components,latest version 1.2 -+ USHORT DynamicClockGating; //Atomic Table, indirectly used by various SW components,called from ASIC_Init -+ USHORT ResetMemoryDLL; //Atomic Table, indirectly used by various SW components,called from SetMemoryClock -+ USHORT ResetMemoryDevice; //Atomic Table, indirectly used by various SW components,called from SetMemoryClock -+ USHORT MemoryPLLInit; -+ USHORT AdjustDisplayPll; //only used by Bios -+ USHORT AdjustMemoryController; //Atomic Table, indirectly used by various SW components,called from SetMemoryClock -+ USHORT EnableASIC_StaticPwrMgt; //Atomic Table, only used by Bios -+ USHORT ASIC_StaticPwrMgtStatusChange; //Obsolete , only used by Bios -+ USHORT DAC_LoadDetection; //Atomic Table, directly used by various SW components,latest version 1.2 -+ USHORT LVTMAEncoderControl; //Atomic Table,directly used by various SW components,latest version 1.3 -+ USHORT LCD1OutputControl; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT DAC1EncoderControl; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT DAC2EncoderControl; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT DVOOutputControl; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT CV1OutputControl; //Atomic Table, Atomic Table, Obsolete from Ry6xx, use DAC2 Output instead -+ USHORT GetConditionalGoldenSetting; //only used by Bios -+ USHORT TVEncoderControl; //Function Table,directly used by various SW components,latest version 1.1 -+ USHORT TMDSAEncoderControl; //Atomic Table, directly used by various SW components,latest version 1.3 -+ USHORT LVDSEncoderControl; //Atomic Table, directly used by various SW components,latest version 1.3 -+ USHORT TV1OutputControl; //Atomic Table, Obsolete from Ry6xx, use DAC2 Output instead -+ USHORT EnableScaler; //Atomic Table, used only by Bios -+ USHORT BlankCRTC; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT EnableCRTC; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT GetPixelClock; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT EnableVGA_Render; //Function Table,directly used by various SW components,latest version 1.1 -+ USHORT GetSCLKOverMCLKRatio; //Atomic Table, only used by Bios -+ USHORT SetCRTC_Timing; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT SetCRTC_OverScan; //Atomic Table, used by various SW components,latest version 1.1 -+ USHORT SetCRTC_Replication; //Atomic Table, used only by Bios -+ USHORT SelectCRTC_Source; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT EnableGraphSurfaces; //Atomic Table, used only by Bios -+ USHORT UpdateCRTC_DoubleBufferRegisters; -+ USHORT LUT_AutoFill; //Atomic Table, only used by Bios -+ USHORT EnableHW_IconCursor; //Atomic Table, only used by Bios -+ USHORT GetMemoryClock; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT GetEngineClock; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT SetCRTC_UsingDTDTiming; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT ExternalEncoderControl; //Atomic Table, directly used by various SW components,latest version 2.1 -+ USHORT LVTMAOutputControl; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT VRAM_BlockDetectionByStrap; //Atomic Table, used only by Bios -+ USHORT MemoryCleanUp; //Atomic Table, only used by Bios -+ USHORT ProcessI2cChannelTransaction; //Function Table,only used by Bios -+ USHORT WriteOneByteToHWAssistedI2C; //Function Table,indirectly used by various SW components -+ USHORT ReadHWAssistedI2CStatus; //Atomic Table, indirectly used by various SW components -+ USHORT SpeedFanControl; //Function Table,indirectly used by various SW components,called from ASIC_Init -+ USHORT PowerConnectorDetection; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT MC_Synchronization; //Atomic Table, indirectly used by various SW components,called from SetMemoryClock -+ USHORT ComputeMemoryEnginePLL; //Atomic Table, indirectly used by various SW components,called from SetMemory/EngineClock -+ USHORT MemoryRefreshConversion; //Atomic Table, indirectly used by various SW components,called from SetMemory or SetEngineClock -+ USHORT VRAM_GetCurrentInfoBlock; //Atomic Table, used only by Bios -+ USHORT DynamicMemorySettings; //Atomic Table, indirectly used by various SW components,called from SetMemoryClock -+ USHORT MemoryTraining; //Atomic Table, used only by Bios -+ USHORT EnableSpreadSpectrumOnPPLL; //Atomic Table, directly used by various SW components,latest version 1.2 -+ USHORT TMDSAOutputControl; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT SetVoltage; //Function Table,directly and/or indirectly used by various SW components,latest version 1.1 -+ USHORT DAC1OutputControl; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT DAC2OutputControl; //Atomic Table, directly used by various SW components,latest version 1.1 -+ USHORT SetupHWAssistedI2CStatus; //Function Table,only used by Bios, obsolete soon.Switch to use "ReadEDIDFromHWAssistedI2C" -+ USHORT ClockSource; //Atomic Table, indirectly used by various SW components,called from ASIC_Init -+ USHORT MemoryDeviceInit; //Atomic Table, indirectly used by various SW components,called from SetMemoryClock -+ USHORT EnableYUV; //Atomic Table, indirectly used by various SW components,called from EnableVGARender -+ USHORT DIG1EncoderControl; //Atomic Table,directly used by various SW components,latest version 1.1 -+ USHORT DIG2EncoderControl; //Atomic Table,directly used by various SW components,latest version 1.1 -+ USHORT DIG1TransmitterControl; //Atomic Table,directly used by various SW components,latest version 1.1 -+ USHORT DIG2TransmitterControl; //Atomic Table,directly used by various SW components,latest version 1.1 -+ USHORT ProcessAuxChannelTransaction; //Function Table,only used by Bios -+ USHORT DPEncoderService; //Function Table,only used by Bios -+}ATOM_MASTER_LIST_OF_COMMAND_TABLES; -+ -+// For backward compatible - #define ReadEDIDFromHWAssistedI2C ProcessI2cChannelTransaction - #define UNIPHYTransmitterControl DIG1TransmitterControl - #define LVTMATransmitterControl DIG2TransmitterControl - #define SetCRTC_DPM_State GetConditionalGoldenSetting - #define SetUniphyInstance ASIC_StaticPwrMgtStatusChange -+#define HPDInterruptService ReadHWAssistedI2CStatus -+#define EnableVGA_Access GetSCLKOverMCLKRatio - --typedef struct _ATOM_MASTER_COMMAND_TABLE { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_MASTER_LIST_OF_COMMAND_TABLES ListOfCommandTables; --} ATOM_MASTER_COMMAND_TABLE; -- --/****************************************************************************/ --/* Structures used in every command table */ --/****************************************************************************/ --typedef struct _ATOM_TABLE_ATTRIBUTE { -+typedef struct _ATOM_MASTER_COMMAND_TABLE -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_MASTER_LIST_OF_COMMAND_TABLES ListOfCommandTables; -+}ATOM_MASTER_COMMAND_TABLE; -+ -+/****************************************************************************/ -+// Structures used in every command table -+/****************************************************************************/ -+typedef struct _ATOM_TABLE_ATTRIBUTE -+{ - #if ATOM_BIG_ENDIAN -- USHORT UpdatedByUtility:1; /* [15]=Table updated by utility flag */ -- USHORT PS_SizeInBytes:7; /* [14:8]=Size of parameter space in Bytes (multiple of a dword), */ -- USHORT WS_SizeInBytes:8; /* [7:0]=Size of workspace in Bytes (in multiple of a dword), */ -+ USHORT UpdatedByUtility:1; //[15]=Table updated by utility flag -+ USHORT PS_SizeInBytes:7; //[14:8]=Size of parameter space in Bytes (multiple of a dword), -+ USHORT WS_SizeInBytes:8; //[7:0]=Size of workspace in Bytes (in multiple of a dword), - #else -- USHORT WS_SizeInBytes:8; /* [7:0]=Size of workspace in Bytes (in multiple of a dword), */ -- USHORT PS_SizeInBytes:7; /* [14:8]=Size of parameter space in Bytes (multiple of a dword), */ -- USHORT UpdatedByUtility:1; /* [15]=Table updated by utility flag */ -+ USHORT WS_SizeInBytes:8; //[7:0]=Size of workspace in Bytes (in multiple of a dword), -+ USHORT PS_SizeInBytes:7; //[14:8]=Size of parameter space in Bytes (multiple of a dword), -+ USHORT UpdatedByUtility:1; //[15]=Table updated by utility flag - #endif --} ATOM_TABLE_ATTRIBUTE; -- --typedef union _ATOM_TABLE_ATTRIBUTE_ACCESS { -- ATOM_TABLE_ATTRIBUTE sbfAccess; -- USHORT susAccess; --} ATOM_TABLE_ATTRIBUTE_ACCESS; -+}ATOM_TABLE_ATTRIBUTE; - --/****************************************************************************/ --/* Common header for all command tables. */ --/* Every table pointed by _ATOM_MASTER_COMMAND_TABLE has this common header. */ --/* And the pointer actually points to this header. */ --/****************************************************************************/ --typedef struct _ATOM_COMMON_ROM_COMMAND_TABLE_HEADER { -- ATOM_COMMON_TABLE_HEADER CommonHeader; -- ATOM_TABLE_ATTRIBUTE TableAttribute; --} ATOM_COMMON_ROM_COMMAND_TABLE_HEADER; -+typedef union _ATOM_TABLE_ATTRIBUTE_ACCESS -+{ -+ ATOM_TABLE_ATTRIBUTE sbfAccess; -+ USHORT susAccess; -+}ATOM_TABLE_ATTRIBUTE_ACCESS; -+ -+/****************************************************************************/ -+// Common header for all command tables. -+// Every table pointed by _ATOM_MASTER_COMMAND_TABLE has this common header. -+// And the pointer actually points to this header. -+/****************************************************************************/ -+typedef struct _ATOM_COMMON_ROM_COMMAND_TABLE_HEADER -+{ -+ ATOM_COMMON_TABLE_HEADER CommonHeader; -+ ATOM_TABLE_ATTRIBUTE TableAttribute; -+}ATOM_COMMON_ROM_COMMAND_TABLE_HEADER; - --/****************************************************************************/ --/* Structures used by ComputeMemoryEnginePLLTable */ --/****************************************************************************/ -+/****************************************************************************/ -+// Structures used by ComputeMemoryEnginePLLTable -+/****************************************************************************/ - #define COMPUTE_MEMORY_PLL_PARAM 1 - #define COMPUTE_ENGINE_PLL_PARAM 2 - --typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS { -- ULONG ulClock; /* When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div */ -- UCHAR ucAction; /* 0:reserved //1:Memory //2:Engine */ -- UCHAR ucReserved; /* may expand to return larger Fbdiv later */ -- UCHAR ucFbDiv; /* return value */ -- UCHAR ucPostDiv; /* return value */ --} COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS; -- --typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2 { -- ULONG ulClock; /* When return, [23:0] return real clock */ -- UCHAR ucAction; /* 0:reserved;COMPUTE_MEMORY_PLL_PARAM:Memory;COMPUTE_ENGINE_PLL_PARAM:Engine. it return ref_div to be written to register */ -- USHORT usFbDiv; /* return Feedback value to be written to register */ -- UCHAR ucPostDiv; /* return post div to be written to register */ --} COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2; -+typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS -+{ -+ ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div -+ UCHAR ucAction; //0:reserved //1:Memory //2:Engine -+ UCHAR ucReserved; //may expand to return larger Fbdiv later -+ UCHAR ucFbDiv; //return value -+ UCHAR ucPostDiv; //return value -+}COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS; -+ -+typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2 -+{ -+ ULONG ulClock; //When return, [23:0] return real clock -+ UCHAR ucAction; //0:reserved;COMPUTE_MEMORY_PLL_PARAM:Memory;COMPUTE_ENGINE_PLL_PARAM:Engine. it return ref_div to be written to register -+ USHORT usFbDiv; //return Feedback value to be written to register -+ UCHAR ucPostDiv; //return post div to be written to register -+}COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2; - #define COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_PS_ALLOCATION COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS - --#define SET_CLOCK_FREQ_MASK 0x00FFFFFF /* Clock change tables only take bit [23:0] as the requested clock value */ --#define USE_NON_BUS_CLOCK_MASK 0x01000000 /* Applicable to both memory and engine clock change, when set, it uses another clock as the temporary clock (engine uses memory and vice versa) */ --#define USE_MEMORY_SELF_REFRESH_MASK 0x02000000 /* Only applicable to memory clock change, when set, using memory self refresh during clock transition */ --#define SKIP_INTERNAL_MEMORY_PARAMETER_CHANGE 0x04000000 /* Only applicable to memory clock change, when set, the table will skip predefined internal memory parameter change */ --#define FIRST_TIME_CHANGE_CLOCK 0x08000000 /* Applicable to both memory and engine clock change,when set, it means this is 1st time to change clock after ASIC bootup */ --#define SKIP_SW_PROGRAM_PLL 0x10000000 /* Applicable to both memory and engine clock change, when set, it means the table will not program SPLL/MPLL */ -+ -+#define SET_CLOCK_FREQ_MASK 0x00FFFFFF //Clock change tables only take bit [23:0] as the requested clock value -+#define USE_NON_BUS_CLOCK_MASK 0x01000000 //Applicable to both memory and engine clock change, when set, it uses another clock as the temporary clock (engine uses memory and vice versa) -+#define USE_MEMORY_SELF_REFRESH_MASK 0x02000000 //Only applicable to memory clock change, when set, using memory self refresh during clock transition -+#define SKIP_INTERNAL_MEMORY_PARAMETER_CHANGE 0x04000000 //Only applicable to memory clock change, when set, the table will skip predefined internal memory parameter change -+#define FIRST_TIME_CHANGE_CLOCK 0x08000000 //Applicable to both memory and engine clock change,when set, it means this is 1st time to change clock after ASIC bootup -+#define SKIP_SW_PROGRAM_PLL 0x10000000 //Applicable to both memory and engine clock change, when set, it means the table will not program SPLL/MPLL - #define USE_SS_ENABLED_PIXEL_CLOCK USE_NON_BUS_CLOCK_MASK - --#define b3USE_NON_BUS_CLOCK_MASK 0x01 /* Applicable to both memory and engine clock change, when set, it uses another clock as the temporary clock (engine uses memory and vice versa) */ --#define b3USE_MEMORY_SELF_REFRESH 0x02 /* Only applicable to memory clock change, when set, using memory self refresh during clock transition */ --#define b3SKIP_INTERNAL_MEMORY_PARAMETER_CHANGE 0x04 /* Only applicable to memory clock change, when set, the table will skip predefined internal memory parameter change */ --#define b3FIRST_TIME_CHANGE_CLOCK 0x08 /* Applicable to both memory and engine clock change,when set, it means this is 1st time to change clock after ASIC bootup */ --#define b3SKIP_SW_PROGRAM_PLL 0x10 /* Applicable to both memory and engine clock change, when set, it means the table will not program SPLL/MPLL */ -+#define b3USE_NON_BUS_CLOCK_MASK 0x01 //Applicable to both memory and engine clock change, when set, it uses another clock as the temporary clock (engine uses memory and vice versa) -+#define b3USE_MEMORY_SELF_REFRESH 0x02 //Only applicable to memory clock change, when set, using memory self refresh during clock transition -+#define b3SKIP_INTERNAL_MEMORY_PARAMETER_CHANGE 0x04 //Only applicable to memory clock change, when set, the table will skip predefined internal memory parameter change -+#define b3FIRST_TIME_CHANGE_CLOCK 0x08 //Applicable to both memory and engine clock change,when set, it means this is 1st time to change clock after ASIC bootup -+#define b3SKIP_SW_PROGRAM_PLL 0x10 //Applicable to both memory and engine clock change, when set, it means the table will not program SPLL/MPLL - --typedef struct _ATOM_COMPUTE_CLOCK_FREQ { -+typedef struct _ATOM_COMPUTE_CLOCK_FREQ -+{ - #if ATOM_BIG_ENDIAN -- ULONG ulComputeClockFlag:8; /* =1: COMPUTE_MEMORY_PLL_PARAM, =2: COMPUTE_ENGINE_PLL_PARAM */ -- ULONG ulClockFreq:24; /* in unit of 10kHz */ -+ ULONG ulComputeClockFlag:8; // =1: COMPUTE_MEMORY_PLL_PARAM, =2: COMPUTE_ENGINE_PLL_PARAM -+ ULONG ulClockFreq:24; // in unit of 10kHz - #else -- ULONG ulClockFreq:24; /* in unit of 10kHz */ -- ULONG ulComputeClockFlag:8; /* =1: COMPUTE_MEMORY_PLL_PARAM, =2: COMPUTE_ENGINE_PLL_PARAM */ -+ ULONG ulClockFreq:24; // in unit of 10kHz -+ ULONG ulComputeClockFlag:8; // =1: COMPUTE_MEMORY_PLL_PARAM, =2: COMPUTE_ENGINE_PLL_PARAM - #endif --} ATOM_COMPUTE_CLOCK_FREQ; -- --typedef struct _ATOM_S_MPLL_FB_DIVIDER { -- USHORT usFbDivFrac; -- USHORT usFbDiv; --} ATOM_S_MPLL_FB_DIVIDER; -+}ATOM_COMPUTE_CLOCK_FREQ; - --typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 { -- union { -- ATOM_COMPUTE_CLOCK_FREQ ulClock; /* Input Parameter */ -- ATOM_S_MPLL_FB_DIVIDER ulFbDiv; /* Output Parameter */ -- }; -- UCHAR ucRefDiv; /* Output Parameter */ -- UCHAR ucPostDiv; /* Output Parameter */ -- UCHAR ucCntlFlag; /* Output Parameter */ -- UCHAR ucReserved; --} COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3; -+typedef struct _ATOM_S_MPLL_FB_DIVIDER -+{ -+ USHORT usFbDivFrac; -+ USHORT usFbDiv; -+}ATOM_S_MPLL_FB_DIVIDER; - --/* ucCntlFlag */ -+typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 -+{ -+ union -+ { -+ ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter -+ ATOM_S_MPLL_FB_DIVIDER ulFbDiv; //Output Parameter -+ }; -+ UCHAR ucRefDiv; //Output Parameter -+ UCHAR ucPostDiv; //Output Parameter -+ UCHAR ucCntlFlag; //Output Parameter -+ UCHAR ucReserved; -+}COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3; -+ -+// ucCntlFlag - #define ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN 1 - #define ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE 2 - #define ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE 4 -+#define ATOM_PLL_CNTL_FLAG_SPLL_ISPARE_9 8 - --typedef struct _DYNAMICE_MEMORY_SETTINGS_PARAMETER { -- ATOM_COMPUTE_CLOCK_FREQ ulClock; -- ULONG ulReserved[2]; --} DYNAMICE_MEMORY_SETTINGS_PARAMETER; -- --typedef struct _DYNAMICE_ENGINE_SETTINGS_PARAMETER { -- ATOM_COMPUTE_CLOCK_FREQ ulClock; -- ULONG ulMemoryClock; -- ULONG ulReserved; --} DYNAMICE_ENGINE_SETTINGS_PARAMETER; -- --/****************************************************************************/ --/* Structures used by SetEngineClockTable */ --/****************************************************************************/ --typedef struct _SET_ENGINE_CLOCK_PARAMETERS { -- ULONG ulTargetEngineClock; /* In 10Khz unit */ --} SET_ENGINE_CLOCK_PARAMETERS; - --typedef struct _SET_ENGINE_CLOCK_PS_ALLOCATION { -- ULONG ulTargetEngineClock; /* In 10Khz unit */ -- COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_PS_ALLOCATION sReserved; --} SET_ENGINE_CLOCK_PS_ALLOCATION; -+// V4 are only used for APU which PLL outside GPU -+typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 -+{ -+#if ATOM_BIG_ENDIAN -+ ULONG ucPostDiv; //return parameter: post divider which is used to program to register directly -+ ULONG ulClock:24; //Input= target clock, output = actual clock -+#else -+ ULONG ulClock:24; //Input= target clock, output = actual clock -+ ULONG ucPostDiv; //return parameter: post divider which is used to program to register directly -+#endif -+}COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4; - --/****************************************************************************/ --/* Structures used by SetMemoryClockTable */ --/****************************************************************************/ --typedef struct _SET_MEMORY_CLOCK_PARAMETERS { -- ULONG ulTargetMemoryClock; /* In 10Khz unit */ --} SET_MEMORY_CLOCK_PARAMETERS; -+typedef struct _DYNAMICE_MEMORY_SETTINGS_PARAMETER -+{ -+ ATOM_COMPUTE_CLOCK_FREQ ulClock; -+ ULONG ulReserved[2]; -+}DYNAMICE_MEMORY_SETTINGS_PARAMETER; - --typedef struct _SET_MEMORY_CLOCK_PS_ALLOCATION { -- ULONG ulTargetMemoryClock; /* In 10Khz unit */ -- COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_PS_ALLOCATION sReserved; --} SET_MEMORY_CLOCK_PS_ALLOCATION; -+typedef struct _DYNAMICE_ENGINE_SETTINGS_PARAMETER -+{ -+ ATOM_COMPUTE_CLOCK_FREQ ulClock; -+ ULONG ulMemoryClock; -+ ULONG ulReserved; -+}DYNAMICE_ENGINE_SETTINGS_PARAMETER; -+ -+/****************************************************************************/ -+// Structures used by SetEngineClockTable -+/****************************************************************************/ -+typedef struct _SET_ENGINE_CLOCK_PARAMETERS -+{ -+ ULONG ulTargetEngineClock; //In 10Khz unit -+}SET_ENGINE_CLOCK_PARAMETERS; - --/****************************************************************************/ --/* Structures used by ASIC_Init.ctb */ --/****************************************************************************/ --typedef struct _ASIC_INIT_PARAMETERS { -- ULONG ulDefaultEngineClock; /* In 10Khz unit */ -- ULONG ulDefaultMemoryClock; /* In 10Khz unit */ --} ASIC_INIT_PARAMETERS; -+typedef struct _SET_ENGINE_CLOCK_PS_ALLOCATION -+{ -+ ULONG ulTargetEngineClock; //In 10Khz unit -+ COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_PS_ALLOCATION sReserved; -+}SET_ENGINE_CLOCK_PS_ALLOCATION; -+ -+/****************************************************************************/ -+// Structures used by SetMemoryClockTable -+/****************************************************************************/ -+typedef struct _SET_MEMORY_CLOCK_PARAMETERS -+{ -+ ULONG ulTargetMemoryClock; //In 10Khz unit -+}SET_MEMORY_CLOCK_PARAMETERS; - --typedef struct _ASIC_INIT_PS_ALLOCATION { -- ASIC_INIT_PARAMETERS sASICInitClocks; -- SET_ENGINE_CLOCK_PS_ALLOCATION sReserved; /* Caller doesn't need to init this structure */ --} ASIC_INIT_PS_ALLOCATION; -+typedef struct _SET_MEMORY_CLOCK_PS_ALLOCATION -+{ -+ ULONG ulTargetMemoryClock; //In 10Khz unit -+ COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_PS_ALLOCATION sReserved; -+}SET_MEMORY_CLOCK_PS_ALLOCATION; -+ -+/****************************************************************************/ -+// Structures used by ASIC_Init.ctb -+/****************************************************************************/ -+typedef struct _ASIC_INIT_PARAMETERS -+{ -+ ULONG ulDefaultEngineClock; //In 10Khz unit -+ ULONG ulDefaultMemoryClock; //In 10Khz unit -+}ASIC_INIT_PARAMETERS; - --/****************************************************************************/ --/* Structure used by DynamicClockGatingTable.ctb */ --/****************************************************************************/ --typedef struct _DYNAMIC_CLOCK_GATING_PARAMETERS { -- UCHAR ucEnable; /* ATOM_ENABLE or ATOM_DISABLE */ -- UCHAR ucPadding[3]; --} DYNAMIC_CLOCK_GATING_PARAMETERS; -+typedef struct _ASIC_INIT_PS_ALLOCATION -+{ -+ ASIC_INIT_PARAMETERS sASICInitClocks; -+ SET_ENGINE_CLOCK_PS_ALLOCATION sReserved; //Caller doesn't need to init this structure -+}ASIC_INIT_PS_ALLOCATION; -+ -+/****************************************************************************/ -+// Structure used by DynamicClockGatingTable.ctb -+/****************************************************************************/ -+typedef struct _DYNAMIC_CLOCK_GATING_PARAMETERS -+{ -+ UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE -+ UCHAR ucPadding[3]; -+}DYNAMIC_CLOCK_GATING_PARAMETERS; - #define DYNAMIC_CLOCK_GATING_PS_ALLOCATION DYNAMIC_CLOCK_GATING_PARAMETERS - --/****************************************************************************/ --/* Structure used by EnableASIC_StaticPwrMgtTable.ctb */ --/****************************************************************************/ --typedef struct _ENABLE_ASIC_STATIC_PWR_MGT_PARAMETERS { -- UCHAR ucEnable; /* ATOM_ENABLE or ATOM_DISABLE */ -- UCHAR ucPadding[3]; --} ENABLE_ASIC_STATIC_PWR_MGT_PARAMETERS; -+/****************************************************************************/ -+// Structure used by EnableASIC_StaticPwrMgtTable.ctb -+/****************************************************************************/ -+typedef struct _ENABLE_ASIC_STATIC_PWR_MGT_PARAMETERS -+{ -+ UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE -+ UCHAR ucPadding[3]; -+}ENABLE_ASIC_STATIC_PWR_MGT_PARAMETERS; - #define ENABLE_ASIC_STATIC_PWR_MGT_PS_ALLOCATION ENABLE_ASIC_STATIC_PWR_MGT_PARAMETERS - --/****************************************************************************/ --/* Structures used by DAC_LoadDetectionTable.ctb */ --/****************************************************************************/ --typedef struct _DAC_LOAD_DETECTION_PARAMETERS { -- USHORT usDeviceID; /* {ATOM_DEVICE_CRTx_SUPPORT,ATOM_DEVICE_TVx_SUPPORT,ATOM_DEVICE_CVx_SUPPORT} */ -- UCHAR ucDacType; /* {ATOM_DAC_A,ATOM_DAC_B, ATOM_EXT_DAC} */ -- UCHAR ucMisc; /* Valid only when table revision =1.3 and above */ --} DAC_LOAD_DETECTION_PARAMETERS; -+/****************************************************************************/ -+// Structures used by DAC_LoadDetectionTable.ctb -+/****************************************************************************/ -+typedef struct _DAC_LOAD_DETECTION_PARAMETERS -+{ -+ USHORT usDeviceID; //{ATOM_DEVICE_CRTx_SUPPORT,ATOM_DEVICE_TVx_SUPPORT,ATOM_DEVICE_CVx_SUPPORT} -+ UCHAR ucDacType; //{ATOM_DAC_A,ATOM_DAC_B, ATOM_EXT_DAC} -+ UCHAR ucMisc; //Valid only when table revision =1.3 and above -+}DAC_LOAD_DETECTION_PARAMETERS; - --/* DAC_LOAD_DETECTION_PARAMETERS.ucMisc */ -+// DAC_LOAD_DETECTION_PARAMETERS.ucMisc - #define DAC_LOAD_MISC_YPrPb 0x01 - --typedef struct _DAC_LOAD_DETECTION_PS_ALLOCATION { -- DAC_LOAD_DETECTION_PARAMETERS sDacload; -- ULONG Reserved[2]; /* Don't set this one, allocation for EXT DAC */ --} DAC_LOAD_DETECTION_PS_ALLOCATION; -- --/****************************************************************************/ --/* Structures used by DAC1EncoderControlTable.ctb and DAC2EncoderControlTable.ctb */ --/****************************************************************************/ --typedef struct _DAC_ENCODER_CONTROL_PARAMETERS { -- USHORT usPixelClock; /* in 10KHz; for bios convenient */ -- UCHAR ucDacStandard; /* See definition of ATOM_DACx_xxx, For DEC3.0, bit 7 used as internal flag to indicate DAC2 (==1) or DAC1 (==0) */ -- UCHAR ucAction; /* 0: turn off encoder */ -- /* 1: setup and turn on encoder */ -- /* 7: ATOM_ENCODER_INIT Initialize DAC */ --} DAC_ENCODER_CONTROL_PARAMETERS; -+typedef struct _DAC_LOAD_DETECTION_PS_ALLOCATION -+{ -+ DAC_LOAD_DETECTION_PARAMETERS sDacload; -+ ULONG Reserved[2];// Don't set this one, allocation for EXT DAC -+}DAC_LOAD_DETECTION_PS_ALLOCATION; -+ -+/****************************************************************************/ -+// Structures used by DAC1EncoderControlTable.ctb and DAC2EncoderControlTable.ctb -+/****************************************************************************/ -+typedef struct _DAC_ENCODER_CONTROL_PARAMETERS -+{ -+ USHORT usPixelClock; // in 10KHz; for bios convenient -+ UCHAR ucDacStandard; // See definition of ATOM_DACx_xxx, For DEC3.0, bit 7 used as internal flag to indicate DAC2 (==1) or DAC1 (==0) -+ UCHAR ucAction; // 0: turn off encoder -+ // 1: setup and turn on encoder -+ // 7: ATOM_ENCODER_INIT Initialize DAC -+}DAC_ENCODER_CONTROL_PARAMETERS; - - #define DAC_ENCODER_CONTROL_PS_ALLOCATION DAC_ENCODER_CONTROL_PARAMETERS - --/****************************************************************************/ --/* Structures used by DIG1EncoderControlTable */ --/* DIG2EncoderControlTable */ --/* ExternalEncoderControlTable */ --/****************************************************************************/ --typedef struct _DIG_ENCODER_CONTROL_PARAMETERS { -- USHORT usPixelClock; /* in 10KHz; for bios convenient */ -- UCHAR ucConfig; -- /* [2] Link Select: */ -- /* =0: PHY linkA if bfLane<3 */ -- /* =1: PHY linkB if bfLanes<3 */ -- /* =0: PHY linkA+B if bfLanes=3 */ -- /* [3] Transmitter Sel */ -- /* =0: UNIPHY or PCIEPHY */ -- /* =1: LVTMA */ -- UCHAR ucAction; /* =0: turn off encoder */ -- /* =1: turn on encoder */ -- UCHAR ucEncoderMode; -- /* =0: DP encoder */ -- /* =1: LVDS encoder */ -- /* =2: DVI encoder */ -- /* =3: HDMI encoder */ -- /* =4: SDVO encoder */ -- UCHAR ucLaneNum; /* how many lanes to enable */ -- UCHAR ucReserved[2]; --} DIG_ENCODER_CONTROL_PARAMETERS; -+/****************************************************************************/ -+// Structures used by DIG1EncoderControlTable -+// DIG2EncoderControlTable -+// ExternalEncoderControlTable -+/****************************************************************************/ -+typedef struct _DIG_ENCODER_CONTROL_PARAMETERS -+{ -+ USHORT usPixelClock; // in 10KHz; for bios convenient -+ UCHAR ucConfig; -+ // [2] Link Select: -+ // =0: PHY linkA if bfLane<3 -+ // =1: PHY linkB if bfLanes<3 -+ // =0: PHY linkA+B if bfLanes=3 -+ // [3] Transmitter Sel -+ // =0: UNIPHY or PCIEPHY -+ // =1: LVTMA -+ UCHAR ucAction; // =0: turn off encoder -+ // =1: turn on encoder -+ UCHAR ucEncoderMode; -+ // =0: DP encoder -+ // =1: LVDS encoder -+ // =2: DVI encoder -+ // =3: HDMI encoder -+ // =4: SDVO encoder -+ UCHAR ucLaneNum; // how many lanes to enable -+ UCHAR ucReserved[2]; -+}DIG_ENCODER_CONTROL_PARAMETERS; - #define DIG_ENCODER_CONTROL_PS_ALLOCATION DIG_ENCODER_CONTROL_PARAMETERS - #define EXTERNAL_ENCODER_CONTROL_PARAMETER DIG_ENCODER_CONTROL_PARAMETERS - --/* ucConfig */ -+//ucConfig - #define ATOM_ENCODER_CONFIG_DPLINKRATE_MASK 0x01 - #define ATOM_ENCODER_CONFIG_DPLINKRATE_1_62GHZ 0x00 - #define ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ 0x01 -@@ -539,52 +593,57 @@ typedef struct _DIG_ENCODER_CONTROL_PARAMETERS { - #define ATOM_ENCODER_CONFIG_LVTMA 0x08 - #define ATOM_ENCODER_CONFIG_TRANSMITTER1 0x00 - #define ATOM_ENCODER_CONFIG_TRANSMITTER2 0x08 --#define ATOM_ENCODER_CONFIG_DIGB 0x80 /* VBIOS Internal use, outside SW should set this bit=0 */ --/* ucAction */ --/* ATOM_ENABLE: Enable Encoder */ --/* ATOM_DISABLE: Disable Encoder */ -+#define ATOM_ENCODER_CONFIG_DIGB 0x80 // VBIOS Internal use, outside SW should set this bit=0 -+// ucAction -+// ATOM_ENABLE: Enable Encoder -+// ATOM_DISABLE: Disable Encoder - --/* ucEncoderMode */ -+//ucEncoderMode - #define ATOM_ENCODER_MODE_DP 0 - #define ATOM_ENCODER_MODE_LVDS 1 - #define ATOM_ENCODER_MODE_DVI 2 - #define ATOM_ENCODER_MODE_HDMI 3 - #define ATOM_ENCODER_MODE_SDVO 4 -+#define ATOM_ENCODER_MODE_DP_AUDIO 5 - #define ATOM_ENCODER_MODE_TV 13 - #define ATOM_ENCODER_MODE_CV 14 - #define ATOM_ENCODER_MODE_CRT 15 - --typedef struct _ATOM_DIG_ENCODER_CONFIG_V2 { -+typedef struct _ATOM_DIG_ENCODER_CONFIG_V2 -+{ - #if ATOM_BIG_ENDIAN -- UCHAR ucReserved1:2; -- UCHAR ucTransmitterSel:2; /* =0: UniphyAB, =1: UniphyCD =2: UniphyEF */ -- UCHAR ucLinkSel:1; /* =0: linkA/C/E =1: linkB/D/F */ -- UCHAR ucReserved:1; -- UCHAR ucDPLinkRate:1; /* =0: 1.62Ghz, =1: 2.7Ghz */ -+ UCHAR ucReserved1:2; -+ UCHAR ucTransmitterSel:2; // =0: UniphyAB, =1: UniphyCD =2: UniphyEF -+ UCHAR ucLinkSel:1; // =0: linkA/C/E =1: linkB/D/F -+ UCHAR ucReserved:1; -+ UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz - #else -- UCHAR ucDPLinkRate:1; /* =0: 1.62Ghz, =1: 2.7Ghz */ -- UCHAR ucReserved:1; -- UCHAR ucLinkSel:1; /* =0: linkA/C/E =1: linkB/D/F */ -- UCHAR ucTransmitterSel:2; /* =0: UniphyAB, =1: UniphyCD =2: UniphyEF */ -- UCHAR ucReserved1:2; -+ UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz -+ UCHAR ucReserved:1; -+ UCHAR ucLinkSel:1; // =0: linkA/C/E =1: linkB/D/F -+ UCHAR ucTransmitterSel:2; // =0: UniphyAB, =1: UniphyCD =2: UniphyEF -+ UCHAR ucReserved1:2; - #endif --} ATOM_DIG_ENCODER_CONFIG_V2; -+}ATOM_DIG_ENCODER_CONFIG_V2; - --typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V2 { -- USHORT usPixelClock; /* in 10KHz; for bios convenient */ -- ATOM_DIG_ENCODER_CONFIG_V2 acConfig; -- UCHAR ucAction; -- UCHAR ucEncoderMode; -- /* =0: DP encoder */ -- /* =1: LVDS encoder */ -- /* =2: DVI encoder */ -- /* =3: HDMI encoder */ -- /* =4: SDVO encoder */ -- UCHAR ucLaneNum; /* how many lanes to enable */ -- UCHAR ucReserved[2]; --} DIG_ENCODER_CONTROL_PARAMETERS_V2; - --/* ucConfig */ -+typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V2 -+{ -+ USHORT usPixelClock; // in 10KHz; for bios convenient -+ ATOM_DIG_ENCODER_CONFIG_V2 acConfig; -+ UCHAR ucAction; -+ UCHAR ucEncoderMode; -+ // =0: DP encoder -+ // =1: LVDS encoder -+ // =2: DVI encoder -+ // =3: HDMI encoder -+ // =4: SDVO encoder -+ UCHAR ucLaneNum; // how many lanes to enable -+ UCHAR ucStatus; // = DP_LINK_TRAINING_COMPLETE or DP_LINK_TRAINING_INCOMPLETE, only used by VBIOS with command ATOM_ENCODER_CMD_QUERY_DP_LINK_TRAINING_STATUS -+ UCHAR ucReserved; -+}DIG_ENCODER_CONTROL_PARAMETERS_V2; -+ -+//ucConfig - #define ATOM_ENCODER_CONFIG_V2_DPLINKRATE_MASK 0x01 - #define ATOM_ENCODER_CONFIG_V2_DPLINKRATE_1_62GHZ 0x00 - #define ATOM_ENCODER_CONFIG_V2_DPLINKRATE_2_70GHZ 0x01 -@@ -596,58 +655,122 @@ typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V2 { - #define ATOM_ENCODER_CONFIG_V2_TRANSMITTER2 0x08 - #define ATOM_ENCODER_CONFIG_V2_TRANSMITTER3 0x10 - --/****************************************************************************/ --/* Structures used by UNIPHYTransmitterControlTable */ --/* LVTMATransmitterControlTable */ --/* DVOOutputControlTable */ --/****************************************************************************/ --typedef struct _ATOM_DP_VS_MODE { -- UCHAR ucLaneSel; -- UCHAR ucLaneSet; --} ATOM_DP_VS_MODE; -- --typedef struct _DIG_TRANSMITTER_CONTROL_PARAMETERS { -- union { -- USHORT usPixelClock; /* in 10KHz; for bios convenient */ -- USHORT usInitInfo; /* when init uniphy,lower 8bit is used for connector type defined in objectid.h */ -- ATOM_DP_VS_MODE asMode; /* DP Voltage swing mode */ -+// ucAction: -+// ATOM_DISABLE -+// ATOM_ENABLE -+#define ATOM_ENCODER_CMD_DP_LINK_TRAINING_START 0x08 -+#define ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN1 0x09 -+#define ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN2 0x0a -+#define ATOM_ENCODER_CMD_DP_LINK_TRAINING_COMPLETE 0x0b -+#define ATOM_ENCODER_CMD_DP_VIDEO_OFF 0x0c -+#define ATOM_ENCODER_CMD_DP_VIDEO_ON 0x0d -+#define ATOM_ENCODER_CMD_QUERY_DP_LINK_TRAINING_STATUS 0x0e -+#define ATOM_ENCODER_CMD_SETUP 0x0f -+ -+// ucStatus -+#define ATOM_ENCODER_STATUS_LINK_TRAINING_COMPLETE 0x10 -+#define ATOM_ENCODER_STATUS_LINK_TRAINING_INCOMPLETE 0x00 -+ -+// Following function ENABLE sub-function will be used by driver when TMDS/HDMI/LVDS is used, disable function will be used by driver -+typedef struct _ATOM_DIG_ENCODER_CONFIG_V3 -+{ -+#if ATOM_BIG_ENDIAN -+ UCHAR ucReserved1:1; -+ UCHAR ucDigSel:3; // =0: DIGA/B/C/D/E/F -+ UCHAR ucReserved:3; -+ UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz -+#else -+ UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz -+ UCHAR ucReserved:3; -+ UCHAR ucDigSel:3; // =0: DIGA/B/C/D/E/F -+ UCHAR ucReserved1:1; -+#endif -+}ATOM_DIG_ENCODER_CONFIG_V3; -+ -+#define ATOM_ENCODER_CONFIG_V3_ENCODER_SEL 0x70 -+ -+ -+typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V3 -+{ -+ USHORT usPixelClock; // in 10KHz; for bios convenient -+ ATOM_DIG_ENCODER_CONFIG_V3 acConfig; -+ UCHAR ucAction; -+ UCHAR ucEncoderMode; -+ // =0: DP encoder -+ // =1: LVDS encoder -+ // =2: DVI encoder -+ // =3: HDMI encoder -+ // =4: SDVO encoder -+ // =5: DP audio -+ UCHAR ucLaneNum; // how many lanes to enable -+ UCHAR ucBitPerColor; // only valid for DP mode when ucAction = ATOM_ENCODER_CMD_SETUP -+ UCHAR ucReserved; -+}DIG_ENCODER_CONTROL_PARAMETERS_V3; -+ -+ -+// define ucBitPerColor: -+#define PANEL_BPC_UNDEFINE 0x00 -+#define PANEL_6BIT_PER_COLOR 0x01 -+#define PANEL_8BIT_PER_COLOR 0x02 -+#define PANEL_10BIT_PER_COLOR 0x03 -+#define PANEL_12BIT_PER_COLOR 0x04 -+#define PANEL_16BIT_PER_COLOR 0x05 -+ -+/****************************************************************************/ -+// Structures used by UNIPHYTransmitterControlTable -+// LVTMATransmitterControlTable -+// DVOOutputControlTable -+/****************************************************************************/ -+typedef struct _ATOM_DP_VS_MODE -+{ -+ UCHAR ucLaneSel; -+ UCHAR ucLaneSet; -+}ATOM_DP_VS_MODE; -+ -+typedef struct _DIG_TRANSMITTER_CONTROL_PARAMETERS -+{ -+ union -+ { -+ USHORT usPixelClock; // in 10KHz; for bios convenient -+ USHORT usInitInfo; // when init uniphy,lower 8bit is used for connector type defined in objectid.h -+ ATOM_DP_VS_MODE asMode; // DP Voltage swing mode - }; -- UCHAR ucConfig; -- /* [0]=0: 4 lane Link, */ -- /* =1: 8 lane Link ( Dual Links TMDS ) */ -- /* [1]=0: InCoherent mode */ -- /* =1: Coherent Mode */ -- /* [2] Link Select: */ -- /* =0: PHY linkA if bfLane<3 */ -- /* =1: PHY linkB if bfLanes<3 */ -- /* =0: PHY linkA+B if bfLanes=3 */ -- /* [5:4]PCIE lane Sel */ -- /* =0: lane 0~3 or 0~7 */ -- /* =1: lane 4~7 */ -- /* =2: lane 8~11 or 8~15 */ -- /* =3: lane 12~15 */ -- UCHAR ucAction; /* =0: turn off encoder */ -- /* =1: turn on encoder */ -- UCHAR ucReserved[4]; --} DIG_TRANSMITTER_CONTROL_PARAMETERS; -- --#define DIG_TRANSMITTER_CONTROL_PS_ALLOCATION DIG_TRANSMITTER_CONTROL_PARAMETERS -- --/* ucInitInfo */ --#define ATOM_TRAMITTER_INITINFO_CONNECTOR_MASK 0x00ff -- --/* ucConfig */ -+ UCHAR ucConfig; -+ // [0]=0: 4 lane Link, -+ // =1: 8 lane Link ( Dual Links TMDS ) -+ // [1]=0: InCoherent mode -+ // =1: Coherent Mode -+ // [2] Link Select: -+ // =0: PHY linkA if bfLane<3 -+ // =1: PHY linkB if bfLanes<3 -+ // =0: PHY linkA+B if bfLanes=3 -+ // [5:4]PCIE lane Sel -+ // =0: lane 0~3 or 0~7 -+ // =1: lane 4~7 -+ // =2: lane 8~11 or 8~15 -+ // =3: lane 12~15 -+ UCHAR ucAction; // =0: turn off encoder -+ // =1: turn on encoder -+ UCHAR ucReserved[4]; -+}DIG_TRANSMITTER_CONTROL_PARAMETERS; -+ -+#define DIG_TRANSMITTER_CONTROL_PS_ALLOCATION DIG_TRANSMITTER_CONTROL_PARAMETERS -+ -+//ucInitInfo -+#define ATOM_TRAMITTER_INITINFO_CONNECTOR_MASK 0x00ff -+ -+//ucConfig - #define ATOM_TRANSMITTER_CONFIG_8LANE_LINK 0x01 - #define ATOM_TRANSMITTER_CONFIG_COHERENT 0x02 - #define ATOM_TRANSMITTER_CONFIG_LINK_SEL_MASK 0x04 - #define ATOM_TRANSMITTER_CONFIG_LINKA 0x00 - #define ATOM_TRANSMITTER_CONFIG_LINKB 0x04 --#define ATOM_TRANSMITTER_CONFIG_LINKA_B 0x00 -+#define ATOM_TRANSMITTER_CONFIG_LINKA_B 0x00 - #define ATOM_TRANSMITTER_CONFIG_LINKB_A 0x04 - --#define ATOM_TRANSMITTER_CONFIG_ENCODER_SEL_MASK 0x08 /* only used when ATOM_TRANSMITTER_ACTION_ENABLE */ --#define ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER 0x00 /* only used when ATOM_TRANSMITTER_ACTION_ENABLE */ --#define ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER 0x08 /* only used when ATOM_TRANSMITTER_ACTION_ENABLE */ -+#define ATOM_TRANSMITTER_CONFIG_ENCODER_SEL_MASK 0x08 // only used when ATOM_TRANSMITTER_ACTION_ENABLE -+#define ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER 0x00 // only used when ATOM_TRANSMITTER_ACTION_ENABLE -+#define ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER 0x08 // only used when ATOM_TRANSMITTER_ACTION_ENABLE - - #define ATOM_TRANSMITTER_CONFIG_CLKSRC_MASK 0x30 - #define ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL 0x00 -@@ -661,7 +784,7 @@ typedef struct _DIG_TRANSMITTER_CONTROL_PARAMETERS { - #define ATOM_TRANSMITTER_CONFIG_LANE_8_15 0x80 - #define ATOM_TRANSMITTER_CONFIG_LANE_12_15 0xc0 - --/* ucAction */ -+//ucAction - #define ATOM_TRANSMITTER_ACTION_DISABLE 0 - #define ATOM_TRANSMITTER_ACTION_ENABLE 1 - #define ATOM_TRANSMITTER_ACTION_LCD_BLOFF 2 -@@ -674,93 +797,168 @@ typedef struct _DIG_TRANSMITTER_CONTROL_PARAMETERS { - #define ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT 9 - #define ATOM_TRANSMITTER_ACTION_SETUP 10 - #define ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH 11 -+#define ATOM_TRANSMITTER_ACTION_POWER_ON 12 -+#define ATOM_TRANSMITTER_ACTION_POWER_OFF 13 - --/* Following are used for DigTransmitterControlTable ver1.2 */ --typedef struct _ATOM_DIG_TRANSMITTER_CONFIG_V2 { -+// Following are used for DigTransmitterControlTable ver1.2 -+typedef struct _ATOM_DIG_TRANSMITTER_CONFIG_V2 -+{ - #if ATOM_BIG_ENDIAN -- UCHAR ucTransmitterSel:2; /* bit7:6: =0 Dig Transmitter 1 ( Uniphy AB ) */ -- /* =1 Dig Transmitter 2 ( Uniphy CD ) */ -- /* =2 Dig Transmitter 3 ( Uniphy EF ) */ -- UCHAR ucReserved:1; -- UCHAR fDPConnector:1; /* bit4=0: DP connector =1: None DP connector */ -- UCHAR ucEncoderSel:1; /* bit3=0: Data/Clk path source from DIGA( DIG inst0 ). =1: Data/clk path source from DIGB ( DIG inst1 ) */ -- UCHAR ucLinkSel:1; /* bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E */ -- /* =1: Uniphy LINKB or D or F when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is B or D or F */ -- -- UCHAR fCoherentMode:1; /* bit1=1: Coherent Mode ( for DVI/HDMI mode ) */ -- UCHAR fDualLinkConnector:1; /* bit0=1: Dual Link DVI connector */ -+ UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB ) -+ // =1 Dig Transmitter 2 ( Uniphy CD ) -+ // =2 Dig Transmitter 3 ( Uniphy EF ) -+ UCHAR ucReserved:1; -+ UCHAR fDPConnector:1; //bit4=0: DP connector =1: None DP connector -+ UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA( DIG inst0 ). =1: Data/clk path source from DIGB ( DIG inst1 ) -+ UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E -+ // =1: Uniphy LINKB or D or F when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is B or D or F -+ -+ UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode ) -+ UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector - #else -- UCHAR fDualLinkConnector:1; /* bit0=1: Dual Link DVI connector */ -- UCHAR fCoherentMode:1; /* bit1=1: Coherent Mode ( for DVI/HDMI mode ) */ -- UCHAR ucLinkSel:1; /* bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E */ -- /* =1: Uniphy LINKB or D or F when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is B or D or F */ -- UCHAR ucEncoderSel:1; /* bit3=0: Data/Clk path source from DIGA( DIG inst0 ). =1: Data/clk path source from DIGB ( DIG inst1 ) */ -- UCHAR fDPConnector:1; /* bit4=0: DP connector =1: None DP connector */ -- UCHAR ucReserved:1; -- UCHAR ucTransmitterSel:2; /* bit7:6: =0 Dig Transmitter 1 ( Uniphy AB ) */ -- /* =1 Dig Transmitter 2 ( Uniphy CD ) */ -- /* =2 Dig Transmitter 3 ( Uniphy EF ) */ -+ UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector -+ UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode ) -+ UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E -+ // =1: Uniphy LINKB or D or F when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is B or D or F -+ UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA( DIG inst0 ). =1: Data/clk path source from DIGB ( DIG inst1 ) -+ UCHAR fDPConnector:1; //bit4=0: DP connector =1: None DP connector -+ UCHAR ucReserved:1; -+ UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB ) -+ // =1 Dig Transmitter 2 ( Uniphy CD ) -+ // =2 Dig Transmitter 3 ( Uniphy EF ) - #endif --} ATOM_DIG_TRANSMITTER_CONFIG_V2; -+}ATOM_DIG_TRANSMITTER_CONFIG_V2; - --/* ucConfig */ --/* Bit0 */ -+//ucConfig -+//Bit0 - #define ATOM_TRANSMITTER_CONFIG_V2_DUAL_LINK_CONNECTOR 0x01 - --/* Bit1 */ -+//Bit1 - #define ATOM_TRANSMITTER_CONFIG_V2_COHERENT 0x02 - --/* Bit2 */ -+//Bit2 - #define ATOM_TRANSMITTER_CONFIG_V2_LINK_SEL_MASK 0x04 --#define ATOM_TRANSMITTER_CONFIG_V2_LINKA 0x00 -+#define ATOM_TRANSMITTER_CONFIG_V2_LINKA 0x00 - #define ATOM_TRANSMITTER_CONFIG_V2_LINKB 0x04 - --/* Bit3 */ -+// Bit3 - #define ATOM_TRANSMITTER_CONFIG_V2_ENCODER_SEL_MASK 0x08 --#define ATOM_TRANSMITTER_CONFIG_V2_DIG1_ENCODER 0x00 /* only used when ucAction == ATOM_TRANSMITTER_ACTION_ENABLE or ATOM_TRANSMITTER_ACTION_SETUP */ --#define ATOM_TRANSMITTER_CONFIG_V2_DIG2_ENCODER 0x08 /* only used when ucAction == ATOM_TRANSMITTER_ACTION_ENABLE or ATOM_TRANSMITTER_ACTION_SETUP */ -+#define ATOM_TRANSMITTER_CONFIG_V2_DIG1_ENCODER 0x00 // only used when ucAction == ATOM_TRANSMITTER_ACTION_ENABLE or ATOM_TRANSMITTER_ACTION_SETUP -+#define ATOM_TRANSMITTER_CONFIG_V2_DIG2_ENCODER 0x08 // only used when ucAction == ATOM_TRANSMITTER_ACTION_ENABLE or ATOM_TRANSMITTER_ACTION_SETUP - --/* Bit4 */ -+// Bit4 - #define ATOM_TRASMITTER_CONFIG_V2_DP_CONNECTOR 0x10 - --/* Bit7:6 */ -+// Bit7:6 - #define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER_SEL_MASK 0xC0 --#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER1 0x00 /* AB */ --#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER2 0x40 /* CD */ --#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER3 0x80 /* EF */ -- --typedef struct _DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 { -- union { -- USHORT usPixelClock; /* in 10KHz; for bios convenient */ -- USHORT usInitInfo; /* when init uniphy,lower 8bit is used for connector type defined in objectid.h */ -- ATOM_DP_VS_MODE asMode; /* DP Voltage swing mode */ -+#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER1 0x00 //AB -+#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER2 0x40 //CD -+#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER3 0x80 //EF -+ -+typedef struct _DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 -+{ -+ union -+ { -+ USHORT usPixelClock; // in 10KHz; for bios convenient -+ USHORT usInitInfo; // when init uniphy,lower 8bit is used for connector type defined in objectid.h -+ ATOM_DP_VS_MODE asMode; // DP Voltage swing mode - }; -- ATOM_DIG_TRANSMITTER_CONFIG_V2 acConfig; -- UCHAR ucAction; /* define as ATOM_TRANSMITER_ACTION_XXX */ -- UCHAR ucReserved[4]; --} DIG_TRANSMITTER_CONTROL_PARAMETERS_V2; -+ ATOM_DIG_TRANSMITTER_CONFIG_V2 acConfig; -+ UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_XXX -+ UCHAR ucReserved[4]; -+}DIG_TRANSMITTER_CONTROL_PARAMETERS_V2; - --/****************************************************************************/ --/* Structures used by DAC1OuputControlTable */ --/* DAC2OuputControlTable */ --/* LVTMAOutputControlTable (Before DEC30) */ --/* TMDSAOutputControlTable (Before DEC30) */ --/****************************************************************************/ --typedef struct _DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS { -- UCHAR ucAction; /* Possible input:ATOM_ENABLE||ATOMDISABLE */ -- /* When the display is LCD, in addition to above: */ -- /* ATOM_LCD_BLOFF|| ATOM_LCD_BLON ||ATOM_LCD_BL_BRIGHTNESS_CONTROL||ATOM_LCD_SELFTEST_START|| */ -- /* ATOM_LCD_SELFTEST_STOP */ -+typedef struct _ATOM_DIG_TRANSMITTER_CONFIG_V3 -+{ -+#if ATOM_BIG_ENDIAN -+ UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB ) -+ // =1 Dig Transmitter 2 ( Uniphy CD ) -+ // =2 Dig Transmitter 3 ( Uniphy EF ) -+ UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, EXT_CLK=2 -+ UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA/C/E. =1: Data/clk path source from DIGB/D/F -+ UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E -+ // =1: Uniphy LINKB or D or F when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is B or D or F -+ UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode ) -+ UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector -+#else -+ UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector -+ UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode ) -+ UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E -+ // =1: Uniphy LINKB or D or F when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is B or D or F -+ UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA/C/E. =1: Data/clk path source from DIGB/D/F -+ UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, EXT_CLK=2 -+ UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB ) -+ // =1 Dig Transmitter 2 ( Uniphy CD ) -+ // =2 Dig Transmitter 3 ( Uniphy EF ) -+#endif -+}ATOM_DIG_TRANSMITTER_CONFIG_V3; - -- UCHAR aucPadding[3]; /* padding to DWORD aligned */ --} DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS; -+typedef struct _DIG_TRANSMITTER_CONTROL_PARAMETERS_V3 -+{ -+ union -+ { -+ USHORT usPixelClock; // in 10KHz; for bios convenient -+ USHORT usInitInfo; // when init uniphy,lower 8bit is used for connector type defined in objectid.h -+ ATOM_DP_VS_MODE asMode; // DP Voltage swing mode -+ }; -+ ATOM_DIG_TRANSMITTER_CONFIG_V3 acConfig; -+ UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_XXX -+ UCHAR ucLaneNum; -+ UCHAR ucReserved[3]; -+}DIG_TRANSMITTER_CONTROL_PARAMETERS_V3; -+ -+//ucConfig -+//Bit0 -+#define ATOM_TRANSMITTER_CONFIG_V3_DUAL_LINK_CONNECTOR 0x01 -+ -+//Bit1 -+#define ATOM_TRANSMITTER_CONFIG_V3_COHERENT 0x02 -+ -+//Bit2 -+#define ATOM_TRANSMITTER_CONFIG_V3_LINK_SEL_MASK 0x04 -+#define ATOM_TRANSMITTER_CONFIG_V3_LINKA 0x00 -+#define ATOM_TRANSMITTER_CONFIG_V3_LINKB 0x04 -+ -+// Bit3 -+#define ATOM_TRANSMITTER_CONFIG_V3_ENCODER_SEL_MASK 0x08 -+#define ATOM_TRANSMITTER_CONFIG_V3_DIG1_ENCODER 0x00 -+#define ATOM_TRANSMITTER_CONFIG_V3_DIG2_ENCODER 0x08 -+ -+// Bit5:4 -+#define ATOM_TRASMITTER_CONFIG_V3_REFCLK_SEL_MASK 0x30 -+#define ATOM_TRASMITTER_CONFIG_V3_P1PLL 0x00 -+#define ATOM_TRASMITTER_CONFIG_V3_P2PLL 0x10 -+#define ATOM_TRASMITTER_CONFIG_V3_REFCLK_SRC_EXT 0x20 -+ -+// Bit7:6 -+#define ATOM_TRANSMITTER_CONFIG_V3_TRANSMITTER_SEL_MASK 0xC0 -+#define ATOM_TRANSMITTER_CONFIG_V3_TRANSMITTER1 0x00 //AB -+#define ATOM_TRANSMITTER_CONFIG_V3_TRANSMITTER2 0x40 //CD -+#define ATOM_TRANSMITTER_CONFIG_V3_TRANSMITTER3 0x80 //EF -+ -+/****************************************************************************/ -+// Structures used by DAC1OuputControlTable -+// DAC2OuputControlTable -+// LVTMAOutputControlTable (Before DEC30) -+// TMDSAOutputControlTable (Before DEC30) -+/****************************************************************************/ -+typedef struct _DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS -+{ -+ UCHAR ucAction; // Possible input:ATOM_ENABLE||ATOMDISABLE -+ // When the display is LCD, in addition to above: -+ // ATOM_LCD_BLOFF|| ATOM_LCD_BLON ||ATOM_LCD_BL_BRIGHTNESS_CONTROL||ATOM_LCD_SELFTEST_START|| -+ // ATOM_LCD_SELFTEST_STOP -+ -+ UCHAR aucPadding[3]; // padding to DWORD aligned -+}DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS; - - #define DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS - --#define CRT1_OUTPUT_CONTROL_PARAMETERS DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS -+ -+#define CRT1_OUTPUT_CONTROL_PARAMETERS DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS - #define CRT1_OUTPUT_CONTROL_PS_ALLOCATION DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION - --#define CRT2_OUTPUT_CONTROL_PARAMETERS DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS -+#define CRT2_OUTPUT_CONTROL_PARAMETERS DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS - #define CRT2_OUTPUT_CONTROL_PS_ALLOCATION DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION - - #define CV1_OUTPUT_CONTROL_PARAMETERS DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS -@@ -782,397 +980,550 @@ typedef struct _DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS { - #define DVO_OUTPUT_CONTROL_PS_ALLOCATION DIG_TRANSMITTER_CONTROL_PS_ALLOCATION - #define DVO_OUTPUT_CONTROL_PARAMETERS_V3 DIG_TRANSMITTER_CONTROL_PARAMETERS - --/****************************************************************************/ --/* Structures used by BlankCRTCTable */ --/****************************************************************************/ --typedef struct _BLANK_CRTC_PARAMETERS { -- UCHAR ucCRTC; /* ATOM_CRTC1 or ATOM_CRTC2 */ -- UCHAR ucBlanking; /* ATOM_BLANKING or ATOM_BLANKINGOFF */ -- USHORT usBlackColorRCr; -- USHORT usBlackColorGY; -- USHORT usBlackColorBCb; --} BLANK_CRTC_PARAMETERS; -+/****************************************************************************/ -+// Structures used by BlankCRTCTable -+/****************************************************************************/ -+typedef struct _BLANK_CRTC_PARAMETERS -+{ -+ UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2 -+ UCHAR ucBlanking; // ATOM_BLANKING or ATOM_BLANKINGOFF -+ USHORT usBlackColorRCr; -+ USHORT usBlackColorGY; -+ USHORT usBlackColorBCb; -+}BLANK_CRTC_PARAMETERS; - #define BLANK_CRTC_PS_ALLOCATION BLANK_CRTC_PARAMETERS - --/****************************************************************************/ --/* Structures used by EnableCRTCTable */ --/* EnableCRTCMemReqTable */ --/* UpdateCRTC_DoubleBufferRegistersTable */ --/****************************************************************************/ --typedef struct _ENABLE_CRTC_PARAMETERS { -- UCHAR ucCRTC; /* ATOM_CRTC1 or ATOM_CRTC2 */ -- UCHAR ucEnable; /* ATOM_ENABLE or ATOM_DISABLE */ -- UCHAR ucPadding[2]; --} ENABLE_CRTC_PARAMETERS; -+/****************************************************************************/ -+// Structures used by EnableCRTCTable -+// EnableCRTCMemReqTable -+// UpdateCRTC_DoubleBufferRegistersTable -+/****************************************************************************/ -+typedef struct _ENABLE_CRTC_PARAMETERS -+{ -+ UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2 -+ UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE -+ UCHAR ucPadding[2]; -+}ENABLE_CRTC_PARAMETERS; - #define ENABLE_CRTC_PS_ALLOCATION ENABLE_CRTC_PARAMETERS - --/****************************************************************************/ --/* Structures used by SetCRTC_OverScanTable */ --/****************************************************************************/ --typedef struct _SET_CRTC_OVERSCAN_PARAMETERS { -- USHORT usOverscanRight; /* right */ -- USHORT usOverscanLeft; /* left */ -- USHORT usOverscanBottom; /* bottom */ -- USHORT usOverscanTop; /* top */ -- UCHAR ucCRTC; /* ATOM_CRTC1 or ATOM_CRTC2 */ -- UCHAR ucPadding[3]; --} SET_CRTC_OVERSCAN_PARAMETERS; -+/****************************************************************************/ -+// Structures used by SetCRTC_OverScanTable -+/****************************************************************************/ -+typedef struct _SET_CRTC_OVERSCAN_PARAMETERS -+{ -+ USHORT usOverscanRight; // right -+ USHORT usOverscanLeft; // left -+ USHORT usOverscanBottom; // bottom -+ USHORT usOverscanTop; // top -+ UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2 -+ UCHAR ucPadding[3]; -+}SET_CRTC_OVERSCAN_PARAMETERS; - #define SET_CRTC_OVERSCAN_PS_ALLOCATION SET_CRTC_OVERSCAN_PARAMETERS - --/****************************************************************************/ --/* Structures used by SetCRTC_ReplicationTable */ --/****************************************************************************/ --typedef struct _SET_CRTC_REPLICATION_PARAMETERS { -- UCHAR ucH_Replication; /* horizontal replication */ -- UCHAR ucV_Replication; /* vertical replication */ -- UCHAR usCRTC; /* ATOM_CRTC1 or ATOM_CRTC2 */ -- UCHAR ucPadding; --} SET_CRTC_REPLICATION_PARAMETERS; -+/****************************************************************************/ -+// Structures used by SetCRTC_ReplicationTable -+/****************************************************************************/ -+typedef struct _SET_CRTC_REPLICATION_PARAMETERS -+{ -+ UCHAR ucH_Replication; // horizontal replication -+ UCHAR ucV_Replication; // vertical replication -+ UCHAR usCRTC; // ATOM_CRTC1 or ATOM_CRTC2 -+ UCHAR ucPadding; -+}SET_CRTC_REPLICATION_PARAMETERS; - #define SET_CRTC_REPLICATION_PS_ALLOCATION SET_CRTC_REPLICATION_PARAMETERS - --/****************************************************************************/ --/* Structures used by SelectCRTC_SourceTable */ --/****************************************************************************/ --typedef struct _SELECT_CRTC_SOURCE_PARAMETERS { -- UCHAR ucCRTC; /* ATOM_CRTC1 or ATOM_CRTC2 */ -- UCHAR ucDevice; /* ATOM_DEVICE_CRT1|ATOM_DEVICE_CRT2|.... */ -- UCHAR ucPadding[2]; --} SELECT_CRTC_SOURCE_PARAMETERS; -+/****************************************************************************/ -+// Structures used by SelectCRTC_SourceTable -+/****************************************************************************/ -+typedef struct _SELECT_CRTC_SOURCE_PARAMETERS -+{ -+ UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2 -+ UCHAR ucDevice; // ATOM_DEVICE_CRT1|ATOM_DEVICE_CRT2|.... -+ UCHAR ucPadding[2]; -+}SELECT_CRTC_SOURCE_PARAMETERS; - #define SELECT_CRTC_SOURCE_PS_ALLOCATION SELECT_CRTC_SOURCE_PARAMETERS - --typedef struct _SELECT_CRTC_SOURCE_PARAMETERS_V2 { -- UCHAR ucCRTC; /* ATOM_CRTC1 or ATOM_CRTC2 */ -- UCHAR ucEncoderID; /* DAC1/DAC2/TVOUT/DIG1/DIG2/DVO */ -- UCHAR ucEncodeMode; /* Encoding mode, only valid when using DIG1/DIG2/DVO */ -- UCHAR ucPadding; --} SELECT_CRTC_SOURCE_PARAMETERS_V2; -- --/* ucEncoderID */ --/* #define ASIC_INT_DAC1_ENCODER_ID 0x00 */ --/* #define ASIC_INT_TV_ENCODER_ID 0x02 */ --/* #define ASIC_INT_DIG1_ENCODER_ID 0x03 */ --/* #define ASIC_INT_DAC2_ENCODER_ID 0x04 */ --/* #define ASIC_EXT_TV_ENCODER_ID 0x06 */ --/* #define ASIC_INT_DVO_ENCODER_ID 0x07 */ --/* #define ASIC_INT_DIG2_ENCODER_ID 0x09 */ --/* #define ASIC_EXT_DIG_ENCODER_ID 0x05 */ -- --/* ucEncodeMode */ --/* #define ATOM_ENCODER_MODE_DP 0 */ --/* #define ATOM_ENCODER_MODE_LVDS 1 */ --/* #define ATOM_ENCODER_MODE_DVI 2 */ --/* #define ATOM_ENCODER_MODE_HDMI 3 */ --/* #define ATOM_ENCODER_MODE_SDVO 4 */ --/* #define ATOM_ENCODER_MODE_TV 13 */ --/* #define ATOM_ENCODER_MODE_CV 14 */ --/* #define ATOM_ENCODER_MODE_CRT 15 */ -- --/****************************************************************************/ --/* Structures used by SetPixelClockTable */ --/* GetPixelClockTable */ --/****************************************************************************/ --/* Major revision=1., Minor revision=1 */ --typedef struct _PIXEL_CLOCK_PARAMETERS { -- USHORT usPixelClock; /* in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div) */ -- /* 0 means disable PPLL */ -- USHORT usRefDiv; /* Reference divider */ -- USHORT usFbDiv; /* feedback divider */ -- UCHAR ucPostDiv; /* post divider */ -- UCHAR ucFracFbDiv; /* fractional feedback divider */ -- UCHAR ucPpll; /* ATOM_PPLL1 or ATOM_PPL2 */ -- UCHAR ucRefDivSrc; /* ATOM_PJITTER or ATO_NONPJITTER */ -- UCHAR ucCRTC; /* Which CRTC uses this Ppll */ -- UCHAR ucPadding; --} PIXEL_CLOCK_PARAMETERS; -- --/* Major revision=1., Minor revision=2, add ucMiscIfno */ --/* ucMiscInfo: */ -+typedef struct _SELECT_CRTC_SOURCE_PARAMETERS_V2 -+{ -+ UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2 -+ UCHAR ucEncoderID; // DAC1/DAC2/TVOUT/DIG1/DIG2/DVO -+ UCHAR ucEncodeMode; // Encoding mode, only valid when using DIG1/DIG2/DVO -+ UCHAR ucPadding; -+}SELECT_CRTC_SOURCE_PARAMETERS_V2; -+ -+//ucEncoderID -+//#define ASIC_INT_DAC1_ENCODER_ID 0x00 -+//#define ASIC_INT_TV_ENCODER_ID 0x02 -+//#define ASIC_INT_DIG1_ENCODER_ID 0x03 -+//#define ASIC_INT_DAC2_ENCODER_ID 0x04 -+//#define ASIC_EXT_TV_ENCODER_ID 0x06 -+//#define ASIC_INT_DVO_ENCODER_ID 0x07 -+//#define ASIC_INT_DIG2_ENCODER_ID 0x09 -+//#define ASIC_EXT_DIG_ENCODER_ID 0x05 -+ -+//ucEncodeMode -+//#define ATOM_ENCODER_MODE_DP 0 -+//#define ATOM_ENCODER_MODE_LVDS 1 -+//#define ATOM_ENCODER_MODE_DVI 2 -+//#define ATOM_ENCODER_MODE_HDMI 3 -+//#define ATOM_ENCODER_MODE_SDVO 4 -+//#define ATOM_ENCODER_MODE_TV 13 -+//#define ATOM_ENCODER_MODE_CV 14 -+//#define ATOM_ENCODER_MODE_CRT 15 -+ -+/****************************************************************************/ -+// Structures used by SetPixelClockTable -+// GetPixelClockTable -+/****************************************************************************/ -+//Major revision=1., Minor revision=1 -+typedef struct _PIXEL_CLOCK_PARAMETERS -+{ -+ USHORT usPixelClock; // in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div) -+ // 0 means disable PPLL -+ USHORT usRefDiv; // Reference divider -+ USHORT usFbDiv; // feedback divider -+ UCHAR ucPostDiv; // post divider -+ UCHAR ucFracFbDiv; // fractional feedback divider -+ UCHAR ucPpll; // ATOM_PPLL1 or ATOM_PPL2 -+ UCHAR ucRefDivSrc; // ATOM_PJITTER or ATO_NONPJITTER -+ UCHAR ucCRTC; // Which CRTC uses this Ppll -+ UCHAR ucPadding; -+}PIXEL_CLOCK_PARAMETERS; -+ -+//Major revision=1., Minor revision=2, add ucMiscIfno -+//ucMiscInfo: - #define MISC_FORCE_REPROG_PIXEL_CLOCK 0x1 - #define MISC_DEVICE_INDEX_MASK 0xF0 - #define MISC_DEVICE_INDEX_SHIFT 4 - --typedef struct _PIXEL_CLOCK_PARAMETERS_V2 { -- USHORT usPixelClock; /* in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div) */ -- /* 0 means disable PPLL */ -- USHORT usRefDiv; /* Reference divider */ -- USHORT usFbDiv; /* feedback divider */ -- UCHAR ucPostDiv; /* post divider */ -- UCHAR ucFracFbDiv; /* fractional feedback divider */ -- UCHAR ucPpll; /* ATOM_PPLL1 or ATOM_PPL2 */ -- UCHAR ucRefDivSrc; /* ATOM_PJITTER or ATO_NONPJITTER */ -- UCHAR ucCRTC; /* Which CRTC uses this Ppll */ -- UCHAR ucMiscInfo; /* Different bits for different purpose, bit [7:4] as device index, bit[0]=Force prog */ --} PIXEL_CLOCK_PARAMETERS_V2; -- --/* Major revision=1., Minor revision=3, structure/definition change */ --/* ucEncoderMode: */ --/* ATOM_ENCODER_MODE_DP */ --/* ATOM_ENOCDER_MODE_LVDS */ --/* ATOM_ENOCDER_MODE_DVI */ --/* ATOM_ENOCDER_MODE_HDMI */ --/* ATOM_ENOCDER_MODE_SDVO */ --/* ATOM_ENCODER_MODE_TV 13 */ --/* ATOM_ENCODER_MODE_CV 14 */ --/* ATOM_ENCODER_MODE_CRT 15 */ -- --/* ucDVOConfig */ --/* #define DVO_ENCODER_CONFIG_RATE_SEL 0x01 */ --/* #define DVO_ENCODER_CONFIG_DDR_SPEED 0x00 */ --/* #define DVO_ENCODER_CONFIG_SDR_SPEED 0x01 */ --/* #define DVO_ENCODER_CONFIG_OUTPUT_SEL 0x0c */ --/* #define DVO_ENCODER_CONFIG_LOW12BIT 0x00 */ --/* #define DVO_ENCODER_CONFIG_UPPER12BIT 0x04 */ --/* #define DVO_ENCODER_CONFIG_24BIT 0x08 */ -- --/* ucMiscInfo: also changed, see below */ -+typedef struct _PIXEL_CLOCK_PARAMETERS_V2 -+{ -+ USHORT usPixelClock; // in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div) -+ // 0 means disable PPLL -+ USHORT usRefDiv; // Reference divider -+ USHORT usFbDiv; // feedback divider -+ UCHAR ucPostDiv; // post divider -+ UCHAR ucFracFbDiv; // fractional feedback divider -+ UCHAR ucPpll; // ATOM_PPLL1 or ATOM_PPL2 -+ UCHAR ucRefDivSrc; // ATOM_PJITTER or ATO_NONPJITTER -+ UCHAR ucCRTC; // Which CRTC uses this Ppll -+ UCHAR ucMiscInfo; // Different bits for different purpose, bit [7:4] as device index, bit[0]=Force prog -+}PIXEL_CLOCK_PARAMETERS_V2; -+ -+//Major revision=1., Minor revision=3, structure/definition change -+//ucEncoderMode: -+//ATOM_ENCODER_MODE_DP -+//ATOM_ENOCDER_MODE_LVDS -+//ATOM_ENOCDER_MODE_DVI -+//ATOM_ENOCDER_MODE_HDMI -+//ATOM_ENOCDER_MODE_SDVO -+//ATOM_ENCODER_MODE_TV 13 -+//ATOM_ENCODER_MODE_CV 14 -+//ATOM_ENCODER_MODE_CRT 15 -+ -+//ucDVOConfig -+//#define DVO_ENCODER_CONFIG_RATE_SEL 0x01 -+//#define DVO_ENCODER_CONFIG_DDR_SPEED 0x00 -+//#define DVO_ENCODER_CONFIG_SDR_SPEED 0x01 -+//#define DVO_ENCODER_CONFIG_OUTPUT_SEL 0x0c -+//#define DVO_ENCODER_CONFIG_LOW12BIT 0x00 -+//#define DVO_ENCODER_CONFIG_UPPER12BIT 0x04 -+//#define DVO_ENCODER_CONFIG_24BIT 0x08 -+ -+//ucMiscInfo: also changed, see below - #define PIXEL_CLOCK_MISC_FORCE_PROG_PPLL 0x01 - #define PIXEL_CLOCK_MISC_VGA_MODE 0x02 - #define PIXEL_CLOCK_MISC_CRTC_SEL_MASK 0x04 - #define PIXEL_CLOCK_MISC_CRTC_SEL_CRTC1 0x00 - #define PIXEL_CLOCK_MISC_CRTC_SEL_CRTC2 0x04 - #define PIXEL_CLOCK_MISC_USE_ENGINE_FOR_DISPCLK 0x08 -+#define PIXEL_CLOCK_MISC_REF_DIV_SRC 0x10 -+// V1.4 for RoadRunner -+#define PIXEL_CLOCK_V4_MISC_SS_ENABLE 0x10 -+#define PIXEL_CLOCK_V4_MISC_COHERENT_MODE 0x20 - --typedef struct _PIXEL_CLOCK_PARAMETERS_V3 { -- USHORT usPixelClock; /* in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div) */ -- /* 0 means disable PPLL. For VGA PPLL,make sure this value is not 0. */ -- USHORT usRefDiv; /* Reference divider */ -- USHORT usFbDiv; /* feedback divider */ -- UCHAR ucPostDiv; /* post divider */ -- UCHAR ucFracFbDiv; /* fractional feedback divider */ -- UCHAR ucPpll; /* ATOM_PPLL1 or ATOM_PPL2 */ -- UCHAR ucTransmitterId; /* graphic encoder id defined in objectId.h */ -- union { -- UCHAR ucEncoderMode; /* encoder type defined as ATOM_ENCODER_MODE_DP/DVI/HDMI/ */ -- UCHAR ucDVOConfig; /* when use DVO, need to know SDR/DDR, 12bit or 24bit */ -+typedef struct _PIXEL_CLOCK_PARAMETERS_V3 -+{ -+ USHORT usPixelClock; // in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div) -+ // 0 means disable PPLL. For VGA PPLL,make sure this value is not 0. -+ USHORT usRefDiv; // Reference divider -+ USHORT usFbDiv; // feedback divider -+ UCHAR ucPostDiv; // post divider -+ UCHAR ucFracFbDiv; // fractional feedback divider -+ UCHAR ucPpll; // ATOM_PPLL1 or ATOM_PPL2 -+ UCHAR ucTransmitterId; // graphic encoder id defined in objectId.h -+ union -+ { -+ UCHAR ucEncoderMode; // encoder type defined as ATOM_ENCODER_MODE_DP/DVI/HDMI/ -+ UCHAR ucDVOConfig; // when use DVO, need to know SDR/DDR, 12bit or 24bit - }; -- UCHAR ucMiscInfo; /* bit[0]=Force program, bit[1]= set pclk for VGA, b[2]= CRTC sel */ -- /* bit[3]=0:use PPLL for dispclk source, =1: use engine clock for dispclock source */ --} PIXEL_CLOCK_PARAMETERS_V3; -+ UCHAR ucMiscInfo; // bit[0]=Force program, bit[1]= set pclk for VGA, b[2]= CRTC sel -+ // bit[3]=0:use PPLL for dispclk source, =1: use engine clock for dispclock source -+ // bit[4]=0:use XTALIN as the source of reference divider,=1 use the pre-defined clock as the source of reference divider -+}PIXEL_CLOCK_PARAMETERS_V3; - - #define PIXEL_CLOCK_PARAMETERS_LAST PIXEL_CLOCK_PARAMETERS_V2 - #define GET_PIXEL_CLOCK_PS_ALLOCATION PIXEL_CLOCK_PARAMETERS_LAST - --/****************************************************************************/ --/* Structures used by AdjustDisplayPllTable */ --/****************************************************************************/ --typedef struct _ADJUST_DISPLAY_PLL_PARAMETERS { -+typedef struct _PIXEL_CLOCK_PARAMETERS_V5 -+{ -+ UCHAR ucCRTC; // ATOM_CRTC1~6, indicate the CRTC controller to -+ // drive the pixel clock. not used for DCPLL case. -+ union{ -+ UCHAR ucReserved; -+ UCHAR ucFracFbDiv; // [gphan] temporary to prevent build problem. remove it after driver code is changed. -+ }; -+ USHORT usPixelClock; // target the pixel clock to drive the CRTC timing -+ // 0 means disable PPLL/DCPLL. -+ USHORT usFbDiv; // feedback divider integer part. -+ UCHAR ucPostDiv; // post divider. -+ UCHAR ucRefDiv; // Reference divider -+ UCHAR ucPpll; // ATOM_PPLL1/ATOM_PPLL2/ATOM_DCPLL -+ UCHAR ucTransmitterID; // ASIC encoder id defined in objectId.h, -+ // indicate which graphic encoder will be used. -+ UCHAR ucEncoderMode; // Encoder mode: -+ UCHAR ucMiscInfo; // bit[0]= Force program PPLL -+ // bit[1]= when VGA timing is used. -+ // bit[3:2]= HDMI panel bit depth: =0: 24bpp =1:30bpp, =2:32bpp -+ // bit[4]= RefClock source for PPLL. -+ // =0: XTLAIN( default mode ) -+ // =1: other external clock source, which is pre-defined -+ // by VBIOS depend on the feature required. -+ // bit[7:5]: reserved. -+ ULONG ulFbDivDecFrac; // 20 bit feedback divider decimal fraction part, range from 1~999999 ( 0.000001 to 0.999999 ) -+ -+}PIXEL_CLOCK_PARAMETERS_V5; -+ -+#define PIXEL_CLOCK_V5_MISC_FORCE_PROG_PPLL 0x01 -+#define PIXEL_CLOCK_V5_MISC_VGA_MODE 0x02 -+#define PIXEL_CLOCK_V5_MISC_HDMI_BPP_MASK 0x0c -+#define PIXEL_CLOCK_V5_MISC_HDMI_24BPP 0x00 -+#define PIXEL_CLOCK_V5_MISC_HDMI_30BPP 0x04 -+#define PIXEL_CLOCK_V5_MISC_HDMI_32BPP 0x08 -+#define PIXEL_CLOCK_V5_MISC_REF_DIV_SRC 0x10 -+ -+typedef struct _GET_DISP_PLL_STATUS_INPUT_PARAMETERS_V2 -+{ -+ PIXEL_CLOCK_PARAMETERS_V3 sDispClkInput; -+}GET_DISP_PLL_STATUS_INPUT_PARAMETERS_V2; -+ -+typedef struct _GET_DISP_PLL_STATUS_OUTPUT_PARAMETERS_V2 -+{ -+ UCHAR ucStatus; -+ UCHAR ucRefDivSrc; // =1: reference clock source from XTALIN, =0: source from PCIE ref clock -+ UCHAR ucReserved[2]; -+}GET_DISP_PLL_STATUS_OUTPUT_PARAMETERS_V2; -+ -+typedef struct _GET_DISP_PLL_STATUS_INPUT_PARAMETERS_V3 -+{ -+ PIXEL_CLOCK_PARAMETERS_V5 sDispClkInput; -+}GET_DISP_PLL_STATUS_INPUT_PARAMETERS_V3; -+ -+/****************************************************************************/ -+// Structures used by AdjustDisplayPllTable -+/****************************************************************************/ -+typedef struct _ADJUST_DISPLAY_PLL_PARAMETERS -+{ - USHORT usPixelClock; - UCHAR ucTransmitterID; - UCHAR ucEncodeMode; -- union { -- UCHAR ucDVOConfig; /* if DVO, need passing link rate and output 12bitlow or 24bit */ -- UCHAR ucConfig; /* if none DVO, not defined yet */ -+ union -+ { -+ UCHAR ucDVOConfig; //if DVO, need passing link rate and output 12bitlow or 24bit -+ UCHAR ucConfig; //if none DVO, not defined yet - }; - UCHAR ucReserved[3]; --} ADJUST_DISPLAY_PLL_PARAMETERS; -+}ADJUST_DISPLAY_PLL_PARAMETERS; - - #define ADJUST_DISPLAY_CONFIG_SS_ENABLE 0x10 -- - #define ADJUST_DISPLAY_PLL_PS_ALLOCATION ADJUST_DISPLAY_PLL_PARAMETERS - --/****************************************************************************/ --/* Structures used by EnableYUVTable */ --/****************************************************************************/ --typedef struct _ENABLE_YUV_PARAMETERS { -- UCHAR ucEnable; /* ATOM_ENABLE:Enable YUV or ATOM_DISABLE:Disable YUV (RGB) */ -- UCHAR ucCRTC; /* Which CRTC needs this YUV or RGB format */ -- UCHAR ucPadding[2]; --} ENABLE_YUV_PARAMETERS; -+typedef struct _ADJUST_DISPLAY_PLL_INPUT_PARAMETERS_V3 -+{ -+ USHORT usPixelClock; // target pixel clock -+ UCHAR ucTransmitterID; // transmitter id defined in objectid.h -+ UCHAR ucEncodeMode; // encoder mode: CRT, LVDS, DP, TMDS or HDMI -+ UCHAR ucDispPllConfig; // display pll configure parameter defined as following DISPPLL_CONFIG_XXXX -+ UCHAR ucReserved[3]; -+}ADJUST_DISPLAY_PLL_INPUT_PARAMETERS_V3; -+ -+// usDispPllConfig v1.2 for RoadRunner -+#define DISPPLL_CONFIG_DVO_RATE_SEL 0x0001 // need only when ucTransmitterID = DVO -+#define DISPPLL_CONFIG_DVO_DDR_SPEED 0x0000 // need only when ucTransmitterID = DVO -+#define DISPPLL_CONFIG_DVO_SDR_SPEED 0x0001 // need only when ucTransmitterID = DVO -+#define DISPPLL_CONFIG_DVO_OUTPUT_SEL 0x000c // need only when ucTransmitterID = DVO -+#define DISPPLL_CONFIG_DVO_LOW12BIT 0x0000 // need only when ucTransmitterID = DVO -+#define DISPPLL_CONFIG_DVO_UPPER12BIT 0x0004 // need only when ucTransmitterID = DVO -+#define DISPPLL_CONFIG_DVO_24BIT 0x0008 // need only when ucTransmitterID = DVO -+#define DISPPLL_CONFIG_SS_ENABLE 0x0010 // Only used when ucEncoderMode = DP or LVDS -+#define DISPPLL_CONFIG_COHERENT_MODE 0x0020 // Only used when ucEncoderMode = TMDS or HDMI -+#define DISPPLL_CONFIG_DUAL_LINK 0x0040 // Only used when ucEncoderMode = TMDS or LVDS -+ -+ -+typedef struct _ADJUST_DISPLAY_PLL_OUTPUT_PARAMETERS_V3 -+{ -+ ULONG ulDispPllFreq; // return display PPLL freq which is used to generate the pixclock, and related idclk, symclk etc -+ UCHAR ucRefDiv; // if it is none-zero, it is used to be calculated the other ppll parameter fb_divider and post_div ( if it is not given ) -+ UCHAR ucPostDiv; // if it is none-zero, it is used to be calculated the other ppll parameter fb_divider -+ UCHAR ucReserved[2]; -+}ADJUST_DISPLAY_PLL_OUTPUT_PARAMETERS_V3; -+ -+typedef struct _ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 -+{ -+ union -+ { -+ ADJUST_DISPLAY_PLL_INPUT_PARAMETERS_V3 sInput; -+ ADJUST_DISPLAY_PLL_OUTPUT_PARAMETERS_V3 sOutput; -+ }; -+} ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3; -+ -+/****************************************************************************/ -+// Structures used by EnableYUVTable -+/****************************************************************************/ -+typedef struct _ENABLE_YUV_PARAMETERS -+{ -+ UCHAR ucEnable; // ATOM_ENABLE:Enable YUV or ATOM_DISABLE:Disable YUV (RGB) -+ UCHAR ucCRTC; // Which CRTC needs this YUV or RGB format -+ UCHAR ucPadding[2]; -+}ENABLE_YUV_PARAMETERS; - #define ENABLE_YUV_PS_ALLOCATION ENABLE_YUV_PARAMETERS - --/****************************************************************************/ --/* Structures used by GetMemoryClockTable */ --/****************************************************************************/ --typedef struct _GET_MEMORY_CLOCK_PARAMETERS { -- ULONG ulReturnMemoryClock; /* current memory speed in 10KHz unit */ -+/****************************************************************************/ -+// Structures used by GetMemoryClockTable -+/****************************************************************************/ -+typedef struct _GET_MEMORY_CLOCK_PARAMETERS -+{ -+ ULONG ulReturnMemoryClock; // current memory speed in 10KHz unit - } GET_MEMORY_CLOCK_PARAMETERS; - #define GET_MEMORY_CLOCK_PS_ALLOCATION GET_MEMORY_CLOCK_PARAMETERS - --/****************************************************************************/ --/* Structures used by GetEngineClockTable */ --/****************************************************************************/ --typedef struct _GET_ENGINE_CLOCK_PARAMETERS { -- ULONG ulReturnEngineClock; /* current engine speed in 10KHz unit */ -+/****************************************************************************/ -+// Structures used by GetEngineClockTable -+/****************************************************************************/ -+typedef struct _GET_ENGINE_CLOCK_PARAMETERS -+{ -+ ULONG ulReturnEngineClock; // current engine speed in 10KHz unit - } GET_ENGINE_CLOCK_PARAMETERS; - #define GET_ENGINE_CLOCK_PS_ALLOCATION GET_ENGINE_CLOCK_PARAMETERS - --/****************************************************************************/ --/* Following Structures and constant may be obsolete */ --/****************************************************************************/ --/* Maxium 8 bytes,the data read in will be placed in the parameter space. */ --/* Read operaion successeful when the paramter space is non-zero, otherwise read operation failed */ --typedef struct _READ_EDID_FROM_HW_I2C_DATA_PARAMETERS { -- USHORT usPrescale; /* Ratio between Engine clock and I2C clock */ -- USHORT usVRAMAddress; /* Adress in Frame Buffer where to pace raw EDID */ -- USHORT usStatus; /* When use output: lower byte EDID checksum, high byte hardware status */ -- /* WHen use input: lower byte as 'byte to read':currently limited to 128byte or 1byte */ -- UCHAR ucSlaveAddr; /* Read from which slave */ -- UCHAR ucLineNumber; /* Read from which HW assisted line */ --} READ_EDID_FROM_HW_I2C_DATA_PARAMETERS; -+/****************************************************************************/ -+// Following Structures and constant may be obsolete -+/****************************************************************************/ -+//Maxium 8 bytes,the data read in will be placed in the parameter space. -+//Read operaion successeful when the paramter space is non-zero, otherwise read operation failed -+typedef struct _READ_EDID_FROM_HW_I2C_DATA_PARAMETERS -+{ -+ USHORT usPrescale; //Ratio between Engine clock and I2C clock -+ USHORT usVRAMAddress; //Adress in Frame Buffer where to pace raw EDID -+ USHORT usStatus; //When use output: lower byte EDID checksum, high byte hardware status -+ //WHen use input: lower byte as 'byte to read':currently limited to 128byte or 1byte -+ UCHAR ucSlaveAddr; //Read from which slave -+ UCHAR ucLineNumber; //Read from which HW assisted line -+}READ_EDID_FROM_HW_I2C_DATA_PARAMETERS; - #define READ_EDID_FROM_HW_I2C_DATA_PS_ALLOCATION READ_EDID_FROM_HW_I2C_DATA_PARAMETERS - -+ - #define ATOM_WRITE_I2C_FORMAT_PSOFFSET_PSDATABYTE 0 - #define ATOM_WRITE_I2C_FORMAT_PSOFFSET_PSTWODATABYTES 1 - #define ATOM_WRITE_I2C_FORMAT_PSCOUNTER_PSOFFSET_IDDATABLOCK 2 - #define ATOM_WRITE_I2C_FORMAT_PSCOUNTER_IDOFFSET_PLUS_IDDATABLOCK 3 - #define ATOM_WRITE_I2C_FORMAT_IDCOUNTER_IDOFFSET_IDDATABLOCK 4 - --typedef struct _WRITE_ONE_BYTE_HW_I2C_DATA_PARAMETERS { -- USHORT usPrescale; /* Ratio between Engine clock and I2C clock */ -- USHORT usByteOffset; /* Write to which byte */ -- /* Upper portion of usByteOffset is Format of data */ -- /* 1bytePS+offsetPS */ -- /* 2bytesPS+offsetPS */ -- /* blockID+offsetPS */ -- /* blockID+offsetID */ -- /* blockID+counterID+offsetID */ -- UCHAR ucData; /* PS data1 */ -- UCHAR ucStatus; /* Status byte 1=success, 2=failure, Also is used as PS data2 */ -- UCHAR ucSlaveAddr; /* Write to which slave */ -- UCHAR ucLineNumber; /* Write from which HW assisted line */ --} WRITE_ONE_BYTE_HW_I2C_DATA_PARAMETERS; -+typedef struct _WRITE_ONE_BYTE_HW_I2C_DATA_PARAMETERS -+{ -+ USHORT usPrescale; //Ratio between Engine clock and I2C clock -+ USHORT usByteOffset; //Write to which byte -+ //Upper portion of usByteOffset is Format of data -+ //1bytePS+offsetPS -+ //2bytesPS+offsetPS -+ //blockID+offsetPS -+ //blockID+offsetID -+ //blockID+counterID+offsetID -+ UCHAR ucData; //PS data1 -+ UCHAR ucStatus; //Status byte 1=success, 2=failure, Also is used as PS data2 -+ UCHAR ucSlaveAddr; //Write to which slave -+ UCHAR ucLineNumber; //Write from which HW assisted line -+}WRITE_ONE_BYTE_HW_I2C_DATA_PARAMETERS; - - #define WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION WRITE_ONE_BYTE_HW_I2C_DATA_PARAMETERS - --typedef struct _SET_UP_HW_I2C_DATA_PARAMETERS { -- USHORT usPrescale; /* Ratio between Engine clock and I2C clock */ -- UCHAR ucSlaveAddr; /* Write to which slave */ -- UCHAR ucLineNumber; /* Write from which HW assisted line */ --} SET_UP_HW_I2C_DATA_PARAMETERS; -+typedef struct _SET_UP_HW_I2C_DATA_PARAMETERS -+{ -+ USHORT usPrescale; //Ratio between Engine clock and I2C clock -+ UCHAR ucSlaveAddr; //Write to which slave -+ UCHAR ucLineNumber; //Write from which HW assisted line -+}SET_UP_HW_I2C_DATA_PARAMETERS; -+ - - /**************************************************************************/ - #define SPEED_FAN_CONTROL_PS_ALLOCATION WRITE_ONE_BYTE_HW_I2C_DATA_PARAMETERS - --/****************************************************************************/ --/* Structures used by PowerConnectorDetectionTable */ --/****************************************************************************/ --typedef struct _POWER_CONNECTOR_DETECTION_PARAMETERS { -- UCHAR ucPowerConnectorStatus; /* Used for return value 0: detected, 1:not detected */ -- UCHAR ucPwrBehaviorId; -- USHORT usPwrBudget; /* how much power currently boot to in unit of watt */ --} POWER_CONNECTOR_DETECTION_PARAMETERS; -- --typedef struct POWER_CONNECTOR_DETECTION_PS_ALLOCATION { -- UCHAR ucPowerConnectorStatus; /* Used for return value 0: detected, 1:not detected */ -- UCHAR ucReserved; -- USHORT usPwrBudget; /* how much power currently boot to in unit of watt */ -- WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; --} POWER_CONNECTOR_DETECTION_PS_ALLOCATION; -+/****************************************************************************/ -+// Structures used by PowerConnectorDetectionTable -+/****************************************************************************/ -+typedef struct _POWER_CONNECTOR_DETECTION_PARAMETERS -+{ -+ UCHAR ucPowerConnectorStatus; //Used for return value 0: detected, 1:not detected -+ UCHAR ucPwrBehaviorId; -+ USHORT usPwrBudget; //how much power currently boot to in unit of watt -+}POWER_CONNECTOR_DETECTION_PARAMETERS; -+ -+typedef struct POWER_CONNECTOR_DETECTION_PS_ALLOCATION -+{ -+ UCHAR ucPowerConnectorStatus; //Used for return value 0: detected, 1:not detected -+ UCHAR ucReserved; -+ USHORT usPwrBudget; //how much power currently boot to in unit of watt -+ WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; -+}POWER_CONNECTOR_DETECTION_PS_ALLOCATION; - - /****************************LVDS SS Command Table Definitions**********************/ - --/****************************************************************************/ --/* Structures used by EnableSpreadSpectrumOnPPLLTable */ --/****************************************************************************/ --typedef struct _ENABLE_LVDS_SS_PARAMETERS { -- USHORT usSpreadSpectrumPercentage; -- UCHAR ucSpreadSpectrumType; /* Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD */ -- UCHAR ucSpreadSpectrumStepSize_Delay; /* bits3:2 SS_STEP_SIZE; bit 6:4 SS_DELAY */ -- UCHAR ucEnable; /* ATOM_ENABLE or ATOM_DISABLE */ -- UCHAR ucPadding[3]; --} ENABLE_LVDS_SS_PARAMETERS; -- --/* ucTableFormatRevision=1,ucTableContentRevision=2 */ --typedef struct _ENABLE_LVDS_SS_PARAMETERS_V2 { -- USHORT usSpreadSpectrumPercentage; -- UCHAR ucSpreadSpectrumType; /* Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD */ -- UCHAR ucSpreadSpectrumStep; /* */ -- UCHAR ucEnable; /* ATOM_ENABLE or ATOM_DISABLE */ -- UCHAR ucSpreadSpectrumDelay; -- UCHAR ucSpreadSpectrumRange; -- UCHAR ucPadding; --} ENABLE_LVDS_SS_PARAMETERS_V2; -- --/* This new structure is based on ENABLE_LVDS_SS_PARAMETERS but expands to SS on PPLL, so other devices can use SS. */ --typedef struct _ENABLE_SPREAD_SPECTRUM_ON_PPLL { -- USHORT usSpreadSpectrumPercentage; -- UCHAR ucSpreadSpectrumType; /* Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD */ -- UCHAR ucSpreadSpectrumStep; /* */ -- UCHAR ucEnable; /* ATOM_ENABLE or ATOM_DISABLE */ -- UCHAR ucSpreadSpectrumDelay; -- UCHAR ucSpreadSpectrumRange; -- UCHAR ucPpll; /* ATOM_PPLL1/ATOM_PPLL2 */ --} ENABLE_SPREAD_SPECTRUM_ON_PPLL; -+/****************************************************************************/ -+// Structures used by EnableSpreadSpectrumOnPPLLTable -+/****************************************************************************/ -+typedef struct _ENABLE_LVDS_SS_PARAMETERS -+{ -+ USHORT usSpreadSpectrumPercentage; -+ UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD -+ UCHAR ucSpreadSpectrumStepSize_Delay; //bits3:2 SS_STEP_SIZE; bit 6:4 SS_DELAY -+ UCHAR ucEnable; //ATOM_ENABLE or ATOM_DISABLE -+ UCHAR ucPadding[3]; -+}ENABLE_LVDS_SS_PARAMETERS; -+ -+//ucTableFormatRevision=1,ucTableContentRevision=2 -+typedef struct _ENABLE_LVDS_SS_PARAMETERS_V2 -+{ -+ USHORT usSpreadSpectrumPercentage; -+ UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD -+ UCHAR ucSpreadSpectrumStep; // -+ UCHAR ucEnable; //ATOM_ENABLE or ATOM_DISABLE -+ UCHAR ucSpreadSpectrumDelay; -+ UCHAR ucSpreadSpectrumRange; -+ UCHAR ucPadding; -+}ENABLE_LVDS_SS_PARAMETERS_V2; -+ -+//This new structure is based on ENABLE_LVDS_SS_PARAMETERS but expands to SS on PPLL, so other devices can use SS. -+typedef struct _ENABLE_SPREAD_SPECTRUM_ON_PPLL -+{ -+ USHORT usSpreadSpectrumPercentage; -+ UCHAR ucSpreadSpectrumType; // Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD -+ UCHAR ucSpreadSpectrumStep; // -+ UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE -+ UCHAR ucSpreadSpectrumDelay; -+ UCHAR ucSpreadSpectrumRange; -+ UCHAR ucPpll; // ATOM_PPLL1/ATOM_PPLL2 -+}ENABLE_SPREAD_SPECTRUM_ON_PPLL; -+ -+typedef struct _ENABLE_SPREAD_SPECTRUM_ON_PPLL_V2 -+{ -+ USHORT usSpreadSpectrumPercentage; -+ UCHAR ucSpreadSpectrumType; // Bit[0]: 0-Down Spread,1-Center Spread. -+ // Bit[1]: 1-Ext. 0-Int. -+ // Bit[3:2]: =0 P1PLL =1 P2PLL =2 DCPLL -+ // Bits[7:4] reserved -+ UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE -+ USHORT usSpreadSpectrumAmount; // Includes SS_AMOUNT_FBDIV[7:0] and SS_AMOUNT_NFRAC_SLIP[11:8] -+ USHORT usSpreadSpectrumStep; // SS_STEP_SIZE_DSFRAC -+}ENABLE_SPREAD_SPECTRUM_ON_PPLL_V2; -+ -+#define ATOM_PPLL_SS_TYPE_V2_DOWN_SPREAD 0x00 -+#define ATOM_PPLL_SS_TYPE_V2_CENTRE_SPREAD 0x01 -+#define ATOM_PPLL_SS_TYPE_V2_EXT_SPREAD 0x02 -+#define ATOM_PPLL_SS_TYPE_V2_PPLL_SEL_MASK 0x0c -+#define ATOM_PPLL_SS_TYPE_V2_P1PLL 0x00 -+#define ATOM_PPLL_SS_TYPE_V2_P2PLL 0x04 -+#define ATOM_PPLL_SS_TYPE_V2_DCPLL 0x08 -+#define ATOM_PPLL_SS_AMOUNT_V2_FBDIV_MASK 0x00FF -+#define ATOM_PPLL_SS_AMOUNT_V2_FBDIV_SHIFT 0 -+#define ATOM_PPLL_SS_AMOUNT_V2_NFRAC_MASK 0x0F00 -+#define ATOM_PPLL_SS_AMOUNT_V2_NFRAC_SHIFT 8 - - #define ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION ENABLE_SPREAD_SPECTRUM_ON_PPLL - - /**************************************************************************/ - --typedef struct _SET_PIXEL_CLOCK_PS_ALLOCATION { -- PIXEL_CLOCK_PARAMETERS sPCLKInput; -- ENABLE_SPREAD_SPECTRUM_ON_PPLL sReserved; /* Caller doesn't need to init this portion */ --} SET_PIXEL_CLOCK_PS_ALLOCATION; -+typedef struct _SET_PIXEL_CLOCK_PS_ALLOCATION -+{ -+ PIXEL_CLOCK_PARAMETERS sPCLKInput; -+ ENABLE_SPREAD_SPECTRUM_ON_PPLL sReserved;//Caller doesn't need to init this portion -+}SET_PIXEL_CLOCK_PS_ALLOCATION; - - #define ENABLE_VGA_RENDER_PS_ALLOCATION SET_PIXEL_CLOCK_PS_ALLOCATION - --/****************************************************************************/ --/* Structures used by ### */ --/****************************************************************************/ --typedef struct _MEMORY_TRAINING_PARAMETERS { -- ULONG ulTargetMemoryClock; /* In 10Khz unit */ --} MEMORY_TRAINING_PARAMETERS; -+/****************************************************************************/ -+// Structures used by ### -+/****************************************************************************/ -+typedef struct _MEMORY_TRAINING_PARAMETERS -+{ -+ ULONG ulTargetMemoryClock; //In 10Khz unit -+}MEMORY_TRAINING_PARAMETERS; - #define MEMORY_TRAINING_PS_ALLOCATION MEMORY_TRAINING_PARAMETERS - -+ - /****************************LVDS and other encoder command table definitions **********************/ - --/****************************************************************************/ --/* Structures used by LVDSEncoderControlTable (Before DCE30) */ --/* LVTMAEncoderControlTable (Before DCE30) */ --/* TMDSAEncoderControlTable (Before DCE30) */ --/****************************************************************************/ --typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS { -- USHORT usPixelClock; /* in 10KHz; for bios convenient */ -- UCHAR ucMisc; /* bit0=0: Enable single link */ -- /* =1: Enable dual link */ -- /* Bit1=0: 666RGB */ -- /* =1: 888RGB */ -- UCHAR ucAction; /* 0: turn off encoder */ -- /* 1: setup and turn on encoder */ --} LVDS_ENCODER_CONTROL_PARAMETERS; - --#define LVDS_ENCODER_CONTROL_PS_ALLOCATION LVDS_ENCODER_CONTROL_PARAMETERS -+/****************************************************************************/ -+// Structures used by LVDSEncoderControlTable (Before DCE30) -+// LVTMAEncoderControlTable (Before DCE30) -+// TMDSAEncoderControlTable (Before DCE30) -+/****************************************************************************/ -+typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS -+{ -+ USHORT usPixelClock; // in 10KHz; for bios convenient -+ UCHAR ucMisc; // bit0=0: Enable single link -+ // =1: Enable dual link -+ // Bit1=0: 666RGB -+ // =1: 888RGB -+ UCHAR ucAction; // 0: turn off encoder -+ // 1: setup and turn on encoder -+}LVDS_ENCODER_CONTROL_PARAMETERS; - -+#define LVDS_ENCODER_CONTROL_PS_ALLOCATION LVDS_ENCODER_CONTROL_PARAMETERS -+ - #define TMDS1_ENCODER_CONTROL_PARAMETERS LVDS_ENCODER_CONTROL_PARAMETERS - #define TMDS1_ENCODER_CONTROL_PS_ALLOCATION TMDS1_ENCODER_CONTROL_PARAMETERS - - #define TMDS2_ENCODER_CONTROL_PARAMETERS TMDS1_ENCODER_CONTROL_PARAMETERS - #define TMDS2_ENCODER_CONTROL_PS_ALLOCATION TMDS2_ENCODER_CONTROL_PARAMETERS - --/* ucTableFormatRevision=1,ucTableContentRevision=2 */ --typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 { -- USHORT usPixelClock; /* in 10KHz; for bios convenient */ -- UCHAR ucMisc; /* see PANEL_ENCODER_MISC_xx definitions below */ -- UCHAR ucAction; /* 0: turn off encoder */ -- /* 1: setup and turn on encoder */ -- UCHAR ucTruncate; /* bit0=0: Disable truncate */ -- /* =1: Enable truncate */ -- /* bit4=0: 666RGB */ -- /* =1: 888RGB */ -- UCHAR ucSpatial; /* bit0=0: Disable spatial dithering */ -- /* =1: Enable spatial dithering */ -- /* bit4=0: 666RGB */ -- /* =1: 888RGB */ -- UCHAR ucTemporal; /* bit0=0: Disable temporal dithering */ -- /* =1: Enable temporal dithering */ -- /* bit4=0: 666RGB */ -- /* =1: 888RGB */ -- /* bit5=0: Gray level 2 */ -- /* =1: Gray level 4 */ -- UCHAR ucFRC; /* bit4=0: 25FRC_SEL pattern E */ -- /* =1: 25FRC_SEL pattern F */ -- /* bit6:5=0: 50FRC_SEL pattern A */ -- /* =1: 50FRC_SEL pattern B */ -- /* =2: 50FRC_SEL pattern C */ -- /* =3: 50FRC_SEL pattern D */ -- /* bit7=0: 75FRC_SEL pattern E */ -- /* =1: 75FRC_SEL pattern F */ --} LVDS_ENCODER_CONTROL_PARAMETERS_V2; - --#define LVDS_ENCODER_CONTROL_PS_ALLOCATION_V2 LVDS_ENCODER_CONTROL_PARAMETERS_V2 -+//ucTableFormatRevision=1,ucTableContentRevision=2 -+typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 -+{ -+ USHORT usPixelClock; // in 10KHz; for bios convenient -+ UCHAR ucMisc; // see PANEL_ENCODER_MISC_xx defintions below -+ UCHAR ucAction; // 0: turn off encoder -+ // 1: setup and turn on encoder -+ UCHAR ucTruncate; // bit0=0: Disable truncate -+ // =1: Enable truncate -+ // bit4=0: 666RGB -+ // =1: 888RGB -+ UCHAR ucSpatial; // bit0=0: Disable spatial dithering -+ // =1: Enable spatial dithering -+ // bit4=0: 666RGB -+ // =1: 888RGB -+ UCHAR ucTemporal; // bit0=0: Disable temporal dithering -+ // =1: Enable temporal dithering -+ // bit4=0: 666RGB -+ // =1: 888RGB -+ // bit5=0: Gray level 2 -+ // =1: Gray level 4 -+ UCHAR ucFRC; // bit4=0: 25FRC_SEL pattern E -+ // =1: 25FRC_SEL pattern F -+ // bit6:5=0: 50FRC_SEL pattern A -+ // =1: 50FRC_SEL pattern B -+ // =2: 50FRC_SEL pattern C -+ // =3: 50FRC_SEL pattern D -+ // bit7=0: 75FRC_SEL pattern E -+ // =1: 75FRC_SEL pattern F -+}LVDS_ENCODER_CONTROL_PARAMETERS_V2; - -+#define LVDS_ENCODER_CONTROL_PS_ALLOCATION_V2 LVDS_ENCODER_CONTROL_PARAMETERS_V2 -+ - #define TMDS1_ENCODER_CONTROL_PARAMETERS_V2 LVDS_ENCODER_CONTROL_PARAMETERS_V2 - #define TMDS1_ENCODER_CONTROL_PS_ALLOCATION_V2 TMDS1_ENCODER_CONTROL_PARAMETERS_V2 -- -+ - #define TMDS2_ENCODER_CONTROL_PARAMETERS_V2 TMDS1_ENCODER_CONTROL_PARAMETERS_V2 - #define TMDS2_ENCODER_CONTROL_PS_ALLOCATION_V2 TMDS2_ENCODER_CONTROL_PARAMETERS_V2 - -@@ -1185,38 +1536,42 @@ typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 { - #define TMDS2_ENCODER_CONTROL_PARAMETERS_V3 LVDS_ENCODER_CONTROL_PARAMETERS_V3 - #define TMDS2_ENCODER_CONTROL_PS_ALLOCATION_V3 TMDS2_ENCODER_CONTROL_PARAMETERS_V3 - --/****************************************************************************/ --/* Structures used by ### */ --/****************************************************************************/ --typedef struct _ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS { -- UCHAR ucEnable; /* Enable or Disable External TMDS encoder */ -- UCHAR ucMisc; /* Bit0=0:Enable Single link;=1:Enable Dual link;Bit1 {=0:666RGB, =1:888RGB} */ -- UCHAR ucPadding[2]; --} ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS; -- --typedef struct _ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION { -- ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS sXTmdsEncoder; -- WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; /* Caller doesn't need to init this portion */ --} ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION; -+/****************************************************************************/ -+// Structures used by ### -+/****************************************************************************/ -+typedef struct _ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS -+{ -+ UCHAR ucEnable; // Enable or Disable External TMDS encoder -+ UCHAR ucMisc; // Bit0=0:Enable Single link;=1:Enable Dual link;Bit1 {=0:666RGB, =1:888RGB} -+ UCHAR ucPadding[2]; -+}ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS; -+ -+typedef struct _ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION -+{ -+ ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS sXTmdsEncoder; -+ WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; //Caller doesn't need to init this portion -+}ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION; - - #define ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS_V2 LVDS_ENCODER_CONTROL_PARAMETERS_V2 - --typedef struct _ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION_V2 { -- ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS_V2 sXTmdsEncoder; -- WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; /* Caller doesn't need to init this portion */ --} ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION_V2; -+typedef struct _ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION_V2 -+{ -+ ENABLE_EXTERNAL_TMDS_ENCODER_PARAMETERS_V2 sXTmdsEncoder; -+ WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; //Caller doesn't need to init this portion -+}ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION_V2; - --typedef struct _EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION { -- DIG_ENCODER_CONTROL_PARAMETERS sDigEncoder; -- WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; --} EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION; -+typedef struct _EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION -+{ -+ DIG_ENCODER_CONTROL_PARAMETERS sDigEncoder; -+ WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; -+}EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION; - --/****************************************************************************/ --/* Structures used by DVOEncoderControlTable */ --/****************************************************************************/ --/* ucTableFormatRevision=1,ucTableContentRevision=3 */ -+/****************************************************************************/ -+// Structures used by DVOEncoderControlTable -+/****************************************************************************/ -+//ucTableFormatRevision=1,ucTableContentRevision=3 - --/* ucDVOConfig: */ -+//ucDVOConfig: - #define DVO_ENCODER_CONFIG_RATE_SEL 0x01 - #define DVO_ENCODER_CONFIG_DDR_SPEED 0x00 - #define DVO_ENCODER_CONFIG_SDR_SPEED 0x01 -@@ -1225,21 +1580,22 @@ typedef struct _EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION { - #define DVO_ENCODER_CONFIG_UPPER12BIT 0x04 - #define DVO_ENCODER_CONFIG_24BIT 0x08 - --typedef struct _DVO_ENCODER_CONTROL_PARAMETERS_V3 { -- USHORT usPixelClock; -- UCHAR ucDVOConfig; -- UCHAR ucAction; /* ATOM_ENABLE/ATOM_DISABLE/ATOM_HPD_INIT */ -- UCHAR ucReseved[4]; --} DVO_ENCODER_CONTROL_PARAMETERS_V3; -+typedef struct _DVO_ENCODER_CONTROL_PARAMETERS_V3 -+{ -+ USHORT usPixelClock; -+ UCHAR ucDVOConfig; -+ UCHAR ucAction; //ATOM_ENABLE/ATOM_DISABLE/ATOM_HPD_INIT -+ UCHAR ucReseved[4]; -+}DVO_ENCODER_CONTROL_PARAMETERS_V3; - #define DVO_ENCODER_CONTROL_PS_ALLOCATION_V3 DVO_ENCODER_CONTROL_PARAMETERS_V3 - --/* ucTableFormatRevision=1 */ --/* ucTableContentRevision=3 structure is not changed but usMisc add bit 1 as another input for */ --/* bit1=0: non-coherent mode */ --/* =1: coherent mode */ -+//ucTableFormatRevision=1 -+//ucTableContentRevision=3 structure is not changed but usMisc add bit 1 as another input for -+// bit1=0: non-coherent mode -+// =1: coherent mode - --/* ========================================================================================== */ --/* Only change is here next time when changing encoder parameter definitions again! */ -+//========================================================================================== -+//Only change is here next time when changing encoder parameter definitions again! - #define LVDS_ENCODER_CONTROL_PARAMETERS_LAST LVDS_ENCODER_CONTROL_PARAMETERS_V3 - #define LVDS_ENCODER_CONTROL_PS_ALLOCATION_LAST LVDS_ENCODER_CONTROL_PARAMETERS_LAST - -@@ -1252,7 +1608,7 @@ typedef struct _DVO_ENCODER_CONTROL_PARAMETERS_V3 { - #define DVO_ENCODER_CONTROL_PARAMETERS_LAST DVO_ENCODER_CONTROL_PARAMETERS - #define DVO_ENCODER_CONTROL_PS_ALLOCATION_LAST DVO_ENCODER_CONTROL_PS_ALLOCATION - --/* ========================================================================================== */ -+//========================================================================================== - #define PANEL_ENCODER_MISC_DUAL 0x01 - #define PANEL_ENCODER_MISC_COHERENT 0x02 - #define PANEL_ENCODER_MISC_TMDS_LINKB 0x04 -@@ -1281,159 +1637,159 @@ typedef struct _DVO_ENCODER_CONTROL_PARAMETERS_V3 { - #define PANEL_ENCODER_75FRC_E 0x00 - #define PANEL_ENCODER_75FRC_F 0x80 - --/****************************************************************************/ --/* Structures used by SetVoltageTable */ --/****************************************************************************/ -+/****************************************************************************/ -+// Structures used by SetVoltageTable -+/****************************************************************************/ - #define SET_VOLTAGE_TYPE_ASIC_VDDC 1 - #define SET_VOLTAGE_TYPE_ASIC_MVDDC 2 - #define SET_VOLTAGE_TYPE_ASIC_MVDDQ 3 - #define SET_VOLTAGE_TYPE_ASIC_VDDCI 4 - #define SET_VOLTAGE_INIT_MODE 5 --#define SET_VOLTAGE_GET_MAX_VOLTAGE 6 /* Gets the Max. voltage for the soldered Asic */ -+#define SET_VOLTAGE_GET_MAX_VOLTAGE 6 //Gets the Max. voltage for the soldered Asic - - #define SET_ASIC_VOLTAGE_MODE_ALL_SOURCE 0x1 - #define SET_ASIC_VOLTAGE_MODE_SOURCE_A 0x2 - #define SET_ASIC_VOLTAGE_MODE_SOURCE_B 0x4 - - #define SET_ASIC_VOLTAGE_MODE_SET_VOLTAGE 0x0 --#define SET_ASIC_VOLTAGE_MODE_GET_GPIOVAL 0x1 -+#define SET_ASIC_VOLTAGE_MODE_GET_GPIOVAL 0x1 - #define SET_ASIC_VOLTAGE_MODE_GET_GPIOMASK 0x2 - --typedef struct _SET_VOLTAGE_PARAMETERS { -- UCHAR ucVoltageType; /* To tell which voltage to set up, VDDC/MVDDC/MVDDQ */ -- UCHAR ucVoltageMode; /* To set all, to set source A or source B or ... */ -- UCHAR ucVoltageIndex; /* An index to tell which voltage level */ -- UCHAR ucReserved; --} SET_VOLTAGE_PARAMETERS; -- --typedef struct _SET_VOLTAGE_PARAMETERS_V2 { -- UCHAR ucVoltageType; /* To tell which voltage to set up, VDDC/MVDDC/MVDDQ */ -- UCHAR ucVoltageMode; /* Not used, maybe use for state machine for differen power mode */ -- USHORT usVoltageLevel; /* real voltage level */ --} SET_VOLTAGE_PARAMETERS_V2; -- --typedef struct _SET_VOLTAGE_PS_ALLOCATION { -- SET_VOLTAGE_PARAMETERS sASICSetVoltage; -- WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; --} SET_VOLTAGE_PS_ALLOCATION; -- --/****************************************************************************/ --/* Structures used by TVEncoderControlTable */ --/****************************************************************************/ --typedef struct _TV_ENCODER_CONTROL_PARAMETERS { -- USHORT usPixelClock; /* in 10KHz; for bios convenient */ -- UCHAR ucTvStandard; /* See definition "ATOM_TV_NTSC ..." */ -- UCHAR ucAction; /* 0: turn off encoder */ -- /* 1: setup and turn on encoder */ --} TV_ENCODER_CONTROL_PARAMETERS; -- --typedef struct _TV_ENCODER_CONTROL_PS_ALLOCATION { -- TV_ENCODER_CONTROL_PARAMETERS sTVEncoder; -- WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; /* Don't set this one */ --} TV_ENCODER_CONTROL_PS_ALLOCATION; -- --/* ==============================Data Table Portion==================================== */ -- --#ifdef UEFI_BUILD --#define UTEMP USHORT --#define USHORT void* --#endif -- --/****************************************************************************/ --/* Structure used in Data.mtb */ --/****************************************************************************/ --typedef struct _ATOM_MASTER_LIST_OF_DATA_TABLES { -- USHORT UtilityPipeLine; /* Offest for the utility to get parser info,Don't change this position! */ -- USHORT MultimediaCapabilityInfo; /* Only used by MM Lib,latest version 1.1, not configuable from Bios, need to include the table to build Bios */ -- USHORT MultimediaConfigInfo; /* Only used by MM Lib,latest version 2.1, not configuable from Bios, need to include the table to build Bios */ -- USHORT StandardVESA_Timing; /* Only used by Bios */ -- USHORT FirmwareInfo; /* Shared by various SW components,latest version 1.4 */ -- USHORT DAC_Info; /* Will be obsolete from R600 */ -- USHORT LVDS_Info; /* Shared by various SW components,latest version 1.1 */ -- USHORT TMDS_Info; /* Will be obsolete from R600 */ -- USHORT AnalogTV_Info; /* Shared by various SW components,latest version 1.1 */ -- USHORT SupportedDevicesInfo; /* Will be obsolete from R600 */ -- USHORT GPIO_I2C_Info; /* Shared by various SW components,latest version 1.2 will be used from R600 */ -- USHORT VRAM_UsageByFirmware; /* Shared by various SW components,latest version 1.3 will be used from R600 */ -- USHORT GPIO_Pin_LUT; /* Shared by various SW components,latest version 1.1 */ -- USHORT VESA_ToInternalModeLUT; /* Only used by Bios */ -- USHORT ComponentVideoInfo; /* Shared by various SW components,latest version 2.1 will be used from R600 */ -- USHORT PowerPlayInfo; /* Shared by various SW components,latest version 2.1,new design from R600 */ -- USHORT CompassionateData; /* Will be obsolete from R600 */ -- USHORT SaveRestoreInfo; /* Only used by Bios */ -- USHORT PPLL_SS_Info; /* Shared by various SW components,latest version 1.2, used to call SS_Info, change to new name because of int ASIC SS info */ -- USHORT OemInfo; /* Defined and used by external SW, should be obsolete soon */ -- USHORT XTMDS_Info; /* Will be obsolete from R600 */ -- USHORT MclkSS_Info; /* Shared by various SW components,latest version 1.1, only enabled when ext SS chip is used */ -- USHORT Object_Header; /* Shared by various SW components,latest version 1.1 */ -- USHORT IndirectIOAccess; /* Only used by Bios,this table position can't change at all!! */ -- USHORT MC_InitParameter; /* Only used by command table */ -- USHORT ASIC_VDDC_Info; /* Will be obsolete from R600 */ -- USHORT ASIC_InternalSS_Info; /* New tabel name from R600, used to be called "ASIC_MVDDC_Info" */ -- USHORT TV_VideoMode; /* Only used by command table */ -- USHORT VRAM_Info; /* Only used by command table, latest version 1.3 */ -- USHORT MemoryTrainingInfo; /* Used for VBIOS and Diag utility for memory training purpose since R600. the new table rev start from 2.1 */ -- USHORT IntegratedSystemInfo; /* Shared by various SW components */ -- USHORT ASIC_ProfilingInfo; /* New table name from R600, used to be called "ASIC_VDDCI_Info" for pre-R600 */ -- USHORT VoltageObjectInfo; /* Shared by various SW components, latest version 1.1 */ -- USHORT PowerSourceInfo; /* Shared by various SW components, latest versoin 1.1 */ --} ATOM_MASTER_LIST_OF_DATA_TABLES; -- --#ifdef UEFI_BUILD --#define USHORT UTEMP --#endif -+typedef struct _SET_VOLTAGE_PARAMETERS -+{ -+ UCHAR ucVoltageType; // To tell which voltage to set up, VDDC/MVDDC/MVDDQ -+ UCHAR ucVoltageMode; // To set all, to set source A or source B or ... -+ UCHAR ucVoltageIndex; // An index to tell which voltage level -+ UCHAR ucReserved; -+}SET_VOLTAGE_PARAMETERS; - --typedef struct _ATOM_MASTER_DATA_TABLE { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_MASTER_LIST_OF_DATA_TABLES ListOfDataTables; --} ATOM_MASTER_DATA_TABLE; -+typedef struct _SET_VOLTAGE_PARAMETERS_V2 -+{ -+ UCHAR ucVoltageType; // To tell which voltage to set up, VDDC/MVDDC/MVDDQ -+ UCHAR ucVoltageMode; // Not used, maybe use for state machine for differen power mode -+ USHORT usVoltageLevel; // real voltage level -+}SET_VOLTAGE_PARAMETERS_V2; - --/****************************************************************************/ --/* Structure used in MultimediaCapabilityInfoTable */ --/****************************************************************************/ --typedef struct _ATOM_MULTIMEDIA_CAPABILITY_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ULONG ulSignature; /* HW info table signature string "$ATI" */ -- UCHAR ucI2C_Type; /* I2C type (normal GP_IO, ImpactTV GP_IO, Dedicated I2C pin, etc) */ -- UCHAR ucTV_OutInfo; /* Type of TV out supported (3:0) and video out crystal frequency (6:4) and TV data port (7) */ -- UCHAR ucVideoPortInfo; /* Provides the video port capabilities */ -- UCHAR ucHostPortInfo; /* Provides host port configuration information */ --} ATOM_MULTIMEDIA_CAPABILITY_INFO; -+typedef struct _SET_VOLTAGE_PS_ALLOCATION -+{ -+ SET_VOLTAGE_PARAMETERS sASICSetVoltage; -+ WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; -+}SET_VOLTAGE_PS_ALLOCATION; -+ -+/****************************************************************************/ -+// Structures used by TVEncoderControlTable -+/****************************************************************************/ -+typedef struct _TV_ENCODER_CONTROL_PARAMETERS -+{ -+ USHORT usPixelClock; // in 10KHz; for bios convenient -+ UCHAR ucTvStandard; // See definition "ATOM_TV_NTSC ..." -+ UCHAR ucAction; // 0: turn off encoder -+ // 1: setup and turn on encoder -+}TV_ENCODER_CONTROL_PARAMETERS; - --/****************************************************************************/ --/* Structure used in MultimediaConfigInfoTable */ --/****************************************************************************/ --typedef struct _ATOM_MULTIMEDIA_CONFIG_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ULONG ulSignature; /* MM info table signature sting "$MMT" */ -- UCHAR ucTunerInfo; /* Type of tuner installed on the adapter (4:0) and video input for tuner (7:5) */ -- UCHAR ucAudioChipInfo; /* List the audio chip type (3:0) product type (4) and OEM revision (7:5) */ -- UCHAR ucProductID; /* Defines as OEM ID or ATI board ID dependent on product type setting */ -- UCHAR ucMiscInfo1; /* Tuner voltage (1:0) HW teletext support (3:2) FM audio decoder (5:4) reserved (6) audio scrambling (7) */ -- UCHAR ucMiscInfo2; /* I2S input config (0) I2S output config (1) I2S Audio Chip (4:2) SPDIF Output Config (5) reserved (7:6) */ -- UCHAR ucMiscInfo3; /* Video Decoder Type (3:0) Video In Standard/Crystal (7:4) */ -- UCHAR ucMiscInfo4; /* Video Decoder Host Config (2:0) reserved (7:3) */ -- UCHAR ucVideoInput0Info; /* Video Input 0 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6) */ -- UCHAR ucVideoInput1Info; /* Video Input 1 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6) */ -- UCHAR ucVideoInput2Info; /* Video Input 2 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6) */ -- UCHAR ucVideoInput3Info; /* Video Input 3 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6) */ -- UCHAR ucVideoInput4Info; /* Video Input 4 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6) */ --} ATOM_MULTIMEDIA_CONFIG_INFO; -+typedef struct _TV_ENCODER_CONTROL_PS_ALLOCATION -+{ -+ TV_ENCODER_CONTROL_PARAMETERS sTVEncoder; -+ WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; // Don't set this one -+}TV_ENCODER_CONTROL_PS_ALLOCATION; - --/****************************************************************************/ --/* Structures used in FirmwareInfoTable */ --/****************************************************************************/ -+//==============================Data Table Portion==================================== - --/* usBIOSCapability Definition: */ --/* Bit 0 = 0: Bios image is not Posted, =1:Bios image is Posted; */ --/* Bit 1 = 0: Dual CRTC is not supported, =1: Dual CRTC is supported; */ --/* Bit 2 = 0: Extended Desktop is not supported, =1: Extended Desktop is supported; */ --/* Others: Reserved */ -+/****************************************************************************/ -+// Structure used in Data.mtb -+/****************************************************************************/ -+typedef struct _ATOM_MASTER_LIST_OF_DATA_TABLES -+{ -+ USHORT UtilityPipeLine; // Offest for the utility to get parser info,Don't change this position! -+ USHORT MultimediaCapabilityInfo; // Only used by MM Lib,latest version 1.1, not configuable from Bios, need to include the table to build Bios -+ USHORT MultimediaConfigInfo; // Only used by MM Lib,latest version 2.1, not configuable from Bios, need to include the table to build Bios -+ USHORT StandardVESA_Timing; // Only used by Bios -+ USHORT FirmwareInfo; // Shared by various SW components,latest version 1.4 -+ USHORT DAC_Info; // Will be obsolete from R600 -+ USHORT LVDS_Info; // Shared by various SW components,latest version 1.1 -+ USHORT TMDS_Info; // Will be obsolete from R600 -+ USHORT AnalogTV_Info; // Shared by various SW components,latest version 1.1 -+ USHORT SupportedDevicesInfo; // Will be obsolete from R600 -+ USHORT GPIO_I2C_Info; // Shared by various SW components,latest version 1.2 will be used from R600 -+ USHORT VRAM_UsageByFirmware; // Shared by various SW components,latest version 1.3 will be used from R600 -+ USHORT GPIO_Pin_LUT; // Shared by various SW components,latest version 1.1 -+ USHORT VESA_ToInternalModeLUT; // Only used by Bios -+ USHORT ComponentVideoInfo; // Shared by various SW components,latest version 2.1 will be used from R600 -+ USHORT PowerPlayInfo; // Shared by various SW components,latest version 2.1,new design from R600 -+ USHORT CompassionateData; // Will be obsolete from R600 -+ USHORT SaveRestoreInfo; // Only used by Bios -+ USHORT PPLL_SS_Info; // Shared by various SW components,latest version 1.2, used to call SS_Info, change to new name because of int ASIC SS info -+ USHORT OemInfo; // Defined and used by external SW, should be obsolete soon -+ USHORT XTMDS_Info; // Will be obsolete from R600 -+ USHORT MclkSS_Info; // Shared by various SW components,latest version 1.1, only enabled when ext SS chip is used -+ USHORT Object_Header; // Shared by various SW components,latest version 1.1 -+ USHORT IndirectIOAccess; // Only used by Bios,this table position can't change at all!! -+ USHORT MC_InitParameter; // Only used by command table -+ USHORT ASIC_VDDC_Info; // Will be obsolete from R600 -+ USHORT ASIC_InternalSS_Info; // New tabel name from R600, used to be called "ASIC_MVDDC_Info" -+ USHORT TV_VideoMode; // Only used by command table -+ USHORT VRAM_Info; // Only used by command table, latest version 1.3 -+ USHORT MemoryTrainingInfo; // Used for VBIOS and Diag utility for memory training purpose since R600. the new table rev start from 2.1 -+ USHORT IntegratedSystemInfo; // Shared by various SW components -+ USHORT ASIC_ProfilingInfo; // New table name from R600, used to be called "ASIC_VDDCI_Info" for pre-R600 -+ USHORT VoltageObjectInfo; // Shared by various SW components, latest version 1.1 -+ USHORT PowerSourceInfo; // Shared by various SW components, latest versoin 1.1 -+}ATOM_MASTER_LIST_OF_DATA_TABLES; -+ -+typedef struct _ATOM_MASTER_DATA_TABLE -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_MASTER_LIST_OF_DATA_TABLES ListOfDataTables; -+}ATOM_MASTER_DATA_TABLE; -+ -+/****************************************************************************/ -+// Structure used in MultimediaCapabilityInfoTable -+/****************************************************************************/ -+typedef struct _ATOM_MULTIMEDIA_CAPABILITY_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulSignature; // HW info table signature string "$ATI" -+ UCHAR ucI2C_Type; // I2C type (normal GP_IO, ImpactTV GP_IO, Dedicated I2C pin, etc) -+ UCHAR ucTV_OutInfo; // Type of TV out supported (3:0) and video out crystal frequency (6:4) and TV data port (7) -+ UCHAR ucVideoPortInfo; // Provides the video port capabilities -+ UCHAR ucHostPortInfo; // Provides host port configuration information -+}ATOM_MULTIMEDIA_CAPABILITY_INFO; -+ -+/****************************************************************************/ -+// Structure used in MultimediaConfigInfoTable -+/****************************************************************************/ -+typedef struct _ATOM_MULTIMEDIA_CONFIG_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulSignature; // MM info table signature sting "$MMT" -+ UCHAR ucTunerInfo; // Type of tuner installed on the adapter (4:0) and video input for tuner (7:5) -+ UCHAR ucAudioChipInfo; // List the audio chip type (3:0) product type (4) and OEM revision (7:5) -+ UCHAR ucProductID; // Defines as OEM ID or ATI board ID dependent on product type setting -+ UCHAR ucMiscInfo1; // Tuner voltage (1:0) HW teletext support (3:2) FM audio decoder (5:4) reserved (6) audio scrambling (7) -+ UCHAR ucMiscInfo2; // I2S input config (0) I2S output config (1) I2S Audio Chip (4:2) SPDIF Output Config (5) reserved (7:6) -+ UCHAR ucMiscInfo3; // Video Decoder Type (3:0) Video In Standard/Crystal (7:4) -+ UCHAR ucMiscInfo4; // Video Decoder Host Config (2:0) reserved (7:3) -+ UCHAR ucVideoInput0Info;// Video Input 0 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6) -+ UCHAR ucVideoInput1Info;// Video Input 1 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6) -+ UCHAR ucVideoInput2Info;// Video Input 2 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6) -+ UCHAR ucVideoInput3Info;// Video Input 3 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6) -+ UCHAR ucVideoInput4Info;// Video Input 4 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6) -+}ATOM_MULTIMEDIA_CONFIG_INFO; -+ -+/****************************************************************************/ -+// Structures used in FirmwareInfoTable -+/****************************************************************************/ -+ -+// usBIOSCapability Defintion: -+// Bit 0 = 0: Bios image is not Posted, =1:Bios image is Posted; -+// Bit 1 = 0: Dual CRTC is not supported, =1: Dual CRTC is supported; -+// Bit 2 = 0: Extended Desktop is not supported, =1: Extended Desktop is supported; -+// Others: Reserved - #define ATOM_BIOS_INFO_ATOM_FIRMWARE_POSTED 0x0001 - #define ATOM_BIOS_INFO_DUAL_CRTC_SUPPORT 0x0002 - #define ATOM_BIOS_INFO_EXTENDED_DESKTOP_SUPPORT 0x0004 --#define ATOM_BIOS_INFO_MEMORY_CLOCK_SS_SUPPORT 0x0008 --#define ATOM_BIOS_INFO_ENGINE_CLOCK_SS_SUPPORT 0x0010 -+#define ATOM_BIOS_INFO_MEMORY_CLOCK_SS_SUPPORT 0x0008 // (valid from v1.1 ~v1.4):=1: memclk SS enable, =0 memclk SS disable. -+#define ATOM_BIOS_INFO_ENGINE_CLOCK_SS_SUPPORT 0x0010 // (valid from v1.1 ~v1.4):=1: engclk SS enable, =0 engclk SS disable. - #define ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU 0x0020 - #define ATOM_BIOS_INFO_WMI_SUPPORT 0x0040 - #define ATOM_BIOS_INFO_PPMODE_ASSIGNGED_BY_SYSTEM 0x0080 -@@ -1441,242 +1797,292 @@ typedef struct _ATOM_MULTIMEDIA_CONFIG_INFO { - #define ATOM_BIOS_INFO_HYPERMEMORY_SIZE_MASK 0x1E00 - #define ATOM_BIOS_INFO_VPOST_WITHOUT_FIRST_MODE_SET 0x2000 - #define ATOM_BIOS_INFO_BIOS_SCRATCH6_SCL2_REDEFINE 0x4000 -+#define ATOM_BIOS_INFO_MEMORY_CLOCK_EXT_SS_SUPPORT 0x0008 // (valid from v2.1 ): =1: memclk ss enable with external ss chip -+#define ATOM_BIOS_INFO_ENGINE_CLOCK_EXT_SS_SUPPORT 0x0010 // (valid from v2.1 ): =1: engclk ss enable with external ss chip - - #ifndef _H2INC - --/* Please don't add or expand this bitfield structure below, this one will retire soon.! */ --typedef struct _ATOM_FIRMWARE_CAPABILITY { -+//Please don't add or expand this bitfield structure below, this one will retire soon.! -+typedef struct _ATOM_FIRMWARE_CAPABILITY -+{ - #if ATOM_BIG_ENDIAN -- USHORT Reserved:3; -- USHORT HyperMemory_Size:4; -- USHORT HyperMemory_Support:1; -- USHORT PPMode_Assigned:1; -- USHORT WMI_SUPPORT:1; -- USHORT GPUControlsBL:1; -- USHORT EngineClockSS_Support:1; -- USHORT MemoryClockSS_Support:1; -- USHORT ExtendedDesktopSupport:1; -- USHORT DualCRTC_Support:1; -- USHORT FirmwarePosted:1; -+ USHORT Reserved:3; -+ USHORT HyperMemory_Size:4; -+ USHORT HyperMemory_Support:1; -+ USHORT PPMode_Assigned:1; -+ USHORT WMI_SUPPORT:1; -+ USHORT GPUControlsBL:1; -+ USHORT EngineClockSS_Support:1; -+ USHORT MemoryClockSS_Support:1; -+ USHORT ExtendedDesktopSupport:1; -+ USHORT DualCRTC_Support:1; -+ USHORT FirmwarePosted:1; - #else -- USHORT FirmwarePosted:1; -- USHORT DualCRTC_Support:1; -- USHORT ExtendedDesktopSupport:1; -- USHORT MemoryClockSS_Support:1; -- USHORT EngineClockSS_Support:1; -- USHORT GPUControlsBL:1; -- USHORT WMI_SUPPORT:1; -- USHORT PPMode_Assigned:1; -- USHORT HyperMemory_Support:1; -- USHORT HyperMemory_Size:4; -- USHORT Reserved:3; -+ USHORT FirmwarePosted:1; -+ USHORT DualCRTC_Support:1; -+ USHORT ExtendedDesktopSupport:1; -+ USHORT MemoryClockSS_Support:1; -+ USHORT EngineClockSS_Support:1; -+ USHORT GPUControlsBL:1; -+ USHORT WMI_SUPPORT:1; -+ USHORT PPMode_Assigned:1; -+ USHORT HyperMemory_Support:1; -+ USHORT HyperMemory_Size:4; -+ USHORT Reserved:3; - #endif --} ATOM_FIRMWARE_CAPABILITY; -+}ATOM_FIRMWARE_CAPABILITY; - --typedef union _ATOM_FIRMWARE_CAPABILITY_ACCESS { -- ATOM_FIRMWARE_CAPABILITY sbfAccess; -- USHORT susAccess; --} ATOM_FIRMWARE_CAPABILITY_ACCESS; -+typedef union _ATOM_FIRMWARE_CAPABILITY_ACCESS -+{ -+ ATOM_FIRMWARE_CAPABILITY sbfAccess; -+ USHORT susAccess; -+}ATOM_FIRMWARE_CAPABILITY_ACCESS; - - #else - --typedef union _ATOM_FIRMWARE_CAPABILITY_ACCESS { -- USHORT susAccess; --} ATOM_FIRMWARE_CAPABILITY_ACCESS; -+typedef union _ATOM_FIRMWARE_CAPABILITY_ACCESS -+{ -+ USHORT susAccess; -+}ATOM_FIRMWARE_CAPABILITY_ACCESS; - - #endif - --typedef struct _ATOM_FIRMWARE_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ULONG ulFirmwareRevision; -- ULONG ulDefaultEngineClock; /* In 10Khz unit */ -- ULONG ulDefaultMemoryClock; /* In 10Khz unit */ -- ULONG ulDriverTargetEngineClock; /* In 10Khz unit */ -- ULONG ulDriverTargetMemoryClock; /* In 10Khz unit */ -- ULONG ulMaxEngineClockPLL_Output; /* In 10Khz unit */ -- ULONG ulMaxMemoryClockPLL_Output; /* In 10Khz unit */ -- ULONG ulMaxPixelClockPLL_Output; /* In 10Khz unit */ -- ULONG ulASICMaxEngineClock; /* In 10Khz unit */ -- ULONG ulASICMaxMemoryClock; /* In 10Khz unit */ -- UCHAR ucASICMaxTemperature; -- UCHAR ucPadding[3]; /* Don't use them */ -- ULONG aulReservedForBIOS[3]; /* Don't use them */ -- USHORT usMinEngineClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxEngineClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinEngineClockPLL_Output; /* In 10Khz unit */ -- USHORT usMinMemoryClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxMemoryClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinMemoryClockPLL_Output; /* In 10Khz unit */ -- USHORT usMaxPixelClock; /* In 10Khz unit, Max. Pclk */ -- USHORT usMinPixelClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxPixelClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinPixelClockPLL_Output; /* In 10Khz unit, the definitions above can't change!!! */ -- ATOM_FIRMWARE_CAPABILITY_ACCESS usFirmwareCapability; -- USHORT usReferenceClock; /* In 10Khz unit */ -- USHORT usPM_RTS_Location; /* RTS PM4 starting location in ROM in 1Kb unit */ -- UCHAR ucPM_RTS_StreamSize; /* RTS PM4 packets in Kb unit */ -- UCHAR ucDesign_ID; /* Indicate what is the board design */ -- UCHAR ucMemoryModule_ID; /* Indicate what is the board design */ --} ATOM_FIRMWARE_INFO; -- --typedef struct _ATOM_FIRMWARE_INFO_V1_2 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ULONG ulFirmwareRevision; -- ULONG ulDefaultEngineClock; /* In 10Khz unit */ -- ULONG ulDefaultMemoryClock; /* In 10Khz unit */ -- ULONG ulDriverTargetEngineClock; /* In 10Khz unit */ -- ULONG ulDriverTargetMemoryClock; /* In 10Khz unit */ -- ULONG ulMaxEngineClockPLL_Output; /* In 10Khz unit */ -- ULONG ulMaxMemoryClockPLL_Output; /* In 10Khz unit */ -- ULONG ulMaxPixelClockPLL_Output; /* In 10Khz unit */ -- ULONG ulASICMaxEngineClock; /* In 10Khz unit */ -- ULONG ulASICMaxMemoryClock; /* In 10Khz unit */ -- UCHAR ucASICMaxTemperature; -- UCHAR ucMinAllowedBL_Level; -- UCHAR ucPadding[2]; /* Don't use them */ -- ULONG aulReservedForBIOS[2]; /* Don't use them */ -- ULONG ulMinPixelClockPLL_Output; /* In 10Khz unit */ -- USHORT usMinEngineClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxEngineClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinEngineClockPLL_Output; /* In 10Khz unit */ -- USHORT usMinMemoryClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxMemoryClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinMemoryClockPLL_Output; /* In 10Khz unit */ -- USHORT usMaxPixelClock; /* In 10Khz unit, Max. Pclk */ -- USHORT usMinPixelClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxPixelClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinPixelClockPLL_Output; /* In 10Khz unit - lower 16bit of ulMinPixelClockPLL_Output */ -- ATOM_FIRMWARE_CAPABILITY_ACCESS usFirmwareCapability; -- USHORT usReferenceClock; /* In 10Khz unit */ -- USHORT usPM_RTS_Location; /* RTS PM4 starting location in ROM in 1Kb unit */ -- UCHAR ucPM_RTS_StreamSize; /* RTS PM4 packets in Kb unit */ -- UCHAR ucDesign_ID; /* Indicate what is the board design */ -- UCHAR ucMemoryModule_ID; /* Indicate what is the board design */ --} ATOM_FIRMWARE_INFO_V1_2; -- --typedef struct _ATOM_FIRMWARE_INFO_V1_3 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ULONG ulFirmwareRevision; -- ULONG ulDefaultEngineClock; /* In 10Khz unit */ -- ULONG ulDefaultMemoryClock; /* In 10Khz unit */ -- ULONG ulDriverTargetEngineClock; /* In 10Khz unit */ -- ULONG ulDriverTargetMemoryClock; /* In 10Khz unit */ -- ULONG ulMaxEngineClockPLL_Output; /* In 10Khz unit */ -- ULONG ulMaxMemoryClockPLL_Output; /* In 10Khz unit */ -- ULONG ulMaxPixelClockPLL_Output; /* In 10Khz unit */ -- ULONG ulASICMaxEngineClock; /* In 10Khz unit */ -- ULONG ulASICMaxMemoryClock; /* In 10Khz unit */ -- UCHAR ucASICMaxTemperature; -- UCHAR ucMinAllowedBL_Level; -- UCHAR ucPadding[2]; /* Don't use them */ -- ULONG aulReservedForBIOS; /* Don't use them */ -- ULONG ul3DAccelerationEngineClock; /* In 10Khz unit */ -- ULONG ulMinPixelClockPLL_Output; /* In 10Khz unit */ -- USHORT usMinEngineClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxEngineClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinEngineClockPLL_Output; /* In 10Khz unit */ -- USHORT usMinMemoryClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxMemoryClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinMemoryClockPLL_Output; /* In 10Khz unit */ -- USHORT usMaxPixelClock; /* In 10Khz unit, Max. Pclk */ -- USHORT usMinPixelClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxPixelClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinPixelClockPLL_Output; /* In 10Khz unit - lower 16bit of ulMinPixelClockPLL_Output */ -- ATOM_FIRMWARE_CAPABILITY_ACCESS usFirmwareCapability; -- USHORT usReferenceClock; /* In 10Khz unit */ -- USHORT usPM_RTS_Location; /* RTS PM4 starting location in ROM in 1Kb unit */ -- UCHAR ucPM_RTS_StreamSize; /* RTS PM4 packets in Kb unit */ -- UCHAR ucDesign_ID; /* Indicate what is the board design */ -- UCHAR ucMemoryModule_ID; /* Indicate what is the board design */ --} ATOM_FIRMWARE_INFO_V1_3; -- --typedef struct _ATOM_FIRMWARE_INFO_V1_4 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ULONG ulFirmwareRevision; -- ULONG ulDefaultEngineClock; /* In 10Khz unit */ -- ULONG ulDefaultMemoryClock; /* In 10Khz unit */ -- ULONG ulDriverTargetEngineClock; /* In 10Khz unit */ -- ULONG ulDriverTargetMemoryClock; /* In 10Khz unit */ -- ULONG ulMaxEngineClockPLL_Output; /* In 10Khz unit */ -- ULONG ulMaxMemoryClockPLL_Output; /* In 10Khz unit */ -- ULONG ulMaxPixelClockPLL_Output; /* In 10Khz unit */ -- ULONG ulASICMaxEngineClock; /* In 10Khz unit */ -- ULONG ulASICMaxMemoryClock; /* In 10Khz unit */ -- UCHAR ucASICMaxTemperature; -- UCHAR ucMinAllowedBL_Level; -- USHORT usBootUpVDDCVoltage; /* In MV unit */ -- USHORT usLcdMinPixelClockPLL_Output; /* In MHz unit */ -- USHORT usLcdMaxPixelClockPLL_Output; /* In MHz unit */ -- ULONG ul3DAccelerationEngineClock; /* In 10Khz unit */ -- ULONG ulMinPixelClockPLL_Output; /* In 10Khz unit */ -- USHORT usMinEngineClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxEngineClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinEngineClockPLL_Output; /* In 10Khz unit */ -- USHORT usMinMemoryClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxMemoryClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinMemoryClockPLL_Output; /* In 10Khz unit */ -- USHORT usMaxPixelClock; /* In 10Khz unit, Max. Pclk */ -- USHORT usMinPixelClockPLL_Input; /* In 10Khz unit */ -- USHORT usMaxPixelClockPLL_Input; /* In 10Khz unit */ -- USHORT usMinPixelClockPLL_Output; /* In 10Khz unit - lower 16bit of ulMinPixelClockPLL_Output */ -- ATOM_FIRMWARE_CAPABILITY_ACCESS usFirmwareCapability; -- USHORT usReferenceClock; /* In 10Khz unit */ -- USHORT usPM_RTS_Location; /* RTS PM4 starting location in ROM in 1Kb unit */ -- UCHAR ucPM_RTS_StreamSize; /* RTS PM4 packets in Kb unit */ -- UCHAR ucDesign_ID; /* Indicate what is the board design */ -- UCHAR ucMemoryModule_ID; /* Indicate what is the board design */ --} ATOM_FIRMWARE_INFO_V1_4; -- --#define ATOM_FIRMWARE_INFO_LAST ATOM_FIRMWARE_INFO_V1_4 -- --/****************************************************************************/ --/* Structures used in IntegratedSystemInfoTable */ --/****************************************************************************/ -+typedef struct _ATOM_FIRMWARE_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulFirmwareRevision; -+ ULONG ulDefaultEngineClock; //In 10Khz unit -+ ULONG ulDefaultMemoryClock; //In 10Khz unit -+ ULONG ulDriverTargetEngineClock; //In 10Khz unit -+ ULONG ulDriverTargetMemoryClock; //In 10Khz unit -+ ULONG ulMaxEngineClockPLL_Output; //In 10Khz unit -+ ULONG ulMaxMemoryClockPLL_Output; //In 10Khz unit -+ ULONG ulMaxPixelClockPLL_Output; //In 10Khz unit -+ ULONG ulASICMaxEngineClock; //In 10Khz unit -+ ULONG ulASICMaxMemoryClock; //In 10Khz unit -+ UCHAR ucASICMaxTemperature; -+ UCHAR ucPadding[3]; //Don't use them -+ ULONG aulReservedForBIOS[3]; //Don't use them -+ USHORT usMinEngineClockPLL_Input; //In 10Khz unit -+ USHORT usMaxEngineClockPLL_Input; //In 10Khz unit -+ USHORT usMinEngineClockPLL_Output; //In 10Khz unit -+ USHORT usMinMemoryClockPLL_Input; //In 10Khz unit -+ USHORT usMaxMemoryClockPLL_Input; //In 10Khz unit -+ USHORT usMinMemoryClockPLL_Output; //In 10Khz unit -+ USHORT usMaxPixelClock; //In 10Khz unit, Max. Pclk -+ USHORT usMinPixelClockPLL_Input; //In 10Khz unit -+ USHORT usMaxPixelClockPLL_Input; //In 10Khz unit -+ USHORT usMinPixelClockPLL_Output; //In 10Khz unit, the definitions above can't change!!! -+ ATOM_FIRMWARE_CAPABILITY_ACCESS usFirmwareCapability; -+ USHORT usReferenceClock; //In 10Khz unit -+ USHORT usPM_RTS_Location; //RTS PM4 starting location in ROM in 1Kb unit -+ UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit -+ UCHAR ucDesign_ID; //Indicate what is the board design -+ UCHAR ucMemoryModule_ID; //Indicate what is the board design -+}ATOM_FIRMWARE_INFO; -+ -+typedef struct _ATOM_FIRMWARE_INFO_V1_2 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulFirmwareRevision; -+ ULONG ulDefaultEngineClock; //In 10Khz unit -+ ULONG ulDefaultMemoryClock; //In 10Khz unit -+ ULONG ulDriverTargetEngineClock; //In 10Khz unit -+ ULONG ulDriverTargetMemoryClock; //In 10Khz unit -+ ULONG ulMaxEngineClockPLL_Output; //In 10Khz unit -+ ULONG ulMaxMemoryClockPLL_Output; //In 10Khz unit -+ ULONG ulMaxPixelClockPLL_Output; //In 10Khz unit -+ ULONG ulASICMaxEngineClock; //In 10Khz unit -+ ULONG ulASICMaxMemoryClock; //In 10Khz unit -+ UCHAR ucASICMaxTemperature; -+ UCHAR ucMinAllowedBL_Level; -+ UCHAR ucPadding[2]; //Don't use them -+ ULONG aulReservedForBIOS[2]; //Don't use them -+ ULONG ulMinPixelClockPLL_Output; //In 10Khz unit -+ USHORT usMinEngineClockPLL_Input; //In 10Khz unit -+ USHORT usMaxEngineClockPLL_Input; //In 10Khz unit -+ USHORT usMinEngineClockPLL_Output; //In 10Khz unit -+ USHORT usMinMemoryClockPLL_Input; //In 10Khz unit -+ USHORT usMaxMemoryClockPLL_Input; //In 10Khz unit -+ USHORT usMinMemoryClockPLL_Output; //In 10Khz unit -+ USHORT usMaxPixelClock; //In 10Khz unit, Max. Pclk -+ USHORT usMinPixelClockPLL_Input; //In 10Khz unit -+ USHORT usMaxPixelClockPLL_Input; //In 10Khz unit -+ USHORT usMinPixelClockPLL_Output; //In 10Khz unit - lower 16bit of ulMinPixelClockPLL_Output -+ ATOM_FIRMWARE_CAPABILITY_ACCESS usFirmwareCapability; -+ USHORT usReferenceClock; //In 10Khz unit -+ USHORT usPM_RTS_Location; //RTS PM4 starting location in ROM in 1Kb unit -+ UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit -+ UCHAR ucDesign_ID; //Indicate what is the board design -+ UCHAR ucMemoryModule_ID; //Indicate what is the board design -+}ATOM_FIRMWARE_INFO_V1_2; -+ -+typedef struct _ATOM_FIRMWARE_INFO_V1_3 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulFirmwareRevision; -+ ULONG ulDefaultEngineClock; //In 10Khz unit -+ ULONG ulDefaultMemoryClock; //In 10Khz unit -+ ULONG ulDriverTargetEngineClock; //In 10Khz unit -+ ULONG ulDriverTargetMemoryClock; //In 10Khz unit -+ ULONG ulMaxEngineClockPLL_Output; //In 10Khz unit -+ ULONG ulMaxMemoryClockPLL_Output; //In 10Khz unit -+ ULONG ulMaxPixelClockPLL_Output; //In 10Khz unit -+ ULONG ulASICMaxEngineClock; //In 10Khz unit -+ ULONG ulASICMaxMemoryClock; //In 10Khz unit -+ UCHAR ucASICMaxTemperature; -+ UCHAR ucMinAllowedBL_Level; -+ UCHAR ucPadding[2]; //Don't use them -+ ULONG aulReservedForBIOS; //Don't use them -+ ULONG ul3DAccelerationEngineClock;//In 10Khz unit -+ ULONG ulMinPixelClockPLL_Output; //In 10Khz unit -+ USHORT usMinEngineClockPLL_Input; //In 10Khz unit -+ USHORT usMaxEngineClockPLL_Input; //In 10Khz unit -+ USHORT usMinEngineClockPLL_Output; //In 10Khz unit -+ USHORT usMinMemoryClockPLL_Input; //In 10Khz unit -+ USHORT usMaxMemoryClockPLL_Input; //In 10Khz unit -+ USHORT usMinMemoryClockPLL_Output; //In 10Khz unit -+ USHORT usMaxPixelClock; //In 10Khz unit, Max. Pclk -+ USHORT usMinPixelClockPLL_Input; //In 10Khz unit -+ USHORT usMaxPixelClockPLL_Input; //In 10Khz unit -+ USHORT usMinPixelClockPLL_Output; //In 10Khz unit - lower 16bit of ulMinPixelClockPLL_Output -+ ATOM_FIRMWARE_CAPABILITY_ACCESS usFirmwareCapability; -+ USHORT usReferenceClock; //In 10Khz unit -+ USHORT usPM_RTS_Location; //RTS PM4 starting location in ROM in 1Kb unit -+ UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit -+ UCHAR ucDesign_ID; //Indicate what is the board design -+ UCHAR ucMemoryModule_ID; //Indicate what is the board design -+}ATOM_FIRMWARE_INFO_V1_3; -+ -+typedef struct _ATOM_FIRMWARE_INFO_V1_4 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulFirmwareRevision; -+ ULONG ulDefaultEngineClock; //In 10Khz unit -+ ULONG ulDefaultMemoryClock; //In 10Khz unit -+ ULONG ulDriverTargetEngineClock; //In 10Khz unit -+ ULONG ulDriverTargetMemoryClock; //In 10Khz unit -+ ULONG ulMaxEngineClockPLL_Output; //In 10Khz unit -+ ULONG ulMaxMemoryClockPLL_Output; //In 10Khz unit -+ ULONG ulMaxPixelClockPLL_Output; //In 10Khz unit -+ ULONG ulASICMaxEngineClock; //In 10Khz unit -+ ULONG ulASICMaxMemoryClock; //In 10Khz unit -+ UCHAR ucASICMaxTemperature; -+ UCHAR ucMinAllowedBL_Level; -+ USHORT usBootUpVDDCVoltage; //In MV unit -+ USHORT usLcdMinPixelClockPLL_Output; // In MHz unit -+ USHORT usLcdMaxPixelClockPLL_Output; // In MHz unit -+ ULONG ul3DAccelerationEngineClock;//In 10Khz unit -+ ULONG ulMinPixelClockPLL_Output; //In 10Khz unit -+ USHORT usMinEngineClockPLL_Input; //In 10Khz unit -+ USHORT usMaxEngineClockPLL_Input; //In 10Khz unit -+ USHORT usMinEngineClockPLL_Output; //In 10Khz unit -+ USHORT usMinMemoryClockPLL_Input; //In 10Khz unit -+ USHORT usMaxMemoryClockPLL_Input; //In 10Khz unit -+ USHORT usMinMemoryClockPLL_Output; //In 10Khz unit -+ USHORT usMaxPixelClock; //In 10Khz unit, Max. Pclk -+ USHORT usMinPixelClockPLL_Input; //In 10Khz unit -+ USHORT usMaxPixelClockPLL_Input; //In 10Khz unit -+ USHORT usMinPixelClockPLL_Output; //In 10Khz unit - lower 16bit of ulMinPixelClockPLL_Output -+ ATOM_FIRMWARE_CAPABILITY_ACCESS usFirmwareCapability; -+ USHORT usReferenceClock; //In 10Khz unit -+ USHORT usPM_RTS_Location; //RTS PM4 starting location in ROM in 1Kb unit -+ UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit -+ UCHAR ucDesign_ID; //Indicate what is the board design -+ UCHAR ucMemoryModule_ID; //Indicate what is the board design -+}ATOM_FIRMWARE_INFO_V1_4; -+ -+//the structure below to be used from Cypress -+typedef struct _ATOM_FIRMWARE_INFO_V2_1 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulFirmwareRevision; -+ ULONG ulDefaultEngineClock; //In 10Khz unit -+ ULONG ulDefaultMemoryClock; //In 10Khz unit -+ ULONG ulReserved1; -+ ULONG ulReserved2; -+ ULONG ulMaxEngineClockPLL_Output; //In 10Khz unit -+ ULONG ulMaxMemoryClockPLL_Output; //In 10Khz unit -+ ULONG ulMaxPixelClockPLL_Output; //In 10Khz unit -+ ULONG ulBinaryAlteredInfo; //Was ulASICMaxEngineClock -+ ULONG ulDefaultDispEngineClkFreq; //In 10Khz unit -+ UCHAR ucReserved1; //Was ucASICMaxTemperature; -+ UCHAR ucMinAllowedBL_Level; -+ USHORT usBootUpVDDCVoltage; //In MV unit -+ USHORT usLcdMinPixelClockPLL_Output; // In MHz unit -+ USHORT usLcdMaxPixelClockPLL_Output; // In MHz unit -+ ULONG ulReserved4; //Was ulAsicMaximumVoltage -+ ULONG ulMinPixelClockPLL_Output; //In 10Khz unit -+ USHORT usMinEngineClockPLL_Input; //In 10Khz unit -+ USHORT usMaxEngineClockPLL_Input; //In 10Khz unit -+ USHORT usMinEngineClockPLL_Output; //In 10Khz unit -+ USHORT usMinMemoryClockPLL_Input; //In 10Khz unit -+ USHORT usMaxMemoryClockPLL_Input; //In 10Khz unit -+ USHORT usMinMemoryClockPLL_Output; //In 10Khz unit -+ USHORT usMaxPixelClock; //In 10Khz unit, Max. Pclk -+ USHORT usMinPixelClockPLL_Input; //In 10Khz unit -+ USHORT usMaxPixelClockPLL_Input; //In 10Khz unit -+ USHORT usMinPixelClockPLL_Output; //In 10Khz unit - lower 16bit of ulMinPixelClockPLL_Output -+ ATOM_FIRMWARE_CAPABILITY_ACCESS usFirmwareCapability; -+ USHORT usCoreReferenceClock; //In 10Khz unit -+ USHORT usMemoryReferenceClock; //In 10Khz unit -+ USHORT usUniphyDPModeExtClkFreq; //In 10Khz unit, if it is 0, In DP Mode Uniphy Input clock from internal PPLL, otherwise Input clock from external Spread clock -+ UCHAR ucMemoryModule_ID; //Indicate what is the board design -+ UCHAR ucReserved4[3]; -+}ATOM_FIRMWARE_INFO_V2_1; -+ -+ -+#define ATOM_FIRMWARE_INFO_LAST ATOM_FIRMWARE_INFO_V2_1 -+ -+/****************************************************************************/ -+// Structures used in IntegratedSystemInfoTable -+/****************************************************************************/ - #define IGP_CAP_FLAG_DYNAMIC_CLOCK_EN 0x2 - #define IGP_CAP_FLAG_AC_CARD 0x4 - #define IGP_CAP_FLAG_SDVO_CARD 0x8 - #define IGP_CAP_FLAG_POSTDIV_BY_2_MODE 0x10 - --typedef struct _ATOM_INTEGRATED_SYSTEM_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ULONG ulBootUpEngineClock; /* in 10kHz unit */ -- ULONG ulBootUpMemoryClock; /* in 10kHz unit */ -- ULONG ulMaxSystemMemoryClock; /* in 10kHz unit */ -- ULONG ulMinSystemMemoryClock; /* in 10kHz unit */ -- UCHAR ucNumberOfCyclesInPeriodHi; -- UCHAR ucLCDTimingSel; /* =0:not valid.!=0 sel this timing descriptor from LCD EDID. */ -- USHORT usReserved1; -- USHORT usInterNBVoltageLow; /* An intermidiate PMW value to set the voltage */ -- USHORT usInterNBVoltageHigh; /* Another intermidiate PMW value to set the voltage */ -- ULONG ulReserved[2]; -- -- USHORT usFSBClock; /* In MHz unit */ -- USHORT usCapabilityFlag; /* Bit0=1 indicates the fake HDMI support,Bit1=0/1 for Dynamic clocking dis/enable */ -- /* Bit[3:2]== 0:No PCIE card, 1:AC card, 2:SDVO card */ -- /* Bit[4]==1: P/2 mode, ==0: P/1 mode */ -- USHORT usPCIENBCfgReg7; /* bit[7:0]=MUX_Sel, bit[9:8]=MUX_SEL_LEVEL2, bit[10]=Lane_Reversal */ -- USHORT usK8MemoryClock; /* in MHz unit */ -- USHORT usK8SyncStartDelay; /* in 0.01 us unit */ -- USHORT usK8DataReturnTime; /* in 0.01 us unit */ -- UCHAR ucMaxNBVoltage; -- UCHAR ucMinNBVoltage; -- UCHAR ucMemoryType; /* [7:4]=1:DDR1;=2:DDR2;=3:DDR3.[3:0] is reserved */ -- UCHAR ucNumberOfCyclesInPeriod; /* CG.FVTHROT_PWM_CTRL_REG0.NumberOfCyclesInPeriod */ -- UCHAR ucStartingPWM_HighTime; /* CG.FVTHROT_PWM_CTRL_REG0.StartingPWM_HighTime */ -- UCHAR ucHTLinkWidth; /* 16 bit vs. 8 bit */ -- UCHAR ucMaxNBVoltageHigh; -- UCHAR ucMinNBVoltageHigh; --} ATOM_INTEGRATED_SYSTEM_INFO; -+typedef struct _ATOM_INTEGRATED_SYSTEM_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulBootUpEngineClock; //in 10kHz unit -+ ULONG ulBootUpMemoryClock; //in 10kHz unit -+ ULONG ulMaxSystemMemoryClock; //in 10kHz unit -+ ULONG ulMinSystemMemoryClock; //in 10kHz unit -+ UCHAR ucNumberOfCyclesInPeriodHi; -+ UCHAR ucLCDTimingSel; //=0:not valid.!=0 sel this timing descriptor from LCD EDID. -+ USHORT usReserved1; -+ USHORT usInterNBVoltageLow; //An intermidiate PMW value to set the voltage -+ USHORT usInterNBVoltageHigh; //Another intermidiate PMW value to set the voltage -+ ULONG ulReserved[2]; -+ -+ USHORT usFSBClock; //In MHz unit -+ USHORT usCapabilityFlag; //Bit0=1 indicates the fake HDMI support,Bit1=0/1 for Dynamic clocking dis/enable -+ //Bit[3:2]== 0:No PCIE card, 1:AC card, 2:SDVO card -+ //Bit[4]==1: P/2 mode, ==0: P/1 mode -+ USHORT usPCIENBCfgReg7; //bit[7:0]=MUX_Sel, bit[9:8]=MUX_SEL_LEVEL2, bit[10]=Lane_Reversal -+ USHORT usK8MemoryClock; //in MHz unit -+ USHORT usK8SyncStartDelay; //in 0.01 us unit -+ USHORT usK8DataReturnTime; //in 0.01 us unit -+ UCHAR ucMaxNBVoltage; -+ UCHAR ucMinNBVoltage; -+ UCHAR ucMemoryType; //[7:4]=1:DDR1;=2:DDR2;=3:DDR3.[3:0] is reserved -+ UCHAR ucNumberOfCyclesInPeriod; //CG.FVTHROT_PWM_CTRL_REG0.NumberOfCyclesInPeriod -+ UCHAR ucStartingPWM_HighTime; //CG.FVTHROT_PWM_CTRL_REG0.StartingPWM_HighTime -+ UCHAR ucHTLinkWidth; //16 bit vs. 8 bit -+ UCHAR ucMaxNBVoltageHigh; -+ UCHAR ucMinNBVoltageHigh; -+}ATOM_INTEGRATED_SYSTEM_INFO; - - /* Explanation on entries in ATOM_INTEGRATED_SYSTEM_INFO --ulBootUpMemoryClock: For Intel IGP,it's the UMA system memory clock -+ulBootUpMemoryClock: For Intel IGP,it's the UMA system memory clock - For AMD IGP,it's 0 if no SidePort memory installed or it's the boot-up SidePort memory clock - ulMaxSystemMemoryClock: For Intel IGP,it's the Max freq from memory SPD if memory runs in ASYNC mode or otherwise (SYNC mode) it's 0 - For AMD IGP,for now this can be 0 --ulMinSystemMemoryClock: For Intel IGP,it's 133MHz if memory runs in ASYNC mode or otherwise (SYNC mode) it's 0 -+ulMinSystemMemoryClock: For Intel IGP,it's 133MHz if memory runs in ASYNC mode or otherwise (SYNC mode) it's 0 - For AMD IGP,for now this can be 0 - --usFSBClock: For Intel IGP,it's FSB Freq -+usFSBClock: For Intel IGP,it's FSB Freq - For AMD IGP,it's HT Link Speed - - usK8MemoryClock: For AMD IGP only. For RevF CPU, set it to 200 -@@ -1687,98 +2093,113 @@ VC:Voltage Control - ucMaxNBVoltage: Voltage regulator dependent PWM value. Low 8 bits of the value for the max voltage.Set this one to 0xFF if VC without PWM. Set this to 0x0 if no VC at all. - ucMinNBVoltage: Voltage regulator dependent PWM value. Low 8 bits of the value for the min voltage.Set this one to 0x00 if VC without PWM or no VC at all. - --ucNumberOfCyclesInPeriod: Indicate how many cycles when PWM duty is 100%. low 8 bits of the value. --ucNumberOfCyclesInPeriodHi: Indicate how many cycles when PWM duty is 100%. high 8 bits of the value.If the PWM has an inverter,set bit [7]==1,otherwise set it 0 -+ucNumberOfCyclesInPeriod: Indicate how many cycles when PWM duty is 100%. low 8 bits of the value. -+ucNumberOfCyclesInPeriodHi: Indicate how many cycles when PWM duty is 100%. high 8 bits of the value.If the PWM has an inverter,set bit [7]==1,otherwise set it 0 - - ucMaxNBVoltageHigh: Voltage regulator dependent PWM value. High 8 bits of the value for the max voltage.Set this one to 0xFF if VC without PWM. Set this to 0x0 if no VC at all. - ucMinNBVoltageHigh: Voltage regulator dependent PWM value. High 8 bits of the value for the min voltage.Set this one to 0x00 if VC without PWM or no VC at all. - -+ - usInterNBVoltageLow: Voltage regulator dependent PWM value. The value makes the the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all. - usInterNBVoltageHigh: Voltage regulator dependent PWM value. The value makes the the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all. - */ - -+ - /* - The following IGP table is introduced from RS780, which is supposed to be put by SBIOS in FB before IGP VBIOS starts VPOST; --Then VBIOS will copy the whole structure to its image so all GPU SW components can access this data structure to get whatever they need. -+Then VBIOS will copy the whole structure to its image so all GPU SW components can access this data structure to get whatever they need. - The enough reservation should allow us to never change table revisions. Whenever needed, a GPU SW component can use reserved portion for new data entries. - - SW components can access the IGP system infor structure in the same way as before - */ - --typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ULONG ulBootUpEngineClock; /* in 10kHz unit */ -- ULONG ulReserved1[2]; /* must be 0x0 for the reserved */ -- ULONG ulBootUpUMAClock; /* in 10kHz unit */ -- ULONG ulBootUpSidePortClock; /* in 10kHz unit */ -- ULONG ulMinSidePortClock; /* in 10kHz unit */ -- ULONG ulReserved2[6]; /* must be 0x0 for the reserved */ -- ULONG ulSystemConfig; /* see explanation below */ -- ULONG ulBootUpReqDisplayVector; -- ULONG ulOtherDisplayMisc; -- ULONG ulDDISlot1Config; -- ULONG ulDDISlot2Config; -- UCHAR ucMemoryType; /* [3:0]=1:DDR1;=2:DDR2;=3:DDR3.[7:4] is reserved */ -- UCHAR ucUMAChannelNumber; -- UCHAR ucDockingPinBit; -- UCHAR ucDockingPinPolarity; -- ULONG ulDockingPinCFGInfo; -- ULONG ulCPUCapInfo; -- USHORT usNumberOfCyclesInPeriod; -- USHORT usMaxNBVoltage; -- USHORT usMinNBVoltage; -- USHORT usBootUpNBVoltage; -- ULONG ulHTLinkFreq; /* in 10Khz */ -- USHORT usMinHTLinkWidth; -- USHORT usMaxHTLinkWidth; -- USHORT usUMASyncStartDelay; -- USHORT usUMADataReturnTime; -- USHORT usLinkStatusZeroTime; -- USHORT usReserved; -- ULONG ulHighVoltageHTLinkFreq; /* in 10Khz */ -- ULONG ulLowVoltageHTLinkFreq; /* in 10Khz */ -- USHORT usMaxUpStreamHTLinkWidth; -- USHORT usMaxDownStreamHTLinkWidth; -- USHORT usMinUpStreamHTLinkWidth; -- USHORT usMinDownStreamHTLinkWidth; -- ULONG ulReserved3[97]; /* must be 0x0 */ --} ATOM_INTEGRATED_SYSTEM_INFO_V2; -+ -+typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulBootUpEngineClock; //in 10kHz unit -+ ULONG ulReserved1[2]; //must be 0x0 for the reserved -+ ULONG ulBootUpUMAClock; //in 10kHz unit -+ ULONG ulBootUpSidePortClock; //in 10kHz unit -+ ULONG ulMinSidePortClock; //in 10kHz unit -+ ULONG ulReserved2[6]; //must be 0x0 for the reserved -+ ULONG ulSystemConfig; //see explanation below -+ ULONG ulBootUpReqDisplayVector; -+ ULONG ulOtherDisplayMisc; -+ ULONG ulDDISlot1Config; -+ ULONG ulDDISlot2Config; -+ UCHAR ucMemoryType; //[3:0]=1:DDR1;=2:DDR2;=3:DDR3.[7:4] is reserved -+ UCHAR ucUMAChannelNumber; -+ UCHAR ucDockingPinBit; -+ UCHAR ucDockingPinPolarity; -+ ULONG ulDockingPinCFGInfo; -+ ULONG ulCPUCapInfo; -+ USHORT usNumberOfCyclesInPeriod; -+ USHORT usMaxNBVoltage; -+ USHORT usMinNBVoltage; -+ USHORT usBootUpNBVoltage; -+ ULONG ulHTLinkFreq; //in 10Khz -+ USHORT usMinHTLinkWidth; -+ USHORT usMaxHTLinkWidth; -+ USHORT usUMASyncStartDelay; -+ USHORT usUMADataReturnTime; -+ USHORT usLinkStatusZeroTime; -+ USHORT usDACEfuse; //for storing badgap value (for RS880 only) -+ ULONG ulHighVoltageHTLinkFreq; // in 10Khz -+ ULONG ulLowVoltageHTLinkFreq; // in 10Khz -+ USHORT usMaxUpStreamHTLinkWidth; -+ USHORT usMaxDownStreamHTLinkWidth; -+ USHORT usMinUpStreamHTLinkWidth; -+ USHORT usMinDownStreamHTLinkWidth; -+ USHORT usFirmwareVersion; //0 means FW is not supported. Otherwise it's the FW version loaded by SBIOS and driver should enable FW. -+ USHORT usFullT0Time; // Input to calculate minimum HT link change time required by NB P-State. Unit is 0.01us. -+ ULONG ulReserved3[96]; //must be 0x0 -+}ATOM_INTEGRATED_SYSTEM_INFO_V2; - - /* - ulBootUpEngineClock: Boot-up Engine Clock in 10Khz; - ulBootUpUMAClock: Boot-up UMA Clock in 10Khz; it must be 0x0 when UMA is not present - ulBootUpSidePortClock: Boot-up SidePort Clock in 10Khz; it must be 0x0 when SidePort Memory is not present,this could be equal to or less than maximum supported Sideport memory clock - --ulSystemConfig: --Bit[0]=1: PowerExpress mode =0 Non-PowerExpress mode; -+ulSystemConfig: -+Bit[0]=1: PowerExpress mode =0 Non-PowerExpress mode; - Bit[1]=1: system boots up at AMD overdrived state or user customized mode. In this case, driver will just stick to this boot-up mode. No other PowerPlay state - =0: system boots up at driver control state. Power state depends on PowerPlay table. - Bit[2]=1: PWM method is used on NB voltage control. =0: GPIO method is used. - Bit[3]=1: Only one power state(Performance) will be supported. - =0: Multiple power states supported from PowerPlay table. --Bit[4]=1: CLMC is supported and enabled on current system. -- =0: CLMC is not supported or enabled on current system. SBIOS need to support HT link/freq change through ATIF interface. --Bit[5]=1: Enable CDLW for all driver control power states. Max HT width is from SBIOS, while Min HT width is determined by display requirement. -+Bit[4]=1: CLMC is supported and enabled on current system. -+ =0: CLMC is not supported or enabled on current system. SBIOS need to support HT link/freq change through ATIF interface. -+Bit[5]=1: Enable CDLW for all driver control power states. Max HT width is from SBIOS, while Min HT width is determined by display requirement. - =0: CDLW is disabled. If CLMC is enabled case, Min HT width will be set equal to Max HT width. If CLMC disabled case, Max HT width will be applied. - Bit[6]=1: High Voltage requested for all power states. In this case, voltage will be forced at 1.1v and powerplay table voltage drop/throttling request will be ignored. - =0: Voltage settings is determined by powerplay table. - Bit[7]=1: Enable CLMC as hybrid Mode. CDLD and CILR will be disabled in this case and we're using legacy C1E. This is workaround for CPU(Griffin) performance issue. - =0: Enable CLMC as regular mode, CDLD and CILR will be enabled. -+Bit[8]=1: CDLF is supported and enabled on current system. -+ =0: CDLF is not supported or enabled on current system. -+Bit[9]=1: DLL Shut Down feature is enabled on current system. -+ =0: DLL Shut Down feature is not enabled or supported on current system. - - ulBootUpReqDisplayVector: This dword is a bit vector indicates what display devices are requested during boot-up. Refer to ATOM_DEVICE_xxx_SUPPORT for the bit vector definitions. - - ulOtherDisplayMisc: [15:8]- Bootup LCD Expansion selection; 0-center, 1-full panel size expansion; -- [7:0] - BootupTV standard selection; This is a bit vector to indicate what TV standards are supported by the system. Refer to ucTVSuppportedStd definition; -+ [7:0] - BootupTV standard selection; This is a bit vector to indicate what TV standards are supported by the system. Refer to ucTVSupportedStd definition; - - ulDDISlot1Config: Describes the PCIE lane configuration on this DDI PCIE slot (ADD2 card) or connector (Mobile design). - [3:0] - Bit vector to indicate PCIE lane config of the DDI slot/connector on chassis (bit 0=1 lane 3:0; bit 1=1 lane 7:4; bit 2=1 lane 11:8; bit 3=1 lane 15:12) -- [7:4] - Bit vector to indicate PCIE lane config of the same DDI slot/connector on docking station (bit 0=1 lane 3:0; bit 1=1 lane 7:4; bit 2=1 lane 11:8; bit 3=1 lane 15:12) -- [15:8] - Lane configuration attribute; -+ [7:4] - Bit vector to indicate PCIE lane config of the same DDI slot/connector on docking station (bit 4=1 lane 3:0; bit 5=1 lane 7:4; bit 6=1 lane 11:8; bit 7=1 lane 15:12) -+ When a DDI connector is not "paired" (meaming two connections mutualexclusive on chassis or docking, only one of them can be connected at one time. -+ in both chassis and docking, SBIOS has to duplicate the same PCIE lane info from chassis to docking or vice versa. For example: -+ one DDI connector is only populated in docking with PCIE lane 8-11, but there is no paired connection on chassis, SBIOS has to copy bit 6 to bit 2. -+ -+ [15:8] - Lane configuration attribute; - [23:16]- Connector type, possible value: - CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D - CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D - CONNECTOR_OBJECT_ID_HDMI_TYPE_A - CONNECTOR_OBJECT_ID_DISPLAYPORT -+ CONNECTOR_OBJECT_ID_eDP - [31:24]- Reserved - - ulDDISlot2Config: Same as Slot1. -@@ -1787,29 +2208,31 @@ For IGP, Hypermemory is the only memory type showed in CCC. - - ucUMAChannelNumber: how many channels for the UMA; - --ulDockingPinCFGInfo: [15:0]-Bus/Device/Function # to CFG to read this Docking Pin; [31:16]-reg offset in CFG to read this pin -+ulDockingPinCFGInfo: [15:0]-Bus/Device/Function # to CFG to read this Docking Pin; [31:16]-reg offset in CFG to read this pin - ucDockingPinBit: which bit in this register to read the pin status; - ucDockingPinPolarity:Polarity of the pin when docked; - - ulCPUCapInfo: [7:0]=1:Griffin;[7:0]=2:Greyhound;[7:0]=3:K8, other bits reserved for now and must be 0x0 - - usNumberOfCyclesInPeriod:Indicate how many cycles when PWM duty is 100%. --usMaxNBVoltage:Max. voltage control value in either PWM or GPIO mode. -+ -+usMaxNBVoltage:Max. voltage control value in either PWM or GPIO mode. - usMinNBVoltage:Min. voltage control value in either PWM or GPIO mode. - GPIO mode: both usMaxNBVoltage & usMinNBVoltage have a valid value ulSystemConfig.SYSTEM_CONFIG_USE_PWM_ON_VOLTAGE=0 - PWM mode: both usMaxNBVoltage & usMinNBVoltage have a valid value ulSystemConfig.SYSTEM_CONFIG_USE_PWM_ON_VOLTAGE=1 - GPU SW don't control mode: usMaxNBVoltage & usMinNBVoltage=0 and no care about ulSystemConfig.SYSTEM_CONFIG_USE_PWM_ON_VOLTAGE -+ - usBootUpNBVoltage:Boot-up voltage regulator dependent PWM value. - - ulHTLinkFreq: Bootup HT link Frequency in 10Khz. --usMinHTLinkWidth: Bootup minimum HT link width. If CDLW disabled, this is equal to usMaxHTLinkWidth. -- If CDLW enabled, both upstream and downstream width should be the same during bootup. --usMaxHTLinkWidth: Bootup maximum HT link width. If CDLW disabled, this is equal to usMinHTLinkWidth. -+usMinHTLinkWidth: Bootup minimum HT link width. If CDLW disabled, this is equal to usMaxHTLinkWidth. - If CDLW enabled, both upstream and downstream width should be the same during bootup. -+usMaxHTLinkWidth: Bootup maximum HT link width. If CDLW disabled, this is equal to usMinHTLinkWidth. -+ If CDLW enabled, both upstream and downstream width should be the same during bootup. - --usUMASyncStartDelay: Memory access latency, required for watermark calculation -+usUMASyncStartDelay: Memory access latency, required for watermark calculation - usUMADataReturnTime: Memory access latency, required for watermark calculation --usLinkStatusZeroTime:Memory access latency required for watermark calculation, set this to 0x0 for K8 CPU, set a proper value in 0.01 the unit of us -+usLinkStatusZeroTime:Memory access latency required for watermark calculation, set this to 0x0 for K8 CPU, set a proper value in 0.01 the unit of us - for Griffin or Greyhound. SBIOS needs to convert to actual time by: - if T0Ttime [5:4]=00b, then usLinkStatusZeroTime=T0Ttime [3:0]*0.1us (0.0 to 1.5us) - if T0Ttime [5:4]=01b, then usLinkStatusZeroTime=T0Ttime [3:0]*0.5us (0.0 to 7.5us) -@@ -1817,7 +2240,7 @@ for Griffin or Greyhound. SBIOS needs to convert to actual time by: - if T0Ttime [5:4]=11b, and T0Ttime [3:0]=0x0 to 0xa, then usLinkStatusZeroTime=T0Ttime [3:0]*20us (0.0 to 200us) - - ulHighVoltageHTLinkFreq: HT link frequency for power state with low voltage. If boot up runs in HT1, this must be 0. -- This must be less than or equal to ulHTLinkFreq(bootup frequency). -+ This must be less than or equal to ulHTLinkFreq(bootup frequency). - ulLowVoltageHTLinkFreq: HT link frequency for power state with low voltage or voltage scaling 1.0v~1.1v. If boot up runs in HT1, this must be 0. - This must be less than or equal to ulHighVoltageHTLinkFreq. - -@@ -1827,14 +2250,17 @@ usMinUpStreamHTLinkWidth: Asymmetric link width support in the future, to rep - usMinDownStreamHTLinkWidth: same as above. - */ - -+ - #define SYSTEM_CONFIG_POWEREXPRESS_ENABLE 0x00000001 - #define SYSTEM_CONFIG_RUN_AT_OVERDRIVE_ENGINE 0x00000002 --#define SYSTEM_CONFIG_USE_PWM_ON_VOLTAGE 0x00000004 -+#define SYSTEM_CONFIG_USE_PWM_ON_VOLTAGE 0x00000004 - #define SYSTEM_CONFIG_PERFORMANCE_POWERSTATE_ONLY 0x00000008 - #define SYSTEM_CONFIG_CLMC_ENABLED 0x00000010 - #define SYSTEM_CONFIG_CDLW_ENABLED 0x00000020 - #define SYSTEM_CONFIG_HIGH_VOLTAGE_REQUESTED 0x00000040 - #define SYSTEM_CONFIG_CLMC_HYBRID_MODE_ENABLED 0x00000080 -+#define SYSTEM_CONFIG_CDLF_ENABLED 0x00000100 -+#define SYSTEM_CONFIG_DLL_SHUTDOWN_ENABLED 0x00000200 - - #define IGP_DDI_SLOT_LANE_CONFIG_MASK 0x000000FF - -@@ -1851,6 +2277,41 @@ usMinDownStreamHTLinkWidth: same as above. - - #define IGP_DDI_SLOT_CONNECTOR_TYPE_MASK 0x00FF0000 - -+// IntegratedSystemInfoTable new Rev is V5 after V2, because of the real rev of V2 is v1.4. This rev is used for RR -+typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V5 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulBootUpEngineClock; //in 10kHz unit -+ ULONG ulDentistVCOFreq; //Dentist VCO clock in 10kHz unit, the source of GPU SCLK, LCLK, UCLK and VCLK. -+ ULONG ulLClockFreq; //GPU Lclk freq in 10kHz unit, have relationship with NCLK in NorthBridge -+ ULONG ulBootUpUMAClock; //in 10kHz unit -+ ULONG ulReserved1[8]; //must be 0x0 for the reserved -+ ULONG ulBootUpReqDisplayVector; -+ ULONG ulOtherDisplayMisc; -+ ULONG ulReserved2[4]; //must be 0x0 for the reserved -+ ULONG ulSystemConfig; //TBD -+ ULONG ulCPUCapInfo; //TBD -+ USHORT usMaxNBVoltage; //high NB voltage, calculated using current VDDNB (D24F2xDC) and VDDNB offset fuse; -+ USHORT usMinNBVoltage; //low NB voltage, calculated using current VDDNB (D24F2xDC) and VDDNB offset fuse; -+ USHORT usBootUpNBVoltage; //boot up NB voltage -+ UCHAR ucHtcTmpLmt; //bit [22:16] of D24F3x64 Hardware Thermal Control (HTC) Register, may not be needed, TBD -+ UCHAR ucTjOffset; //bit [28:22] of D24F3xE4 Thermtrip Status Register,may not be needed, TBD -+ ULONG ulReserved3[4]; //must be 0x0 for the reserved -+ ULONG ulDDISlot1Config; //see above ulDDISlot1Config definition -+ ULONG ulDDISlot2Config; -+ ULONG ulDDISlot3Config; -+ ULONG ulDDISlot4Config; -+ ULONG ulReserved4[4]; //must be 0x0 for the reserved -+ UCHAR ucMemoryType; //[3:0]=1:DDR1;=2:DDR2;=3:DDR3.[7:4] is reserved -+ UCHAR ucUMAChannelNumber; -+ USHORT usReserved; -+ ULONG ulReserved5[4]; //must be 0x0 for the reserved -+ ULONG ulCSR_M3_ARB_CNTL_DEFAULT[10];//arrays with values for CSR M3 arbiter for default -+ ULONG ulCSR_M3_ARB_CNTL_UVD[10]; //arrays with values for CSR M3 arbiter for UVD playback -+ ULONG ulCSR_M3_ARB_CNTL_FS3D[10];//arrays with values for CSR M3 arbiter for Full Screen 3D applications -+ ULONG ulReserved6[61]; //must be 0x0 -+}ATOM_INTEGRATED_SYSTEM_INFO_V5; -+ - #define ATOM_CRT_INT_ENCODER1_INDEX 0x00000000 - #define ATOM_LCD_INT_ENCODER1_INDEX 0x00000001 - #define ATOM_TV_INT_ENCODER1_INDEX 0x00000002 -@@ -1866,8 +2327,8 @@ usMinDownStreamHTLinkWidth: same as above. - #define ATOM_DFP_INT_ENCODER3_INDEX 0x0000000C - #define ATOM_DFP_INT_ENCODER4_INDEX 0x0000000D - --/* define ASIC internal encoder id ( bit vector ) */ --#define ASIC_INT_DAC1_ENCODER_ID 0x00 -+// define ASIC internal encoder id ( bit vector ), used for CRTC_SourceSelTable -+#define ASIC_INT_DAC1_ENCODER_ID 0x00 - #define ASIC_INT_TV_ENCODER_ID 0x02 - #define ASIC_INT_DIG1_ENCODER_ID 0x03 - #define ASIC_INT_DAC2_ENCODER_ID 0x04 -@@ -1875,10 +2336,24 @@ usMinDownStreamHTLinkWidth: same as above. - #define ASIC_INT_DVO_ENCODER_ID 0x07 - #define ASIC_INT_DIG2_ENCODER_ID 0x09 - #define ASIC_EXT_DIG_ENCODER_ID 0x05 -+#define ASIC_EXT_DIG2_ENCODER_ID 0x08 -+#define ASIC_INT_DIG3_ENCODER_ID 0x0a -+#define ASIC_INT_DIG4_ENCODER_ID 0x0b -+#define ASIC_INT_DIG5_ENCODER_ID 0x0c -+#define ASIC_INT_DIG6_ENCODER_ID 0x0d - --/* define Encoder attribute */ -+//define Encoder attribute - #define ATOM_ANALOG_ENCODER 0 --#define ATOM_DIGITAL_ENCODER 1 -+#define ATOM_DIGITAL_ENCODER 1 -+#define ATOM_DP_ENCODER 2 -+ -+#define ATOM_ENCODER_ENUM_MASK 0x70 -+#define ATOM_ENCODER_ENUM_ID1 0x00 -+#define ATOM_ENCODER_ENUM_ID2 0x10 -+#define ATOM_ENCODER_ENUM_ID3 0x20 -+#define ATOM_ENCODER_ENUM_ID4 0x30 -+#define ATOM_ENCODER_ENUM_ID5 0x40 -+#define ATOM_ENCODER_ENUM_ID6 0x50 - - #define ATOM_DEVICE_CRT1_INDEX 0x00000000 - #define ATOM_DEVICE_LCD1_INDEX 0x00000001 -@@ -1886,45 +2361,40 @@ usMinDownStreamHTLinkWidth: same as above. - #define ATOM_DEVICE_DFP1_INDEX 0x00000003 - #define ATOM_DEVICE_CRT2_INDEX 0x00000004 - #define ATOM_DEVICE_LCD2_INDEX 0x00000005 --#define ATOM_DEVICE_TV2_INDEX 0x00000006 -+#define ATOM_DEVICE_DFP6_INDEX 0x00000006 - #define ATOM_DEVICE_DFP2_INDEX 0x00000007 - #define ATOM_DEVICE_CV_INDEX 0x00000008 --#define ATOM_DEVICE_DFP3_INDEX 0x00000009 --#define ATOM_DEVICE_DFP4_INDEX 0x0000000A --#define ATOM_DEVICE_DFP5_INDEX 0x0000000B -+#define ATOM_DEVICE_DFP3_INDEX 0x00000009 -+#define ATOM_DEVICE_DFP4_INDEX 0x0000000A -+#define ATOM_DEVICE_DFP5_INDEX 0x0000000B -+ - #define ATOM_DEVICE_RESERVEDC_INDEX 0x0000000C - #define ATOM_DEVICE_RESERVEDD_INDEX 0x0000000D - #define ATOM_DEVICE_RESERVEDE_INDEX 0x0000000E - #define ATOM_DEVICE_RESERVEDF_INDEX 0x0000000F - #define ATOM_MAX_SUPPORTED_DEVICE_INFO (ATOM_DEVICE_DFP3_INDEX+1) - #define ATOM_MAX_SUPPORTED_DEVICE_INFO_2 ATOM_MAX_SUPPORTED_DEVICE_INFO --#define ATOM_MAX_SUPPORTED_DEVICE_INFO_3 (ATOM_DEVICE_DFP5_INDEX + 1) -+#define ATOM_MAX_SUPPORTED_DEVICE_INFO_3 (ATOM_DEVICE_DFP5_INDEX + 1 ) - - #define ATOM_MAX_SUPPORTED_DEVICE (ATOM_DEVICE_RESERVEDF_INDEX+1) - --#define ATOM_DEVICE_CRT1_SUPPORT (0x1L << ATOM_DEVICE_CRT1_INDEX) --#define ATOM_DEVICE_LCD1_SUPPORT (0x1L << ATOM_DEVICE_LCD1_INDEX) --#define ATOM_DEVICE_TV1_SUPPORT (0x1L << ATOM_DEVICE_TV1_INDEX) --#define ATOM_DEVICE_DFP1_SUPPORT (0x1L << ATOM_DEVICE_DFP1_INDEX) --#define ATOM_DEVICE_CRT2_SUPPORT (0x1L << ATOM_DEVICE_CRT2_INDEX) --#define ATOM_DEVICE_LCD2_SUPPORT (0x1L << ATOM_DEVICE_LCD2_INDEX) --#define ATOM_DEVICE_TV2_SUPPORT (0x1L << ATOM_DEVICE_TV2_INDEX) --#define ATOM_DEVICE_DFP2_SUPPORT (0x1L << ATOM_DEVICE_DFP2_INDEX) --#define ATOM_DEVICE_CV_SUPPORT (0x1L << ATOM_DEVICE_CV_INDEX) --#define ATOM_DEVICE_DFP3_SUPPORT (0x1L << ATOM_DEVICE_DFP3_INDEX) --#define ATOM_DEVICE_DFP4_SUPPORT (0x1L << ATOM_DEVICE_DFP4_INDEX ) --#define ATOM_DEVICE_DFP5_SUPPORT (0x1L << ATOM_DEVICE_DFP5_INDEX) -- --#define ATOM_DEVICE_CRT_SUPPORT \ -- (ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_CRT2_SUPPORT) --#define ATOM_DEVICE_DFP_SUPPORT \ -- (ATOM_DEVICE_DFP1_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT | \ -- ATOM_DEVICE_DFP3_SUPPORT | ATOM_DEVICE_DFP4_SUPPORT | \ -- ATOM_DEVICE_DFP5_SUPPORT) --#define ATOM_DEVICE_TV_SUPPORT \ -- (ATOM_DEVICE_TV1_SUPPORT | ATOM_DEVICE_TV2_SUPPORT) --#define ATOM_DEVICE_LCD_SUPPORT \ -- (ATOM_DEVICE_LCD1_SUPPORT | ATOM_DEVICE_LCD2_SUPPORT) -+#define ATOM_DEVICE_CRT1_SUPPORT (0x1L << ATOM_DEVICE_CRT1_INDEX ) -+#define ATOM_DEVICE_LCD1_SUPPORT (0x1L << ATOM_DEVICE_LCD1_INDEX ) -+#define ATOM_DEVICE_TV1_SUPPORT (0x1L << ATOM_DEVICE_TV1_INDEX ) -+#define ATOM_DEVICE_DFP1_SUPPORT (0x1L << ATOM_DEVICE_DFP1_INDEX ) -+#define ATOM_DEVICE_CRT2_SUPPORT (0x1L << ATOM_DEVICE_CRT2_INDEX ) -+#define ATOM_DEVICE_LCD2_SUPPORT (0x1L << ATOM_DEVICE_LCD2_INDEX ) -+#define ATOM_DEVICE_DFP6_SUPPORT (0x1L << ATOM_DEVICE_DFP6_INDEX ) -+#define ATOM_DEVICE_DFP2_SUPPORT (0x1L << ATOM_DEVICE_DFP2_INDEX ) -+#define ATOM_DEVICE_CV_SUPPORT (0x1L << ATOM_DEVICE_CV_INDEX ) -+#define ATOM_DEVICE_DFP3_SUPPORT (0x1L << ATOM_DEVICE_DFP3_INDEX ) -+#define ATOM_DEVICE_DFP4_SUPPORT (0x1L << ATOM_DEVICE_DFP4_INDEX ) -+#define ATOM_DEVICE_DFP5_SUPPORT (0x1L << ATOM_DEVICE_DFP5_INDEX ) -+ -+#define ATOM_DEVICE_CRT_SUPPORT (ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_CRT2_SUPPORT) -+#define ATOM_DEVICE_DFP_SUPPORT (ATOM_DEVICE_DFP1_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT | ATOM_DEVICE_DFP3_SUPPORT | ATOM_DEVICE_DFP4_SUPPORT | ATOM_DEVICE_DFP5_SUPPORT | ATOM_DEVICE_DFP6_SUPPORT) -+#define ATOM_DEVICE_TV_SUPPORT (ATOM_DEVICE_TV1_SUPPORT) -+#define ATOM_DEVICE_LCD_SUPPORT (ATOM_DEVICE_LCD1_SUPPORT | ATOM_DEVICE_LCD2_SUPPORT) - - #define ATOM_DEVICE_CONNECTOR_TYPE_MASK 0x000000F0 - #define ATOM_DEVICE_CONNECTOR_TYPE_SHIFT 0x00000004 -@@ -1942,6 +2412,7 @@ usMinDownStreamHTLinkWidth: same as above. - #define ATOM_DEVICE_CONNECTOR_CASE_1 0x0000000E - #define ATOM_DEVICE_CONNECTOR_DISPLAYPORT 0x0000000F - -+ - #define ATOM_DEVICE_DAC_INFO_MASK 0x0000000F - #define ATOM_DEVICE_DAC_INFO_SHIFT 0x00000000 - #define ATOM_DEVICE_DAC_INFO_NODAC 0x00000000 -@@ -1958,139 +2429,150 @@ usMinDownStreamHTLinkWidth: same as above. - #define ATOM_DEVICE_I2C_ID_SHIFT 0x00000004 - #define ATOM_DEVICE_I2C_ID_IS_FOR_NON_MM_USE 0x00000001 - #define ATOM_DEVICE_I2C_ID_IS_FOR_MM_USE 0x00000002 --#define ATOM_DEVICE_I2C_ID_IS_FOR_SDVO_USE 0x00000003 /* For IGP RS600 */ --#define ATOM_DEVICE_I2C_ID_IS_FOR_DAC_SCL 0x00000004 /* For IGP RS690 */ -+#define ATOM_DEVICE_I2C_ID_IS_FOR_SDVO_USE 0x00000003 //For IGP RS600 -+#define ATOM_DEVICE_I2C_ID_IS_FOR_DAC_SCL 0x00000004 //For IGP RS690 - - #define ATOM_DEVICE_I2C_HARDWARE_CAP_MASK 0x00000080 - #define ATOM_DEVICE_I2C_HARDWARE_CAP_SHIFT 0x00000007 - #define ATOM_DEVICE_USES_SOFTWARE_ASSISTED_I2C 0x00000000 - #define ATOM_DEVICE_USES_HARDWARE_ASSISTED_I2C 0x00000001 - --/* usDeviceSupport: */ --/* Bits0 = 0 - no CRT1 support= 1- CRT1 is supported */ --/* Bit 1 = 0 - no LCD1 support= 1- LCD1 is supported */ --/* Bit 2 = 0 - no TV1 support= 1- TV1 is supported */ --/* Bit 3 = 0 - no DFP1 support= 1- DFP1 is supported */ --/* Bit 4 = 0 - no CRT2 support= 1- CRT2 is supported */ --/* Bit 5 = 0 - no LCD2 support= 1- LCD2 is supported */ --/* Bit 6 = 0 - no TV2 support= 1- TV2 is supported */ --/* Bit 7 = 0 - no DFP2 support= 1- DFP2 is supported */ --/* Bit 8 = 0 - no CV support= 1- CV is supported */ --/* Bit 9 = 0 - no DFP3 support= 1- DFP3 is supported */ --/* Byte1 (Supported Device Info) */ --/* Bit 0 = = 0 - no CV support= 1- CV is supported */ --/* */ --/* */ -- --/* ucI2C_ConfigID */ --/* [7:0] - I2C LINE Associate ID */ --/* = 0 - no I2C */ --/* [7] - HW_Cap = 1, [6:0]=HW assisted I2C ID(HW line selection) */ --/* = 0, [6:0]=SW assisted I2C ID */ --/* [6-4] - HW_ENGINE_ID = 1, HW engine for NON multimedia use */ --/* = 2, HW engine for Multimedia use */ --/* = 3-7 Reserved for future I2C engines */ --/* [3-0] - I2C_LINE_MUX = A Mux number when it's HW assisted I2C or GPIO ID when it's SW I2C */ -- --typedef struct _ATOM_I2C_ID_CONFIG { --#if ATOM_BIG_ENDIAN -- UCHAR bfHW_Capable:1; -- UCHAR bfHW_EngineID:3; -- UCHAR bfI2C_LineMux:4; --#else -- UCHAR bfI2C_LineMux:4; -- UCHAR bfHW_EngineID:3; -- UCHAR bfHW_Capable:1; --#endif --} ATOM_I2C_ID_CONFIG; -- --typedef union _ATOM_I2C_ID_CONFIG_ACCESS { -- ATOM_I2C_ID_CONFIG sbfAccess; -- UCHAR ucAccess; --} ATOM_I2C_ID_CONFIG_ACCESS; -+// usDeviceSupport: -+// Bits0 = 0 - no CRT1 support= 1- CRT1 is supported -+// Bit 1 = 0 - no LCD1 support= 1- LCD1 is supported -+// Bit 2 = 0 - no TV1 support= 1- TV1 is supported -+// Bit 3 = 0 - no DFP1 support= 1- DFP1 is supported -+// Bit 4 = 0 - no CRT2 support= 1- CRT2 is supported -+// Bit 5 = 0 - no LCD2 support= 1- LCD2 is supported -+// Bit 6 = 0 - no DFP6 support= 1- DFP6 is supported -+// Bit 7 = 0 - no DFP2 support= 1- DFP2 is supported -+// Bit 8 = 0 - no CV support= 1- CV is supported -+// Bit 9 = 0 - no DFP3 support= 1- DFP3 is supported -+// Bit 10 = 0 - no DFP4 support= 1- DFP4 is supported -+// Bit 11 = 0 - no DFP5 support= 1- DFP5 is supported -+// -+// - - /****************************************************************************/ --/* Structure used in GPIO_I2C_InfoTable */ -+/* Structure used in MclkSS_InfoTable */ - /****************************************************************************/ --typedef struct _ATOM_GPIO_I2C_ASSIGMENT { -- USHORT usClkMaskRegisterIndex; -- USHORT usClkEnRegisterIndex; -- USHORT usClkY_RegisterIndex; -- USHORT usClkA_RegisterIndex; -- USHORT usDataMaskRegisterIndex; -- USHORT usDataEnRegisterIndex; -- USHORT usDataY_RegisterIndex; -- USHORT usDataA_RegisterIndex; -- ATOM_I2C_ID_CONFIG_ACCESS sucI2cId; -- UCHAR ucClkMaskShift; -- UCHAR ucClkEnShift; -- UCHAR ucClkY_Shift; -- UCHAR ucClkA_Shift; -- UCHAR ucDataMaskShift; -- UCHAR ucDataEnShift; -- UCHAR ucDataY_Shift; -- UCHAR ucDataA_Shift; -- UCHAR ucReserved1; -- UCHAR ucReserved2; --} ATOM_GPIO_I2C_ASSIGMENT; -- --typedef struct _ATOM_GPIO_I2C_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_GPIO_I2C_ASSIGMENT asGPIO_Info[ATOM_MAX_SUPPORTED_DEVICE]; --} ATOM_GPIO_I2C_INFO; -+// ucI2C_ConfigID -+// [7:0] - I2C LINE Associate ID -+// = 0 - no I2C -+// [7] - HW_Cap = 1, [6:0]=HW assisted I2C ID(HW line selection) -+// = 0, [6:0]=SW assisted I2C ID -+// [6-4] - HW_ENGINE_ID = 1, HW engine for NON multimedia use -+// = 2, HW engine for Multimedia use -+// = 3-7 Reserved for future I2C engines -+// [3-0] - I2C_LINE_MUX = A Mux number when it's HW assisted I2C or GPIO ID when it's SW I2C -+ -+typedef struct _ATOM_I2C_ID_CONFIG -+{ -+#if ATOM_BIG_ENDIAN -+ UCHAR bfHW_Capable:1; -+ UCHAR bfHW_EngineID:3; -+ UCHAR bfI2C_LineMux:4; -+#else -+ UCHAR bfI2C_LineMux:4; -+ UCHAR bfHW_EngineID:3; -+ UCHAR bfHW_Capable:1; -+#endif -+}ATOM_I2C_ID_CONFIG; - --/****************************************************************************/ --/* Common Structure used in other structures */ --/****************************************************************************/ -+typedef union _ATOM_I2C_ID_CONFIG_ACCESS -+{ -+ ATOM_I2C_ID_CONFIG sbfAccess; -+ UCHAR ucAccess; -+}ATOM_I2C_ID_CONFIG_ACCESS; -+ -+ -+/****************************************************************************/ -+// Structure used in GPIO_I2C_InfoTable -+/****************************************************************************/ -+typedef struct _ATOM_GPIO_I2C_ASSIGMENT -+{ -+ USHORT usClkMaskRegisterIndex; -+ USHORT usClkEnRegisterIndex; -+ USHORT usClkY_RegisterIndex; -+ USHORT usClkA_RegisterIndex; -+ USHORT usDataMaskRegisterIndex; -+ USHORT usDataEnRegisterIndex; -+ USHORT usDataY_RegisterIndex; -+ USHORT usDataA_RegisterIndex; -+ ATOM_I2C_ID_CONFIG_ACCESS sucI2cId; -+ UCHAR ucClkMaskShift; -+ UCHAR ucClkEnShift; -+ UCHAR ucClkY_Shift; -+ UCHAR ucClkA_Shift; -+ UCHAR ucDataMaskShift; -+ UCHAR ucDataEnShift; -+ UCHAR ucDataY_Shift; -+ UCHAR ucDataA_Shift; -+ UCHAR ucReserved1; -+ UCHAR ucReserved2; -+}ATOM_GPIO_I2C_ASSIGMENT; -+ -+typedef struct _ATOM_GPIO_I2C_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_GPIO_I2C_ASSIGMENT asGPIO_Info[ATOM_MAX_SUPPORTED_DEVICE]; -+}ATOM_GPIO_I2C_INFO; -+ -+/****************************************************************************/ -+// Common Structure used in other structures -+/****************************************************************************/ - - #ifndef _H2INC -- --/* Please don't add or expand this bitfield structure below, this one will retire soon.! */ --typedef struct _ATOM_MODE_MISC_INFO { -+ -+//Please don't add or expand this bitfield structure below, this one will retire soon.! -+typedef struct _ATOM_MODE_MISC_INFO -+{ - #if ATOM_BIG_ENDIAN -- USHORT Reserved:6; -- USHORT RGB888:1; -- USHORT DoubleClock:1; -- USHORT Interlace:1; -- USHORT CompositeSync:1; -- USHORT V_ReplicationBy2:1; -- USHORT H_ReplicationBy2:1; -- USHORT VerticalCutOff:1; -- USHORT VSyncPolarity:1; /* 0=Active High, 1=Active Low */ -- USHORT HSyncPolarity:1; /* 0=Active High, 1=Active Low */ -- USHORT HorizontalCutOff:1; -+ USHORT Reserved:6; -+ USHORT RGB888:1; -+ USHORT DoubleClock:1; -+ USHORT Interlace:1; -+ USHORT CompositeSync:1; -+ USHORT V_ReplicationBy2:1; -+ USHORT H_ReplicationBy2:1; -+ USHORT VerticalCutOff:1; -+ USHORT VSyncPolarity:1; //0=Active High, 1=Active Low -+ USHORT HSyncPolarity:1; //0=Active High, 1=Active Low -+ USHORT HorizontalCutOff:1; - #else -- USHORT HorizontalCutOff:1; -- USHORT HSyncPolarity:1; /* 0=Active High, 1=Active Low */ -- USHORT VSyncPolarity:1; /* 0=Active High, 1=Active Low */ -- USHORT VerticalCutOff:1; -- USHORT H_ReplicationBy2:1; -- USHORT V_ReplicationBy2:1; -- USHORT CompositeSync:1; -- USHORT Interlace:1; -- USHORT DoubleClock:1; -- USHORT RGB888:1; -- USHORT Reserved:6; -+ USHORT HorizontalCutOff:1; -+ USHORT HSyncPolarity:1; //0=Active High, 1=Active Low -+ USHORT VSyncPolarity:1; //0=Active High, 1=Active Low -+ USHORT VerticalCutOff:1; -+ USHORT H_ReplicationBy2:1; -+ USHORT V_ReplicationBy2:1; -+ USHORT CompositeSync:1; -+ USHORT Interlace:1; -+ USHORT DoubleClock:1; -+ USHORT RGB888:1; -+ USHORT Reserved:6; - #endif --} ATOM_MODE_MISC_INFO; -- --typedef union _ATOM_MODE_MISC_INFO_ACCESS { -- ATOM_MODE_MISC_INFO sbfAccess; -- USHORT usAccess; --} ATOM_MODE_MISC_INFO_ACCESS; -- -+}ATOM_MODE_MISC_INFO; -+ -+typedef union _ATOM_MODE_MISC_INFO_ACCESS -+{ -+ ATOM_MODE_MISC_INFO sbfAccess; -+ USHORT usAccess; -+}ATOM_MODE_MISC_INFO_ACCESS; -+ - #else -- --typedef union _ATOM_MODE_MISC_INFO_ACCESS { -- USHORT usAccess; --} ATOM_MODE_MISC_INFO_ACCESS; -- -+ -+typedef union _ATOM_MODE_MISC_INFO_ACCESS -+{ -+ USHORT usAccess; -+}ATOM_MODE_MISC_INFO_ACCESS; -+ - #endif - --/* usModeMiscInfo- */ -+// usModeMiscInfo- - #define ATOM_H_CUTOFF 0x01 --#define ATOM_HSYNC_POLARITY 0x02 /* 0=Active High, 1=Active Low */ --#define ATOM_VSYNC_POLARITY 0x04 /* 0=Active High, 1=Active Low */ -+#define ATOM_HSYNC_POLARITY 0x02 //0=Active High, 1=Active Low -+#define ATOM_VSYNC_POLARITY 0x04 //0=Active High, 1=Active Low - #define ATOM_V_CUTOFF 0x08 - #define ATOM_H_REPLICATIONBY2 0x10 - #define ATOM_V_REPLICATIONBY2 0x20 -@@ -2099,10 +2581,10 @@ typedef union _ATOM_MODE_MISC_INFO_ACCESS { - #define ATOM_DOUBLE_CLOCK_MODE 0x100 - #define ATOM_RGB888_MODE 0x200 - --/* usRefreshRate- */ -+//usRefreshRate- - #define ATOM_REFRESH_43 43 - #define ATOM_REFRESH_47 47 --#define ATOM_REFRESH_56 56 -+#define ATOM_REFRESH_56 56 - #define ATOM_REFRESH_60 60 - #define ATOM_REFRESH_65 65 - #define ATOM_REFRESH_70 70 -@@ -2110,192 +2592,233 @@ typedef union _ATOM_MODE_MISC_INFO_ACCESS { - #define ATOM_REFRESH_75 75 - #define ATOM_REFRESH_85 85 - --/* ATOM_MODE_TIMING data are exactly the same as VESA timing data. */ --/* Translation from EDID to ATOM_MODE_TIMING, use the following formula. */ --/* */ --/* VESA_HTOTAL = VESA_ACTIVE + 2* VESA_BORDER + VESA_BLANK */ --/* = EDID_HA + EDID_HBL */ --/* VESA_HDISP = VESA_ACTIVE = EDID_HA */ --/* VESA_HSYNC_START = VESA_ACTIVE + VESA_BORDER + VESA_FRONT_PORCH */ --/* = EDID_HA + EDID_HSO */ --/* VESA_HSYNC_WIDTH = VESA_HSYNC_TIME = EDID_HSPW */ --/* VESA_BORDER = EDID_BORDER */ -- --/****************************************************************************/ --/* Structure used in SetCRTC_UsingDTDTimingTable */ --/****************************************************************************/ --typedef struct _SET_CRTC_USING_DTD_TIMING_PARAMETERS { -- USHORT usH_Size; -- USHORT usH_Blanking_Time; -- USHORT usV_Size; -- USHORT usV_Blanking_Time; -- USHORT usH_SyncOffset; -- USHORT usH_SyncWidth; -- USHORT usV_SyncOffset; -- USHORT usV_SyncWidth; -- ATOM_MODE_MISC_INFO_ACCESS susModeMiscInfo; -- UCHAR ucH_Border; /* From DFP EDID */ -- UCHAR ucV_Border; -- UCHAR ucCRTC; /* ATOM_CRTC1 or ATOM_CRTC2 */ -- UCHAR ucPadding[3]; --} SET_CRTC_USING_DTD_TIMING_PARAMETERS; -- --/****************************************************************************/ --/* Structure used in SetCRTC_TimingTable */ --/****************************************************************************/ --typedef struct _SET_CRTC_TIMING_PARAMETERS { -- USHORT usH_Total; /* horizontal total */ -- USHORT usH_Disp; /* horizontal display */ -- USHORT usH_SyncStart; /* horozontal Sync start */ -- USHORT usH_SyncWidth; /* horizontal Sync width */ -- USHORT usV_Total; /* vertical total */ -- USHORT usV_Disp; /* vertical display */ -- USHORT usV_SyncStart; /* vertical Sync start */ -- USHORT usV_SyncWidth; /* vertical Sync width */ -- ATOM_MODE_MISC_INFO_ACCESS susModeMiscInfo; -- UCHAR ucCRTC; /* ATOM_CRTC1 or ATOM_CRTC2 */ -- UCHAR ucOverscanRight; /* right */ -- UCHAR ucOverscanLeft; /* left */ -- UCHAR ucOverscanBottom; /* bottom */ -- UCHAR ucOverscanTop; /* top */ -- UCHAR ucReserved; --} SET_CRTC_TIMING_PARAMETERS; -+// ATOM_MODE_TIMING data are exactly the same as VESA timing data. -+// Translation from EDID to ATOM_MODE_TIMING, use the following formula. -+// -+// VESA_HTOTAL = VESA_ACTIVE + 2* VESA_BORDER + VESA_BLANK -+// = EDID_HA + EDID_HBL -+// VESA_HDISP = VESA_ACTIVE = EDID_HA -+// VESA_HSYNC_START = VESA_ACTIVE + VESA_BORDER + VESA_FRONT_PORCH -+// = EDID_HA + EDID_HSO -+// VESA_HSYNC_WIDTH = VESA_HSYNC_TIME = EDID_HSPW -+// VESA_BORDER = EDID_BORDER -+ -+/****************************************************************************/ -+// Structure used in SetCRTC_UsingDTDTimingTable -+/****************************************************************************/ -+typedef struct _SET_CRTC_USING_DTD_TIMING_PARAMETERS -+{ -+ USHORT usH_Size; -+ USHORT usH_Blanking_Time; -+ USHORT usV_Size; -+ USHORT usV_Blanking_Time; -+ USHORT usH_SyncOffset; -+ USHORT usH_SyncWidth; -+ USHORT usV_SyncOffset; -+ USHORT usV_SyncWidth; -+ ATOM_MODE_MISC_INFO_ACCESS susModeMiscInfo; -+ UCHAR ucH_Border; // From DFP EDID -+ UCHAR ucV_Border; -+ UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2 -+ UCHAR ucPadding[3]; -+}SET_CRTC_USING_DTD_TIMING_PARAMETERS; -+ -+/****************************************************************************/ -+// Structure used in SetCRTC_TimingTable -+/****************************************************************************/ -+typedef struct _SET_CRTC_TIMING_PARAMETERS -+{ -+ USHORT usH_Total; // horizontal total -+ USHORT usH_Disp; // horizontal display -+ USHORT usH_SyncStart; // horozontal Sync start -+ USHORT usH_SyncWidth; // horizontal Sync width -+ USHORT usV_Total; // vertical total -+ USHORT usV_Disp; // vertical display -+ USHORT usV_SyncStart; // vertical Sync start -+ USHORT usV_SyncWidth; // vertical Sync width -+ ATOM_MODE_MISC_INFO_ACCESS susModeMiscInfo; -+ UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2 -+ UCHAR ucOverscanRight; // right -+ UCHAR ucOverscanLeft; // left -+ UCHAR ucOverscanBottom; // bottom -+ UCHAR ucOverscanTop; // top -+ UCHAR ucReserved; -+}SET_CRTC_TIMING_PARAMETERS; - #define SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION SET_CRTC_TIMING_PARAMETERS - --/****************************************************************************/ --/* Structure used in StandardVESA_TimingTable */ --/* AnalogTV_InfoTable */ --/* ComponentVideoInfoTable */ --/****************************************************************************/ --typedef struct _ATOM_MODE_TIMING { -- USHORT usCRTC_H_Total; -- USHORT usCRTC_H_Disp; -- USHORT usCRTC_H_SyncStart; -- USHORT usCRTC_H_SyncWidth; -- USHORT usCRTC_V_Total; -- USHORT usCRTC_V_Disp; -- USHORT usCRTC_V_SyncStart; -- USHORT usCRTC_V_SyncWidth; -- USHORT usPixelClock; /* in 10Khz unit */ -- ATOM_MODE_MISC_INFO_ACCESS susModeMiscInfo; -- USHORT usCRTC_OverscanRight; -- USHORT usCRTC_OverscanLeft; -- USHORT usCRTC_OverscanBottom; -- USHORT usCRTC_OverscanTop; -- USHORT usReserve; -- UCHAR ucInternalModeNumber; -- UCHAR ucRefreshRate; --} ATOM_MODE_TIMING; -- --typedef struct _ATOM_DTD_FORMAT { -- USHORT usPixClk; -- USHORT usHActive; -- USHORT usHBlanking_Time; -- USHORT usVActive; -- USHORT usVBlanking_Time; -- USHORT usHSyncOffset; -- USHORT usHSyncWidth; -- USHORT usVSyncOffset; -- USHORT usVSyncWidth; -- USHORT usImageHSize; -- USHORT usImageVSize; -- UCHAR ucHBorder; -- UCHAR ucVBorder; -- ATOM_MODE_MISC_INFO_ACCESS susModeMiscInfo; -- UCHAR ucInternalModeNumber; -- UCHAR ucRefreshRate; --} ATOM_DTD_FORMAT; -- --/****************************************************************************/ --/* Structure used in LVDS_InfoTable */ --/* * Need a document to describe this table */ --/****************************************************************************/ -+/****************************************************************************/ -+// Structure used in StandardVESA_TimingTable -+// AnalogTV_InfoTable -+// ComponentVideoInfoTable -+/****************************************************************************/ -+typedef struct _ATOM_MODE_TIMING -+{ -+ USHORT usCRTC_H_Total; -+ USHORT usCRTC_H_Disp; -+ USHORT usCRTC_H_SyncStart; -+ USHORT usCRTC_H_SyncWidth; -+ USHORT usCRTC_V_Total; -+ USHORT usCRTC_V_Disp; -+ USHORT usCRTC_V_SyncStart; -+ USHORT usCRTC_V_SyncWidth; -+ USHORT usPixelClock; //in 10Khz unit -+ ATOM_MODE_MISC_INFO_ACCESS susModeMiscInfo; -+ USHORT usCRTC_OverscanRight; -+ USHORT usCRTC_OverscanLeft; -+ USHORT usCRTC_OverscanBottom; -+ USHORT usCRTC_OverscanTop; -+ USHORT usReserve; -+ UCHAR ucInternalModeNumber; -+ UCHAR ucRefreshRate; -+}ATOM_MODE_TIMING; -+ -+typedef struct _ATOM_DTD_FORMAT -+{ -+ USHORT usPixClk; -+ USHORT usHActive; -+ USHORT usHBlanking_Time; -+ USHORT usVActive; -+ USHORT usVBlanking_Time; -+ USHORT usHSyncOffset; -+ USHORT usHSyncWidth; -+ USHORT usVSyncOffset; -+ USHORT usVSyncWidth; -+ USHORT usImageHSize; -+ USHORT usImageVSize; -+ UCHAR ucHBorder; -+ UCHAR ucVBorder; -+ ATOM_MODE_MISC_INFO_ACCESS susModeMiscInfo; -+ UCHAR ucInternalModeNumber; -+ UCHAR ucRefreshRate; -+}ATOM_DTD_FORMAT; -+ -+/****************************************************************************/ -+// Structure used in LVDS_InfoTable -+// * Need a document to describe this table -+/****************************************************************************/ - #define SUPPORTED_LCD_REFRESHRATE_30Hz 0x0004 - #define SUPPORTED_LCD_REFRESHRATE_40Hz 0x0008 - #define SUPPORTED_LCD_REFRESHRATE_50Hz 0x0010 - #define SUPPORTED_LCD_REFRESHRATE_60Hz 0x0020 - --/* Once DAL sees this CAP is set, it will read EDID from LCD on its own instead of using sLCDTiming in ATOM_LVDS_INFO_V12. */ --/* Other entries in ATOM_LVDS_INFO_V12 are still valid/useful to DAL */ --#define LCDPANEL_CAP_READ_EDID 0x1 -- --/* ucTableFormatRevision=1 */ --/* ucTableContentRevision=1 */ --typedef struct _ATOM_LVDS_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_DTD_FORMAT sLCDTiming; -- USHORT usModePatchTableOffset; -- USHORT usSupportedRefreshRate; /* Refer to panel info table in ATOMBIOS extension Spec. */ -- USHORT usOffDelayInMs; -- UCHAR ucPowerSequenceDigOntoDEin10Ms; -- UCHAR ucPowerSequenceDEtoBLOnin10Ms; -- UCHAR ucLVDS_Misc; /* Bit0:{=0:single, =1:dual},Bit1 {=0:666RGB, =1:888RGB},Bit2:3:{Grey level} */ -- /* Bit4:{=0:LDI format for RGB888, =1 FPDI format for RGB888} */ -- /* Bit5:{=0:Spatial Dithering disabled;1 Spatial Dithering enabled} */ -- /* Bit6:{=0:Temporal Dithering disabled;1 Temporal Dithering enabled} */ -- UCHAR ucPanelDefaultRefreshRate; -- UCHAR ucPanelIdentification; -- UCHAR ucSS_Id; --} ATOM_LVDS_INFO; -- --/* ucTableFormatRevision=1 */ --/* ucTableContentRevision=2 */ --typedef struct _ATOM_LVDS_INFO_V12 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_DTD_FORMAT sLCDTiming; -- USHORT usExtInfoTableOffset; -- USHORT usSupportedRefreshRate; /* Refer to panel info table in ATOMBIOS extension Spec. */ -- USHORT usOffDelayInMs; -- UCHAR ucPowerSequenceDigOntoDEin10Ms; -- UCHAR ucPowerSequenceDEtoBLOnin10Ms; -- UCHAR ucLVDS_Misc; /* Bit0:{=0:single, =1:dual},Bit1 {=0:666RGB, =1:888RGB},Bit2:3:{Grey level} */ -- /* Bit4:{=0:LDI format for RGB888, =1 FPDI format for RGB888} */ -- /* Bit5:{=0:Spatial Dithering disabled;1 Spatial Dithering enabled} */ -- /* Bit6:{=0:Temporal Dithering disabled;1 Temporal Dithering enabled} */ -- UCHAR ucPanelDefaultRefreshRate; -- UCHAR ucPanelIdentification; -- UCHAR ucSS_Id; -- USHORT usLCDVenderID; -- USHORT usLCDProductID; -- UCHAR ucLCDPanel_SpecialHandlingCap; -- UCHAR ucPanelInfoSize; /* start from ATOM_DTD_FORMAT to end of panel info, include ExtInfoTable */ -- UCHAR ucReserved[2]; --} ATOM_LVDS_INFO_V12; -+//ucTableFormatRevision=1 -+//ucTableContentRevision=1 -+typedef struct _ATOM_LVDS_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_DTD_FORMAT sLCDTiming; -+ USHORT usModePatchTableOffset; -+ USHORT usSupportedRefreshRate; //Refer to panel info table in ATOMBIOS extension Spec. -+ USHORT usOffDelayInMs; -+ UCHAR ucPowerSequenceDigOntoDEin10Ms; -+ UCHAR ucPowerSequenceDEtoBLOnin10Ms; -+ UCHAR ucLVDS_Misc; // Bit0:{=0:single, =1:dual},Bit1 {=0:666RGB, =1:888RGB},Bit2:3:{Grey level} -+ // Bit4:{=0:LDI format for RGB888, =1 FPDI format for RGB888} -+ // Bit5:{=0:Spatial Dithering disabled;1 Spatial Dithering enabled} -+ // Bit6:{=0:Temporal Dithering disabled;1 Temporal Dithering enabled} -+ UCHAR ucPanelDefaultRefreshRate; -+ UCHAR ucPanelIdentification; -+ UCHAR ucSS_Id; -+}ATOM_LVDS_INFO; -+ -+//ucTableFormatRevision=1 -+//ucTableContentRevision=2 -+typedef struct _ATOM_LVDS_INFO_V12 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_DTD_FORMAT sLCDTiming; -+ USHORT usExtInfoTableOffset; -+ USHORT usSupportedRefreshRate; //Refer to panel info table in ATOMBIOS extension Spec. -+ USHORT usOffDelayInMs; -+ UCHAR ucPowerSequenceDigOntoDEin10Ms; -+ UCHAR ucPowerSequenceDEtoBLOnin10Ms; -+ UCHAR ucLVDS_Misc; // Bit0:{=0:single, =1:dual},Bit1 {=0:666RGB, =1:888RGB},Bit2:3:{Grey level} -+ // Bit4:{=0:LDI format for RGB888, =1 FPDI format for RGB888} -+ // Bit5:{=0:Spatial Dithering disabled;1 Spatial Dithering enabled} -+ // Bit6:{=0:Temporal Dithering disabled;1 Temporal Dithering enabled} -+ UCHAR ucPanelDefaultRefreshRate; -+ UCHAR ucPanelIdentification; -+ UCHAR ucSS_Id; -+ USHORT usLCDVenderID; -+ USHORT usLCDProductID; -+ UCHAR ucLCDPanel_SpecialHandlingCap; -+ UCHAR ucPanelInfoSize; // start from ATOM_DTD_FORMAT to end of panel info, include ExtInfoTable -+ UCHAR ucReserved[2]; -+}ATOM_LVDS_INFO_V12; -+ -+//Definitions for ucLCDPanel_SpecialHandlingCap: -+ -+//Once DAL sees this CAP is set, it will read EDID from LCD on its own instead of using sLCDTiming in ATOM_LVDS_INFO_V12. -+//Other entries in ATOM_LVDS_INFO_V12 are still valid/useful to DAL -+#define LCDPANEL_CAP_READ_EDID 0x1 -+ -+//If a design supports DRR (dynamic refresh rate) on internal panels (LVDS or EDP), this cap is set in ucLCDPanel_SpecialHandlingCap together -+//with multiple supported refresh rates@usSupportedRefreshRate. This cap should not be set when only slow refresh rate is supported (static -+//refresh rate switch by SW. This is only valid from ATOM_LVDS_INFO_V12 -+#define LCDPANEL_CAP_DRR_SUPPORTED 0x2 -+ -+//Use this cap bit for a quick reference whether an embadded panel (LCD1 ) is LVDS or eDP. -+#define LCDPANEL_CAP_eDP 0x4 -+ -+ -+//Color Bit Depth definition in EDID V1.4 @BYTE 14h -+//Bit 6 5 4 -+ // 0 0 0 - Color bit depth is undefined -+ // 0 0 1 - 6 Bits per Primary Color -+ // 0 1 0 - 8 Bits per Primary Color -+ // 0 1 1 - 10 Bits per Primary Color -+ // 1 0 0 - 12 Bits per Primary Color -+ // 1 0 1 - 14 Bits per Primary Color -+ // 1 1 0 - 16 Bits per Primary Color -+ // 1 1 1 - Reserved -+ -+#define PANEL_COLOR_BIT_DEPTH_MASK 0x70 -+ -+// Bit7:{=0:Random Dithering disabled;1 Random Dithering enabled} -+#define PANEL_RANDOM_DITHER 0x80 -+#define PANEL_RANDOM_DITHER_MASK 0x80 -+ - - #define ATOM_LVDS_INFO_LAST ATOM_LVDS_INFO_V12 - --typedef struct _ATOM_PATCH_RECORD_MODE { -- UCHAR ucRecordType; -- USHORT usHDisp; -- USHORT usVDisp; --} ATOM_PATCH_RECORD_MODE; -+typedef struct _ATOM_PATCH_RECORD_MODE -+{ -+ UCHAR ucRecordType; -+ USHORT usHDisp; -+ USHORT usVDisp; -+}ATOM_PATCH_RECORD_MODE; - --typedef struct _ATOM_LCD_RTS_RECORD { -- UCHAR ucRecordType; -- UCHAR ucRTSValue; --} ATOM_LCD_RTS_RECORD; -+typedef struct _ATOM_LCD_RTS_RECORD -+{ -+ UCHAR ucRecordType; -+ UCHAR ucRTSValue; -+}ATOM_LCD_RTS_RECORD; - --/* !! If the record below exits, it shoud always be the first record for easy use in command table!!! */ --typedef struct _ATOM_LCD_MODE_CONTROL_CAP { -- UCHAR ucRecordType; -- USHORT usLCDCap; --} ATOM_LCD_MODE_CONTROL_CAP; -+//!! If the record below exits, it shoud always be the first record for easy use in command table!!! -+// The record below is only used when LVDS_Info is present. From ATOM_LVDS_INFO_V12, use ucLCDPanel_SpecialHandlingCap instead. -+typedef struct _ATOM_LCD_MODE_CONTROL_CAP -+{ -+ UCHAR ucRecordType; -+ USHORT usLCDCap; -+}ATOM_LCD_MODE_CONTROL_CAP; - - #define LCD_MODE_CAP_BL_OFF 1 - #define LCD_MODE_CAP_CRTC_OFF 2 - #define LCD_MODE_CAP_PANEL_OFF 4 - --typedef struct _ATOM_FAKE_EDID_PATCH_RECORD { -- UCHAR ucRecordType; -- UCHAR ucFakeEDIDLength; -- UCHAR ucFakeEDIDString[1]; /* This actually has ucFakeEdidLength elements. */ -+typedef struct _ATOM_FAKE_EDID_PATCH_RECORD -+{ -+ UCHAR ucRecordType; -+ UCHAR ucFakeEDIDLength; -+ UCHAR ucFakeEDIDString[1]; // This actually has ucFakeEdidLength elements. - } ATOM_FAKE_EDID_PATCH_RECORD; - --typedef struct _ATOM_PANEL_RESOLUTION_PATCH_RECORD { -- UCHAR ucRecordType; -- USHORT usHSize; -- USHORT usVSize; --} ATOM_PANEL_RESOLUTION_PATCH_RECORD; -+typedef struct _ATOM_PANEL_RESOLUTION_PATCH_RECORD -+{ -+ UCHAR ucRecordType; -+ USHORT usHSize; -+ USHORT usVSize; -+}ATOM_PANEL_RESOLUTION_PATCH_RECORD; - - #define LCD_MODE_PATCH_RECORD_MODE_TYPE 1 - #define LCD_RTS_RECORD_TYPE 2 -@@ -2306,21 +2829,25 @@ typedef struct _ATOM_PANEL_RESOLUTION_PATCH_RECORD { - - /****************************Spread Spectrum Info Table Definitions **********************/ - --/* ucTableFormatRevision=1 */ --/* ucTableContentRevision=2 */ --typedef struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT { -- USHORT usSpreadSpectrumPercentage; -- UCHAR ucSpreadSpectrumType; /* Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD */ -- UCHAR ucSS_Step; -- UCHAR ucSS_Delay; -- UCHAR ucSS_Id; -- UCHAR ucRecommendedRef_Div; -- UCHAR ucSS_Range; /* it was reserved for V11 */ --} ATOM_SPREAD_SPECTRUM_ASSIGNMENT; -+//ucTableFormatRevision=1 -+//ucTableContentRevision=2 -+typedef struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT -+{ -+ USHORT usSpreadSpectrumPercentage; -+ UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Bit2=1: PCIE REFCLK SS =0 iternal PPLL SS Others:TBD -+ UCHAR ucSS_Step; -+ UCHAR ucSS_Delay; -+ UCHAR ucSS_Id; -+ UCHAR ucRecommendedRef_Div; -+ UCHAR ucSS_Range; //it was reserved for V11 -+}ATOM_SPREAD_SPECTRUM_ASSIGNMENT; - - #define ATOM_MAX_SS_ENTRY 16 --#define ATOM_DP_SS_ID1 0x0f1 /* SS modulation freq=30k */ --#define ATOM_DP_SS_ID2 0x0f2 /* SS modulation freq=33k */ -+#define ATOM_DP_SS_ID1 0x0f1 // SS ID for internal DP stream at 2.7Ghz. if ATOM_DP_SS_ID2 does not exist in SS_InfoTable, it is used for internal DP stream at 1.62Ghz as well. -+#define ATOM_DP_SS_ID2 0x0f2 // SS ID for internal DP stream at 1.62Ghz, if it exists in SS_InfoTable. -+#define ATOM_LVLINK_2700MHz_SS_ID 0x0f3 // SS ID for LV link translator chip at 2.7Ghz -+#define ATOM_LVLINK_1620MHz_SS_ID 0x0f4 // SS ID for LV link translator chip at 1.62Ghz -+ - - #define ATOM_SS_DOWN_SPREAD_MODE_MASK 0x00000000 - #define ATOM_SS_DOWN_SPREAD_MODE 0x00000000 -@@ -2329,29 +2856,30 @@ typedef struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT { - #define ATOM_INTERNAL_SS_MASK 0x00000000 - #define ATOM_EXTERNAL_SS_MASK 0x00000002 - #define EXEC_SS_STEP_SIZE_SHIFT 2 --#define EXEC_SS_DELAY_SHIFT 4 -+#define EXEC_SS_DELAY_SHIFT 4 - #define ACTIVEDATA_TO_BLON_DELAY_SHIFT 4 - --typedef struct _ATOM_SPREAD_SPECTRUM_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_SPREAD_SPECTRUM_ASSIGNMENT asSS_Info[ATOM_MAX_SS_ENTRY]; --} ATOM_SPREAD_SPECTRUM_INFO; -- --/****************************************************************************/ --/* Structure used in AnalogTV_InfoTable (Top level) */ --/****************************************************************************/ --/* ucTVBootUpDefaultStd definiton: */ -- --/* ATOM_TV_NTSC 1 */ --/* ATOM_TV_NTSCJ 2 */ --/* ATOM_TV_PAL 3 */ --/* ATOM_TV_PALM 4 */ --/* ATOM_TV_PALCN 5 */ --/* ATOM_TV_PALN 6 */ --/* ATOM_TV_PAL60 7 */ --/* ATOM_TV_SECAM 8 */ -- --/* ucTVSuppportedStd definition: */ -+typedef struct _ATOM_SPREAD_SPECTRUM_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_SPREAD_SPECTRUM_ASSIGNMENT asSS_Info[ATOM_MAX_SS_ENTRY]; -+}ATOM_SPREAD_SPECTRUM_INFO; -+ -+/****************************************************************************/ -+// Structure used in AnalogTV_InfoTable (Top level) -+/****************************************************************************/ -+//ucTVBootUpDefaultStd definiton: -+ -+//ATOM_TV_NTSC 1 -+//ATOM_TV_NTSCJ 2 -+//ATOM_TV_PAL 3 -+//ATOM_TV_PALM 4 -+//ATOM_TV_PALCN 5 -+//ATOM_TV_PALN 6 -+//ATOM_TV_PAL60 7 -+//ATOM_TV_SECAM 8 -+ -+//ucTVSupportedStd definition: - #define NTSC_SUPPORT 0x1 - #define NTSCJ_SUPPORT 0x2 - -@@ -2364,46 +2892,58 @@ typedef struct _ATOM_SPREAD_SPECTRUM_INFO { - - #define MAX_SUPPORTED_TV_TIMING 2 - --typedef struct _ATOM_ANALOG_TV_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR ucTV_SupportedStandard; -- UCHAR ucTV_BootUpDefaultStandard; -- UCHAR ucExt_TV_ASIC_ID; -- UCHAR ucExt_TV_ASIC_SlaveAddr; -- /*ATOM_DTD_FORMAT aModeTimings[MAX_SUPPORTED_TV_TIMING]; */ -- ATOM_MODE_TIMING aModeTimings[MAX_SUPPORTED_TV_TIMING]; --} ATOM_ANALOG_TV_INFO; -+typedef struct _ATOM_ANALOG_TV_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR ucTV_SupportedStandard; -+ UCHAR ucTV_BootUpDefaultStandard; -+ UCHAR ucExt_TV_ASIC_ID; -+ UCHAR ucExt_TV_ASIC_SlaveAddr; -+ /*ATOM_DTD_FORMAT aModeTimings[MAX_SUPPORTED_TV_TIMING];*/ -+ ATOM_MODE_TIMING aModeTimings[MAX_SUPPORTED_TV_TIMING]; -+}ATOM_ANALOG_TV_INFO; - - #define MAX_SUPPORTED_TV_TIMING_V1_2 3 - --typedef struct _ATOM_ANALOG_TV_INFO_V1_2 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR ucTV_SupportedStandard; -- UCHAR ucTV_BootUpDefaultStandard; -- UCHAR ucExt_TV_ASIC_ID; -- UCHAR ucExt_TV_ASIC_SlaveAddr; -- ATOM_DTD_FORMAT aModeTimings[MAX_SUPPORTED_TV_TIMING]; --} ATOM_ANALOG_TV_INFO_V1_2; -+typedef struct _ATOM_ANALOG_TV_INFO_V1_2 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR ucTV_SupportedStandard; -+ UCHAR ucTV_BootUpDefaultStandard; -+ UCHAR ucExt_TV_ASIC_ID; -+ UCHAR ucExt_TV_ASIC_SlaveAddr; -+ ATOM_DTD_FORMAT aModeTimings[MAX_SUPPORTED_TV_TIMING]; -+}ATOM_ANALOG_TV_INFO_V1_2; -+ -+typedef struct _ATOM_DPCD_INFO -+{ -+ UCHAR ucRevisionNumber; //10h : Revision 1.0; 11h : Revision 1.1 -+ UCHAR ucMaxLinkRate; //06h : 1.62Gbps per lane; 0Ah = 2.7Gbps per lane -+ UCHAR ucMaxLane; //Bits 4:0 = MAX_LANE_COUNT (1/2/4). Bit 7 = ENHANCED_FRAME_CAP -+ UCHAR ucMaxDownSpread; //Bit0 = 0: No Down spread; Bit0 = 1: 0.5% (Subject to change according to DP spec) -+}ATOM_DPCD_INFO; -+ -+#define ATOM_DPCD_MAX_LANE_MASK 0x1F - - /**************************************************************************/ --/* VRAM usage and their definitions */ -+// VRAM usage and their defintions - --/* One chunk of VRAM used by Bios are for HWICON surfaces,EDID data. */ --/* Current Mode timing and Dail Timing and/or STD timing data EACH device. They can be broken down as below. */ --/* All the addresses below are the offsets from the frame buffer start.They all MUST be Dword aligned! */ --/* To driver: The physical address of this memory portion=mmFB_START(4K aligned)+ATOMBIOS_VRAM_USAGE_START_ADDR+ATOM_x_ADDR */ --/* To Bios: ATOMBIOS_VRAM_USAGE_START_ADDR+ATOM_x_ADDR->MM_INDEX */ -+// One chunk of VRAM used by Bios are for HWICON surfaces,EDID data. -+// Current Mode timing and Dail Timing and/or STD timing data EACH device. They can be broken down as below. -+// All the addresses below are the offsets from the frame buffer start.They all MUST be Dword aligned! -+// To driver: The physical address of this memory portion=mmFB_START(4K aligned)+ATOMBIOS_VRAM_USAGE_START_ADDR+ATOM_x_ADDR -+// To Bios: ATOMBIOS_VRAM_USAGE_START_ADDR+ATOM_x_ADDR->MM_INDEX - - #ifndef VESA_MEMORY_IN_64K_BLOCK --#define VESA_MEMORY_IN_64K_BLOCK 0x100 /* 256*64K=16Mb (Max. VESA memory is 16Mb!) */ -+#define VESA_MEMORY_IN_64K_BLOCK 0x100 //256*64K=16Mb (Max. VESA memory is 16Mb!) - #endif - --#define ATOM_EDID_RAW_DATASIZE 256 /* In Bytes */ --#define ATOM_HWICON_SURFACE_SIZE 4096 /* In Bytes */ -+#define ATOM_EDID_RAW_DATASIZE 256 //In Bytes -+#define ATOM_HWICON_SURFACE_SIZE 4096 //In Bytes - #define ATOM_HWICON_INFOTABLE_SIZE 32 - #define MAX_DTD_MODE_IN_VRAM 6 --#define ATOM_DTD_MODE_SUPPORT_TBL_SIZE (MAX_DTD_MODE_IN_VRAM*28) /* 28= (SIZEOF ATOM_DTD_FORMAT) */ --#define ATOM_STD_MODE_SUPPORT_TBL_SIZE (32*8) /* 32 is a predefined number,8= (SIZEOF ATOM_STD_FORMAT) */ -+#define ATOM_DTD_MODE_SUPPORT_TBL_SIZE (MAX_DTD_MODE_IN_VRAM*28) //28= (SIZEOF ATOM_DTD_FORMAT) -+#define ATOM_STD_MODE_SUPPORT_TBL_SIZE 32*8 //32 is a predefined number,8= (SIZEOF ATOM_STD_FORMAT) - #define DFP_ENCODER_TYPE_OFFSET 0x80 - #define DP_ENCODER_LANE_NUM_OFFSET 0x84 - #define DP_ENCODER_LINK_RATE_OFFSET 0x88 -@@ -2417,7 +2957,7 @@ typedef struct _ATOM_ANALOG_TV_INFO_V1_2 { - - #define ATOM_LCD1_EDID_ADDR (ATOM_CRT1_STD_MODE_TBL_ADDR + ATOM_STD_MODE_SUPPORT_TBL_SIZE) - #define ATOM_LCD1_DTD_MODE_TBL_ADDR (ATOM_LCD1_EDID_ADDR + ATOM_EDID_RAW_DATASIZE) --#define ATOM_LCD1_STD_MODE_TBL_ADDR (ATOM_LCD1_DTD_MODE_TBL_ADDR + ATOM_DTD_MODE_SUPPORT_TBL_SIZE) -+#define ATOM_LCD1_STD_MODE_TBL_ADDR (ATOM_LCD1_DTD_MODE_TBL_ADDR + ATOM_DTD_MODE_SUPPORT_TBL_SIZE) - - #define ATOM_TV1_DTD_MODE_TBL_ADDR (ATOM_LCD1_STD_MODE_TBL_ADDR + ATOM_STD_MODE_SUPPORT_TBL_SIZE) - -@@ -2431,13 +2971,13 @@ typedef struct _ATOM_ANALOG_TV_INFO_V1_2 { - - #define ATOM_LCD2_EDID_ADDR (ATOM_CRT2_STD_MODE_TBL_ADDR + ATOM_STD_MODE_SUPPORT_TBL_SIZE) - #define ATOM_LCD2_DTD_MODE_TBL_ADDR (ATOM_LCD2_EDID_ADDR + ATOM_EDID_RAW_DATASIZE) --#define ATOM_LCD2_STD_MODE_TBL_ADDR (ATOM_LCD2_DTD_MODE_TBL_ADDR + ATOM_DTD_MODE_SUPPORT_TBL_SIZE) -+#define ATOM_LCD2_STD_MODE_TBL_ADDR (ATOM_LCD2_DTD_MODE_TBL_ADDR + ATOM_DTD_MODE_SUPPORT_TBL_SIZE) - --#define ATOM_TV2_EDID_ADDR (ATOM_LCD2_STD_MODE_TBL_ADDR + ATOM_STD_MODE_SUPPORT_TBL_SIZE) --#define ATOM_TV2_DTD_MODE_TBL_ADDR (ATOM_TV2_EDID_ADDR + ATOM_EDID_RAW_DATASIZE) --#define ATOM_TV2_STD_MODE_TBL_ADDR (ATOM_TV2_DTD_MODE_TBL_ADDR + ATOM_DTD_MODE_SUPPORT_TBL_SIZE) -+#define ATOM_DFP6_EDID_ADDR (ATOM_LCD2_STD_MODE_TBL_ADDR + ATOM_STD_MODE_SUPPORT_TBL_SIZE) -+#define ATOM_DFP6_DTD_MODE_TBL_ADDR (ATOM_DFP6_EDID_ADDR + ATOM_EDID_RAW_DATASIZE) -+#define ATOM_DFP6_STD_MODE_TBL_ADDR (ATOM_DFP6_DTD_MODE_TBL_ADDR + ATOM_DTD_MODE_SUPPORT_TBL_SIZE) - --#define ATOM_DFP2_EDID_ADDR (ATOM_TV2_STD_MODE_TBL_ADDR + ATOM_STD_MODE_SUPPORT_TBL_SIZE) -+#define ATOM_DFP2_EDID_ADDR (ATOM_DFP6_STD_MODE_TBL_ADDR + ATOM_STD_MODE_SUPPORT_TBL_SIZE) - #define ATOM_DFP2_DTD_MODE_TBL_ADDR (ATOM_DFP2_EDID_ADDR + ATOM_EDID_RAW_DATASIZE) - #define ATOM_DFP2_STD_MODE_TBL_ADDR (ATOM_DFP2_DTD_MODE_TBL_ADDR + ATOM_DTD_MODE_SUPPORT_TBL_SIZE) - -@@ -2457,533 +2997,850 @@ typedef struct _ATOM_ANALOG_TV_INFO_V1_2 { - #define ATOM_DFP5_DTD_MODE_TBL_ADDR (ATOM_DFP5_EDID_ADDR + ATOM_EDID_RAW_DATASIZE) - #define ATOM_DFP5_STD_MODE_TBL_ADDR (ATOM_DFP5_DTD_MODE_TBL_ADDR + ATOM_DTD_MODE_SUPPORT_TBL_SIZE) - --#define ATOM_DP_TRAINING_TBL_ADDR (ATOM_DFP5_STD_MODE_TBL_ADDR+ATOM_STD_MODE_SUPPORT_TBL_SIZE) -+#define ATOM_DP_TRAINING_TBL_ADDR (ATOM_DFP5_STD_MODE_TBL_ADDR+ATOM_STD_MODE_SUPPORT_TBL_SIZE) - --#define ATOM_STACK_STORAGE_START (ATOM_DP_TRAINING_TBL_ADDR + 256) --#define ATOM_STACK_STORAGE_END (ATOM_STACK_STORAGE_START + 512) -+#define ATOM_STACK_STORAGE_START (ATOM_DP_TRAINING_TBL_ADDR+256) -+#define ATOM_STACK_STORAGE_END ATOM_STACK_STORAGE_START+512 - --/* The size below is in Kb! */ -+//The size below is in Kb! - #define ATOM_VRAM_RESERVE_SIZE ((((ATOM_STACK_STORAGE_END - ATOM_HWICON1_SURFACE_ADDR)>>10)+4)&0xFFFC) -- -+ - #define ATOM_VRAM_OPERATION_FLAGS_MASK 0xC0000000L - #define ATOM_VRAM_OPERATION_FLAGS_SHIFT 30 - #define ATOM_VRAM_BLOCK_NEEDS_NO_RESERVATION 0x1 - #define ATOM_VRAM_BLOCK_NEEDS_RESERVATION 0x0 - --/***********************************************************************************/ --/* Structure used in VRAM_UsageByFirmwareTable */ --/* Note1: This table is filled by SetBiosReservationStartInFB in CoreCommSubs.asm */ --/* at running time. */ --/* note2: From RV770, the memory is more than 32bit addressable, so we will change */ --/* ucTableFormatRevision=1,ucTableContentRevision=4, the strcuture remains */ --/* exactly same as 1.1 and 1.2 (1.3 is never in use), but ulStartAddrUsedByFirmware */ --/* (in offset to start of memory address) is KB aligned instead of byte aligend. */ --/***********************************************************************************/ -+/***********************************************************************************/ -+// Structure used in VRAM_UsageByFirmwareTable -+// Note1: This table is filled by SetBiosReservationStartInFB in CoreCommSubs.asm -+// at running time. -+// note2: From RV770, the memory is more than 32bit addressable, so we will change -+// ucTableFormatRevision=1,ucTableContentRevision=4, the strcuture remains -+// exactly same as 1.1 and 1.2 (1.3 is never in use), but ulStartAddrUsedByFirmware -+// (in offset to start of memory address) is KB aligned instead of byte aligend. -+/***********************************************************************************/ -+// Note3: -+/* If we change usReserved to "usFBUsedbyDrvInKB", then to VBIOS this usFBUsedbyDrvInKB is a predefined, unchanged constant across VGA or non VGA adapter, -+for CAIL, The size of FB access area is known, only thing missing is the Offset of FB Access area, so we can have: -+ -+If (ulStartAddrUsedByFirmware!=0) -+FBAccessAreaOffset= ulStartAddrUsedByFirmware - usFBUsedbyDrvInKB; -+Reserved area has been claimed by VBIOS including this FB access area; CAIL doesn't need to reserve any extra area for this purpose -+else //Non VGA case -+ if (FB_Size<=2Gb) -+ FBAccessAreaOffset= FB_Size - usFBUsedbyDrvInKB; -+ else -+ FBAccessAreaOffset= Aper_Size - usFBUsedbyDrvInKB -+ -+CAIL needs to claim an reserved area defined by FBAccessAreaOffset and usFBUsedbyDrvInKB in non VGA case.*/ -+ - #define ATOM_MAX_FIRMWARE_VRAM_USAGE_INFO 1 - --typedef struct _ATOM_FIRMWARE_VRAM_RESERVE_INFO { -- ULONG ulStartAddrUsedByFirmware; -- USHORT usFirmwareUseInKb; -- USHORT usReserved; --} ATOM_FIRMWARE_VRAM_RESERVE_INFO; -+typedef struct _ATOM_FIRMWARE_VRAM_RESERVE_INFO -+{ -+ ULONG ulStartAddrUsedByFirmware; -+ USHORT usFirmwareUseInKb; -+ USHORT usReserved; -+}ATOM_FIRMWARE_VRAM_RESERVE_INFO; - --typedef struct _ATOM_VRAM_USAGE_BY_FIRMWARE { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_FIRMWARE_VRAM_RESERVE_INFO -- asFirmwareVramReserveInfo[ATOM_MAX_FIRMWARE_VRAM_USAGE_INFO]; --} ATOM_VRAM_USAGE_BY_FIRMWARE; -+typedef struct _ATOM_VRAM_USAGE_BY_FIRMWARE -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_FIRMWARE_VRAM_RESERVE_INFO asFirmwareVramReserveInfo[ATOM_MAX_FIRMWARE_VRAM_USAGE_INFO]; -+}ATOM_VRAM_USAGE_BY_FIRMWARE; - --/****************************************************************************/ --/* Structure used in GPIO_Pin_LUTTable */ --/****************************************************************************/ --typedef struct _ATOM_GPIO_PIN_ASSIGNMENT { -- USHORT usGpioPin_AIndex; -- UCHAR ucGpioPinBitShift; -- UCHAR ucGPIO_ID; --} ATOM_GPIO_PIN_ASSIGNMENT; -+// change verion to 1.5, when allow driver to allocate the vram area for command table access. -+typedef struct _ATOM_FIRMWARE_VRAM_RESERVE_INFO_V1_5 -+{ -+ ULONG ulStartAddrUsedByFirmware; -+ USHORT usFirmwareUseInKb; -+ USHORT usFBUsedByDrvInKb; -+}ATOM_FIRMWARE_VRAM_RESERVE_INFO_V1_5; - --typedef struct _ATOM_GPIO_PIN_LUT { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_GPIO_PIN_ASSIGNMENT asGPIO_Pin[1]; --} ATOM_GPIO_PIN_LUT; -+typedef struct _ATOM_VRAM_USAGE_BY_FIRMWARE_V1_5 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_FIRMWARE_VRAM_RESERVE_INFO_V1_5 asFirmwareVramReserveInfo[ATOM_MAX_FIRMWARE_VRAM_USAGE_INFO]; -+}ATOM_VRAM_USAGE_BY_FIRMWARE_V1_5; -+ -+/****************************************************************************/ -+// Structure used in GPIO_Pin_LUTTable -+/****************************************************************************/ -+typedef struct _ATOM_GPIO_PIN_ASSIGNMENT -+{ -+ USHORT usGpioPin_AIndex; -+ UCHAR ucGpioPinBitShift; -+ UCHAR ucGPIO_ID; -+}ATOM_GPIO_PIN_ASSIGNMENT; - --/****************************************************************************/ --/* Structure used in ComponentVideoInfoTable */ --/****************************************************************************/ -+typedef struct _ATOM_GPIO_PIN_LUT -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_GPIO_PIN_ASSIGNMENT asGPIO_Pin[1]; -+}ATOM_GPIO_PIN_LUT; -+ -+/****************************************************************************/ -+// Structure used in ComponentVideoInfoTable -+/****************************************************************************/ - #define GPIO_PIN_ACTIVE_HIGH 0x1 - - #define MAX_SUPPORTED_CV_STANDARDS 5 - --/* definitions for ATOM_D_INFO.ucSettings */ --#define ATOM_GPIO_SETTINGS_BITSHIFT_MASK 0x1F /* [4:0] */ --#define ATOM_GPIO_SETTINGS_RESERVED_MASK 0x60 /* [6:5] = must be zeroed out */ --#define ATOM_GPIO_SETTINGS_ACTIVE_MASK 0x80 /* [7] */ -+// definitions for ATOM_D_INFO.ucSettings -+#define ATOM_GPIO_SETTINGS_BITSHIFT_MASK 0x1F // [4:0] -+#define ATOM_GPIO_SETTINGS_RESERVED_MASK 0x60 // [6:5] = must be zeroed out -+#define ATOM_GPIO_SETTINGS_ACTIVE_MASK 0x80 // [7] - --typedef struct _ATOM_GPIO_INFO { -- USHORT usAOffset; -- UCHAR ucSettings; -- UCHAR ucReserved; --} ATOM_GPIO_INFO; -+typedef struct _ATOM_GPIO_INFO -+{ -+ USHORT usAOffset; -+ UCHAR ucSettings; -+ UCHAR ucReserved; -+}ATOM_GPIO_INFO; - --/* definitions for ATOM_COMPONENT_VIDEO_INFO.ucMiscInfo (bit vector) */ -+// definitions for ATOM_COMPONENT_VIDEO_INFO.ucMiscInfo (bit vector) - #define ATOM_CV_RESTRICT_FORMAT_SELECTION 0x2 - --/* definitions for ATOM_COMPONENT_VIDEO_INFO.uc480i/uc480p/uc720p/uc1080i */ --#define ATOM_GPIO_DEFAULT_MODE_EN 0x80 /* [7]; */ --#define ATOM_GPIO_SETTING_PERMODE_MASK 0x7F /* [6:0] */ -- --/* definitions for ATOM_COMPONENT_VIDEO_INFO.ucLetterBoxMode */ --/* Line 3 out put 5V. */ --#define ATOM_CV_LINE3_ASPECTRATIO_16_9_GPIO_A 0x01 /* represent gpio 3 state for 16:9 */ --#define ATOM_CV_LINE3_ASPECTRATIO_16_9_GPIO_B 0x02 /* represent gpio 4 state for 16:9 */ --#define ATOM_CV_LINE3_ASPECTRATIO_16_9_GPIO_SHIFT 0x0 -- --/* Line 3 out put 2.2V */ --#define ATOM_CV_LINE3_ASPECTRATIO_4_3_LETBOX_GPIO_A 0x04 /* represent gpio 3 state for 4:3 Letter box */ --#define ATOM_CV_LINE3_ASPECTRATIO_4_3_LETBOX_GPIO_B 0x08 /* represent gpio 4 state for 4:3 Letter box */ --#define ATOM_CV_LINE3_ASPECTRATIO_4_3_LETBOX_GPIO_SHIFT 0x2 -- --/* Line 3 out put 0V */ --#define ATOM_CV_LINE3_ASPECTRATIO_4_3_GPIO_A 0x10 /* represent gpio 3 state for 4:3 */ --#define ATOM_CV_LINE3_ASPECTRATIO_4_3_GPIO_B 0x20 /* represent gpio 4 state for 4:3 */ --#define ATOM_CV_LINE3_ASPECTRATIO_4_3_GPIO_SHIFT 0x4 -- --#define ATOM_CV_LINE3_ASPECTRATIO_MASK 0x3F /* bit [5:0] */ -- --#define ATOM_CV_LINE3_ASPECTRATIO_EXIST 0x80 /* bit 7 */ -- --/* GPIO bit index in gpio setting per mode value, also represend the block no. in gpio blocks. */ --#define ATOM_GPIO_INDEX_LINE3_ASPECRATIO_GPIO_A 3 /* bit 3 in uc480i/uc480p/uc720p/uc1080i, which represend the default gpio bit setting for the mode. */ --#define ATOM_GPIO_INDEX_LINE3_ASPECRATIO_GPIO_B 4 /* bit 4 in uc480i/uc480p/uc720p/uc1080i, which represend the default gpio bit setting for the mode. */ -- --typedef struct _ATOM_COMPONENT_VIDEO_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usMask_PinRegisterIndex; -- USHORT usEN_PinRegisterIndex; -- USHORT usY_PinRegisterIndex; -- USHORT usA_PinRegisterIndex; -- UCHAR ucBitShift; -- UCHAR ucPinActiveState; /* ucPinActiveState: Bit0=1 active high, =0 active low */ -- ATOM_DTD_FORMAT sReserved; /* must be zeroed out */ -- UCHAR ucMiscInfo; -- UCHAR uc480i; -- UCHAR uc480p; -- UCHAR uc720p; -- UCHAR uc1080i; -- UCHAR ucLetterBoxMode; -- UCHAR ucReserved[3]; -- UCHAR ucNumOfWbGpioBlocks; /* For Component video D-Connector support. If zere, NTSC type connector */ -- ATOM_GPIO_INFO aWbGpioStateBlock[MAX_SUPPORTED_CV_STANDARDS]; -- ATOM_DTD_FORMAT aModeTimings[MAX_SUPPORTED_CV_STANDARDS]; --} ATOM_COMPONENT_VIDEO_INFO; -- --/* ucTableFormatRevision=2 */ --/* ucTableContentRevision=1 */ --typedef struct _ATOM_COMPONENT_VIDEO_INFO_V21 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR ucMiscInfo; -- UCHAR uc480i; -- UCHAR uc480p; -- UCHAR uc720p; -- UCHAR uc1080i; -- UCHAR ucReserved; -- UCHAR ucLetterBoxMode; -- UCHAR ucNumOfWbGpioBlocks; /* For Component video D-Connector support. If zere, NTSC type connector */ -- ATOM_GPIO_INFO aWbGpioStateBlock[MAX_SUPPORTED_CV_STANDARDS]; -- ATOM_DTD_FORMAT aModeTimings[MAX_SUPPORTED_CV_STANDARDS]; --} ATOM_COMPONENT_VIDEO_INFO_V21; -+// definitions for ATOM_COMPONENT_VIDEO_INFO.uc480i/uc480p/uc720p/uc1080i -+#define ATOM_GPIO_DEFAULT_MODE_EN 0x80 //[7]; -+#define ATOM_GPIO_SETTING_PERMODE_MASK 0x7F //[6:0] -+ -+// definitions for ATOM_COMPONENT_VIDEO_INFO.ucLetterBoxMode -+//Line 3 out put 5V. -+#define ATOM_CV_LINE3_ASPECTRATIO_16_9_GPIO_A 0x01 //represent gpio 3 state for 16:9 -+#define ATOM_CV_LINE3_ASPECTRATIO_16_9_GPIO_B 0x02 //represent gpio 4 state for 16:9 -+#define ATOM_CV_LINE3_ASPECTRATIO_16_9_GPIO_SHIFT 0x0 -+ -+//Line 3 out put 2.2V -+#define ATOM_CV_LINE3_ASPECTRATIO_4_3_LETBOX_GPIO_A 0x04 //represent gpio 3 state for 4:3 Letter box -+#define ATOM_CV_LINE3_ASPECTRATIO_4_3_LETBOX_GPIO_B 0x08 //represent gpio 4 state for 4:3 Letter box -+#define ATOM_CV_LINE3_ASPECTRATIO_4_3_LETBOX_GPIO_SHIFT 0x2 -+ -+//Line 3 out put 0V -+#define ATOM_CV_LINE3_ASPECTRATIO_4_3_GPIO_A 0x10 //represent gpio 3 state for 4:3 -+#define ATOM_CV_LINE3_ASPECTRATIO_4_3_GPIO_B 0x20 //represent gpio 4 state for 4:3 -+#define ATOM_CV_LINE3_ASPECTRATIO_4_3_GPIO_SHIFT 0x4 -+ -+#define ATOM_CV_LINE3_ASPECTRATIO_MASK 0x3F // bit [5:0] -+ -+#define ATOM_CV_LINE3_ASPECTRATIO_EXIST 0x80 //bit 7 -+ -+//GPIO bit index in gpio setting per mode value, also represend the block no. in gpio blocks. -+#define ATOM_GPIO_INDEX_LINE3_ASPECRATIO_GPIO_A 3 //bit 3 in uc480i/uc480p/uc720p/uc1080i, which represend the default gpio bit setting for the mode. -+#define ATOM_GPIO_INDEX_LINE3_ASPECRATIO_GPIO_B 4 //bit 4 in uc480i/uc480p/uc720p/uc1080i, which represend the default gpio bit setting for the mode. -+ -+ -+typedef struct _ATOM_COMPONENT_VIDEO_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usMask_PinRegisterIndex; -+ USHORT usEN_PinRegisterIndex; -+ USHORT usY_PinRegisterIndex; -+ USHORT usA_PinRegisterIndex; -+ UCHAR ucBitShift; -+ UCHAR ucPinActiveState; //ucPinActiveState: Bit0=1 active high, =0 active low -+ ATOM_DTD_FORMAT sReserved; // must be zeroed out -+ UCHAR ucMiscInfo; -+ UCHAR uc480i; -+ UCHAR uc480p; -+ UCHAR uc720p; -+ UCHAR uc1080i; -+ UCHAR ucLetterBoxMode; -+ UCHAR ucReserved[3]; -+ UCHAR ucNumOfWbGpioBlocks; //For Component video D-Connector support. If zere, NTSC type connector -+ ATOM_GPIO_INFO aWbGpioStateBlock[MAX_SUPPORTED_CV_STANDARDS]; -+ ATOM_DTD_FORMAT aModeTimings[MAX_SUPPORTED_CV_STANDARDS]; -+}ATOM_COMPONENT_VIDEO_INFO; -+ -+//ucTableFormatRevision=2 -+//ucTableContentRevision=1 -+typedef struct _ATOM_COMPONENT_VIDEO_INFO_V21 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR ucMiscInfo; -+ UCHAR uc480i; -+ UCHAR uc480p; -+ UCHAR uc720p; -+ UCHAR uc1080i; -+ UCHAR ucReserved; -+ UCHAR ucLetterBoxMode; -+ UCHAR ucNumOfWbGpioBlocks; //For Component video D-Connector support. If zere, NTSC type connector -+ ATOM_GPIO_INFO aWbGpioStateBlock[MAX_SUPPORTED_CV_STANDARDS]; -+ ATOM_DTD_FORMAT aModeTimings[MAX_SUPPORTED_CV_STANDARDS]; -+}ATOM_COMPONENT_VIDEO_INFO_V21; - - #define ATOM_COMPONENT_VIDEO_INFO_LAST ATOM_COMPONENT_VIDEO_INFO_V21 - --/****************************************************************************/ --/* Structure used in object_InfoTable */ --/****************************************************************************/ --typedef struct _ATOM_OBJECT_HEADER { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usDeviceSupport; -- USHORT usConnectorObjectTableOffset; -- USHORT usRouterObjectTableOffset; -- USHORT usEncoderObjectTableOffset; -- USHORT usProtectionObjectTableOffset; /* only available when Protection block is independent. */ -- USHORT usDisplayPathTableOffset; --} ATOM_OBJECT_HEADER; -- --typedef struct _ATOM_DISPLAY_OBJECT_PATH { -- USHORT usDeviceTag; /* supported device */ -- USHORT usSize; /* the size of ATOM_DISPLAY_OBJECT_PATH */ -- USHORT usConnObjectId; /* Connector Object ID */ -- USHORT usGPUObjectId; /* GPU ID */ -- USHORT usGraphicObjIds[1]; /* 1st Encoder Obj source from GPU to last Graphic Obj destinate to connector. */ --} ATOM_DISPLAY_OBJECT_PATH; -- --typedef struct _ATOM_DISPLAY_OBJECT_PATH_TABLE { -- UCHAR ucNumOfDispPath; -- UCHAR ucVersion; -- UCHAR ucPadding[2]; -- ATOM_DISPLAY_OBJECT_PATH asDispPath[1]; --} ATOM_DISPLAY_OBJECT_PATH_TABLE; -- --typedef struct _ATOM_OBJECT /* each object has this structure */ --{ -- USHORT usObjectID; -- USHORT usSrcDstTableOffset; -- USHORT usRecordOffset; /* this pointing to a bunch of records defined below */ -- USHORT usReserved; --} ATOM_OBJECT; -- --typedef struct _ATOM_OBJECT_TABLE /* Above 4 object table offset pointing to a bunch of objects all have this structure */ --{ -- UCHAR ucNumberOfObjects; -- UCHAR ucPadding[3]; -- ATOM_OBJECT asObjects[1]; --} ATOM_OBJECT_TABLE; -- --typedef struct _ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT /* usSrcDstTableOffset pointing to this structure */ --{ -- UCHAR ucNumberOfSrc; -- USHORT usSrcObjectID[1]; -- UCHAR ucNumberOfDst; -- USHORT usDstObjectID[1]; --} ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT; -- --/* Related definitions, all records are differnt but they have a commond header */ --typedef struct _ATOM_COMMON_RECORD_HEADER { -- UCHAR ucRecordType; /* An emun to indicate the record type */ -- UCHAR ucRecordSize; /* The size of the whole record in byte */ --} ATOM_COMMON_RECORD_HEADER; -- --#define ATOM_I2C_RECORD_TYPE 1 -+/****************************************************************************/ -+// Structure used in object_InfoTable -+/****************************************************************************/ -+typedef struct _ATOM_OBJECT_HEADER -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usDeviceSupport; -+ USHORT usConnectorObjectTableOffset; -+ USHORT usRouterObjectTableOffset; -+ USHORT usEncoderObjectTableOffset; -+ USHORT usProtectionObjectTableOffset; //only available when Protection block is independent. -+ USHORT usDisplayPathTableOffset; -+}ATOM_OBJECT_HEADER; -+ -+typedef struct _ATOM_OBJECT_HEADER_V3 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usDeviceSupport; -+ USHORT usConnectorObjectTableOffset; -+ USHORT usRouterObjectTableOffset; -+ USHORT usEncoderObjectTableOffset; -+ USHORT usProtectionObjectTableOffset; //only available when Protection block is independent. -+ USHORT usDisplayPathTableOffset; -+ USHORT usMiscObjectTableOffset; -+}ATOM_OBJECT_HEADER_V3; -+ -+typedef struct _ATOM_DISPLAY_OBJECT_PATH -+{ -+ USHORT usDeviceTag; //supported device -+ USHORT usSize; //the size of ATOM_DISPLAY_OBJECT_PATH -+ USHORT usConnObjectId; //Connector Object ID -+ USHORT usGPUObjectId; //GPU ID -+ USHORT usGraphicObjIds[1]; //1st Encoder Obj source from GPU to last Graphic Obj destinate to connector. -+}ATOM_DISPLAY_OBJECT_PATH; -+ -+typedef struct _ATOM_DISPLAY_OBJECT_PATH_TABLE -+{ -+ UCHAR ucNumOfDispPath; -+ UCHAR ucVersion; -+ UCHAR ucPadding[2]; -+ ATOM_DISPLAY_OBJECT_PATH asDispPath[1]; -+}ATOM_DISPLAY_OBJECT_PATH_TABLE; -+ -+ -+typedef struct _ATOM_OBJECT //each object has this structure -+{ -+ USHORT usObjectID; -+ USHORT usSrcDstTableOffset; -+ USHORT usRecordOffset; //this pointing to a bunch of records defined below -+ USHORT usReserved; -+}ATOM_OBJECT; -+ -+typedef struct _ATOM_OBJECT_TABLE //Above 4 object table offset pointing to a bunch of objects all have this structure -+{ -+ UCHAR ucNumberOfObjects; -+ UCHAR ucPadding[3]; -+ ATOM_OBJECT asObjects[1]; -+}ATOM_OBJECT_TABLE; -+ -+typedef struct _ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT //usSrcDstTableOffset pointing to this structure -+{ -+ UCHAR ucNumberOfSrc; -+ USHORT usSrcObjectID[1]; -+ UCHAR ucNumberOfDst; -+ USHORT usDstObjectID[1]; -+}ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT; -+ -+ -+//Two definitions below are for OPM on MXM module designs -+ -+#define EXT_HPDPIN_LUTINDEX_0 0 -+#define EXT_HPDPIN_LUTINDEX_1 1 -+#define EXT_HPDPIN_LUTINDEX_2 2 -+#define EXT_HPDPIN_LUTINDEX_3 3 -+#define EXT_HPDPIN_LUTINDEX_4 4 -+#define EXT_HPDPIN_LUTINDEX_5 5 -+#define EXT_HPDPIN_LUTINDEX_6 6 -+#define EXT_HPDPIN_LUTINDEX_7 7 -+#define MAX_NUMBER_OF_EXT_HPDPIN_LUT_ENTRIES (EXT_HPDPIN_LUTINDEX_7+1) -+ -+#define EXT_AUXDDC_LUTINDEX_0 0 -+#define EXT_AUXDDC_LUTINDEX_1 1 -+#define EXT_AUXDDC_LUTINDEX_2 2 -+#define EXT_AUXDDC_LUTINDEX_3 3 -+#define EXT_AUXDDC_LUTINDEX_4 4 -+#define EXT_AUXDDC_LUTINDEX_5 5 -+#define EXT_AUXDDC_LUTINDEX_6 6 -+#define EXT_AUXDDC_LUTINDEX_7 7 -+#define MAX_NUMBER_OF_EXT_AUXDDC_LUT_ENTRIES (EXT_AUXDDC_LUTINDEX_7+1) -+ -+typedef struct _EXT_DISPLAY_PATH -+{ -+ USHORT usDeviceTag; //A bit vector to show what devices are supported -+ USHORT usDeviceACPIEnum; //16bit device ACPI id. -+ USHORT usDeviceConnector; //A physical connector for displays to plug in, using object connector definitions -+ UCHAR ucExtAUXDDCLutIndex; //An index into external AUX/DDC channel LUT -+ UCHAR ucExtHPDPINLutIndex; //An index into external HPD pin LUT -+ USHORT usExtEncoderObjId; //external encoder object id -+ USHORT usReserved[3]; -+}EXT_DISPLAY_PATH; -+ -+#define NUMBER_OF_UCHAR_FOR_GUID 16 -+#define MAX_NUMBER_OF_EXT_DISPLAY_PATH 7 -+ -+typedef struct _ATOM_EXTERNAL_DISPLAY_CONNECTION_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR ucGuid [NUMBER_OF_UCHAR_FOR_GUID]; // a GUID is a 16 byte long string -+ EXT_DISPLAY_PATH sPath[MAX_NUMBER_OF_EXT_DISPLAY_PATH]; // total of fixed 7 entries. -+ UCHAR ucChecksum; // a simple Checksum of the sum of whole structure equal to 0x0. -+ UCHAR Reserved [7]; // for potential expansion -+}ATOM_EXTERNAL_DISPLAY_CONNECTION_INFO; -+ -+//Related definitions, all records are differnt but they have a commond header -+typedef struct _ATOM_COMMON_RECORD_HEADER -+{ -+ UCHAR ucRecordType; //An emun to indicate the record type -+ UCHAR ucRecordSize; //The size of the whole record in byte -+}ATOM_COMMON_RECORD_HEADER; -+ -+ -+#define ATOM_I2C_RECORD_TYPE 1 - #define ATOM_HPD_INT_RECORD_TYPE 2 - #define ATOM_OUTPUT_PROTECTION_RECORD_TYPE 3 - #define ATOM_CONNECTOR_DEVICE_TAG_RECORD_TYPE 4 --#define ATOM_CONNECTOR_DVI_EXT_INPUT_RECORD_TYPE 5 /* Obsolete, switch to use GPIO_CNTL_RECORD_TYPE */ --#define ATOM_ENCODER_FPGA_CONTROL_RECORD_TYPE 6 /* Obsolete, switch to use GPIO_CNTL_RECORD_TYPE */ -+#define ATOM_CONNECTOR_DVI_EXT_INPUT_RECORD_TYPE 5 //Obsolete, switch to use GPIO_CNTL_RECORD_TYPE -+#define ATOM_ENCODER_FPGA_CONTROL_RECORD_TYPE 6 //Obsolete, switch to use GPIO_CNTL_RECORD_TYPE - #define ATOM_CONNECTOR_CVTV_SHARE_DIN_RECORD_TYPE 7 --#define ATOM_JTAG_RECORD_TYPE 8 /* Obsolete, switch to use GPIO_CNTL_RECORD_TYPE */ -+#define ATOM_JTAG_RECORD_TYPE 8 //Obsolete, switch to use GPIO_CNTL_RECORD_TYPE - #define ATOM_OBJECT_GPIO_CNTL_RECORD_TYPE 9 - #define ATOM_ENCODER_DVO_CF_RECORD_TYPE 10 - #define ATOM_CONNECTOR_CF_RECORD_TYPE 11 - #define ATOM_CONNECTOR_HARDCODE_DTD_RECORD_TYPE 12 - #define ATOM_CONNECTOR_PCIE_SUBCONNECTOR_RECORD_TYPE 13 --#define ATOM_ROUTER_DDC_PATH_SELECT_RECORD_TYPE 14 --#define ATOM_ROUTER_DATA_CLOCK_PATH_SELECT_RECORD_TYPE 15 -- --/* Must be updated when new record type is added,equal to that record definition! */ --#define ATOM_MAX_OBJECT_RECORD_NUMBER ATOM_CONNECTOR_CF_RECORD_TYPE -- --typedef struct _ATOM_I2C_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- ATOM_I2C_ID_CONFIG sucI2cId; -- UCHAR ucI2CAddr; /* The slave address, it's 0 when the record is attached to connector for DDC */ --} ATOM_I2C_RECORD; -- --typedef struct _ATOM_HPD_INT_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- UCHAR ucHPDIntGPIOID; /* Corresponding block in GPIO_PIN_INFO table gives the pin info */ -- UCHAR ucPlugged_PinState; --} ATOM_HPD_INT_RECORD; -- --typedef struct _ATOM_OUTPUT_PROTECTION_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- UCHAR ucProtectionFlag; -- UCHAR ucReserved; --} ATOM_OUTPUT_PROTECTION_RECORD; -- --typedef struct _ATOM_CONNECTOR_DEVICE_TAG { -- ULONG ulACPIDeviceEnum; /* Reserved for now */ -- USHORT usDeviceID; /* This Id is same as "ATOM_DEVICE_XXX_SUPPORT" */ -- USHORT usPadding; --} ATOM_CONNECTOR_DEVICE_TAG; -- --typedef struct _ATOM_CONNECTOR_DEVICE_TAG_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- UCHAR ucNumberOfDevice; -- UCHAR ucReserved; -- ATOM_CONNECTOR_DEVICE_TAG asDeviceTag[1]; /* This Id is same as "ATOM_DEVICE_XXX_SUPPORT", 1 is only for allocation */ --} ATOM_CONNECTOR_DEVICE_TAG_RECORD; -- --typedef struct _ATOM_CONNECTOR_DVI_EXT_INPUT_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- UCHAR ucConfigGPIOID; -- UCHAR ucConfigGPIOState; /* Set to 1 when it's active high to enable external flow in */ -- UCHAR ucFlowinGPIPID; -- UCHAR ucExtInGPIPID; --} ATOM_CONNECTOR_DVI_EXT_INPUT_RECORD; -- --typedef struct _ATOM_ENCODER_FPGA_CONTROL_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- UCHAR ucCTL1GPIO_ID; -- UCHAR ucCTL1GPIOState; /* Set to 1 when it's active high */ -- UCHAR ucCTL2GPIO_ID; -- UCHAR ucCTL2GPIOState; /* Set to 1 when it's active high */ -- UCHAR ucCTL3GPIO_ID; -- UCHAR ucCTL3GPIOState; /* Set to 1 when it's active high */ -- UCHAR ucCTLFPGA_IN_ID; -- UCHAR ucPadding[3]; --} ATOM_ENCODER_FPGA_CONTROL_RECORD; -- --typedef struct _ATOM_CONNECTOR_CVTV_SHARE_DIN_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- UCHAR ucGPIOID; /* Corresponding block in GPIO_PIN_INFO table gives the pin info */ -- UCHAR ucTVActiveState; /* Indicating when the pin==0 or 1 when TV is connected */ --} ATOM_CONNECTOR_CVTV_SHARE_DIN_RECORD; -- --typedef struct _ATOM_JTAG_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- UCHAR ucTMSGPIO_ID; -- UCHAR ucTMSGPIOState; /* Set to 1 when it's active high */ -- UCHAR ucTCKGPIO_ID; -- UCHAR ucTCKGPIOState; /* Set to 1 when it's active high */ -- UCHAR ucTDOGPIO_ID; -- UCHAR ucTDOGPIOState; /* Set to 1 when it's active high */ -- UCHAR ucTDIGPIO_ID; -- UCHAR ucTDIGPIOState; /* Set to 1 when it's active high */ -- UCHAR ucPadding[2]; --} ATOM_JTAG_RECORD; -- --/* The following generic object gpio pin control record type will replace JTAG_RECORD/FPGA_CONTROL_RECORD/DVI_EXT_INPUT_RECORD above gradually */ --typedef struct _ATOM_GPIO_PIN_CONTROL_PAIR { -- UCHAR ucGPIOID; /* GPIO_ID, find the corresponding ID in GPIO_LUT table */ -- UCHAR ucGPIO_PinState; /* Pin state showing how to set-up the pin */ --} ATOM_GPIO_PIN_CONTROL_PAIR; -- --typedef struct _ATOM_OBJECT_GPIO_CNTL_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- UCHAR ucFlags; /* Future expnadibility */ -- UCHAR ucNumberOfPins; /* Number of GPIO pins used to control the object */ -- ATOM_GPIO_PIN_CONTROL_PAIR asGpio[1]; /* the real gpio pin pair determined by number of pins ucNumberOfPins */ --} ATOM_OBJECT_GPIO_CNTL_RECORD; -- --/* Definitions for GPIO pin state */ -+#define ATOM_ROUTER_DDC_PATH_SELECT_RECORD_TYPE 14 -+#define ATOM_ROUTER_DATA_CLOCK_PATH_SELECT_RECORD_TYPE 15 -+#define ATOM_CONNECTOR_HPDPIN_LUT_RECORD_TYPE 16 //This is for the case when connectors are not known to object table -+#define ATOM_CONNECTOR_AUXDDC_LUT_RECORD_TYPE 17 //This is for the case when connectors are not known to object table -+#define ATOM_OBJECT_LINK_RECORD_TYPE 18 //Once this record is present under one object, it indicats the oobject is linked to another obj described by the record -+#define ATOM_CONNECTOR_REMOTE_CAP_RECORD_TYPE 19 -+ -+ -+//Must be updated when new record type is added,equal to that record definition! -+#define ATOM_MAX_OBJECT_RECORD_NUMBER ATOM_CONNECTOR_REMOTE_CAP_RECORD_TYPE -+ -+typedef struct _ATOM_I2C_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ ATOM_I2C_ID_CONFIG sucI2cId; -+ UCHAR ucI2CAddr; //The slave address, it's 0 when the record is attached to connector for DDC -+}ATOM_I2C_RECORD; -+ -+typedef struct _ATOM_HPD_INT_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucHPDIntGPIOID; //Corresponding block in GPIO_PIN_INFO table gives the pin info -+ UCHAR ucPlugged_PinState; -+}ATOM_HPD_INT_RECORD; -+ -+ -+typedef struct _ATOM_OUTPUT_PROTECTION_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucProtectionFlag; -+ UCHAR ucReserved; -+}ATOM_OUTPUT_PROTECTION_RECORD; -+ -+typedef struct _ATOM_CONNECTOR_DEVICE_TAG -+{ -+ ULONG ulACPIDeviceEnum; //Reserved for now -+ USHORT usDeviceID; //This Id is same as "ATOM_DEVICE_XXX_SUPPORT" -+ USHORT usPadding; -+}ATOM_CONNECTOR_DEVICE_TAG; -+ -+typedef struct _ATOM_CONNECTOR_DEVICE_TAG_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucNumberOfDevice; -+ UCHAR ucReserved; -+ ATOM_CONNECTOR_DEVICE_TAG asDeviceTag[1]; //This Id is same as "ATOM_DEVICE_XXX_SUPPORT", 1 is only for allocation -+}ATOM_CONNECTOR_DEVICE_TAG_RECORD; -+ -+ -+typedef struct _ATOM_CONNECTOR_DVI_EXT_INPUT_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucConfigGPIOID; -+ UCHAR ucConfigGPIOState; //Set to 1 when it's active high to enable external flow in -+ UCHAR ucFlowinGPIPID; -+ UCHAR ucExtInGPIPID; -+}ATOM_CONNECTOR_DVI_EXT_INPUT_RECORD; -+ -+typedef struct _ATOM_ENCODER_FPGA_CONTROL_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucCTL1GPIO_ID; -+ UCHAR ucCTL1GPIOState; //Set to 1 when it's active high -+ UCHAR ucCTL2GPIO_ID; -+ UCHAR ucCTL2GPIOState; //Set to 1 when it's active high -+ UCHAR ucCTL3GPIO_ID; -+ UCHAR ucCTL3GPIOState; //Set to 1 when it's active high -+ UCHAR ucCTLFPGA_IN_ID; -+ UCHAR ucPadding[3]; -+}ATOM_ENCODER_FPGA_CONTROL_RECORD; -+ -+typedef struct _ATOM_CONNECTOR_CVTV_SHARE_DIN_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucGPIOID; //Corresponding block in GPIO_PIN_INFO table gives the pin info -+ UCHAR ucTVActiveState; //Indicating when the pin==0 or 1 when TV is connected -+}ATOM_CONNECTOR_CVTV_SHARE_DIN_RECORD; -+ -+typedef struct _ATOM_JTAG_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucTMSGPIO_ID; -+ UCHAR ucTMSGPIOState; //Set to 1 when it's active high -+ UCHAR ucTCKGPIO_ID; -+ UCHAR ucTCKGPIOState; //Set to 1 when it's active high -+ UCHAR ucTDOGPIO_ID; -+ UCHAR ucTDOGPIOState; //Set to 1 when it's active high -+ UCHAR ucTDIGPIO_ID; -+ UCHAR ucTDIGPIOState; //Set to 1 when it's active high -+ UCHAR ucPadding[2]; -+}ATOM_JTAG_RECORD; -+ -+ -+//The following generic object gpio pin control record type will replace JTAG_RECORD/FPGA_CONTROL_RECORD/DVI_EXT_INPUT_RECORD above gradually -+typedef struct _ATOM_GPIO_PIN_CONTROL_PAIR -+{ -+ UCHAR ucGPIOID; // GPIO_ID, find the corresponding ID in GPIO_LUT table -+ UCHAR ucGPIO_PinState; // Pin state showing how to set-up the pin -+}ATOM_GPIO_PIN_CONTROL_PAIR; -+ -+typedef struct _ATOM_OBJECT_GPIO_CNTL_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucFlags; // Future expnadibility -+ UCHAR ucNumberOfPins; // Number of GPIO pins used to control the object -+ ATOM_GPIO_PIN_CONTROL_PAIR asGpio[1]; // the real gpio pin pair determined by number of pins ucNumberOfPins -+}ATOM_OBJECT_GPIO_CNTL_RECORD; -+ -+//Definitions for GPIO pin state - #define GPIO_PIN_TYPE_INPUT 0x00 - #define GPIO_PIN_TYPE_OUTPUT 0x10 - #define GPIO_PIN_TYPE_HW_CONTROL 0x20 - --/* For GPIO_PIN_TYPE_OUTPUT the following is defined */ -+//For GPIO_PIN_TYPE_OUTPUT the following is defined - #define GPIO_PIN_OUTPUT_STATE_MASK 0x01 - #define GPIO_PIN_OUTPUT_STATE_SHIFT 0 - #define GPIO_PIN_STATE_ACTIVE_LOW 0x0 - #define GPIO_PIN_STATE_ACTIVE_HIGH 0x1 - --typedef struct _ATOM_ENCODER_DVO_CF_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- ULONG ulStrengthControl; /* DVOA strength control for CF */ -- UCHAR ucPadding[2]; --} ATOM_ENCODER_DVO_CF_RECORD; -+// Indexes to GPIO array in GLSync record -+#define ATOM_GPIO_INDEX_GLSYNC_REFCLK 0 -+#define ATOM_GPIO_INDEX_GLSYNC_HSYNC 1 -+#define ATOM_GPIO_INDEX_GLSYNC_VSYNC 2 -+#define ATOM_GPIO_INDEX_GLSYNC_SWAP_REQ 3 -+#define ATOM_GPIO_INDEX_GLSYNC_SWAP_GNT 4 -+#define ATOM_GPIO_INDEX_GLSYNC_INTERRUPT 5 -+#define ATOM_GPIO_INDEX_GLSYNC_V_RESET 6 -+#define ATOM_GPIO_INDEX_GLSYNC_MAX 7 -+ -+typedef struct _ATOM_ENCODER_DVO_CF_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ ULONG ulStrengthControl; // DVOA strength control for CF -+ UCHAR ucPadding[2]; -+}ATOM_ENCODER_DVO_CF_RECORD; - --/* value for ATOM_CONNECTOR_CF_RECORD.ucConnectedDvoBundle */ -+// value for ATOM_CONNECTOR_CF_RECORD.ucConnectedDvoBundle - #define ATOM_CONNECTOR_CF_RECORD_CONNECTED_UPPER12BITBUNDLEA 1 - #define ATOM_CONNECTOR_CF_RECORD_CONNECTED_LOWER12BITBUNDLEB 2 - --typedef struct _ATOM_CONNECTOR_CF_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- USHORT usMaxPixClk; -- UCHAR ucFlowCntlGpioId; -- UCHAR ucSwapCntlGpioId; -- UCHAR ucConnectedDvoBundle; -- UCHAR ucPadding; --} ATOM_CONNECTOR_CF_RECORD; -- --typedef struct _ATOM_CONNECTOR_HARDCODE_DTD_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- ATOM_DTD_FORMAT asTiming; --} ATOM_CONNECTOR_HARDCODE_DTD_RECORD; -- --typedef struct _ATOM_CONNECTOR_PCIE_SUBCONNECTOR_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; /* ATOM_CONNECTOR_PCIE_SUBCONNECTOR_RECORD_TYPE */ -- UCHAR ucSubConnectorType; /* CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D|X_ID_DUAL_LINK_DVI_D|HDMI_TYPE_A */ -- UCHAR ucReserved; --} ATOM_CONNECTOR_PCIE_SUBCONNECTOR_RECORD; -- --typedef struct _ATOM_ROUTER_DDC_PATH_SELECT_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- UCHAR ucMuxType; /* decide the number of ucMuxState, =0, no pin state, =1: single state with complement, >1: multiple state */ -- UCHAR ucMuxControlPin; -- UCHAR ucMuxState[2]; /* for alligment purpose */ --} ATOM_ROUTER_DDC_PATH_SELECT_RECORD; -- --typedef struct _ATOM_ROUTER_DATA_CLOCK_PATH_SELECT_RECORD { -- ATOM_COMMON_RECORD_HEADER sheader; -- UCHAR ucMuxType; -- UCHAR ucMuxControlPin; -- UCHAR ucMuxState[2]; /* for alligment purpose */ --} ATOM_ROUTER_DATA_CLOCK_PATH_SELECT_RECORD; -- --/* define ucMuxType */ -+typedef struct _ATOM_CONNECTOR_CF_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ USHORT usMaxPixClk; -+ UCHAR ucFlowCntlGpioId; -+ UCHAR ucSwapCntlGpioId; -+ UCHAR ucConnectedDvoBundle; -+ UCHAR ucPadding; -+}ATOM_CONNECTOR_CF_RECORD; -+ -+typedef struct _ATOM_CONNECTOR_HARDCODE_DTD_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ ATOM_DTD_FORMAT asTiming; -+}ATOM_CONNECTOR_HARDCODE_DTD_RECORD; -+ -+typedef struct _ATOM_CONNECTOR_PCIE_SUBCONNECTOR_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; //ATOM_CONNECTOR_PCIE_SUBCONNECTOR_RECORD_TYPE -+ UCHAR ucSubConnectorType; //CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D|X_ID_DUAL_LINK_DVI_D|HDMI_TYPE_A -+ UCHAR ucReserved; -+}ATOM_CONNECTOR_PCIE_SUBCONNECTOR_RECORD; -+ -+ -+typedef struct _ATOM_ROUTER_DDC_PATH_SELECT_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucMuxType; //decide the number of ucMuxState, =0, no pin state, =1: single state with complement, >1: multiple state -+ UCHAR ucMuxControlPin; -+ UCHAR ucMuxState[2]; //for alligment purpose -+}ATOM_ROUTER_DDC_PATH_SELECT_RECORD; -+ -+typedef struct _ATOM_ROUTER_DATA_CLOCK_PATH_SELECT_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucMuxType; -+ UCHAR ucMuxControlPin; -+ UCHAR ucMuxState[2]; //for alligment purpose -+}ATOM_ROUTER_DATA_CLOCK_PATH_SELECT_RECORD; -+ -+// define ucMuxType - #define ATOM_ROUTER_MUX_PIN_STATE_MASK 0x0f - #define ATOM_ROUTER_MUX_PIN_SINGLE_STATE_COMPLEMENT 0x01 - --/****************************************************************************/ --/* ASIC voltage data table */ --/****************************************************************************/ --typedef struct _ATOM_VOLTAGE_INFO_HEADER { -- USHORT usVDDCBaseLevel; /* In number of 50mv unit */ -- USHORT usReserved; /* For possible extension table offset */ -- UCHAR ucNumOfVoltageEntries; -- UCHAR ucBytesPerVoltageEntry; -- UCHAR ucVoltageStep; /* Indicating in how many mv increament is one step, 0.5mv unit */ -- UCHAR ucDefaultVoltageEntry; -- UCHAR ucVoltageControlI2cLine; -- UCHAR ucVoltageControlAddress; -- UCHAR ucVoltageControlOffset; --} ATOM_VOLTAGE_INFO_HEADER; -- --typedef struct _ATOM_VOLTAGE_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_VOLTAGE_INFO_HEADER viHeader; -- UCHAR ucVoltageEntries[64]; /* 64 is for allocation, the actual number of entry is present at ucNumOfVoltageEntries*ucBytesPerVoltageEntry */ --} ATOM_VOLTAGE_INFO; -- --typedef struct _ATOM_VOLTAGE_FORMULA { -- USHORT usVoltageBaseLevel; /* In number of 1mv unit */ -- USHORT usVoltageStep; /* Indicating in how many mv increament is one step, 1mv unit */ -- UCHAR ucNumOfVoltageEntries; /* Number of Voltage Entry, which indicate max Voltage */ -- UCHAR ucFlag; /* bit0=0 :step is 1mv =1 0.5mv */ -- UCHAR ucBaseVID; /* if there is no lookup table, VID= BaseVID + ( Vol - BaseLevle ) /VoltageStep */ -- UCHAR ucReserved; -- UCHAR ucVIDAdjustEntries[32]; /* 32 is for allocation, the actual number of entry is present at ucNumOfVoltageEntries */ --} ATOM_VOLTAGE_FORMULA; -- --typedef struct _ATOM_VOLTAGE_CONTROL { -- UCHAR ucVoltageControlId; /* Indicate it is controlled by I2C or GPIO or HW state machine */ -- UCHAR ucVoltageControlI2cLine; -- UCHAR ucVoltageControlAddress; -- UCHAR ucVoltageControlOffset; -- USHORT usGpioPin_AIndex; /* GPIO_PAD register index */ -- UCHAR ucGpioPinBitShift[9]; /* at most 8 pin support 255 VIDs, termintate with 0xff */ -- UCHAR ucReserved; --} ATOM_VOLTAGE_CONTROL; -- --/* Define ucVoltageControlId */ -+typedef struct _ATOM_CONNECTOR_HPDPIN_LUT_RECORD //record for ATOM_CONNECTOR_HPDPIN_LUT_RECORD_TYPE -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ UCHAR ucHPDPINMap[MAX_NUMBER_OF_EXT_HPDPIN_LUT_ENTRIES]; //An fixed size array which maps external pins to internal GPIO_PIN_INFO table -+}ATOM_CONNECTOR_HPDPIN_LUT_RECORD; -+ -+typedef struct _ATOM_CONNECTOR_AUXDDC_LUT_RECORD //record for ATOM_CONNECTOR_AUXDDC_LUT_RECORD_TYPE -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ ATOM_I2C_ID_CONFIG ucAUXDDCMap[MAX_NUMBER_OF_EXT_AUXDDC_LUT_ENTRIES]; //An fixed size array which maps external pins to internal DDC ID -+}ATOM_CONNECTOR_AUXDDC_LUT_RECORD; -+ -+typedef struct _ATOM_OBJECT_LINK_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ USHORT usObjectID; //could be connector, encorder or other object in object.h -+}ATOM_OBJECT_LINK_RECORD; -+ -+typedef struct _ATOM_CONNECTOR_REMOTE_CAP_RECORD -+{ -+ ATOM_COMMON_RECORD_HEADER sheader; -+ USHORT usReserved; -+}ATOM_CONNECTOR_REMOTE_CAP_RECORD; -+ -+/****************************************************************************/ -+// ASIC voltage data table -+/****************************************************************************/ -+typedef struct _ATOM_VOLTAGE_INFO_HEADER -+{ -+ USHORT usVDDCBaseLevel; //In number of 50mv unit -+ USHORT usReserved; //For possible extension table offset -+ UCHAR ucNumOfVoltageEntries; -+ UCHAR ucBytesPerVoltageEntry; -+ UCHAR ucVoltageStep; //Indicating in how many mv increament is one step, 0.5mv unit -+ UCHAR ucDefaultVoltageEntry; -+ UCHAR ucVoltageControlI2cLine; -+ UCHAR ucVoltageControlAddress; -+ UCHAR ucVoltageControlOffset; -+}ATOM_VOLTAGE_INFO_HEADER; -+ -+typedef struct _ATOM_VOLTAGE_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_VOLTAGE_INFO_HEADER viHeader; -+ UCHAR ucVoltageEntries[64]; //64 is for allocation, the actual number of entry is present at ucNumOfVoltageEntries*ucBytesPerVoltageEntry -+}ATOM_VOLTAGE_INFO; -+ -+ -+typedef struct _ATOM_VOLTAGE_FORMULA -+{ -+ USHORT usVoltageBaseLevel; // In number of 1mv unit -+ USHORT usVoltageStep; // Indicating in how many mv increament is one step, 1mv unit -+ UCHAR ucNumOfVoltageEntries; // Number of Voltage Entry, which indicate max Voltage -+ UCHAR ucFlag; // bit0=0 :step is 1mv =1 0.5mv -+ UCHAR ucBaseVID; // if there is no lookup table, VID= BaseVID + ( Vol - BaseLevle ) /VoltageStep -+ UCHAR ucReserved; -+ UCHAR ucVIDAdjustEntries[32]; // 32 is for allocation, the actual number of entry is present at ucNumOfVoltageEntries -+}ATOM_VOLTAGE_FORMULA; -+ -+typedef struct _VOLTAGE_LUT_ENTRY -+{ -+ USHORT usVoltageCode; // The Voltage ID, either GPIO or I2C code -+ USHORT usVoltageValue; // The corresponding Voltage Value, in mV -+}VOLTAGE_LUT_ENTRY; -+ -+typedef struct _ATOM_VOLTAGE_FORMULA_V2 -+{ -+ UCHAR ucNumOfVoltageEntries; // Number of Voltage Entry, which indicate max Voltage -+ UCHAR ucReserved[3]; -+ VOLTAGE_LUT_ENTRY asVIDAdjustEntries[32];// 32 is for allocation, the actual number of entries is in ucNumOfVoltageEntries -+}ATOM_VOLTAGE_FORMULA_V2; -+ -+typedef struct _ATOM_VOLTAGE_CONTROL -+{ -+ UCHAR ucVoltageControlId; //Indicate it is controlled by I2C or GPIO or HW state machine -+ UCHAR ucVoltageControlI2cLine; -+ UCHAR ucVoltageControlAddress; -+ UCHAR ucVoltageControlOffset; -+ USHORT usGpioPin_AIndex; //GPIO_PAD register index -+ UCHAR ucGpioPinBitShift[9]; //at most 8 pin support 255 VIDs, termintate with 0xff -+ UCHAR ucReserved; -+}ATOM_VOLTAGE_CONTROL; -+ -+// Define ucVoltageControlId - #define VOLTAGE_CONTROLLED_BY_HW 0x00 - #define VOLTAGE_CONTROLLED_BY_I2C_MASK 0x7F - #define VOLTAGE_CONTROLLED_BY_GPIO 0x80 --#define VOLTAGE_CONTROL_ID_LM64 0x01 /* I2C control, used for R5xx Core Voltage */ --#define VOLTAGE_CONTROL_ID_DAC 0x02 /* I2C control, used for R5xx/R6xx MVDDC,MVDDQ or VDDCI */ --#define VOLTAGE_CONTROL_ID_VT116xM 0x03 /* I2C control, used for R6xx Core Voltage */ --#define VOLTAGE_CONTROL_ID_DS4402 0x04 -- --typedef struct _ATOM_VOLTAGE_OBJECT { -- UCHAR ucVoltageType; /* Indicate Voltage Source: VDDC, MVDDC, MVDDQ or MVDDCI */ -- UCHAR ucSize; /* Size of Object */ -- ATOM_VOLTAGE_CONTROL asControl; /* describ how to control */ -- ATOM_VOLTAGE_FORMULA asFormula; /* Indicate How to convert real Voltage to VID */ --} ATOM_VOLTAGE_OBJECT; -- --typedef struct _ATOM_VOLTAGE_OBJECT_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_VOLTAGE_OBJECT asVoltageObj[3]; /* Info for Voltage control */ --} ATOM_VOLTAGE_OBJECT_INFO; -- --typedef struct _ATOM_LEAKID_VOLTAGE { -- UCHAR ucLeakageId; -- UCHAR ucReserved; -- USHORT usVoltage; --} ATOM_LEAKID_VOLTAGE; -- --typedef struct _ATOM_ASIC_PROFILE_VOLTAGE { -- UCHAR ucProfileId; -- UCHAR ucReserved; -- USHORT usSize; -- USHORT usEfuseSpareStartAddr; -- USHORT usFuseIndex[8]; /* from LSB to MSB, Max 8bit,end of 0xffff if less than 8 efuse id, */ -- ATOM_LEAKID_VOLTAGE asLeakVol[2]; /* Leakid and relatd voltage */ --} ATOM_ASIC_PROFILE_VOLTAGE; -- --/* ucProfileId */ --#define ATOM_ASIC_PROFILE_ID_EFUSE_VOLTAGE 1 -+#define VOLTAGE_CONTROL_ID_LM64 0x01 //I2C control, used for R5xx Core Voltage -+#define VOLTAGE_CONTROL_ID_DAC 0x02 //I2C control, used for R5xx/R6xx MVDDC,MVDDQ or VDDCI -+#define VOLTAGE_CONTROL_ID_VT116xM 0x03 //I2C control, used for R6xx Core Voltage -+#define VOLTAGE_CONTROL_ID_DS4402 0x04 -+ -+typedef struct _ATOM_VOLTAGE_OBJECT -+{ -+ UCHAR ucVoltageType; //Indicate Voltage Source: VDDC, MVDDC, MVDDQ or MVDDCI -+ UCHAR ucSize; //Size of Object -+ ATOM_VOLTAGE_CONTROL asControl; //describ how to control -+ ATOM_VOLTAGE_FORMULA asFormula; //Indicate How to convert real Voltage to VID -+}ATOM_VOLTAGE_OBJECT; -+ -+typedef struct _ATOM_VOLTAGE_OBJECT_V2 -+{ -+ UCHAR ucVoltageType; //Indicate Voltage Source: VDDC, MVDDC, MVDDQ or MVDDCI -+ UCHAR ucSize; //Size of Object -+ ATOM_VOLTAGE_CONTROL asControl; //describ how to control -+ ATOM_VOLTAGE_FORMULA_V2 asFormula; //Indicate How to convert real Voltage to VID -+}ATOM_VOLTAGE_OBJECT_V2; -+ -+typedef struct _ATOM_VOLTAGE_OBJECT_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_VOLTAGE_OBJECT asVoltageObj[3]; //Info for Voltage control -+}ATOM_VOLTAGE_OBJECT_INFO; -+ -+typedef struct _ATOM_VOLTAGE_OBJECT_INFO_V2 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_VOLTAGE_OBJECT_V2 asVoltageObj[3]; //Info for Voltage control -+}ATOM_VOLTAGE_OBJECT_INFO_V2; -+ -+typedef struct _ATOM_LEAKID_VOLTAGE -+{ -+ UCHAR ucLeakageId; -+ UCHAR ucReserved; -+ USHORT usVoltage; -+}ATOM_LEAKID_VOLTAGE; -+ -+typedef struct _ATOM_ASIC_PROFILE_VOLTAGE -+{ -+ UCHAR ucProfileId; -+ UCHAR ucReserved; -+ USHORT usSize; -+ USHORT usEfuseSpareStartAddr; -+ USHORT usFuseIndex[8]; //from LSB to MSB, Max 8bit,end of 0xffff if less than 8 efuse id, -+ ATOM_LEAKID_VOLTAGE asLeakVol[2]; //Leakid and relatd voltage -+}ATOM_ASIC_PROFILE_VOLTAGE; -+ -+//ucProfileId -+#define ATOM_ASIC_PROFILE_ID_EFUSE_VOLTAGE 1 - #define ATOM_ASIC_PROFILE_ID_EFUSE_PERFORMANCE_VOLTAGE 1 - #define ATOM_ASIC_PROFILE_ID_EFUSE_THERMAL_VOLTAGE 2 - --typedef struct _ATOM_ASIC_PROFILING_INFO { -- ATOM_COMMON_TABLE_HEADER asHeader; -- ATOM_ASIC_PROFILE_VOLTAGE asVoltage; --} ATOM_ASIC_PROFILING_INFO; -- --typedef struct _ATOM_POWER_SOURCE_OBJECT { -- UCHAR ucPwrSrcId; /* Power source */ -- UCHAR ucPwrSensorType; /* GPIO, I2C or none */ -- UCHAR ucPwrSensId; /* if GPIO detect, it is GPIO id, if I2C detect, it is I2C id */ -- UCHAR ucPwrSensSlaveAddr; /* Slave address if I2C detect */ -- UCHAR ucPwrSensRegIndex; /* I2C register Index if I2C detect */ -- UCHAR ucPwrSensRegBitMask; /* detect which bit is used if I2C detect */ -- UCHAR ucPwrSensActiveState; /* high active or low active */ -- UCHAR ucReserve[3]; /* reserve */ -- USHORT usSensPwr; /* in unit of watt */ --} ATOM_POWER_SOURCE_OBJECT; -- --typedef struct _ATOM_POWER_SOURCE_INFO { -- ATOM_COMMON_TABLE_HEADER asHeader; -- UCHAR asPwrbehave[16]; -- ATOM_POWER_SOURCE_OBJECT asPwrObj[1]; --} ATOM_POWER_SOURCE_INFO; -- --/* Define ucPwrSrcId */ -+typedef struct _ATOM_ASIC_PROFILING_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER asHeader; -+ ATOM_ASIC_PROFILE_VOLTAGE asVoltage; -+}ATOM_ASIC_PROFILING_INFO; -+ -+typedef struct _ATOM_POWER_SOURCE_OBJECT -+{ -+ UCHAR ucPwrSrcId; // Power source -+ UCHAR ucPwrSensorType; // GPIO, I2C or none -+ UCHAR ucPwrSensId; // if GPIO detect, it is GPIO id, if I2C detect, it is I2C id -+ UCHAR ucPwrSensSlaveAddr; // Slave address if I2C detect -+ UCHAR ucPwrSensRegIndex; // I2C register Index if I2C detect -+ UCHAR ucPwrSensRegBitMask; // detect which bit is used if I2C detect -+ UCHAR ucPwrSensActiveState; // high active or low active -+ UCHAR ucReserve[3]; // reserve -+ USHORT usSensPwr; // in unit of watt -+}ATOM_POWER_SOURCE_OBJECT; -+ -+typedef struct _ATOM_POWER_SOURCE_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER asHeader; -+ UCHAR asPwrbehave[16]; -+ ATOM_POWER_SOURCE_OBJECT asPwrObj[1]; -+}ATOM_POWER_SOURCE_INFO; -+ -+ -+//Define ucPwrSrcId - #define POWERSOURCE_PCIE_ID1 0x00 - #define POWERSOURCE_6PIN_CONNECTOR_ID1 0x01 - #define POWERSOURCE_8PIN_CONNECTOR_ID1 0x02 - #define POWERSOURCE_6PIN_CONNECTOR_ID2 0x04 - #define POWERSOURCE_8PIN_CONNECTOR_ID2 0x08 - --/* define ucPwrSensorId */ -+//define ucPwrSensorId - #define POWER_SENSOR_ALWAYS 0x00 - #define POWER_SENSOR_GPIO 0x01 - #define POWER_SENSOR_I2C 0x02 - -+typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V6 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ULONG ulBootUpEngineClock; -+ ULONG ulDentistVCOFreq; -+ ULONG ulBootUpUMAClock; -+ ULONG ulReserved1[8]; -+ ULONG ulBootUpReqDisplayVector; -+ ULONG ulOtherDisplayMisc; -+ ULONG ulGPUCapInfo; -+ ULONG ulReserved2[3]; -+ ULONG ulSystemConfig; -+ ULONG ulCPUCapInfo; -+ USHORT usMaxNBVoltage; -+ USHORT usMinNBVoltage; -+ USHORT usBootUpNBVoltage; -+ USHORT usExtDispConnInfoOffset; -+ UCHAR ucHtcTmpLmt; -+ UCHAR ucTjOffset; -+ UCHAR ucMemoryType; -+ UCHAR ucUMAChannelNumber; -+ ULONG ulCSR_M3_ARB_CNTL_DEFAULT[10]; -+ ULONG ulCSR_M3_ARB_CNTL_UVD[10]; -+ ULONG ulCSR_M3_ARB_CNTL_FS3D[10]; -+ ULONG ulReserved3[42]; -+ ATOM_EXTERNAL_DISPLAY_CONNECTION_INFO sExtDispConnInfo; -+}ATOM_INTEGRATED_SYSTEM_INFO_V6; -+ -+/********************************************************************************************************************** -+// ATOM_INTEGRATED_SYSTEM_INFO_V6 Description -+//ulBootUpEngineClock: VBIOS bootup Engine clock frequency, in 10kHz unit. -+//ulDentistVCOFreq: Dentist VCO clock in 10kHz unit. -+//ulBootUpUMAClock: System memory boot up clock frequency in 10Khz unit. -+//ulReserved1[8] Reserved by now, must be 0x0. -+//ulBootUpReqDisplayVector VBIOS boot up display IDs -+// ATOM_DEVICE_CRT1_SUPPORT 0x0001 -+// ATOM_DEVICE_CRT2_SUPPORT 0x0010 -+// ATOM_DEVICE_DFP1_SUPPORT 0x0008 -+// ATOM_DEVICE_DFP6_SUPPORT 0x0040 -+// ATOM_DEVICE_DFP2_SUPPORT 0x0080 -+// ATOM_DEVICE_DFP3_SUPPORT 0x0200 -+// ATOM_DEVICE_DFP4_SUPPORT 0x0400 -+// ATOM_DEVICE_DFP5_SUPPORT 0x0800 -+// ATOM_DEVICE_LCD1_SUPPORT 0x0002 -+//ulOtherDisplayMisc Other display related flags, not defined yet. -+//ulGPUCapInfo TBD -+//ulReserved2[3] must be 0x0 for the reserved. -+//ulSystemConfig TBD -+//ulCPUCapInfo TBD -+//usMaxNBVoltage High NB voltage in unit of mv, calculated using current VDDNB (D24F2xDC) and VDDNB offset fuse. -+//usMinNBVoltage Low NB voltage in unit of mv, calculated using current VDDNB (D24F2xDC) and VDDNB offset fuse. -+//usBootUpNBVoltage Boot up NB voltage in unit of mv. -+//ucHtcTmpLmt Bit [22:16] of D24F3x64 Thermal Control (HTC) Register. -+//ucTjOffset Bit [28:22] of D24F3xE4 Thermtrip Status Register,may not be needed. -+//ucMemoryType [3:0]=1:DDR1;=2:DDR2;=3:DDR3.[7:4] is reserved. -+//ucUMAChannelNumber System memory channel numbers. -+//usExtDispConnectionInfoOffset ATOM_EXTERNAL_DISPLAY_CONNECTION_INFO offset relative to beginning of this table. -+//ulCSR_M3_ARB_CNTL_DEFAULT[10] Arrays with values for CSR M3 arbiter for default -+//ulCSR_M3_ARB_CNTL_UVD[10] Arrays with values for CSR M3 arbiter for UVD playback. -+//ulCSR_M3_ARB_CNTL_FS3D[10] Arrays with values for CSR M3 arbiter for Full Screen 3D applications. -+**********************************************************************************************************************/ -+ - /**************************************************************************/ --/* This portion is only used when ext thermal chip or engine/memory clock SS chip is populated on a design */ --/* Memory SS Info Table */ --/* Define Memory Clock SS chip ID */ -+// This portion is only used when ext thermal chip or engine/memory clock SS chip is populated on a design -+//Memory SS Info Table -+//Define Memory Clock SS chip ID - #define ICS91719 1 - #define ICS91720 2 - --/* Define one structure to inform SW a "block of data" writing to external SS chip via I2C protocol */ --typedef struct _ATOM_I2C_DATA_RECORD { -- UCHAR ucNunberOfBytes; /* Indicates how many bytes SW needs to write to the external ASIC for one block, besides to "Start" and "Stop" */ -- UCHAR ucI2CData[1]; /* I2C data in bytes, should be less than 16 bytes usually */ --} ATOM_I2C_DATA_RECORD; -- --/* Define one structure to inform SW how many blocks of data writing to external SS chip via I2C protocol, in addition to other information */ --typedef struct _ATOM_I2C_DEVICE_SETUP_INFO { -- ATOM_I2C_ID_CONFIG_ACCESS sucI2cId; /* I2C line and HW/SW assisted cap. */ -- UCHAR ucSSChipID; /* SS chip being used */ -- UCHAR ucSSChipSlaveAddr; /* Slave Address to set up this SS chip */ -- UCHAR ucNumOfI2CDataRecords; /* number of data block */ -- ATOM_I2C_DATA_RECORD asI2CData[1]; --} ATOM_I2C_DEVICE_SETUP_INFO; -- --/* ========================================================================================== */ --typedef struct _ATOM_ASIC_MVDD_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_I2C_DEVICE_SETUP_INFO asI2CSetup[1]; --} ATOM_ASIC_MVDD_INFO; -- --/* ========================================================================================== */ -+//Define one structure to inform SW a "block of data" writing to external SS chip via I2C protocol -+typedef struct _ATOM_I2C_DATA_RECORD -+{ -+ UCHAR ucNunberOfBytes; //Indicates how many bytes SW needs to write to the external ASIC for one block, besides to "Start" and "Stop" -+ UCHAR ucI2CData[1]; //I2C data in bytes, should be less than 16 bytes usually -+}ATOM_I2C_DATA_RECORD; -+ -+ -+//Define one structure to inform SW how many blocks of data writing to external SS chip via I2C protocol, in addition to other information -+typedef struct _ATOM_I2C_DEVICE_SETUP_INFO -+{ -+ ATOM_I2C_ID_CONFIG_ACCESS sucI2cId; //I2C line and HW/SW assisted cap. -+ UCHAR ucSSChipID; //SS chip being used -+ UCHAR ucSSChipSlaveAddr; //Slave Address to set up this SS chip -+ UCHAR ucNumOfI2CDataRecords; //number of data block -+ ATOM_I2C_DATA_RECORD asI2CData[1]; -+}ATOM_I2C_DEVICE_SETUP_INFO; -+ -+//========================================================================================== -+typedef struct _ATOM_ASIC_MVDD_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_I2C_DEVICE_SETUP_INFO asI2CSetup[1]; -+}ATOM_ASIC_MVDD_INFO; -+ -+//========================================================================================== - #define ATOM_MCLK_SS_INFO ATOM_ASIC_MVDD_INFO - --/* ========================================================================================== */ -+//========================================================================================== - /**************************************************************************/ - --typedef struct _ATOM_ASIC_SS_ASSIGNMENT { -- ULONG ulTargetClockRange; /* Clock Out frequence (VCO ), in unit of 10Khz */ -- USHORT usSpreadSpectrumPercentage; /* in unit of 0.01% */ -- USHORT usSpreadRateInKhz; /* in unit of kHz, modulation freq */ -- UCHAR ucClockIndication; /* Indicate which clock source needs SS */ -- UCHAR ucSpreadSpectrumMode; /* Bit1=0 Down Spread,=1 Center Spread. */ -- UCHAR ucReserved[2]; --} ATOM_ASIC_SS_ASSIGNMENT; -- --/* Define ucSpreadSpectrumType */ -+typedef struct _ATOM_ASIC_SS_ASSIGNMENT -+{ -+ ULONG ulTargetClockRange; //Clock Out frequence (VCO ), in unit of 10Khz -+ USHORT usSpreadSpectrumPercentage; //in unit of 0.01% -+ USHORT usSpreadRateInKhz; //in unit of kHz, modulation freq -+ UCHAR ucClockIndication; //Indicate which clock source needs SS -+ UCHAR ucSpreadSpectrumMode; //Bit1=0 Down Spread,=1 Center Spread. -+ UCHAR ucReserved[2]; -+}ATOM_ASIC_SS_ASSIGNMENT; -+ -+//Define ucClockIndication, SW uses the IDs below to search if the SS is requried/enabled on a clock branch/signal type. -+//SS is not required or enabled if a match is not found. - #define ASIC_INTERNAL_MEMORY_SS 1 - #define ASIC_INTERNAL_ENGINE_SS 2 --#define ASIC_INTERNAL_UVD_SS 3 -+#define ASIC_INTERNAL_UVD_SS 3 -+#define ASIC_INTERNAL_SS_ON_TMDS 4 -+#define ASIC_INTERNAL_SS_ON_HDMI 5 -+#define ASIC_INTERNAL_SS_ON_LVDS 6 -+#define ASIC_INTERNAL_SS_ON_DP 7 -+#define ASIC_INTERNAL_SS_ON_DCPLL 8 -+ -+typedef struct _ATOM_ASIC_SS_ASSIGNMENT_V2 -+{ -+ ULONG ulTargetClockRange; //For mem/engine/uvd, Clock Out frequence (VCO ), in unit of 10Khz -+ //For TMDS/HDMI/LVDS, it is pixel clock , for DP, it is link clock ( 27000 or 16200 ) -+ USHORT usSpreadSpectrumPercentage; //in unit of 0.01% -+ USHORT usSpreadRateIn10Hz; //in unit of 10Hz, modulation freq -+ UCHAR ucClockIndication; //Indicate which clock source needs SS -+ UCHAR ucSpreadSpectrumMode; //Bit0=0 Down Spread,=1 Center Spread, bit1=0: internal SS bit1=1: external SS -+ UCHAR ucReserved[2]; -+}ATOM_ASIC_SS_ASSIGNMENT_V2; -+ -+//ucSpreadSpectrumMode -+//#define ATOM_SS_DOWN_SPREAD_MODE_MASK 0x00000000 -+//#define ATOM_SS_DOWN_SPREAD_MODE 0x00000000 -+//#define ATOM_SS_CENTRE_SPREAD_MODE_MASK 0x00000001 -+//#define ATOM_SS_CENTRE_SPREAD_MODE 0x00000001 -+//#define ATOM_INTERNAL_SS_MASK 0x00000000 -+//#define ATOM_EXTERNAL_SS_MASK 0x00000002 -+ -+typedef struct _ATOM_ASIC_INTERNAL_SS_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_ASIC_SS_ASSIGNMENT asSpreadSpectrum[4]; -+}ATOM_ASIC_INTERNAL_SS_INFO; - --typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_ASIC_SS_ASSIGNMENT asSpreadSpectrum[4]; --} ATOM_ASIC_INTERNAL_SS_INFO; -+typedef struct _ATOM_ASIC_INTERNAL_SS_INFO_V2 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_ASIC_SS_ASSIGNMENT_V2 asSpreadSpectrum[1]; //this is point only. -+}ATOM_ASIC_INTERNAL_SS_INFO_V2; - --/* ==============================Scratch Pad Definition Portion=============================== */ -+typedef struct _ATOM_ASIC_SS_ASSIGNMENT_V3 -+{ -+ ULONG ulTargetClockRange; //For mem/engine/uvd, Clock Out frequence (VCO ), in unit of 10Khz -+ //For TMDS/HDMI/LVDS, it is pixel clock , for DP, it is link clock ( 27000 or 16200 ) -+ USHORT usSpreadSpectrumPercentage; //in unit of 0.01% -+ USHORT usSpreadRateIn10Hz; //in unit of 10Hz, modulation freq -+ UCHAR ucClockIndication; //Indicate which clock source needs SS -+ UCHAR ucSpreadSpectrumMode; //Bit0=0 Down Spread,=1 Center Spread, bit1=0: internal SS bit1=1: external SS -+ UCHAR ucReserved[2]; -+}ATOM_ASIC_SS_ASSIGNMENT_V3; -+ -+typedef struct _ATOM_ASIC_INTERNAL_SS_INFO_V3 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_ASIC_SS_ASSIGNMENT_V3 asSpreadSpectrum[1]; //this is pointer only. -+}ATOM_ASIC_INTERNAL_SS_INFO_V3; -+ -+ -+//==============================Scratch Pad Definition Portion=============================== - #define ATOM_DEVICE_CONNECT_INFO_DEF 0 - #define ATOM_ROM_LOCATION_DEF 1 - #define ATOM_TV_STANDARD_DEF 2 -@@ -2995,7 +3852,8 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_I2C_CHANNEL_STATUS_DEF 8 - #define ATOM_I2C_CHANNEL_STATUS1_DEF 9 - --/* BIOS_0_SCRATCH Definition */ -+ -+// BIOS_0_SCRATCH Definition - #define ATOM_S0_CRT1_MONO 0x00000001L - #define ATOM_S0_CRT1_COLOR 0x00000002L - #define ATOM_S0_CRT1_MASK (ATOM_S0_CRT1_MONO+ATOM_S0_CRT1_COLOR) -@@ -3008,6 +3866,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S0_CV_DIN_A 0x00000020L - #define ATOM_S0_CV_MASK_A (ATOM_S0_CV_A+ATOM_S0_CV_DIN_A) - -+ - #define ATOM_S0_CRT2_MONO 0x00000100L - #define ATOM_S0_CRT2_COLOR 0x00000200L - #define ATOM_S0_CRT2_MASK (ATOM_S0_CRT2_MONO+ATOM_S0_CRT2_COLOR) -@@ -3025,28 +3884,27 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S0_DFP2 0x00020000L - #define ATOM_S0_LCD1 0x00040000L - #define ATOM_S0_LCD2 0x00080000L --#define ATOM_S0_TV2 0x00100000L --#define ATOM_S0_DFP3 0x00200000L --#define ATOM_S0_DFP4 0x00400000L --#define ATOM_S0_DFP5 0x00800000L -+#define ATOM_S0_DFP6 0x00100000L -+#define ATOM_S0_DFP3 0x00200000L -+#define ATOM_S0_DFP4 0x00400000L -+#define ATOM_S0_DFP5 0x00800000L - --#define ATOM_S0_DFP_MASK \ -- (ATOM_S0_DFP1 | ATOM_S0_DFP2 | ATOM_S0_DFP3 | ATOM_S0_DFP4 | ATOM_S0_DFP5) -+#define ATOM_S0_DFP_MASK ATOM_S0_DFP1 | ATOM_S0_DFP2 | ATOM_S0_DFP3 | ATOM_S0_DFP4 | ATOM_S0_DFP5 | ATOM_S0_DFP6 - --#define ATOM_S0_FAD_REGISTER_BUG 0x02000000L /* If set, indicates we are running a PCIE asic with */ -- /* the FAD/HDP reg access bug. Bit is read by DAL */ -+#define ATOM_S0_FAD_REGISTER_BUG 0x02000000L // If set, indicates we are running a PCIE asic with -+ // the FAD/HDP reg access bug. Bit is read by DAL, this is obsolete from RV5xx - - #define ATOM_S0_THERMAL_STATE_MASK 0x1C000000L - #define ATOM_S0_THERMAL_STATE_SHIFT 26 - - #define ATOM_S0_SYSTEM_POWER_STATE_MASK 0xE0000000L --#define ATOM_S0_SYSTEM_POWER_STATE_SHIFT 29 -+#define ATOM_S0_SYSTEM_POWER_STATE_SHIFT 29 - - #define ATOM_S0_SYSTEM_POWER_STATE_VALUE_AC 1 - #define ATOM_S0_SYSTEM_POWER_STATE_VALUE_DC 2 - #define ATOM_S0_SYSTEM_POWER_STATE_VALUE_LITEAC 3 - --/* Byte aligned definition for BIOS usage */ -+//Byte aligned defintion for BIOS usage - #define ATOM_S0_CRT1_MONOb0 0x01 - #define ATOM_S0_CRT1_COLORb0 0x02 - #define ATOM_S0_CRT1_MASKb0 (ATOM_S0_CRT1_MONOb0+ATOM_S0_CRT1_COLORb0) -@@ -3076,8 +3934,11 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S0_DFP2b2 0x02 - #define ATOM_S0_LCD1b2 0x04 - #define ATOM_S0_LCD2b2 0x08 --#define ATOM_S0_TV2b2 0x10 --#define ATOM_S0_DFP3b2 0x20 -+#define ATOM_S0_DFP6b2 0x10 -+#define ATOM_S0_DFP3b2 0x20 -+#define ATOM_S0_DFP4b2 0x40 -+#define ATOM_S0_DFP5b2 0x80 -+ - - #define ATOM_S0_THERMAL_STATE_MASKb3 0x1C - #define ATOM_S0_THERMAL_STATE_SHIFTb3 2 -@@ -3085,43 +3946,20 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S0_SYSTEM_POWER_STATE_MASKb3 0xE0 - #define ATOM_S0_LCD1_SHIFT 18 - --/* BIOS_1_SCRATCH Definition */ -+// BIOS_1_SCRATCH Definition - #define ATOM_S1_ROM_LOCATION_MASK 0x0000FFFFL - #define ATOM_S1_PCI_BUS_DEV_MASK 0xFFFF0000L - --/* BIOS_2_SCRATCH Definition */ -+// BIOS_2_SCRATCH Definition - #define ATOM_S2_TV1_STANDARD_MASK 0x0000000FL - #define ATOM_S2_CURRENT_BL_LEVEL_MASK 0x0000FF00L - #define ATOM_S2_CURRENT_BL_LEVEL_SHIFT 8 - --#define ATOM_S2_CRT1_DPMS_STATE 0x00010000L --#define ATOM_S2_LCD1_DPMS_STATE 0x00020000L --#define ATOM_S2_TV1_DPMS_STATE 0x00040000L --#define ATOM_S2_DFP1_DPMS_STATE 0x00080000L --#define ATOM_S2_CRT2_DPMS_STATE 0x00100000L --#define ATOM_S2_LCD2_DPMS_STATE 0x00200000L --#define ATOM_S2_TV2_DPMS_STATE 0x00400000L --#define ATOM_S2_DFP2_DPMS_STATE 0x00800000L --#define ATOM_S2_CV_DPMS_STATE 0x01000000L --#define ATOM_S2_DFP3_DPMS_STATE 0x02000000L --#define ATOM_S2_DFP4_DPMS_STATE 0x04000000L --#define ATOM_S2_DFP5_DPMS_STATE 0x08000000L -- --#define ATOM_S2_DFP_DPM_STATE \ -- (ATOM_S2_DFP1_DPMS_STATE | ATOM_S2_DFP2_DPMS_STATE | \ -- ATOM_S2_DFP3_DPMS_STATE | ATOM_S2_DFP4_DPMS_STATE | \ -- ATOM_S2_DFP5_DPMS_STATE) -- --#define ATOM_S2_DEVICE_DPMS_STATE \ -- (ATOM_S2_CRT1_DPMS_STATE + ATOM_S2_LCD1_DPMS_STATE + \ -- ATOM_S2_TV1_DPMS_STATE + ATOM_S2_DFP_DPMS_STATE + \ -- ATOM_S2_CRT2_DPMS_STATE + ATOM_S2_LCD2_DPMS_STATE + \ -- ATOM_S2_TV2_DPMS_STATE + ATOM_S2_CV_DPMS_STATE) -- - #define ATOM_S2_FORCEDLOWPWRMODE_STATE_MASK 0x0C000000L - #define ATOM_S2_FORCEDLOWPWRMODE_STATE_MASK_SHIFT 26 - #define ATOM_S2_FORCEDLOWPWRMODE_STATE_CHANGE 0x10000000L - -+#define ATOM_S2_DEVICE_DPMS_STATE 0x00010000L - #define ATOM_S2_VRI_BRIGHT_ENABLE 0x20000000L - - #define ATOM_S2_DISPLAY_ROTATION_0_DEGREE 0x0 -@@ -3131,21 +3969,11 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S2_DISPLAY_ROTATION_DEGREE_SHIFT 30 - #define ATOM_S2_DISPLAY_ROTATION_ANGLE_MASK 0xC0000000L - --/* Byte aligned definition for BIOS usage */ -+ -+//Byte aligned defintion for BIOS usage - #define ATOM_S2_TV1_STANDARD_MASKb0 0x0F - #define ATOM_S2_CURRENT_BL_LEVEL_MASKb1 0xFF --#define ATOM_S2_CRT1_DPMS_STATEb2 0x01 --#define ATOM_S2_LCD1_DPMS_STATEb2 0x02 --#define ATOM_S2_TV1_DPMS_STATEb2 0x04 --#define ATOM_S2_DFP1_DPMS_STATEb2 0x08 --#define ATOM_S2_CRT2_DPMS_STATEb2 0x10 --#define ATOM_S2_LCD2_DPMS_STATEb2 0x20 --#define ATOM_S2_TV2_DPMS_STATEb2 0x40 --#define ATOM_S2_DFP2_DPMS_STATEb2 0x80 --#define ATOM_S2_CV_DPMS_STATEb3 0x01 --#define ATOM_S2_DFP3_DPMS_STATEb3 0x02 --#define ATOM_S2_DFP4_DPMS_STATEb3 0x04 --#define ATOM_S2_DFP5_DPMS_STATEb3 0x08 -+#define ATOM_S2_DEVICE_DPMS_STATEb2 0x01 - - #define ATOM_S2_DEVICE_DPMS_MASKw1 0x3FF - #define ATOM_S2_FORCEDLOWPWRMODE_STATE_MASKb3 0x0C -@@ -3153,21 +3981,22 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S2_VRI_BRIGHT_ENABLEb3 0x20 - #define ATOM_S2_ROTATION_STATE_MASKb3 0xC0 - --/* BIOS_3_SCRATCH Definition */ -+ -+// BIOS_3_SCRATCH Definition - #define ATOM_S3_CRT1_ACTIVE 0x00000001L - #define ATOM_S3_LCD1_ACTIVE 0x00000002L - #define ATOM_S3_TV1_ACTIVE 0x00000004L - #define ATOM_S3_DFP1_ACTIVE 0x00000008L - #define ATOM_S3_CRT2_ACTIVE 0x00000010L - #define ATOM_S3_LCD2_ACTIVE 0x00000020L --#define ATOM_S3_TV2_ACTIVE 0x00000040L -+#define ATOM_S3_DFP6_ACTIVE 0x00000040L - #define ATOM_S3_DFP2_ACTIVE 0x00000080L - #define ATOM_S3_CV_ACTIVE 0x00000100L - #define ATOM_S3_DFP3_ACTIVE 0x00000200L - #define ATOM_S3_DFP4_ACTIVE 0x00000400L - #define ATOM_S3_DFP5_ACTIVE 0x00000800L - --#define ATOM_S3_DEVICE_ACTIVE_MASK 0x000003FFL -+#define ATOM_S3_DEVICE_ACTIVE_MASK 0x00000FFFL - - #define ATOM_S3_LCD_FULLEXPANSION_ACTIVE 0x00001000L - #define ATOM_S3_LCD_EXPANSION_ASPEC_RATIO_ACTIVE 0x00002000L -@@ -3178,7 +4007,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S3_DFP1_CRTC_ACTIVE 0x00080000L - #define ATOM_S3_CRT2_CRTC_ACTIVE 0x00100000L - #define ATOM_S3_LCD2_CRTC_ACTIVE 0x00200000L --#define ATOM_S3_TV2_CRTC_ACTIVE 0x00400000L -+#define ATOM_S3_DFP6_CRTC_ACTIVE 0x00400000L - #define ATOM_S3_DFP2_CRTC_ACTIVE 0x00800000L - #define ATOM_S3_CV_CRTC_ACTIVE 0x01000000L - #define ATOM_S3_DFP3_CRTC_ACTIVE 0x02000000L -@@ -3187,17 +4016,18 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - - #define ATOM_S3_DEVICE_CRTC_ACTIVE_MASK 0x0FFF0000L - #define ATOM_S3_ASIC_GUI_ENGINE_HUNG 0x20000000L -+//Below two definitions are not supported in pplib, but in the old powerplay in DAL - #define ATOM_S3_ALLOW_FAST_PWR_SWITCH 0x40000000L - #define ATOM_S3_RQST_GPU_USE_MIN_PWR 0x80000000L - --/* Byte aligned definition for BIOS usage */ -+//Byte aligned defintion for BIOS usage - #define ATOM_S3_CRT1_ACTIVEb0 0x01 - #define ATOM_S3_LCD1_ACTIVEb0 0x02 - #define ATOM_S3_TV1_ACTIVEb0 0x04 - #define ATOM_S3_DFP1_ACTIVEb0 0x08 - #define ATOM_S3_CRT2_ACTIVEb0 0x10 - #define ATOM_S3_LCD2_ACTIVEb0 0x20 --#define ATOM_S3_TV2_ACTIVEb0 0x40 -+#define ATOM_S3_DFP6_ACTIVEb0 0x40 - #define ATOM_S3_DFP2_ACTIVEb0 0x80 - #define ATOM_S3_CV_ACTIVEb1 0x01 - #define ATOM_S3_DFP3_ACTIVEb1 0x02 -@@ -3212,7 +4042,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S3_DFP1_CRTC_ACTIVEb2 0x08 - #define ATOM_S3_CRT2_CRTC_ACTIVEb2 0x10 - #define ATOM_S3_LCD2_CRTC_ACTIVEb2 0x20 --#define ATOM_S3_TV2_CRTC_ACTIVEb2 0x40 -+#define ATOM_S3_DFP6_CRTC_ACTIVEb2 0x40 - #define ATOM_S3_DFP2_CRTC_ACTIVEb2 0x80 - #define ATOM_S3_CV_CRTC_ACTIVEb3 0x01 - #define ATOM_S3_DFP3_CRTC_ACTIVEb3 0x02 -@@ -3221,35 +4051,31 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - - #define ATOM_S3_ACTIVE_CRTC2w1 0xFFF - --#define ATOM_S3_ASIC_GUI_ENGINE_HUNGb3 0x20 --#define ATOM_S3_ALLOW_FAST_PWR_SWITCHb3 0x40 --#define ATOM_S3_RQST_GPU_USE_MIN_PWRb3 0x80 -- --/* BIOS_4_SCRATCH Definition */ -+// BIOS_4_SCRATCH Definition - #define ATOM_S4_LCD1_PANEL_ID_MASK 0x000000FFL - #define ATOM_S4_LCD1_REFRESH_MASK 0x0000FF00L - #define ATOM_S4_LCD1_REFRESH_SHIFT 8 - --/* Byte aligned definition for BIOS usage */ -+//Byte aligned defintion for BIOS usage - #define ATOM_S4_LCD1_PANEL_ID_MASKb0 0x0FF - #define ATOM_S4_LCD1_REFRESH_MASKb1 ATOM_S4_LCD1_PANEL_ID_MASKb0 - #define ATOM_S4_VRAM_INFO_MASKb2 ATOM_S4_LCD1_PANEL_ID_MASKb0 - --/* BIOS_5_SCRATCH Definition, BIOS_5_SCRATCH is used by Firmware only !!!! */ -+// BIOS_5_SCRATCH Definition, BIOS_5_SCRATCH is used by Firmware only !!!! - #define ATOM_S5_DOS_REQ_CRT1b0 0x01 - #define ATOM_S5_DOS_REQ_LCD1b0 0x02 - #define ATOM_S5_DOS_REQ_TV1b0 0x04 - #define ATOM_S5_DOS_REQ_DFP1b0 0x08 - #define ATOM_S5_DOS_REQ_CRT2b0 0x10 - #define ATOM_S5_DOS_REQ_LCD2b0 0x20 --#define ATOM_S5_DOS_REQ_TV2b0 0x40 -+#define ATOM_S5_DOS_REQ_DFP6b0 0x40 - #define ATOM_S5_DOS_REQ_DFP2b0 0x80 - #define ATOM_S5_DOS_REQ_CVb1 0x01 - #define ATOM_S5_DOS_REQ_DFP3b1 0x02 - #define ATOM_S5_DOS_REQ_DFP4b1 0x04 - #define ATOM_S5_DOS_REQ_DFP5b1 0x08 - --#define ATOM_S5_DOS_REQ_DEVICEw0 0x03FF -+#define ATOM_S5_DOS_REQ_DEVICEw0 0x0FFF - - #define ATOM_S5_DOS_REQ_CRT1 0x0001 - #define ATOM_S5_DOS_REQ_LCD1 0x0002 -@@ -3257,22 +4083,21 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S5_DOS_REQ_DFP1 0x0008 - #define ATOM_S5_DOS_REQ_CRT2 0x0010 - #define ATOM_S5_DOS_REQ_LCD2 0x0020 --#define ATOM_S5_DOS_REQ_TV2 0x0040 -+#define ATOM_S5_DOS_REQ_DFP6 0x0040 - #define ATOM_S5_DOS_REQ_DFP2 0x0080 - #define ATOM_S5_DOS_REQ_CV 0x0100 --#define ATOM_S5_DOS_REQ_DFP3 0x0200 --#define ATOM_S5_DOS_REQ_DFP4 0x0400 --#define ATOM_S5_DOS_REQ_DFP5 0x0800 -+#define ATOM_S5_DOS_REQ_DFP3 0x0200 -+#define ATOM_S5_DOS_REQ_DFP4 0x0400 -+#define ATOM_S5_DOS_REQ_DFP5 0x0800 - - #define ATOM_S5_DOS_FORCE_CRT1b2 ATOM_S5_DOS_REQ_CRT1b0 - #define ATOM_S5_DOS_FORCE_TV1b2 ATOM_S5_DOS_REQ_TV1b0 - #define ATOM_S5_DOS_FORCE_CRT2b2 ATOM_S5_DOS_REQ_CRT2b0 - #define ATOM_S5_DOS_FORCE_CVb3 ATOM_S5_DOS_REQ_CVb1 --#define ATOM_S5_DOS_FORCE_DEVICEw1 \ -- (ATOM_S5_DOS_FORCE_CRT1b2 + ATOM_S5_DOS_FORCE_TV1b2 + \ -- ATOM_S5_DOS_FORCE_CRT2b2 + (ATOM_S5_DOS_FORCE_CVb3 << 8)) -+#define ATOM_S5_DOS_FORCE_DEVICEw1 (ATOM_S5_DOS_FORCE_CRT1b2+ATOM_S5_DOS_FORCE_TV1b2+ATOM_S5_DOS_FORCE_CRT2b2+\ -+ (ATOM_S5_DOS_FORCE_CVb3<<8)) - --/* BIOS_6_SCRATCH Definition */ -+// BIOS_6_SCRATCH Definition - #define ATOM_S6_DEVICE_CHANGE 0x00000001L - #define ATOM_S6_SCALER_CHANGE 0x00000002L - #define ATOM_S6_LID_CHANGE 0x00000004L -@@ -3285,11 +4110,11 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S6_HW_I2C_BUSY_STATE 0x00000200L - #define ATOM_S6_THERMAL_STATE_CHANGE 0x00000400L - #define ATOM_S6_INTERRUPT_SET_BY_BIOS 0x00000800L --#define ATOM_S6_REQ_LCD_EXPANSION_FULL 0x00001000L /* Normal expansion Request bit for LCD */ --#define ATOM_S6_REQ_LCD_EXPANSION_ASPEC_RATIO 0x00002000L /* Aspect ratio expansion Request bit for LCD */ -+#define ATOM_S6_REQ_LCD_EXPANSION_FULL 0x00001000L //Normal expansion Request bit for LCD -+#define ATOM_S6_REQ_LCD_EXPANSION_ASPEC_RATIO 0x00002000L //Aspect ratio expansion Request bit for LCD - --#define ATOM_S6_DISPLAY_STATE_CHANGE 0x00004000L /* This bit is recycled when ATOM_BIOS_INFO_BIOS_SCRATCH6_SCL2_REDEFINE is set,previously it's SCL2_H_expansion */ --#define ATOM_S6_I2C_STATE_CHANGE 0x00008000L /* This bit is recycled,when ATOM_BIOS_INFO_BIOS_SCRATCH6_SCL2_REDEFINE is set,previously it's SCL2_V_expansion */ -+#define ATOM_S6_DISPLAY_STATE_CHANGE 0x00004000L //This bit is recycled when ATOM_BIOS_INFO_BIOS_SCRATCH6_SCL2_REDEFINE is set,previously it's SCL2_H_expansion -+#define ATOM_S6_I2C_STATE_CHANGE 0x00008000L //This bit is recycled,when ATOM_BIOS_INFO_BIOS_SCRATCH6_SCL2_REDEFINE is set,previously it's SCL2_V_expansion - - #define ATOM_S6_ACC_REQ_CRT1 0x00010000L - #define ATOM_S6_ACC_REQ_LCD1 0x00020000L -@@ -3297,7 +4122,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S6_ACC_REQ_DFP1 0x00080000L - #define ATOM_S6_ACC_REQ_CRT2 0x00100000L - #define ATOM_S6_ACC_REQ_LCD2 0x00200000L --#define ATOM_S6_ACC_REQ_TV2 0x00400000L -+#define ATOM_S6_ACC_REQ_DFP6 0x00400000L - #define ATOM_S6_ACC_REQ_DFP2 0x00800000L - #define ATOM_S6_ACC_REQ_CV 0x01000000L - #define ATOM_S6_ACC_REQ_DFP3 0x02000000L -@@ -3310,7 +4135,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S6_VRI_BRIGHTNESS_CHANGE 0x40000000L - #define ATOM_S6_CONFIG_DISPLAY_CHANGE_MASK 0x80000000L - --/* Byte aligned definition for BIOS usage */ -+//Byte aligned defintion for BIOS usage - #define ATOM_S6_DEVICE_CHANGEb0 0x01 - #define ATOM_S6_SCALER_CHANGEb0 0x02 - #define ATOM_S6_LID_CHANGEb0 0x04 -@@ -3320,11 +4145,11 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S6_LID_STATEb0 0x40 - #define ATOM_S6_DOCK_STATEb0 0x80 - #define ATOM_S6_CRITICAL_STATEb1 0x01 --#define ATOM_S6_HW_I2C_BUSY_STATEb1 0x02 -+#define ATOM_S6_HW_I2C_BUSY_STATEb1 0x02 - #define ATOM_S6_THERMAL_STATE_CHANGEb1 0x04 - #define ATOM_S6_INTERRUPT_SET_BY_BIOSb1 0x08 --#define ATOM_S6_REQ_LCD_EXPANSION_FULLb1 0x10 --#define ATOM_S6_REQ_LCD_EXPANSION_ASPEC_RATIOb1 0x20 -+#define ATOM_S6_REQ_LCD_EXPANSION_FULLb1 0x10 -+#define ATOM_S6_REQ_LCD_EXPANSION_ASPEC_RATIOb1 0x20 - - #define ATOM_S6_ACC_REQ_CRT1b2 0x01 - #define ATOM_S6_ACC_REQ_LCD1b2 0x02 -@@ -3332,12 +4157,12 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S6_ACC_REQ_DFP1b2 0x08 - #define ATOM_S6_ACC_REQ_CRT2b2 0x10 - #define ATOM_S6_ACC_REQ_LCD2b2 0x20 --#define ATOM_S6_ACC_REQ_TV2b2 0x40 -+#define ATOM_S6_ACC_REQ_DFP6b2 0x40 - #define ATOM_S6_ACC_REQ_DFP2b2 0x80 - #define ATOM_S6_ACC_REQ_CVb3 0x01 --#define ATOM_S6_ACC_REQ_DFP3b3 0x02 --#define ATOM_S6_ACC_REQ_DFP4b3 0x04 --#define ATOM_S6_ACC_REQ_DFP5b3 0x08 -+#define ATOM_S6_ACC_REQ_DFP3b3 0x02 -+#define ATOM_S6_ACC_REQ_DFP4b3 0x04 -+#define ATOM_S6_ACC_REQ_DFP5b3 0x08 - - #define ATOM_S6_ACC_REQ_DEVICEw1 ATOM_S5_DOS_REQ_DEVICEw0 - #define ATOM_S6_SYSTEM_POWER_MODE_CHANGEb3 0x10 -@@ -3366,7 +4191,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - #define ATOM_S6_VRI_BRIGHTNESS_CHANGE_SHIFT 30 - #define ATOM_S6_CONFIG_DISPLAY_CHANGE_SHIFT 31 - --/* BIOS_7_SCRATCH Definition, BIOS_7_SCRATCH is used by Firmware only !!!! */ -+// BIOS_7_SCRATCH Definition, BIOS_7_SCRATCH is used by Firmware only !!!! - #define ATOM_S7_DOS_MODE_TYPEb0 0x03 - #define ATOM_S7_DOS_MODE_VGAb0 0x00 - #define ATOM_S7_DOS_MODE_VESAb0 0x01 -@@ -3378,220 +4203,194 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO { - - #define ATOM_S7_DOS_8BIT_DAC_EN_SHIFT 8 - --/* BIOS_8_SCRATCH Definition */ -+// BIOS_8_SCRATCH Definition - #define ATOM_S8_I2C_CHANNEL_BUSY_MASK 0x00000FFFF --#define ATOM_S8_I2C_HW_ENGINE_BUSY_MASK 0x0FFFF0000 -+#define ATOM_S8_I2C_HW_ENGINE_BUSY_MASK 0x0FFFF0000 - - #define ATOM_S8_I2C_CHANNEL_BUSY_SHIFT 0 - #define ATOM_S8_I2C_ENGINE_BUSY_SHIFT 16 - --/* BIOS_9_SCRATCH Definition */ --#ifndef ATOM_S9_I2C_CHANNEL_COMPLETED_MASK -+// BIOS_9_SCRATCH Definition -+#ifndef ATOM_S9_I2C_CHANNEL_COMPLETED_MASK - #define ATOM_S9_I2C_CHANNEL_COMPLETED_MASK 0x0000FFFF - #endif --#ifndef ATOM_S9_I2C_CHANNEL_ABORTED_MASK -+#ifndef ATOM_S9_I2C_CHANNEL_ABORTED_MASK - #define ATOM_S9_I2C_CHANNEL_ABORTED_MASK 0xFFFF0000 - #endif --#ifndef ATOM_S9_I2C_CHANNEL_COMPLETED_SHIFT -+#ifndef ATOM_S9_I2C_CHANNEL_COMPLETED_SHIFT - #define ATOM_S9_I2C_CHANNEL_COMPLETED_SHIFT 0 - #endif --#ifndef ATOM_S9_I2C_CHANNEL_ABORTED_SHIFT -+#ifndef ATOM_S9_I2C_CHANNEL_ABORTED_SHIFT - #define ATOM_S9_I2C_CHANNEL_ABORTED_SHIFT 16 - #endif - -+ - #define ATOM_FLAG_SET 0x20 - #define ATOM_FLAG_CLEAR 0 --#define CLEAR_ATOM_S6_ACC_MODE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_ACC_MODE_SHIFT | ATOM_FLAG_CLEAR) --#define SET_ATOM_S6_DEVICE_CHANGE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_DEVICE_CHANGE_SHIFT | ATOM_FLAG_SET) --#define SET_ATOM_S6_VRI_BRIGHTNESS_CHANGE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_VRI_BRIGHTNESS_CHANGE_SHIFT | ATOM_FLAG_SET) --#define SET_ATOM_S6_SCALER_CHANGE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_SCALER_CHANGE_SHIFT | ATOM_FLAG_SET) --#define SET_ATOM_S6_LID_CHANGE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_LID_CHANGE_SHIFT | ATOM_FLAG_SET) -- --#define SET_ATOM_S6_LID_STATE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) |\ -- ATOM_S6_LID_STATE_SHIFT | ATOM_FLAG_SET) --#define CLEAR_ATOM_S6_LID_STATE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_LID_STATE_SHIFT | ATOM_FLAG_CLEAR) -- --#define SET_ATOM_S6_DOCK_CHANGE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8)| \ -- ATOM_S6_DOCKING_CHANGE_SHIFT | ATOM_FLAG_SET) --#define SET_ATOM_S6_DOCK_STATE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_DOCK_STATE_SHIFT | ATOM_FLAG_SET) --#define CLEAR_ATOM_S6_DOCK_STATE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_DOCK_STATE_SHIFT | ATOM_FLAG_CLEAR) -- --#define SET_ATOM_S6_THERMAL_STATE_CHANGE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_THERMAL_STATE_CHANGE_SHIFT | ATOM_FLAG_SET) --#define SET_ATOM_S6_SYSTEM_POWER_MODE_CHANGE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_SYSTEM_POWER_MODE_CHANGE_SHIFT | ATOM_FLAG_SET) --#define SET_ATOM_S6_INTERRUPT_SET_BY_BIOS \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_INTERRUPT_SET_BY_BIOS_SHIFT | ATOM_FLAG_SET) -- --#define SET_ATOM_S6_CRITICAL_STATE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_CRITICAL_STATE_SHIFT | ATOM_FLAG_SET) --#define CLEAR_ATOM_S6_CRITICAL_STATE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_CRITICAL_STATE_SHIFT | ATOM_FLAG_CLEAR) -- --#define SET_ATOM_S6_REQ_SCALER \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_REQ_SCALER_SHIFT | ATOM_FLAG_SET) --#define CLEAR_ATOM_S6_REQ_SCALER \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_REQ_SCALER_SHIFT | ATOM_FLAG_CLEAR ) -- --#define SET_ATOM_S6_REQ_SCALER_ARATIO \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_REQ_SCALER_ARATIO_SHIFT | ATOM_FLAG_SET ) --#define CLEAR_ATOM_S6_REQ_SCALER_ARATIO \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_REQ_SCALER_ARATIO_SHIFT | ATOM_FLAG_CLEAR ) -- --#define SET_ATOM_S6_I2C_STATE_CHANGE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_I2C_STATE_CHANGE_SHIFT | ATOM_FLAG_SET ) -- --#define SET_ATOM_S6_DISPLAY_STATE_CHANGE \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_DISPLAY_STATE_CHANGE_SHIFT | ATOM_FLAG_SET ) -- --#define SET_ATOM_S6_DEVICE_RECONFIG \ -- ((ATOM_ACC_CHANGE_INFO_DEF << 8) | \ -- ATOM_S6_CONFIG_DISPLAY_CHANGE_SHIFT | ATOM_FLAG_SET) --#define CLEAR_ATOM_S0_LCD1 \ -- ((ATOM_DEVICE_CONNECT_INFO_DEF << 8 ) | \ -- ATOM_S0_LCD1_SHIFT | ATOM_FLAG_CLEAR ) --#define SET_ATOM_S7_DOS_8BIT_DAC_EN \ -- ((ATOM_DOS_MODE_INFO_DEF << 8) | \ -- ATOM_S7_DOS_8BIT_DAC_EN_SHIFT | ATOM_FLAG_SET ) --#define CLEAR_ATOM_S7_DOS_8BIT_DAC_EN \ -- ((ATOM_DOS_MODE_INFO_DEF << 8) | \ -- ATOM_S7_DOS_8BIT_DAC_EN_SHIFT | ATOM_FLAG_CLEAR ) -+#define CLEAR_ATOM_S6_ACC_MODE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_ACC_MODE_SHIFT | ATOM_FLAG_CLEAR) -+#define SET_ATOM_S6_DEVICE_CHANGE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_DEVICE_CHANGE_SHIFT | ATOM_FLAG_SET) -+#define SET_ATOM_S6_VRI_BRIGHTNESS_CHANGE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_VRI_BRIGHTNESS_CHANGE_SHIFT | ATOM_FLAG_SET) -+#define SET_ATOM_S6_SCALER_CHANGE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_SCALER_CHANGE_SHIFT | ATOM_FLAG_SET) -+#define SET_ATOM_S6_LID_CHANGE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_LID_CHANGE_SHIFT | ATOM_FLAG_SET) - --/****************************************************************************/ --/* Portion II: Definitinos only used in Driver */ -+#define SET_ATOM_S6_LID_STATE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_LID_STATE_SHIFT | ATOM_FLAG_SET) -+#define CLEAR_ATOM_S6_LID_STATE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_LID_STATE_SHIFT | ATOM_FLAG_CLEAR) -+ -+#define SET_ATOM_S6_DOCK_CHANGE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_DOCKING_CHANGE_SHIFT | ATOM_FLAG_SET) -+#define SET_ATOM_S6_DOCK_STATE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_DOCK_STATE_SHIFT | ATOM_FLAG_SET) -+#define CLEAR_ATOM_S6_DOCK_STATE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_DOCK_STATE_SHIFT | ATOM_FLAG_CLEAR) -+ -+#define SET_ATOM_S6_THERMAL_STATE_CHANGE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_THERMAL_STATE_CHANGE_SHIFT | ATOM_FLAG_SET) -+#define SET_ATOM_S6_SYSTEM_POWER_MODE_CHANGE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_SYSTEM_POWER_MODE_CHANGE_SHIFT | ATOM_FLAG_SET) -+#define SET_ATOM_S6_INTERRUPT_SET_BY_BIOS ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_INTERRUPT_SET_BY_BIOS_SHIFT | ATOM_FLAG_SET) -+ -+#define SET_ATOM_S6_CRITICAL_STATE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_CRITICAL_STATE_SHIFT | ATOM_FLAG_SET) -+#define CLEAR_ATOM_S6_CRITICAL_STATE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_CRITICAL_STATE_SHIFT | ATOM_FLAG_CLEAR) -+ -+#define SET_ATOM_S6_REQ_SCALER ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_REQ_SCALER_SHIFT | ATOM_FLAG_SET) -+#define CLEAR_ATOM_S6_REQ_SCALER ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_REQ_SCALER_SHIFT | ATOM_FLAG_CLEAR ) -+ -+#define SET_ATOM_S6_REQ_SCALER_ARATIO ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_REQ_SCALER_ARATIO_SHIFT | ATOM_FLAG_SET ) -+#define CLEAR_ATOM_S6_REQ_SCALER_ARATIO ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_REQ_SCALER_ARATIO_SHIFT | ATOM_FLAG_CLEAR ) -+ -+#define SET_ATOM_S6_I2C_STATE_CHANGE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_I2C_STATE_CHANGE_SHIFT | ATOM_FLAG_SET ) -+ -+#define SET_ATOM_S6_DISPLAY_STATE_CHANGE ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_DISPLAY_STATE_CHANGE_SHIFT | ATOM_FLAG_SET ) -+ -+#define SET_ATOM_S6_DEVICE_RECONFIG ((ATOM_ACC_CHANGE_INFO_DEF << 8 )|ATOM_S6_CONFIG_DISPLAY_CHANGE_SHIFT | ATOM_FLAG_SET) -+#define CLEAR_ATOM_S0_LCD1 ((ATOM_DEVICE_CONNECT_INFO_DEF << 8 )| ATOM_S0_LCD1_SHIFT | ATOM_FLAG_CLEAR ) -+#define SET_ATOM_S7_DOS_8BIT_DAC_EN ((ATOM_DOS_MODE_INFO_DEF << 8 )|ATOM_S7_DOS_8BIT_DAC_EN_SHIFT | ATOM_FLAG_SET ) -+#define CLEAR_ATOM_S7_DOS_8BIT_DAC_EN ((ATOM_DOS_MODE_INFO_DEF << 8 )|ATOM_S7_DOS_8BIT_DAC_EN_SHIFT | ATOM_FLAG_CLEAR ) -+ -+/****************************************************************************/ -+//Portion II: Definitinos only used in Driver - /****************************************************************************/ - --/* Macros used by driver */ -+// Macros used by driver -+#ifdef __cplusplus -+#define GetIndexIntoMasterTable(MasterOrData, FieldName) ((reinterpret_cast(&(static_cast(0))->FieldName)-static_cast(0))/sizeof(USHORT)) - --#define GetIndexIntoMasterTable(MasterOrData, FieldName) (((char *)(&((ATOM_MASTER_LIST_OF_##MasterOrData##_TABLES *)0)->FieldName)-(char *)0)/sizeof(USHORT)) -+#define GET_COMMAND_TABLE_COMMANDSET_REVISION(TABLE_HEADER_OFFSET) (((static_cast(TABLE_HEADER_OFFSET))->ucTableFormatRevision )&0x3F) -+#define GET_COMMAND_TABLE_PARAMETER_REVISION(TABLE_HEADER_OFFSET) (((static_cast(TABLE_HEADER_OFFSET))->ucTableContentRevision)&0x3F) -+#else // not __cplusplus -+#define GetIndexIntoMasterTable(MasterOrData, FieldName) (((char*)(&((ATOM_MASTER_LIST_OF_##MasterOrData##_TABLES*)0)->FieldName)-(char*)0)/sizeof(USHORT)) - - #define GET_COMMAND_TABLE_COMMANDSET_REVISION(TABLE_HEADER_OFFSET) ((((ATOM_COMMON_TABLE_HEADER*)TABLE_HEADER_OFFSET)->ucTableFormatRevision)&0x3F) - #define GET_COMMAND_TABLE_PARAMETER_REVISION(TABLE_HEADER_OFFSET) ((((ATOM_COMMON_TABLE_HEADER*)TABLE_HEADER_OFFSET)->ucTableContentRevision)&0x3F) -+#endif // __cplusplus - - #define GET_DATA_TABLE_MAJOR_REVISION GET_COMMAND_TABLE_COMMANDSET_REVISION - #define GET_DATA_TABLE_MINOR_REVISION GET_COMMAND_TABLE_PARAMETER_REVISION - --/****************************************************************************/ --/* Portion III: Definitinos only used in VBIOS */ -+/****************************************************************************/ -+//Portion III: Definitinos only used in VBIOS - /****************************************************************************/ - #define ATOM_DAC_SRC 0x80 - #define ATOM_SRC_DAC1 0 - #define ATOM_SRC_DAC2 0x80 - --#ifdef UEFI_BUILD --#define USHORT UTEMP --#endif -- --typedef struct _MEMORY_PLLINIT_PARAMETERS { -- ULONG ulTargetMemoryClock; /* In 10Khz unit */ -- UCHAR ucAction; /* not define yet */ -- UCHAR ucFbDiv_Hi; /* Fbdiv Hi byte */ -- UCHAR ucFbDiv; /* FB value */ -- UCHAR ucPostDiv; /* Post div */ --} MEMORY_PLLINIT_PARAMETERS; -+typedef struct _MEMORY_PLLINIT_PARAMETERS -+{ -+ ULONG ulTargetMemoryClock; //In 10Khz unit -+ UCHAR ucAction; //not define yet -+ UCHAR ucFbDiv_Hi; //Fbdiv Hi byte -+ UCHAR ucFbDiv; //FB value -+ UCHAR ucPostDiv; //Post div -+}MEMORY_PLLINIT_PARAMETERS; - - #define MEMORY_PLLINIT_PS_ALLOCATION MEMORY_PLLINIT_PARAMETERS - --#define GPIO_PIN_WRITE 0x01 -+ -+#define GPIO_PIN_WRITE 0x01 - #define GPIO_PIN_READ 0x00 - --typedef struct _GPIO_PIN_CONTROL_PARAMETERS { -- UCHAR ucGPIO_ID; /* return value, read from GPIO pins */ -- UCHAR ucGPIOBitShift; /* define which bit in uGPIOBitVal need to be update */ -- UCHAR ucGPIOBitVal; /* Set/Reset corresponding bit defined in ucGPIOBitMask */ -- UCHAR ucAction; /* =GPIO_PIN_WRITE: Read; =GPIO_PIN_READ: Write */ --} GPIO_PIN_CONTROL_PARAMETERS; -- --typedef struct _ENABLE_SCALER_PARAMETERS { -- UCHAR ucScaler; /* ATOM_SCALER1, ATOM_SCALER2 */ -- UCHAR ucEnable; /* ATOM_SCALER_DISABLE or ATOM_SCALER_CENTER or ATOM_SCALER_EXPANSION */ -- UCHAR ucTVStandard; /* */ -- UCHAR ucPadding[1]; --} ENABLE_SCALER_PARAMETERS; --#define ENABLE_SCALER_PS_ALLOCATION ENABLE_SCALER_PARAMETERS -- --/* ucEnable: */ -+typedef struct _GPIO_PIN_CONTROL_PARAMETERS -+{ -+ UCHAR ucGPIO_ID; //return value, read from GPIO pins -+ UCHAR ucGPIOBitShift; //define which bit in uGPIOBitVal need to be update -+ UCHAR ucGPIOBitVal; //Set/Reset corresponding bit defined in ucGPIOBitMask -+ UCHAR ucAction; //=GPIO_PIN_WRITE: Read; =GPIO_PIN_READ: Write -+}GPIO_PIN_CONTROL_PARAMETERS; -+ -+typedef struct _ENABLE_SCALER_PARAMETERS -+{ -+ UCHAR ucScaler; // ATOM_SCALER1, ATOM_SCALER2 -+ UCHAR ucEnable; // ATOM_SCALER_DISABLE or ATOM_SCALER_CENTER or ATOM_SCALER_EXPANSION -+ UCHAR ucTVStandard; // -+ UCHAR ucPadding[1]; -+}ENABLE_SCALER_PARAMETERS; -+#define ENABLE_SCALER_PS_ALLOCATION ENABLE_SCALER_PARAMETERS -+ -+//ucEnable: - #define SCALER_BYPASS_AUTO_CENTER_NO_REPLICATION 0 - #define SCALER_BYPASS_AUTO_CENTER_AUTO_REPLICATION 1 - #define SCALER_ENABLE_2TAP_ALPHA_MODE 2 - #define SCALER_ENABLE_MULTITAP_MODE 3 - --typedef struct _ENABLE_HARDWARE_ICON_CURSOR_PARAMETERS { -- ULONG usHWIconHorzVertPosn; /* Hardware Icon Vertical position */ -- UCHAR ucHWIconVertOffset; /* Hardware Icon Vertical offset */ -- UCHAR ucHWIconHorzOffset; /* Hardware Icon Horizontal offset */ -- UCHAR ucSelection; /* ATOM_CURSOR1 or ATOM_ICON1 or ATOM_CURSOR2 or ATOM_ICON2 */ -- UCHAR ucEnable; /* ATOM_ENABLE or ATOM_DISABLE */ --} ENABLE_HARDWARE_ICON_CURSOR_PARAMETERS; -- --typedef struct _ENABLE_HARDWARE_ICON_CURSOR_PS_ALLOCATION { -- ENABLE_HARDWARE_ICON_CURSOR_PARAMETERS sEnableIcon; -- ENABLE_CRTC_PARAMETERS sReserved; --} ENABLE_HARDWARE_ICON_CURSOR_PS_ALLOCATION; -- --typedef struct _ENABLE_GRAPH_SURFACE_PARAMETERS { -- USHORT usHight; /* Image Hight */ -- USHORT usWidth; /* Image Width */ -- UCHAR ucSurface; /* Surface 1 or 2 */ -- UCHAR ucPadding[3]; --} ENABLE_GRAPH_SURFACE_PARAMETERS; -- --typedef struct _ENABLE_GRAPH_SURFACE_PARAMETERS_V1_2 { -- USHORT usHight; /* Image Hight */ -- USHORT usWidth; /* Image Width */ -- UCHAR ucSurface; /* Surface 1 or 2 */ -- UCHAR ucEnable; /* ATOM_ENABLE or ATOM_DISABLE */ -- UCHAR ucPadding[2]; --} ENABLE_GRAPH_SURFACE_PARAMETERS_V1_2; -- --typedef struct _ENABLE_GRAPH_SURFACE_PS_ALLOCATION { -- ENABLE_GRAPH_SURFACE_PARAMETERS sSetSurface; -- ENABLE_YUV_PS_ALLOCATION sReserved; /* Don't set this one */ --} ENABLE_GRAPH_SURFACE_PS_ALLOCATION; -- --typedef struct _MEMORY_CLEAN_UP_PARAMETERS { -- USHORT usMemoryStart; /* in 8Kb boundry, offset from memory base address */ -- USHORT usMemorySize; /* 8Kb blocks aligned */ --} MEMORY_CLEAN_UP_PARAMETERS; -+typedef struct _ENABLE_HARDWARE_ICON_CURSOR_PARAMETERS -+{ -+ ULONG usHWIconHorzVertPosn; // Hardware Icon Vertical position -+ UCHAR ucHWIconVertOffset; // Hardware Icon Vertical offset -+ UCHAR ucHWIconHorzOffset; // Hardware Icon Horizontal offset -+ UCHAR ucSelection; // ATOM_CURSOR1 or ATOM_ICON1 or ATOM_CURSOR2 or ATOM_ICON2 -+ UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE -+}ENABLE_HARDWARE_ICON_CURSOR_PARAMETERS; -+ -+typedef struct _ENABLE_HARDWARE_ICON_CURSOR_PS_ALLOCATION -+{ -+ ENABLE_HARDWARE_ICON_CURSOR_PARAMETERS sEnableIcon; -+ ENABLE_CRTC_PARAMETERS sReserved; -+}ENABLE_HARDWARE_ICON_CURSOR_PS_ALLOCATION; -+ -+typedef struct _ENABLE_GRAPH_SURFACE_PARAMETERS -+{ -+ USHORT usHight; // Image Hight -+ USHORT usWidth; // Image Width -+ UCHAR ucSurface; // Surface 1 or 2 -+ UCHAR ucPadding[3]; -+}ENABLE_GRAPH_SURFACE_PARAMETERS; -+ -+typedef struct _ENABLE_GRAPH_SURFACE_PARAMETERS_V1_2 -+{ -+ USHORT usHight; // Image Hight -+ USHORT usWidth; // Image Width -+ UCHAR ucSurface; // Surface 1 or 2 -+ UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE -+ UCHAR ucPadding[2]; -+}ENABLE_GRAPH_SURFACE_PARAMETERS_V1_2; -+ -+typedef struct _ENABLE_GRAPH_SURFACE_PARAMETERS_V1_3 -+{ -+ USHORT usHight; // Image Hight -+ USHORT usWidth; // Image Width -+ UCHAR ucSurface; // Surface 1 or 2 -+ UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE -+ USHORT usDeviceId; // Active Device Id for this surface. If no device, set to 0. -+}ENABLE_GRAPH_SURFACE_PARAMETERS_V1_3; -+ -+typedef struct _ENABLE_GRAPH_SURFACE_PS_ALLOCATION -+{ -+ ENABLE_GRAPH_SURFACE_PARAMETERS sSetSurface; -+ ENABLE_YUV_PS_ALLOCATION sReserved; // Don't set this one -+}ENABLE_GRAPH_SURFACE_PS_ALLOCATION; -+ -+typedef struct _MEMORY_CLEAN_UP_PARAMETERS -+{ -+ USHORT usMemoryStart; //in 8Kb boundry, offset from memory base address -+ USHORT usMemorySize; //8Kb blocks aligned -+}MEMORY_CLEAN_UP_PARAMETERS; - #define MEMORY_CLEAN_UP_PS_ALLOCATION MEMORY_CLEAN_UP_PARAMETERS - --typedef struct _GET_DISPLAY_SURFACE_SIZE_PARAMETERS { -- USHORT usX_Size; /* When use as input parameter, usX_Size indicates which CRTC */ -- USHORT usY_Size; --} GET_DISPLAY_SURFACE_SIZE_PARAMETERS; -+typedef struct _GET_DISPLAY_SURFACE_SIZE_PARAMETERS -+{ -+ USHORT usX_Size; //When use as input parameter, usX_Size indicates which CRTC -+ USHORT usY_Size; -+}GET_DISPLAY_SURFACE_SIZE_PARAMETERS; - --typedef struct _INDIRECT_IO_ACCESS { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR IOAccessSequence[256]; -+typedef struct _INDIRECT_IO_ACCESS -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR IOAccessSequence[256]; - } INDIRECT_IO_ACCESS; - - #define INDIRECT_READ 0x00 -@@ -3615,93 +4414,108 @@ typedef struct _INDIRECT_IO_ACCESS { - #define INDIRECT_IO_NBMISC_READ INDIRECT_IO_NBMISC | INDIRECT_READ - #define INDIRECT_IO_NBMISC_WRITE INDIRECT_IO_NBMISC | INDIRECT_WRITE - --typedef struct _ATOM_OEM_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_I2C_ID_CONFIG_ACCESS sucI2cId; --} ATOM_OEM_INFO; -- --typedef struct _ATOM_TV_MODE { -- UCHAR ucVMode_Num; /* Video mode number */ -- UCHAR ucTV_Mode_Num; /* Internal TV mode number */ --} ATOM_TV_MODE; -- --typedef struct _ATOM_BIOS_INT_TVSTD_MODE { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usTV_Mode_LUT_Offset; /* Pointer to standard to internal number conversion table */ -- USHORT usTV_FIFO_Offset; /* Pointer to FIFO entry table */ -- USHORT usNTSC_Tbl_Offset; /* Pointer to SDTV_Mode_NTSC table */ -- USHORT usPAL_Tbl_Offset; /* Pointer to SDTV_Mode_PAL table */ -- USHORT usCV_Tbl_Offset; /* Pointer to SDTV_Mode_PAL table */ --} ATOM_BIOS_INT_TVSTD_MODE; -- --typedef struct _ATOM_TV_MODE_SCALER_PTR { -- USHORT ucFilter0_Offset; /* Pointer to filter format 0 coefficients */ -- USHORT usFilter1_Offset; /* Pointer to filter format 0 coefficients */ -- UCHAR ucTV_Mode_Num; --} ATOM_TV_MODE_SCALER_PTR; -- --typedef struct _ATOM_STANDARD_VESA_TIMING { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_DTD_FORMAT aModeTimings[16]; /* 16 is not the real array number, just for initial allocation */ --} ATOM_STANDARD_VESA_TIMING; -- --typedef struct _ATOM_STD_FORMAT { -- USHORT usSTD_HDisp; -- USHORT usSTD_VDisp; -- USHORT usSTD_RefreshRate; -- USHORT usReserved; --} ATOM_STD_FORMAT; -- --typedef struct _ATOM_VESA_TO_EXTENDED_MODE { -- USHORT usVESA_ModeNumber; -- USHORT usExtendedModeNumber; --} ATOM_VESA_TO_EXTENDED_MODE; -- --typedef struct _ATOM_VESA_TO_INTENAL_MODE_LUT { -- ATOM_COMMON_TABLE_HEADER sHeader; -- ATOM_VESA_TO_EXTENDED_MODE asVESA_ToExtendedModeInfo[76]; --} ATOM_VESA_TO_INTENAL_MODE_LUT; -+typedef struct _ATOM_OEM_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_I2C_ID_CONFIG_ACCESS sucI2cId; -+}ATOM_OEM_INFO; -+ -+typedef struct _ATOM_TV_MODE -+{ -+ UCHAR ucVMode_Num; //Video mode number -+ UCHAR ucTV_Mode_Num; //Internal TV mode number -+}ATOM_TV_MODE; -+ -+typedef struct _ATOM_BIOS_INT_TVSTD_MODE -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usTV_Mode_LUT_Offset; // Pointer to standard to internal number conversion table -+ USHORT usTV_FIFO_Offset; // Pointer to FIFO entry table -+ USHORT usNTSC_Tbl_Offset; // Pointer to SDTV_Mode_NTSC table -+ USHORT usPAL_Tbl_Offset; // Pointer to SDTV_Mode_PAL table -+ USHORT usCV_Tbl_Offset; // Pointer to SDTV_Mode_PAL table -+}ATOM_BIOS_INT_TVSTD_MODE; -+ -+ -+typedef struct _ATOM_TV_MODE_SCALER_PTR -+{ -+ USHORT ucFilter0_Offset; //Pointer to filter format 0 coefficients -+ USHORT usFilter1_Offset; //Pointer to filter format 0 coefficients -+ UCHAR ucTV_Mode_Num; -+}ATOM_TV_MODE_SCALER_PTR; -+ -+typedef struct _ATOM_STANDARD_VESA_TIMING -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_DTD_FORMAT aModeTimings[16]; // 16 is not the real array number, just for initial allocation -+}ATOM_STANDARD_VESA_TIMING; -+ -+ -+typedef struct _ATOM_STD_FORMAT -+{ -+ USHORT usSTD_HDisp; -+ USHORT usSTD_VDisp; -+ USHORT usSTD_RefreshRate; -+ USHORT usReserved; -+}ATOM_STD_FORMAT; -+ -+typedef struct _ATOM_VESA_TO_EXTENDED_MODE -+{ -+ USHORT usVESA_ModeNumber; -+ USHORT usExtendedModeNumber; -+}ATOM_VESA_TO_EXTENDED_MODE; -+ -+typedef struct _ATOM_VESA_TO_INTENAL_MODE_LUT -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ ATOM_VESA_TO_EXTENDED_MODE asVESA_ToExtendedModeInfo[76]; -+}ATOM_VESA_TO_INTENAL_MODE_LUT; - - /*************** ATOM Memory Related Data Structure ***********************/ --typedef struct _ATOM_MEMORY_VENDOR_BLOCK { -- UCHAR ucMemoryType; -- UCHAR ucMemoryVendor; -- UCHAR ucAdjMCId; -- UCHAR ucDynClkId; -- ULONG ulDllResetClkRange; --} ATOM_MEMORY_VENDOR_BLOCK; -- --typedef struct _ATOM_MEMORY_SETTING_ID_CONFIG { -+typedef struct _ATOM_MEMORY_VENDOR_BLOCK{ -+ UCHAR ucMemoryType; -+ UCHAR ucMemoryVendor; -+ UCHAR ucAdjMCId; -+ UCHAR ucDynClkId; -+ ULONG ulDllResetClkRange; -+}ATOM_MEMORY_VENDOR_BLOCK; -+ -+ -+typedef struct _ATOM_MEMORY_SETTING_ID_CONFIG{ - #if ATOM_BIG_ENDIAN -- ULONG ucMemBlkId:8; -- ULONG ulMemClockRange:24; -+ ULONG ucMemBlkId:8; -+ ULONG ulMemClockRange:24; - #else -- ULONG ulMemClockRange:24; -- ULONG ucMemBlkId:8; -+ ULONG ulMemClockRange:24; -+ ULONG ucMemBlkId:8; - #endif --} ATOM_MEMORY_SETTING_ID_CONFIG; -- --typedef union _ATOM_MEMORY_SETTING_ID_CONFIG_ACCESS { -- ATOM_MEMORY_SETTING_ID_CONFIG slAccess; -- ULONG ulAccess; --} ATOM_MEMORY_SETTING_ID_CONFIG_ACCESS; -- --typedef struct _ATOM_MEMORY_SETTING_DATA_BLOCK { -- ATOM_MEMORY_SETTING_ID_CONFIG_ACCESS ulMemoryID; -- ULONG aulMemData[1]; --} ATOM_MEMORY_SETTING_DATA_BLOCK; -- --typedef struct _ATOM_INIT_REG_INDEX_FORMAT { -- USHORT usRegIndex; /* MC register index */ -- UCHAR ucPreRegDataLength; /* offset in ATOM_INIT_REG_DATA_BLOCK.saRegDataBuf */ --} ATOM_INIT_REG_INDEX_FORMAT; -- --typedef struct _ATOM_INIT_REG_BLOCK { -- USHORT usRegIndexTblSize; /* size of asRegIndexBuf */ -- USHORT usRegDataBlkSize; /* size of ATOM_MEMORY_SETTING_DATA_BLOCK */ -- ATOM_INIT_REG_INDEX_FORMAT asRegIndexBuf[1]; -- ATOM_MEMORY_SETTING_DATA_BLOCK asRegDataBuf[1]; --} ATOM_INIT_REG_BLOCK; -+}ATOM_MEMORY_SETTING_ID_CONFIG; -+ -+typedef union _ATOM_MEMORY_SETTING_ID_CONFIG_ACCESS -+{ -+ ATOM_MEMORY_SETTING_ID_CONFIG slAccess; -+ ULONG ulAccess; -+}ATOM_MEMORY_SETTING_ID_CONFIG_ACCESS; -+ -+ -+typedef struct _ATOM_MEMORY_SETTING_DATA_BLOCK{ -+ ATOM_MEMORY_SETTING_ID_CONFIG_ACCESS ulMemoryID; -+ ULONG aulMemData[1]; -+}ATOM_MEMORY_SETTING_DATA_BLOCK; -+ -+ -+typedef struct _ATOM_INIT_REG_INDEX_FORMAT{ -+ USHORT usRegIndex; // MC register index -+ UCHAR ucPreRegDataLength; // offset in ATOM_INIT_REG_DATA_BLOCK.saRegDataBuf -+}ATOM_INIT_REG_INDEX_FORMAT; -+ -+ -+typedef struct _ATOM_INIT_REG_BLOCK{ -+ USHORT usRegIndexTblSize; //size of asRegIndexBuf -+ USHORT usRegDataBlkSize; //size of ATOM_MEMORY_SETTING_DATA_BLOCK -+ ATOM_INIT_REG_INDEX_FORMAT asRegIndexBuf[1]; -+ ATOM_MEMORY_SETTING_DATA_BLOCK asRegDataBuf[1]; -+}ATOM_INIT_REG_BLOCK; - - #define END_OF_REG_INDEX_BLOCK 0x0ffff - #define END_OF_REG_DATA_BLOCK 0x00000000 -@@ -3716,16 +4530,19 @@ typedef struct _ATOM_INIT_REG_BLOCK { - #define INDEX_ACCESS_RANGE_END (INDEX_ACCESS_RANGE_BEGIN + 1) - #define VALUE_INDEX_ACCESS_SINGLE (INDEX_ACCESS_RANGE_END + 1) - --typedef struct _ATOM_MC_INIT_PARAM_TABLE { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usAdjustARB_SEQDataOffset; -- USHORT usMCInitMemTypeTblOffset; -- USHORT usMCInitCommonTblOffset; -- USHORT usMCInitPowerDownTblOffset; -- ULONG ulARB_SEQDataBuf[32]; -- ATOM_INIT_REG_BLOCK asMCInitMemType; -- ATOM_INIT_REG_BLOCK asMCInitCommon; --} ATOM_MC_INIT_PARAM_TABLE; -+ -+typedef struct _ATOM_MC_INIT_PARAM_TABLE -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usAdjustARB_SEQDataOffset; -+ USHORT usMCInitMemTypeTblOffset; -+ USHORT usMCInitCommonTblOffset; -+ USHORT usMCInitPowerDownTblOffset; -+ ULONG ulARB_SEQDataBuf[32]; -+ ATOM_INIT_REG_BLOCK asMCInitMemType; -+ ATOM_INIT_REG_BLOCK asMCInitCommon; -+}ATOM_MC_INIT_PARAM_TABLE; -+ - - #define _4Mx16 0x2 - #define _4Mx32 0x3 -@@ -3751,221 +4568,272 @@ typedef struct _ATOM_MC_INIT_PARAM_TABLE { - - #define QIMONDA INFINEON - #define PROMOS MOSEL -+#define KRETON INFINEON - --/* ///////////Support for GDDR5 MC uCode to reside in upper 64K of ROM///////////// */ -+/////////////Support for GDDR5 MC uCode to reside in upper 64K of ROM///////////// - - #define UCODE_ROM_START_ADDRESS 0x1c000 --#define UCODE_SIGNATURE 0x4375434d /* 'MCuC' - MC uCode */ -- --/* uCode block header for reference */ -- --typedef struct _MCuCodeHeader { -- ULONG ulSignature; -- UCHAR ucRevision; -- UCHAR ucChecksum; -- UCHAR ucReserved1; -- UCHAR ucReserved2; -- USHORT usParametersLength; -- USHORT usUCodeLength; -- USHORT usReserved1; -- USHORT usReserved2; -+#define UCODE_SIGNATURE 0x4375434d // 'MCuC' - MC uCode -+ -+//uCode block header for reference -+ -+typedef struct _MCuCodeHeader -+{ -+ ULONG ulSignature; -+ UCHAR ucRevision; -+ UCHAR ucChecksum; -+ UCHAR ucReserved1; -+ UCHAR ucReserved2; -+ USHORT usParametersLength; -+ USHORT usUCodeLength; -+ USHORT usReserved1; -+ USHORT usReserved2; - } MCuCodeHeader; - --/* //////////////////////////////////////////////////////////////////////////////// */ -+////////////////////////////////////////////////////////////////////////////////// - - #define ATOM_MAX_NUMBER_OF_VRAM_MODULE 16 - - #define ATOM_VRAM_MODULE_MEMORY_VENDOR_ID_MASK 0xF --typedef struct _ATOM_VRAM_MODULE_V1 { -- ULONG ulReserved; -- USHORT usEMRSValue; -- USHORT usMRSValue; -- USHORT usReserved; -- UCHAR ucExtMemoryID; /* An external indicator (by hardcode, callback or pin) to tell what is the current memory module */ -- UCHAR ucMemoryType; /* [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] reserved; */ -- UCHAR ucMemoryVenderID; /* Predefined,never change across designs or memory type/vender */ -- UCHAR ucMemoryDeviceCfg; /* [7:4]=0x0:4M;=0x1:8M;=0x2:16M;0x3:32M....[3:0]=0x0:x4;=0x1:x8;=0x2:x16;=0x3:x32... */ -- UCHAR ucRow; /* Number of Row,in power of 2; */ -- UCHAR ucColumn; /* Number of Column,in power of 2; */ -- UCHAR ucBank; /* Nunber of Bank; */ -- UCHAR ucRank; /* Number of Rank, in power of 2 */ -- UCHAR ucChannelNum; /* Number of channel; */ -- UCHAR ucChannelConfig; /* [3:0]=Indication of what channel combination;[4:7]=Channel bit width, in number of 2 */ -- UCHAR ucDefaultMVDDQ_ID; /* Default MVDDQ setting for this memory block, ID linking to MVDDQ info table to find real set-up data; */ -- UCHAR ucDefaultMVDDC_ID; /* Default MVDDC setting for this memory block, ID linking to MVDDC info table to find real set-up data; */ -- UCHAR ucReserved[2]; --} ATOM_VRAM_MODULE_V1; -- --typedef struct _ATOM_VRAM_MODULE_V2 { -- ULONG ulReserved; -- ULONG ulFlags; /* To enable/disable functionalities based on memory type */ -- ULONG ulEngineClock; /* Override of default engine clock for particular memory type */ -- ULONG ulMemoryClock; /* Override of default memory clock for particular memory type */ -- USHORT usEMRS2Value; /* EMRS2 Value is used for GDDR2 and GDDR4 memory type */ -- USHORT usEMRS3Value; /* EMRS3 Value is used for GDDR2 and GDDR4 memory type */ -- USHORT usEMRSValue; -- USHORT usMRSValue; -- USHORT usReserved; -- UCHAR ucExtMemoryID; /* An external indicator (by hardcode, callback or pin) to tell what is the current memory module */ -- UCHAR ucMemoryType; /* [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] - must not be used for now; */ -- UCHAR ucMemoryVenderID; /* Predefined,never change across designs or memory type/vender. If not predefined, vendor detection table gets executed */ -- UCHAR ucMemoryDeviceCfg; /* [7:4]=0x0:4M;=0x1:8M;=0x2:16M;0x3:32M....[3:0]=0x0:x4;=0x1:x8;=0x2:x16;=0x3:x32... */ -- UCHAR ucRow; /* Number of Row,in power of 2; */ -- UCHAR ucColumn; /* Number of Column,in power of 2; */ -- UCHAR ucBank; /* Nunber of Bank; */ -- UCHAR ucRank; /* Number of Rank, in power of 2 */ -- UCHAR ucChannelNum; /* Number of channel; */ -- UCHAR ucChannelConfig; /* [3:0]=Indication of what channel combination;[4:7]=Channel bit width, in number of 2 */ -- UCHAR ucDefaultMVDDQ_ID; /* Default MVDDQ setting for this memory block, ID linking to MVDDQ info table to find real set-up data; */ -- UCHAR ucDefaultMVDDC_ID; /* Default MVDDC setting for this memory block, ID linking to MVDDC info table to find real set-up data; */ -- UCHAR ucRefreshRateFactor; -- UCHAR ucReserved[3]; --} ATOM_VRAM_MODULE_V2; -- --typedef struct _ATOM_MEMORY_TIMING_FORMAT { -- ULONG ulClkRange; /* memory clock in 10kHz unit, when target memory clock is below this clock, use this memory timing */ -- union { -- USHORT usMRS; /* mode register */ -- USHORT usDDR3_MR0; -- }; -- union { -- USHORT usEMRS; /* extended mode register */ -- USHORT usDDR3_MR1; -- }; -- UCHAR ucCL; /* CAS latency */ -- UCHAR ucWL; /* WRITE Latency */ -- UCHAR uctRAS; /* tRAS */ -- UCHAR uctRC; /* tRC */ -- UCHAR uctRFC; /* tRFC */ -- UCHAR uctRCDR; /* tRCDR */ -- UCHAR uctRCDW; /* tRCDW */ -- UCHAR uctRP; /* tRP */ -- UCHAR uctRRD; /* tRRD */ -- UCHAR uctWR; /* tWR */ -- UCHAR uctWTR; /* tWTR */ -- UCHAR uctPDIX; /* tPDIX */ -- UCHAR uctFAW; /* tFAW */ -- UCHAR uctAOND; /* tAOND */ -- union { -- struct { -- UCHAR ucflag; /* flag to control memory timing calculation. bit0= control EMRS2 Infineon */ -- UCHAR ucReserved; -- }; -- USHORT usDDR3_MR2; -- }; --} ATOM_MEMORY_TIMING_FORMAT; -- --typedef struct _ATOM_MEMORY_TIMING_FORMAT_V1 { -- ULONG ulClkRange; /* memory clock in 10kHz unit, when target memory clock is below this clock, use this memory timing */ -- USHORT usMRS; /* mode register */ -- USHORT usEMRS; /* extended mode register */ -- UCHAR ucCL; /* CAS latency */ -- UCHAR ucWL; /* WRITE Latency */ -- UCHAR uctRAS; /* tRAS */ -- UCHAR uctRC; /* tRC */ -- UCHAR uctRFC; /* tRFC */ -- UCHAR uctRCDR; /* tRCDR */ -- UCHAR uctRCDW; /* tRCDW */ -- UCHAR uctRP; /* tRP */ -- UCHAR uctRRD; /* tRRD */ -- UCHAR uctWR; /* tWR */ -- UCHAR uctWTR; /* tWTR */ -- UCHAR uctPDIX; /* tPDIX */ -- UCHAR uctFAW; /* tFAW */ -- UCHAR uctAOND; /* tAOND */ -- UCHAR ucflag; /* flag to control memory timing calculation. bit0= control EMRS2 Infineon */ --/* ///////////////////////GDDR parameters/////////////////////////////////// */ -- UCHAR uctCCDL; /* */ -- UCHAR uctCRCRL; /* */ -- UCHAR uctCRCWL; /* */ -- UCHAR uctCKE; /* */ -- UCHAR uctCKRSE; /* */ -- UCHAR uctCKRSX; /* */ -- UCHAR uctFAW32; /* */ -- UCHAR ucReserved1; /* */ -- UCHAR ucReserved2; /* */ -- UCHAR ucTerminator; --} ATOM_MEMORY_TIMING_FORMAT_V1; -- --typedef struct _ATOM_MEMORY_FORMAT { -- ULONG ulDllDisClock; /* memory DLL will be disable when target memory clock is below this clock */ -- union { -- USHORT usEMRS2Value; /* EMRS2 Value is used for GDDR2 and GDDR4 memory type */ -- USHORT usDDR3_Reserved; /* Not used for DDR3 memory */ -- }; -- union { -- USHORT usEMRS3Value; /* EMRS3 Value is used for GDDR2 and GDDR4 memory type */ -- USHORT usDDR3_MR3; /* Used for DDR3 memory */ -- }; -- UCHAR ucMemoryType; /* [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] - must not be used for now; */ -- UCHAR ucMemoryVenderID; /* Predefined,never change across designs or memory type/vender. If not predefined, vendor detection table gets executed */ -- UCHAR ucRow; /* Number of Row,in power of 2; */ -- UCHAR ucColumn; /* Number of Column,in power of 2; */ -- UCHAR ucBank; /* Nunber of Bank; */ -- UCHAR ucRank; /* Number of Rank, in power of 2 */ -- UCHAR ucBurstSize; /* burst size, 0= burst size=4 1= burst size=8 */ -- UCHAR ucDllDisBit; /* position of DLL Enable/Disable bit in EMRS ( Extended Mode Register ) */ -- UCHAR ucRefreshRateFactor; /* memory refresh rate in unit of ms */ -- UCHAR ucDensity; /* _8Mx32, _16Mx32, _16Mx16, _32Mx16 */ -- UCHAR ucPreamble; /* [7:4] Write Preamble, [3:0] Read Preamble */ -- UCHAR ucMemAttrib; /* Memory Device Addribute, like RDBI/WDBI etc */ -- ATOM_MEMORY_TIMING_FORMAT asMemTiming[5]; /* Memory Timing block sort from lower clock to higher clock */ --} ATOM_MEMORY_FORMAT; -- --typedef struct _ATOM_VRAM_MODULE_V3 { -- ULONG ulChannelMapCfg; /* board dependent paramenter:Channel combination */ -- USHORT usSize; /* size of ATOM_VRAM_MODULE_V3 */ -- USHORT usDefaultMVDDQ; /* board dependent parameter:Default Memory Core Voltage */ -- USHORT usDefaultMVDDC; /* board dependent parameter:Default Memory IO Voltage */ -- UCHAR ucExtMemoryID; /* An external indicator (by hardcode, callback or pin) to tell what is the current memory module */ -- UCHAR ucChannelNum; /* board dependent parameter:Number of channel; */ -- UCHAR ucChannelSize; /* board dependent parameter:32bit or 64bit */ -- UCHAR ucVREFI; /* board dependnt parameter: EXT or INT +160mv to -140mv */ -- UCHAR ucNPL_RT; /* board dependent parameter:NPL round trip delay, used for calculate memory timing parameters */ -- UCHAR ucFlag; /* To enable/disable functionalities based on memory type */ -- ATOM_MEMORY_FORMAT asMemory; /* describ all of video memory parameters from memory spec */ --} ATOM_VRAM_MODULE_V3; -- --/* ATOM_VRAM_MODULE_V3.ucNPL_RT */ -+typedef struct _ATOM_VRAM_MODULE_V1 -+{ -+ ULONG ulReserved; -+ USHORT usEMRSValue; -+ USHORT usMRSValue; -+ USHORT usReserved; -+ UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module -+ UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] reserved; -+ UCHAR ucMemoryVenderID; // Predefined,never change across designs or memory type/vender -+ UCHAR ucMemoryDeviceCfg; // [7:4]=0x0:4M;=0x1:8M;=0x2:16M;0x3:32M....[3:0]=0x0:x4;=0x1:x8;=0x2:x16;=0x3:x32... -+ UCHAR ucRow; // Number of Row,in power of 2; -+ UCHAR ucColumn; // Number of Column,in power of 2; -+ UCHAR ucBank; // Nunber of Bank; -+ UCHAR ucRank; // Number of Rank, in power of 2 -+ UCHAR ucChannelNum; // Number of channel; -+ UCHAR ucChannelConfig; // [3:0]=Indication of what channel combination;[4:7]=Channel bit width, in number of 2 -+ UCHAR ucDefaultMVDDQ_ID; // Default MVDDQ setting for this memory block, ID linking to MVDDQ info table to find real set-up data; -+ UCHAR ucDefaultMVDDC_ID; // Default MVDDC setting for this memory block, ID linking to MVDDC info table to find real set-up data; -+ UCHAR ucReserved[2]; -+}ATOM_VRAM_MODULE_V1; -+ -+ -+typedef struct _ATOM_VRAM_MODULE_V2 -+{ -+ ULONG ulReserved; -+ ULONG ulFlags; // To enable/disable functionalities based on memory type -+ ULONG ulEngineClock; // Override of default engine clock for particular memory type -+ ULONG ulMemoryClock; // Override of default memory clock for particular memory type -+ USHORT usEMRS2Value; // EMRS2 Value is used for GDDR2 and GDDR4 memory type -+ USHORT usEMRS3Value; // EMRS3 Value is used for GDDR2 and GDDR4 memory type -+ USHORT usEMRSValue; -+ USHORT usMRSValue; -+ USHORT usReserved; -+ UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module -+ UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] - must not be used for now; -+ UCHAR ucMemoryVenderID; // Predefined,never change across designs or memory type/vender. If not predefined, vendor detection table gets executed -+ UCHAR ucMemoryDeviceCfg; // [7:4]=0x0:4M;=0x1:8M;=0x2:16M;0x3:32M....[3:0]=0x0:x4;=0x1:x8;=0x2:x16;=0x3:x32... -+ UCHAR ucRow; // Number of Row,in power of 2; -+ UCHAR ucColumn; // Number of Column,in power of 2; -+ UCHAR ucBank; // Nunber of Bank; -+ UCHAR ucRank; // Number of Rank, in power of 2 -+ UCHAR ucChannelNum; // Number of channel; -+ UCHAR ucChannelConfig; // [3:0]=Indication of what channel combination;[4:7]=Channel bit width, in number of 2 -+ UCHAR ucDefaultMVDDQ_ID; // Default MVDDQ setting for this memory block, ID linking to MVDDQ info table to find real set-up data; -+ UCHAR ucDefaultMVDDC_ID; // Default MVDDC setting for this memory block, ID linking to MVDDC info table to find real set-up data; -+ UCHAR ucRefreshRateFactor; -+ UCHAR ucReserved[3]; -+}ATOM_VRAM_MODULE_V2; -+ -+ -+typedef struct _ATOM_MEMORY_TIMING_FORMAT -+{ -+ ULONG ulClkRange; // memory clock in 10kHz unit, when target memory clock is below this clock, use this memory timing -+ union{ -+ USHORT usMRS; // mode register -+ USHORT usDDR3_MR0; -+ }; -+ union{ -+ USHORT usEMRS; // extended mode register -+ USHORT usDDR3_MR1; -+ }; -+ UCHAR ucCL; // CAS latency -+ UCHAR ucWL; // WRITE Latency -+ UCHAR uctRAS; // tRAS -+ UCHAR uctRC; // tRC -+ UCHAR uctRFC; // tRFC -+ UCHAR uctRCDR; // tRCDR -+ UCHAR uctRCDW; // tRCDW -+ UCHAR uctRP; // tRP -+ UCHAR uctRRD; // tRRD -+ UCHAR uctWR; // tWR -+ UCHAR uctWTR; // tWTR -+ UCHAR uctPDIX; // tPDIX -+ UCHAR uctFAW; // tFAW -+ UCHAR uctAOND; // tAOND -+ union -+ { -+ struct { -+ UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon -+ UCHAR ucReserved; -+ }; -+ USHORT usDDR3_MR2; -+ }; -+}ATOM_MEMORY_TIMING_FORMAT; -+ -+ -+typedef struct _ATOM_MEMORY_TIMING_FORMAT_V1 -+{ -+ ULONG ulClkRange; // memory clock in 10kHz unit, when target memory clock is below this clock, use this memory timing -+ USHORT usMRS; // mode register -+ USHORT usEMRS; // extended mode register -+ UCHAR ucCL; // CAS latency -+ UCHAR ucWL; // WRITE Latency -+ UCHAR uctRAS; // tRAS -+ UCHAR uctRC; // tRC -+ UCHAR uctRFC; // tRFC -+ UCHAR uctRCDR; // tRCDR -+ UCHAR uctRCDW; // tRCDW -+ UCHAR uctRP; // tRP -+ UCHAR uctRRD; // tRRD -+ UCHAR uctWR; // tWR -+ UCHAR uctWTR; // tWTR -+ UCHAR uctPDIX; // tPDIX -+ UCHAR uctFAW; // tFAW -+ UCHAR uctAOND; // tAOND -+ UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon -+////////////////////////////////////GDDR parameters/////////////////////////////////// -+ UCHAR uctCCDL; // -+ UCHAR uctCRCRL; // -+ UCHAR uctCRCWL; // -+ UCHAR uctCKE; // -+ UCHAR uctCKRSE; // -+ UCHAR uctCKRSX; // -+ UCHAR uctFAW32; // -+ UCHAR ucMR5lo; // -+ UCHAR ucMR5hi; // -+ UCHAR ucTerminator; -+}ATOM_MEMORY_TIMING_FORMAT_V1; -+ -+typedef struct _ATOM_MEMORY_TIMING_FORMAT_V2 -+{ -+ ULONG ulClkRange; // memory clock in 10kHz unit, when target memory clock is below this clock, use this memory timing -+ USHORT usMRS; // mode register -+ USHORT usEMRS; // extended mode register -+ UCHAR ucCL; // CAS latency -+ UCHAR ucWL; // WRITE Latency -+ UCHAR uctRAS; // tRAS -+ UCHAR uctRC; // tRC -+ UCHAR uctRFC; // tRFC -+ UCHAR uctRCDR; // tRCDR -+ UCHAR uctRCDW; // tRCDW -+ UCHAR uctRP; // tRP -+ UCHAR uctRRD; // tRRD -+ UCHAR uctWR; // tWR -+ UCHAR uctWTR; // tWTR -+ UCHAR uctPDIX; // tPDIX -+ UCHAR uctFAW; // tFAW -+ UCHAR uctAOND; // tAOND -+ UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon -+////////////////////////////////////GDDR parameters/////////////////////////////////// -+ UCHAR uctCCDL; // -+ UCHAR uctCRCRL; // -+ UCHAR uctCRCWL; // -+ UCHAR uctCKE; // -+ UCHAR uctCKRSE; // -+ UCHAR uctCKRSX; // -+ UCHAR uctFAW32; // -+ UCHAR ucMR4lo; // -+ UCHAR ucMR4hi; // -+ UCHAR ucMR5lo; // -+ UCHAR ucMR5hi; // -+ UCHAR ucTerminator; -+ UCHAR ucReserved; -+}ATOM_MEMORY_TIMING_FORMAT_V2; -+ -+typedef struct _ATOM_MEMORY_FORMAT -+{ -+ ULONG ulDllDisClock; // memory DLL will be disable when target memory clock is below this clock -+ union{ -+ USHORT usEMRS2Value; // EMRS2 Value is used for GDDR2 and GDDR4 memory type -+ USHORT usDDR3_Reserved; // Not used for DDR3 memory -+ }; -+ union{ -+ USHORT usEMRS3Value; // EMRS3 Value is used for GDDR2 and GDDR4 memory type -+ USHORT usDDR3_MR3; // Used for DDR3 memory -+ }; -+ UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] - must not be used for now; -+ UCHAR ucMemoryVenderID; // Predefined,never change across designs or memory type/vender. If not predefined, vendor detection table gets executed -+ UCHAR ucRow; // Number of Row,in power of 2; -+ UCHAR ucColumn; // Number of Column,in power of 2; -+ UCHAR ucBank; // Nunber of Bank; -+ UCHAR ucRank; // Number of Rank, in power of 2 -+ UCHAR ucBurstSize; // burst size, 0= burst size=4 1= burst size=8 -+ UCHAR ucDllDisBit; // position of DLL Enable/Disable bit in EMRS ( Extended Mode Register ) -+ UCHAR ucRefreshRateFactor; // memory refresh rate in unit of ms -+ UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16 -+ UCHAR ucPreamble; //[7:4] Write Preamble, [3:0] Read Preamble -+ UCHAR ucMemAttrib; // Memory Device Addribute, like RDBI/WDBI etc -+ ATOM_MEMORY_TIMING_FORMAT asMemTiming[5]; //Memory Timing block sort from lower clock to higher clock -+}ATOM_MEMORY_FORMAT; -+ -+ -+typedef struct _ATOM_VRAM_MODULE_V3 -+{ -+ ULONG ulChannelMapCfg; // board dependent paramenter:Channel combination -+ USHORT usSize; // size of ATOM_VRAM_MODULE_V3 -+ USHORT usDefaultMVDDQ; // board dependent parameter:Default Memory Core Voltage -+ USHORT usDefaultMVDDC; // board dependent parameter:Default Memory IO Voltage -+ UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module -+ UCHAR ucChannelNum; // board dependent parameter:Number of channel; -+ UCHAR ucChannelSize; // board dependent parameter:32bit or 64bit -+ UCHAR ucVREFI; // board dependnt parameter: EXT or INT +160mv to -140mv -+ UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters -+ UCHAR ucFlag; // To enable/disable functionalities based on memory type -+ ATOM_MEMORY_FORMAT asMemory; // describ all of video memory parameters from memory spec -+}ATOM_VRAM_MODULE_V3; -+ -+ -+//ATOM_VRAM_MODULE_V3.ucNPL_RT - #define NPL_RT_MASK 0x0f - #define BATTERY_ODT_MASK 0xc0 - - #define ATOM_VRAM_MODULE ATOM_VRAM_MODULE_V3 - --typedef struct _ATOM_VRAM_MODULE_V4 { -- ULONG ulChannelMapCfg; /* board dependent parameter: Channel combination */ -- USHORT usModuleSize; /* size of ATOM_VRAM_MODULE_V4, make it easy for VBIOS to look for next entry of VRAM_MODULE */ -- USHORT usPrivateReserved; /* BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!! */ -- /* MC_ARB_RAMCFG (includes NOOFBANK,NOOFRANKS,NOOFROWS,NOOFCOLS) */ -- USHORT usReserved; -- UCHAR ucExtMemoryID; /* An external indicator (by hardcode, callback or pin) to tell what is the current memory module */ -- UCHAR ucMemoryType; /* [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now; */ -- UCHAR ucChannelNum; /* Number of channels present in this module config */ -- UCHAR ucChannelWidth; /* 0 - 32 bits; 1 - 64 bits */ -- UCHAR ucDensity; /* _8Mx32, _16Mx32, _16Mx16, _32Mx16 */ -- UCHAR ucFlag; /* To enable/disable functionalities based on memory type */ -- UCHAR ucMisc; /* bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8 */ -- UCHAR ucVREFI; /* board dependent parameter */ -- UCHAR ucNPL_RT; /* board dependent parameter:NPL round trip delay, used for calculate memory timing parameters */ -- UCHAR ucPreamble; /* [7:4] Write Preamble, [3:0] Read Preamble */ -- UCHAR ucMemorySize; /* BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!! */ -- /* Total memory size in unit of 16MB for CONFIG_MEMSIZE - bit[23:0] zeros */ -- UCHAR ucReserved[3]; -- --/* compare with V3, we flat the struct by merging ATOM_MEMORY_FORMAT (as is) into V4 as the same level */ -- union { -- USHORT usEMRS2Value; /* EMRS2 Value is used for GDDR2 and GDDR4 memory type */ -- USHORT usDDR3_Reserved; -- }; -- union { -- USHORT usEMRS3Value; /* EMRS3 Value is used for GDDR2 and GDDR4 memory type */ -- USHORT usDDR3_MR3; /* Used for DDR3 memory */ -- }; -- UCHAR ucMemoryVenderID; /* Predefined, If not predefined, vendor detection table gets executed */ -- UCHAR ucRefreshRateFactor; /* [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms) */ -- UCHAR ucReserved2[2]; -- ATOM_MEMORY_TIMING_FORMAT asMemTiming[5]; /* Memory Timing block sort from lower clock to higher clock */ --} ATOM_VRAM_MODULE_V4; -+typedef struct _ATOM_VRAM_MODULE_V4 -+{ -+ ULONG ulChannelMapCfg; // board dependent parameter: Channel combination -+ USHORT usModuleSize; // size of ATOM_VRAM_MODULE_V4, make it easy for VBIOS to look for next entry of VRAM_MODULE -+ USHORT usPrivateReserved; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!! -+ // MC_ARB_RAMCFG (includes NOOFBANK,NOOFRANKS,NOOFROWS,NOOFCOLS) -+ USHORT usReserved; -+ UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module -+ UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now; -+ UCHAR ucChannelNum; // Number of channels present in this module config -+ UCHAR ucChannelWidth; // 0 - 32 bits; 1 - 64 bits -+ UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16 -+ UCHAR ucFlag; // To enable/disable functionalities based on memory type -+ UCHAR ucMisc; // bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8 -+ UCHAR ucVREFI; // board dependent parameter -+ UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters -+ UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble -+ UCHAR ucMemorySize; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!! -+ // Total memory size in unit of 16MB for CONFIG_MEMSIZE - bit[23:0] zeros -+ UCHAR ucReserved[3]; -+ -+//compare with V3, we flat the struct by merging ATOM_MEMORY_FORMAT (as is) into V4 as the same level -+ union{ -+ USHORT usEMRS2Value; // EMRS2 Value is used for GDDR2 and GDDR4 memory type -+ USHORT usDDR3_Reserved; -+ }; -+ union{ -+ USHORT usEMRS3Value; // EMRS3 Value is used for GDDR2 and GDDR4 memory type -+ USHORT usDDR3_MR3; // Used for DDR3 memory -+ }; -+ UCHAR ucMemoryVenderID; // Predefined, If not predefined, vendor detection table gets executed -+ UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms) -+ UCHAR ucReserved2[2]; -+ ATOM_MEMORY_TIMING_FORMAT asMemTiming[5];//Memory Timing block sort from lower clock to higher clock -+}ATOM_VRAM_MODULE_V4; - - #define VRAM_MODULE_V4_MISC_RANK_MASK 0x3 - #define VRAM_MODULE_V4_MISC_DUAL_RANK 0x1 -@@ -3973,96 +4841,139 @@ typedef struct _ATOM_VRAM_MODULE_V4 { - #define VRAM_MODULE_V4_MISC_BL8 0x4 - #define VRAM_MODULE_V4_MISC_DUAL_CS 0x10 - --typedef struct _ATOM_VRAM_MODULE_V5 { -- ULONG ulChannelMapCfg; /* board dependent parameter: Channel combination */ -- USHORT usModuleSize; /* size of ATOM_VRAM_MODULE_V4, make it easy for VBIOS to look for next entry of VRAM_MODULE */ -- USHORT usPrivateReserved; /* BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!! */ -- /* MC_ARB_RAMCFG (includes NOOFBANK,NOOFRANKS,NOOFROWS,NOOFCOLS) */ -- USHORT usReserved; -- UCHAR ucExtMemoryID; /* An external indicator (by hardcode, callback or pin) to tell what is the current memory module */ -- UCHAR ucMemoryType; /* [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now; */ -- UCHAR ucChannelNum; /* Number of channels present in this module config */ -- UCHAR ucChannelWidth; /* 0 - 32 bits; 1 - 64 bits */ -- UCHAR ucDensity; /* _8Mx32, _16Mx32, _16Mx16, _32Mx16 */ -- UCHAR ucFlag; /* To enable/disable functionalities based on memory type */ -- UCHAR ucMisc; /* bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8 */ -- UCHAR ucVREFI; /* board dependent parameter */ -- UCHAR ucNPL_RT; /* board dependent parameter:NPL round trip delay, used for calculate memory timing parameters */ -- UCHAR ucPreamble; /* [7:4] Write Preamble, [3:0] Read Preamble */ -- UCHAR ucMemorySize; /* BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!! */ -- /* Total memory size in unit of 16MB for CONFIG_MEMSIZE - bit[23:0] zeros */ -- UCHAR ucReserved[3]; -+typedef struct _ATOM_VRAM_MODULE_V5 -+{ -+ ULONG ulChannelMapCfg; // board dependent parameter: Channel combination -+ USHORT usModuleSize; // size of ATOM_VRAM_MODULE_V4, make it easy for VBIOS to look for next entry of VRAM_MODULE -+ USHORT usPrivateReserved; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!! -+ // MC_ARB_RAMCFG (includes NOOFBANK,NOOFRANKS,NOOFROWS,NOOFCOLS) -+ USHORT usReserved; -+ UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module -+ UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now; -+ UCHAR ucChannelNum; // Number of channels present in this module config -+ UCHAR ucChannelWidth; // 0 - 32 bits; 1 - 64 bits -+ UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16 -+ UCHAR ucFlag; // To enable/disable functionalities based on memory type -+ UCHAR ucMisc; // bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8 -+ UCHAR ucVREFI; // board dependent parameter -+ UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters -+ UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble -+ UCHAR ucMemorySize; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!! -+ // Total memory size in unit of 16MB for CONFIG_MEMSIZE - bit[23:0] zeros -+ UCHAR ucReserved[3]; -+ -+//compare with V3, we flat the struct by merging ATOM_MEMORY_FORMAT (as is) into V4 as the same level -+ USHORT usEMRS2Value; // EMRS2 Value is used for GDDR2 and GDDR4 memory type -+ USHORT usEMRS3Value; // EMRS3 Value is used for GDDR2 and GDDR4 memory type -+ UCHAR ucMemoryVenderID; // Predefined, If not predefined, vendor detection table gets executed -+ UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms) -+ UCHAR ucFIFODepth; // FIFO depth supposes to be detected during vendor detection, but if we dont do vendor detection we have to hardcode FIFO Depth -+ UCHAR ucCDR_Bandwidth; // [0:3]=Read CDR bandwidth, [4:7] - Write CDR Bandwidth -+ ATOM_MEMORY_TIMING_FORMAT_V1 asMemTiming[5];//Memory Timing block sort from lower clock to higher clock -+}ATOM_VRAM_MODULE_V5; -+ -+typedef struct _ATOM_VRAM_MODULE_V6 -+{ -+ ULONG ulChannelMapCfg; // board dependent parameter: Channel combination -+ USHORT usModuleSize; // size of ATOM_VRAM_MODULE_V4, make it easy for VBIOS to look for next entry of VRAM_MODULE -+ USHORT usPrivateReserved; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!! -+ // MC_ARB_RAMCFG (includes NOOFBANK,NOOFRANKS,NOOFROWS,NOOFCOLS) -+ USHORT usReserved; -+ UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module -+ UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now; -+ UCHAR ucChannelNum; // Number of channels present in this module config -+ UCHAR ucChannelWidth; // 0 - 32 bits; 1 - 64 bits -+ UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16 -+ UCHAR ucFlag; // To enable/disable functionalities based on memory type -+ UCHAR ucMisc; // bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8 -+ UCHAR ucVREFI; // board dependent parameter -+ UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters -+ UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble -+ UCHAR ucMemorySize; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!! -+ // Total memory size in unit of 16MB for CONFIG_MEMSIZE - bit[23:0] zeros -+ UCHAR ucReserved[3]; -+ -+//compare with V3, we flat the struct by merging ATOM_MEMORY_FORMAT (as is) into V4 as the same level -+ USHORT usEMRS2Value; // EMRS2 Value is used for GDDR2 and GDDR4 memory type -+ USHORT usEMRS3Value; // EMRS3 Value is used for GDDR2 and GDDR4 memory type -+ UCHAR ucMemoryVenderID; // Predefined, If not predefined, vendor detection table gets executed -+ UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms) -+ UCHAR ucFIFODepth; // FIFO depth supposes to be detected during vendor detection, but if we dont do vendor detection we have to hardcode FIFO Depth -+ UCHAR ucCDR_Bandwidth; // [0:3]=Read CDR bandwidth, [4:7] - Write CDR Bandwidth -+ ATOM_MEMORY_TIMING_FORMAT_V2 asMemTiming[5];//Memory Timing block sort from lower clock to higher clock -+}ATOM_VRAM_MODULE_V6; -+ -+ -+ -+typedef struct _ATOM_VRAM_INFO_V2 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR ucNumOfVRAMModule; -+ ATOM_VRAM_MODULE aVramInfo[ATOM_MAX_NUMBER_OF_VRAM_MODULE]; // just for allocation, real number of blocks is in ucNumOfVRAMModule; -+}ATOM_VRAM_INFO_V2; - --/* compare with V3, we flat the struct by merging ATOM_MEMORY_FORMAT (as is) into V4 as the same level */ -- USHORT usEMRS2Value; /* EMRS2 Value is used for GDDR2 and GDDR4 memory type */ -- USHORT usEMRS3Value; /* EMRS3 Value is used for GDDR2 and GDDR4 memory type */ -- UCHAR ucMemoryVenderID; /* Predefined, If not predefined, vendor detection table gets executed */ -- UCHAR ucRefreshRateFactor; /* [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms) */ -- UCHAR ucFIFODepth; /* FIFO depth supposes to be detected during vendor detection, but if we dont do vendor detection we have to hardcode FIFO Depth */ -- UCHAR ucCDR_Bandwidth; /* [0:3]=Read CDR bandwidth, [4:7] - Write CDR Bandwidth */ -- ATOM_MEMORY_TIMING_FORMAT_V1 asMemTiming[5]; /* Memory Timing block sort from lower clock to higher clock */ --} ATOM_VRAM_MODULE_V5; -- --typedef struct _ATOM_VRAM_INFO_V2 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR ucNumOfVRAMModule; -- ATOM_VRAM_MODULE aVramInfo[ATOM_MAX_NUMBER_OF_VRAM_MODULE]; /* just for allocation, real number of blocks is in ucNumOfVRAMModule; */ --} ATOM_VRAM_INFO_V2; -- --typedef struct _ATOM_VRAM_INFO_V3 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usMemAdjustTblOffset; /* offset of ATOM_INIT_REG_BLOCK structure for memory vendor specific MC adjust setting */ -- USHORT usMemClkPatchTblOffset; /* offset of ATOM_INIT_REG_BLOCK structure for memory clock specific MC setting */ -- USHORT usRerseved; -- UCHAR aVID_PinsShift[9]; /* 8 bit strap maximum+terminator */ -- UCHAR ucNumOfVRAMModule; -- ATOM_VRAM_MODULE aVramInfo[ATOM_MAX_NUMBER_OF_VRAM_MODULE]; /* just for allocation, real number of blocks is in ucNumOfVRAMModule; */ -- ATOM_INIT_REG_BLOCK asMemPatch; /* for allocation */ -- /* ATOM_INIT_REG_BLOCK aMemAdjust; */ --} ATOM_VRAM_INFO_V3; -+typedef struct _ATOM_VRAM_INFO_V3 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usMemAdjustTblOffset; // offset of ATOM_INIT_REG_BLOCK structure for memory vendor specific MC adjust setting -+ USHORT usMemClkPatchTblOffset; // offset of ATOM_INIT_REG_BLOCK structure for memory clock specific MC setting -+ USHORT usRerseved; -+ UCHAR aVID_PinsShift[9]; // 8 bit strap maximum+terminator -+ UCHAR ucNumOfVRAMModule; -+ ATOM_VRAM_MODULE aVramInfo[ATOM_MAX_NUMBER_OF_VRAM_MODULE]; // just for allocation, real number of blocks is in ucNumOfVRAMModule; -+ ATOM_INIT_REG_BLOCK asMemPatch; // for allocation -+ // ATOM_INIT_REG_BLOCK aMemAdjust; -+}ATOM_VRAM_INFO_V3; - - #define ATOM_VRAM_INFO_LAST ATOM_VRAM_INFO_V3 - --typedef struct _ATOM_VRAM_INFO_V4 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usMemAdjustTblOffset; /* offset of ATOM_INIT_REG_BLOCK structure for memory vendor specific MC adjust setting */ -- USHORT usMemClkPatchTblOffset; /* offset of ATOM_INIT_REG_BLOCK structure for memory clock specific MC setting */ -- USHORT usRerseved; -- UCHAR ucMemDQ7_0ByteRemap; /* DQ line byte remap, =0: Memory Data line BYTE0, =1: BYTE1, =2: BYTE2, =3: BYTE3 */ -- ULONG ulMemDQ7_0BitRemap; /* each DQ line ( 7~0) use 3bits, like: DQ0=Bit[2:0], DQ1:[5:3], ... DQ7:[23:21] */ -- UCHAR ucReservde[4]; -- UCHAR ucNumOfVRAMModule; -- ATOM_VRAM_MODULE_V4 aVramInfo[ATOM_MAX_NUMBER_OF_VRAM_MODULE]; /* just for allocation, real number of blocks is in ucNumOfVRAMModule; */ -- ATOM_INIT_REG_BLOCK asMemPatch; /* for allocation */ -- /* ATOM_INIT_REG_BLOCK aMemAdjust; */ --} ATOM_VRAM_INFO_V4; -- --typedef struct _ATOM_VRAM_GPIO_DETECTION_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR aVID_PinsShift[9]; /* 8 bit strap maximum+terminator */ --} ATOM_VRAM_GPIO_DETECTION_INFO; -- --typedef struct _ATOM_MEMORY_TRAINING_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR ucTrainingLoop; -- UCHAR ucReserved[3]; -- ATOM_INIT_REG_BLOCK asMemTrainingSetting; --} ATOM_MEMORY_TRAINING_INFO; -- --typedef struct SW_I2C_CNTL_DATA_PARAMETERS { -- UCHAR ucControl; -- UCHAR ucData; -- UCHAR ucSatus; -- UCHAR ucTemp; -+typedef struct _ATOM_VRAM_INFO_V4 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usMemAdjustTblOffset; // offset of ATOM_INIT_REG_BLOCK structure for memory vendor specific MC adjust setting -+ USHORT usMemClkPatchTblOffset; // offset of ATOM_INIT_REG_BLOCK structure for memory clock specific MC setting -+ USHORT usRerseved; -+ UCHAR ucMemDQ7_0ByteRemap; // DQ line byte remap, =0: Memory Data line BYTE0, =1: BYTE1, =2: BYTE2, =3: BYTE3 -+ ULONG ulMemDQ7_0BitRemap; // each DQ line ( 7~0) use 3bits, like: DQ0=Bit[2:0], DQ1:[5:3], ... DQ7:[23:21] -+ UCHAR ucReservde[4]; -+ UCHAR ucNumOfVRAMModule; -+ ATOM_VRAM_MODULE_V4 aVramInfo[ATOM_MAX_NUMBER_OF_VRAM_MODULE]; // just for allocation, real number of blocks is in ucNumOfVRAMModule; -+ ATOM_INIT_REG_BLOCK asMemPatch; // for allocation -+ // ATOM_INIT_REG_BLOCK aMemAdjust; -+}ATOM_VRAM_INFO_V4; -+ -+typedef struct _ATOM_VRAM_GPIO_DETECTION_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR aVID_PinsShift[9]; //8 bit strap maximum+terminator -+}ATOM_VRAM_GPIO_DETECTION_INFO; -+ -+ -+typedef struct _ATOM_MEMORY_TRAINING_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR ucTrainingLoop; -+ UCHAR ucReserved[3]; -+ ATOM_INIT_REG_BLOCK asMemTrainingSetting; -+}ATOM_MEMORY_TRAINING_INFO; -+ -+ -+typedef struct SW_I2C_CNTL_DATA_PARAMETERS -+{ -+ UCHAR ucControl; -+ UCHAR ucData; -+ UCHAR ucSatus; -+ UCHAR ucTemp; - } SW_I2C_CNTL_DATA_PARAMETERS; - - #define SW_I2C_CNTL_DATA_PS_ALLOCATION SW_I2C_CNTL_DATA_PARAMETERS - --typedef struct _SW_I2C_IO_DATA_PARAMETERS { -- USHORT GPIO_Info; -- UCHAR ucAct; -- UCHAR ucData; --} SW_I2C_IO_DATA_PARAMETERS; -+typedef struct _SW_I2C_IO_DATA_PARAMETERS -+{ -+ USHORT GPIO_Info; -+ UCHAR ucAct; -+ UCHAR ucData; -+ } SW_I2C_IO_DATA_PARAMETERS; - - #define SW_I2C_IO_DATA_PS_ALLOCATION SW_I2C_IO_DATA_PARAMETERS - -@@ -4087,127 +4998,136 @@ typedef struct _SW_I2C_IO_DATA_PARAMETERS { - #define SW_I2C_CNTL_CLOSE 5 - #define SW_I2C_CNTL_WRITE1BIT 6 - --/* ==============================VESA definition Portion=============================== */ -+//==============================VESA definition Portion=============================== - #define VESA_OEM_PRODUCT_REV '01.00' --#define VESA_MODE_ATTRIBUTE_MODE_SUPPORT 0xBB /* refer to VBE spec p.32, no TTY support */ -+#define VESA_MODE_ATTRIBUTE_MODE_SUPPORT 0xBB //refer to VBE spec p.32, no TTY support - #define VESA_MODE_WIN_ATTRIBUTE 7 - #define VESA_WIN_SIZE 64 - --typedef struct _PTR_32_BIT_STRUCTURE { -- USHORT Offset16; -- USHORT Segment16; -+typedef struct _PTR_32_BIT_STRUCTURE -+{ -+ USHORT Offset16; -+ USHORT Segment16; - } PTR_32_BIT_STRUCTURE; - --typedef union _PTR_32_BIT_UNION { -- PTR_32_BIT_STRUCTURE SegmentOffset; -- ULONG Ptr32_Bit; -+typedef union _PTR_32_BIT_UNION -+{ -+ PTR_32_BIT_STRUCTURE SegmentOffset; -+ ULONG Ptr32_Bit; - } PTR_32_BIT_UNION; - --typedef struct _VBE_1_2_INFO_BLOCK_UPDATABLE { -- UCHAR VbeSignature[4]; -- USHORT VbeVersion; -- PTR_32_BIT_UNION OemStringPtr; -- UCHAR Capabilities[4]; -- PTR_32_BIT_UNION VideoModePtr; -- USHORT TotalMemory; -+typedef struct _VBE_1_2_INFO_BLOCK_UPDATABLE -+{ -+ UCHAR VbeSignature[4]; -+ USHORT VbeVersion; -+ PTR_32_BIT_UNION OemStringPtr; -+ UCHAR Capabilities[4]; -+ PTR_32_BIT_UNION VideoModePtr; -+ USHORT TotalMemory; - } VBE_1_2_INFO_BLOCK_UPDATABLE; - --typedef struct _VBE_2_0_INFO_BLOCK_UPDATABLE { -- VBE_1_2_INFO_BLOCK_UPDATABLE CommonBlock; -- USHORT OemSoftRev; -- PTR_32_BIT_UNION OemVendorNamePtr; -- PTR_32_BIT_UNION OemProductNamePtr; -- PTR_32_BIT_UNION OemProductRevPtr; -+ -+typedef struct _VBE_2_0_INFO_BLOCK_UPDATABLE -+{ -+ VBE_1_2_INFO_BLOCK_UPDATABLE CommonBlock; -+ USHORT OemSoftRev; -+ PTR_32_BIT_UNION OemVendorNamePtr; -+ PTR_32_BIT_UNION OemProductNamePtr; -+ PTR_32_BIT_UNION OemProductRevPtr; - } VBE_2_0_INFO_BLOCK_UPDATABLE; - --typedef union _VBE_VERSION_UNION { -- VBE_2_0_INFO_BLOCK_UPDATABLE VBE_2_0_InfoBlock; -- VBE_1_2_INFO_BLOCK_UPDATABLE VBE_1_2_InfoBlock; -+typedef union _VBE_VERSION_UNION -+{ -+ VBE_2_0_INFO_BLOCK_UPDATABLE VBE_2_0_InfoBlock; -+ VBE_1_2_INFO_BLOCK_UPDATABLE VBE_1_2_InfoBlock; - } VBE_VERSION_UNION; - --typedef struct _VBE_INFO_BLOCK { -- VBE_VERSION_UNION UpdatableVBE_Info; -- UCHAR Reserved[222]; -- UCHAR OemData[256]; -+typedef struct _VBE_INFO_BLOCK -+{ -+ VBE_VERSION_UNION UpdatableVBE_Info; -+ UCHAR Reserved[222]; -+ UCHAR OemData[256]; - } VBE_INFO_BLOCK; - --typedef struct _VBE_FP_INFO { -- USHORT HSize; -- USHORT VSize; -- USHORT FPType; -- UCHAR RedBPP; -- UCHAR GreenBPP; -- UCHAR BlueBPP; -- UCHAR ReservedBPP; -- ULONG RsvdOffScrnMemSize; -- ULONG RsvdOffScrnMEmPtr; -- UCHAR Reserved[14]; -+typedef struct _VBE_FP_INFO -+{ -+ USHORT HSize; -+ USHORT VSize; -+ USHORT FPType; -+ UCHAR RedBPP; -+ UCHAR GreenBPP; -+ UCHAR BlueBPP; -+ UCHAR ReservedBPP; -+ ULONG RsvdOffScrnMemSize; -+ ULONG RsvdOffScrnMEmPtr; -+ UCHAR Reserved[14]; - } VBE_FP_INFO; - --typedef struct _VESA_MODE_INFO_BLOCK { --/* Mandatory information for all VBE revisions */ -- USHORT ModeAttributes; /* dw ? ; mode attributes */ -- UCHAR WinAAttributes; /* db ? ; window A attributes */ -- UCHAR WinBAttributes; /* db ? ; window B attributes */ -- USHORT WinGranularity; /* dw ? ; window granularity */ -- USHORT WinSize; /* dw ? ; window size */ -- USHORT WinASegment; /* dw ? ; window A start segment */ -- USHORT WinBSegment; /* dw ? ; window B start segment */ -- ULONG WinFuncPtr; /* dd ? ; real mode pointer to window function */ -- USHORT BytesPerScanLine; /* dw ? ; bytes per scan line */ -- --/* ; Mandatory information for VBE 1.2 and above */ -- USHORT XResolution; /* dw ? ; horizontal resolution in pixels or characters */ -- USHORT YResolution; /* dw ? ; vertical resolution in pixels or characters */ -- UCHAR XCharSize; /* db ? ; character cell width in pixels */ -- UCHAR YCharSize; /* db ? ; character cell height in pixels */ -- UCHAR NumberOfPlanes; /* db ? ; number of memory planes */ -- UCHAR BitsPerPixel; /* db ? ; bits per pixel */ -- UCHAR NumberOfBanks; /* db ? ; number of banks */ -- UCHAR MemoryModel; /* db ? ; memory model type */ -- UCHAR BankSize; /* db ? ; bank size in KB */ -- UCHAR NumberOfImagePages; /* db ? ; number of images */ -- UCHAR ReservedForPageFunction; /* db 1 ; reserved for page function */ -- --/* ; Direct Color fields(required for direct/6 and YUV/7 memory models) */ -- UCHAR RedMaskSize; /* db ? ; size of direct color red mask in bits */ -- UCHAR RedFieldPosition; /* db ? ; bit position of lsb of red mask */ -- UCHAR GreenMaskSize; /* db ? ; size of direct color green mask in bits */ -- UCHAR GreenFieldPosition; /* db ? ; bit position of lsb of green mask */ -- UCHAR BlueMaskSize; /* db ? ; size of direct color blue mask in bits */ -- UCHAR BlueFieldPosition; /* db ? ; bit position of lsb of blue mask */ -- UCHAR RsvdMaskSize; /* db ? ; size of direct color reserved mask in bits */ -- UCHAR RsvdFieldPosition; /* db ? ; bit position of lsb of reserved mask */ -- UCHAR DirectColorModeInfo; /* db ? ; direct color mode attributes */ -- --/* ; Mandatory information for VBE 2.0 and above */ -- ULONG PhysBasePtr; /* dd ? ; physical address for flat memory frame buffer */ -- ULONG Reserved_1; /* dd 0 ; reserved - always set to 0 */ -- USHORT Reserved_2; /* dw 0 ; reserved - always set to 0 */ -- --/* ; Mandatory information for VBE 3.0 and above */ -- USHORT LinBytesPerScanLine; /* dw ? ; bytes per scan line for linear modes */ -- UCHAR BnkNumberOfImagePages; /* db ? ; number of images for banked modes */ -- UCHAR LinNumberOfImagPages; /* db ? ; number of images for linear modes */ -- UCHAR LinRedMaskSize; /* db ? ; size of direct color red mask(linear modes) */ -- UCHAR LinRedFieldPosition; /* db ? ; bit position of lsb of red mask(linear modes) */ -- UCHAR LinGreenMaskSize; /* db ? ; size of direct color green mask(linear modes) */ -- UCHAR LinGreenFieldPosition; /* db ? ; bit position of lsb of green mask(linear modes) */ -- UCHAR LinBlueMaskSize; /* db ? ; size of direct color blue mask(linear modes) */ -- UCHAR LinBlueFieldPosition; /* db ? ; bit position of lsb of blue mask(linear modes) */ -- UCHAR LinRsvdMaskSize; /* db ? ; size of direct color reserved mask(linear modes) */ -- UCHAR LinRsvdFieldPosition; /* db ? ; bit position of lsb of reserved mask(linear modes) */ -- ULONG MaxPixelClock; /* dd ? ; maximum pixel clock(in Hz) for graphics mode */ -- UCHAR Reserved; /* db 190 dup (0) */ -+typedef struct _VESA_MODE_INFO_BLOCK -+{ -+// Mandatory information for all VBE revisions -+ USHORT ModeAttributes; // dw ? ; mode attributes -+ UCHAR WinAAttributes; // db ? ; window A attributes -+ UCHAR WinBAttributes; // db ? ; window B attributes -+ USHORT WinGranularity; // dw ? ; window granularity -+ USHORT WinSize; // dw ? ; window size -+ USHORT WinASegment; // dw ? ; window A start segment -+ USHORT WinBSegment; // dw ? ; window B start segment -+ ULONG WinFuncPtr; // dd ? ; real mode pointer to window function -+ USHORT BytesPerScanLine;// dw ? ; bytes per scan line -+ -+//; Mandatory information for VBE 1.2 and above -+ USHORT XResolution; // dw ? ; horizontal resolution in pixels or characters -+ USHORT YResolution; // dw ? ; vertical resolution in pixels or characters -+ UCHAR XCharSize; // db ? ; character cell width in pixels -+ UCHAR YCharSize; // db ? ; character cell height in pixels -+ UCHAR NumberOfPlanes; // db ? ; number of memory planes -+ UCHAR BitsPerPixel; // db ? ; bits per pixel -+ UCHAR NumberOfBanks; // db ? ; number of banks -+ UCHAR MemoryModel; // db ? ; memory model type -+ UCHAR BankSize; // db ? ; bank size in KB -+ UCHAR NumberOfImagePages;// db ? ; number of images -+ UCHAR ReservedForPageFunction;//db 1 ; reserved for page function -+ -+//; Direct Color fields(required for direct/6 and YUV/7 memory models) -+ UCHAR RedMaskSize; // db ? ; size of direct color red mask in bits -+ UCHAR RedFieldPosition; // db ? ; bit position of lsb of red mask -+ UCHAR GreenMaskSize; // db ? ; size of direct color green mask in bits -+ UCHAR GreenFieldPosition; // db ? ; bit position of lsb of green mask -+ UCHAR BlueMaskSize; // db ? ; size of direct color blue mask in bits -+ UCHAR BlueFieldPosition; // db ? ; bit position of lsb of blue mask -+ UCHAR RsvdMaskSize; // db ? ; size of direct color reserved mask in bits -+ UCHAR RsvdFieldPosition; // db ? ; bit position of lsb of reserved mask -+ UCHAR DirectColorModeInfo;// db ? ; direct color mode attributes -+ -+//; Mandatory information for VBE 2.0 and above -+ ULONG PhysBasePtr; // dd ? ; physical address for flat memory frame buffer -+ ULONG Reserved_1; // dd 0 ; reserved - always set to 0 -+ USHORT Reserved_2; // dw 0 ; reserved - always set to 0 -+ -+//; Mandatory information for VBE 3.0 and above -+ USHORT LinBytesPerScanLine; // dw ? ; bytes per scan line for linear modes -+ UCHAR BnkNumberOfImagePages;// db ? ; number of images for banked modes -+ UCHAR LinNumberOfImagPages; // db ? ; number of images for linear modes -+ UCHAR LinRedMaskSize; // db ? ; size of direct color red mask(linear modes) -+ UCHAR LinRedFieldPosition; // db ? ; bit position of lsb of red mask(linear modes) -+ UCHAR LinGreenMaskSize; // db ? ; size of direct color green mask(linear modes) -+ UCHAR LinGreenFieldPosition;// db ? ; bit position of lsb of green mask(linear modes) -+ UCHAR LinBlueMaskSize; // db ? ; size of direct color blue mask(linear modes) -+ UCHAR LinBlueFieldPosition; // db ? ; bit position of lsb of blue mask(linear modes) -+ UCHAR LinRsvdMaskSize; // db ? ; size of direct color reserved mask(linear modes) -+ UCHAR LinRsvdFieldPosition; // db ? ; bit position of lsb of reserved mask(linear modes) -+ ULONG MaxPixelClock; // dd ? ; maximum pixel clock(in Hz) for graphics mode -+ UCHAR Reserved; // db 190 dup (0) - } VESA_MODE_INFO_BLOCK; - --/* BIOS function CALLS */ --#define ATOM_BIOS_EXTENDED_FUNCTION_CODE 0xA0 /* ATI Extended Function code */ -+// BIOS function CALLS -+#define ATOM_BIOS_EXTENDED_FUNCTION_CODE 0xA0 // ATI Extended Function code - #define ATOM_BIOS_FUNCTION_COP_MODE 0x00 - #define ATOM_BIOS_FUNCTION_SHORT_QUERY1 0x04 - #define ATOM_BIOS_FUNCTION_SHORT_QUERY2 0x05 - #define ATOM_BIOS_FUNCTION_SHORT_QUERY3 0x06 --#define ATOM_BIOS_FUNCTION_GET_DDC 0x0B -+#define ATOM_BIOS_FUNCTION_GET_DDC 0x0B - #define ATOM_BIOS_FUNCTION_ASIC_DSTATE 0x0E - #define ATOM_BIOS_FUNCTION_DEBUG_PLAY 0x0F - #define ATOM_BIOS_FUNCTION_STV_STD 0x16 -@@ -4217,100 +5137,135 @@ typedef struct _VESA_MODE_INFO_BLOCK { - #define ATOM_BIOS_FUNCTION_PANEL_CONTROL 0x82 - #define ATOM_BIOS_FUNCTION_OLD_DEVICE_DET 0x83 - #define ATOM_BIOS_FUNCTION_OLD_DEVICE_SWITCH 0x84 --#define ATOM_BIOS_FUNCTION_HW_ICON 0x8A -+#define ATOM_BIOS_FUNCTION_HW_ICON 0x8A - #define ATOM_BIOS_FUNCTION_SET_CMOS 0x8B --#define SUB_FUNCTION_UPDATE_DISPLAY_INFO 0x8000 /* Sub function 80 */ --#define SUB_FUNCTION_UPDATE_EXPANSION_INFO 0x8100 /* Sub function 80 */ -+#define SUB_FUNCTION_UPDATE_DISPLAY_INFO 0x8000 // Sub function 80 -+#define SUB_FUNCTION_UPDATE_EXPANSION_INFO 0x8100 // Sub function 80 - - #define ATOM_BIOS_FUNCTION_DISPLAY_INFO 0x8D - #define ATOM_BIOS_FUNCTION_DEVICE_ON_OFF 0x8E --#define ATOM_BIOS_FUNCTION_VIDEO_STATE 0x8F --#define ATOM_SUB_FUNCTION_GET_CRITICAL_STATE 0x0300 /* Sub function 03 */ --#define ATOM_SUB_FUNCTION_GET_LIDSTATE 0x0700 /* Sub function 7 */ --#define ATOM_SUB_FUNCTION_THERMAL_STATE_NOTICE 0x1400 /* Notify caller the current thermal state */ --#define ATOM_SUB_FUNCTION_CRITICAL_STATE_NOTICE 0x8300 /* Notify caller the current critical state */ --#define ATOM_SUB_FUNCTION_SET_LIDSTATE 0x8500 /* Sub function 85 */ --#define ATOM_SUB_FUNCTION_GET_REQ_DISPLAY_FROM_SBIOS_MODE 0x8900 /* Sub function 89 */ --#define ATOM_SUB_FUNCTION_INFORM_ADC_SUPPORT 0x9400 /* Notify caller that ADC is supported */ -- --#define ATOM_BIOS_FUNCTION_VESA_DPMS 0x4F10 /* Set DPMS */ --#define ATOM_SUB_FUNCTION_SET_DPMS 0x0001 /* BL: Sub function 01 */ --#define ATOM_SUB_FUNCTION_GET_DPMS 0x0002 /* BL: Sub function 02 */ --#define ATOM_PARAMETER_VESA_DPMS_ON 0x0000 /* BH Parameter for DPMS ON. */ --#define ATOM_PARAMETER_VESA_DPMS_STANDBY 0x0100 /* BH Parameter for DPMS STANDBY */ --#define ATOM_PARAMETER_VESA_DPMS_SUSPEND 0x0200 /* BH Parameter for DPMS SUSPEND */ --#define ATOM_PARAMETER_VESA_DPMS_OFF 0x0400 /* BH Parameter for DPMS OFF */ --#define ATOM_PARAMETER_VESA_DPMS_REDUCE_ON 0x0800 /* BH Parameter for DPMS REDUCE ON (NOT SUPPORTED) */ -+#define ATOM_BIOS_FUNCTION_VIDEO_STATE 0x8F -+#define ATOM_SUB_FUNCTION_GET_CRITICAL_STATE 0x0300 // Sub function 03 -+#define ATOM_SUB_FUNCTION_GET_LIDSTATE 0x0700 // Sub function 7 -+#define ATOM_SUB_FUNCTION_THERMAL_STATE_NOTICE 0x1400 // Notify caller the current thermal state -+#define ATOM_SUB_FUNCTION_CRITICAL_STATE_NOTICE 0x8300 // Notify caller the current critical state -+#define ATOM_SUB_FUNCTION_SET_LIDSTATE 0x8500 // Sub function 85 -+#define ATOM_SUB_FUNCTION_GET_REQ_DISPLAY_FROM_SBIOS_MODE 0x8900// Sub function 89 -+#define ATOM_SUB_FUNCTION_INFORM_ADC_SUPPORT 0x9400 // Notify caller that ADC is supported -+ -+ -+#define ATOM_BIOS_FUNCTION_VESA_DPMS 0x4F10 // Set DPMS -+#define ATOM_SUB_FUNCTION_SET_DPMS 0x0001 // BL: Sub function 01 -+#define ATOM_SUB_FUNCTION_GET_DPMS 0x0002 // BL: Sub function 02 -+#define ATOM_PARAMETER_VESA_DPMS_ON 0x0000 // BH Parameter for DPMS ON. -+#define ATOM_PARAMETER_VESA_DPMS_STANDBY 0x0100 // BH Parameter for DPMS STANDBY -+#define ATOM_PARAMETER_VESA_DPMS_SUSPEND 0x0200 // BH Parameter for DPMS SUSPEND -+#define ATOM_PARAMETER_VESA_DPMS_OFF 0x0400 // BH Parameter for DPMS OFF -+#define ATOM_PARAMETER_VESA_DPMS_REDUCE_ON 0x0800 // BH Parameter for DPMS REDUCE ON (NOT SUPPORTED) - - #define ATOM_BIOS_RETURN_CODE_MASK 0x0000FF00L - #define ATOM_BIOS_REG_HIGH_MASK 0x0000FF00L - #define ATOM_BIOS_REG_LOW_MASK 0x000000FFL - --/* structure used for VBIOS only */ -+// structure used for VBIOS only - --/* DispOutInfoTable */ --typedef struct _ASIC_TRANSMITTER_INFO { -+//DispOutInfoTable -+typedef struct _ASIC_TRANSMITTER_INFO -+{ - USHORT usTransmitterObjId; - USHORT usSupportDevice; -- UCHAR ucTransmitterCmdTblId; -- UCHAR ucConfig; -- UCHAR ucEncoderID; /* available 1st encoder ( default ) */ -- UCHAR ucOptionEncoderID; /* available 2nd encoder ( optional ) */ -- UCHAR uc2ndEncoderID; -- UCHAR ucReserved; --} ASIC_TRANSMITTER_INFO; -- --typedef struct _ASIC_ENCODER_INFO { -+ UCHAR ucTransmitterCmdTblId; -+ UCHAR ucConfig; -+ UCHAR ucEncoderID; //available 1st encoder ( default ) -+ UCHAR ucOptionEncoderID; //available 2nd encoder ( optional ) -+ UCHAR uc2ndEncoderID; -+ UCHAR ucReserved; -+}ASIC_TRANSMITTER_INFO; -+ -+typedef struct _ASIC_ENCODER_INFO -+{ - UCHAR ucEncoderID; - UCHAR ucEncoderConfig; -- USHORT usEncoderCmdTblId; --} ASIC_ENCODER_INFO; -+ USHORT usEncoderCmdTblId; -+}ASIC_ENCODER_INFO; -+ -+typedef struct _ATOM_DISP_OUT_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT ptrTransmitterInfo; -+ USHORT ptrEncoderInfo; -+ ASIC_TRANSMITTER_INFO asTransmitterInfo[1]; -+ ASIC_ENCODER_INFO asEncoderInfo[1]; -+}ATOM_DISP_OUT_INFO; - --typedef struct _ATOM_DISP_OUT_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -+typedef struct _ATOM_DISP_OUT_INFO_V2 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; - USHORT ptrTransmitterInfo; - USHORT ptrEncoderInfo; -- ASIC_TRANSMITTER_INFO asTransmitterInfo[1]; -- ASIC_ENCODER_INFO asEncoderInfo[1]; --} ATOM_DISP_OUT_INFO; -+ USHORT ptrMainCallParserFar; // direct address of main parser call in VBIOS binary. -+ ASIC_TRANSMITTER_INFO asTransmitterInfo[1]; -+ ASIC_ENCODER_INFO asEncoderInfo[1]; -+}ATOM_DISP_OUT_INFO_V2; - --/* DispDevicePriorityInfo */ --typedef struct _ATOM_DISPLAY_DEVICE_PRIORITY_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -+// DispDevicePriorityInfo -+typedef struct _ATOM_DISPLAY_DEVICE_PRIORITY_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; - USHORT asDevicePriority[16]; --} ATOM_DISPLAY_DEVICE_PRIORITY_INFO; -- --/* ProcessAuxChannelTransactionTable */ --typedef struct _PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS { -- USHORT lpAuxRequest; -- USHORT lpDataOut; -- UCHAR ucChannelID; -- union { -- UCHAR ucReplyStatus; -- UCHAR ucDelay; -+}ATOM_DISPLAY_DEVICE_PRIORITY_INFO; -+ -+//ProcessAuxChannelTransactionTable -+typedef struct _PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS -+{ -+ USHORT lpAuxRequest; -+ USHORT lpDataOut; -+ UCHAR ucChannelID; -+ union -+ { -+ UCHAR ucReplyStatus; -+ UCHAR ucDelay; -+ }; -+ UCHAR ucDataOutLen; -+ UCHAR ucReserved; -+}PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS; -+ -+//ProcessAuxChannelTransactionTable -+typedef struct _PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS_V2 -+{ -+ USHORT lpAuxRequest; -+ USHORT lpDataOut; -+ UCHAR ucChannelID; -+ union -+ { -+ UCHAR ucReplyStatus; -+ UCHAR ucDelay; - }; -- UCHAR ucDataOutLen; -- UCHAR ucReserved; --} PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS; -+ UCHAR ucDataOutLen; -+ UCHAR ucHPD_ID; //=0: HPD1, =1: HPD2, =2: HPD3, =3: HPD4, =4: HPD5, =5: HPD6 -+}PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS_V2; - - #define PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS - --/* GetSinkType */ -+//GetSinkType - --typedef struct _DP_ENCODER_SERVICE_PARAMETERS { -+typedef struct _DP_ENCODER_SERVICE_PARAMETERS -+{ - USHORT ucLinkClock; -- union { -- UCHAR ucConfig; /* for DP training command */ -- UCHAR ucI2cId; /* use for GET_SINK_TYPE command */ -+ union -+ { -+ UCHAR ucConfig; // for DP training command -+ UCHAR ucI2cId; // use for GET_SINK_TYPE command - }; - UCHAR ucAction; - UCHAR ucStatus; - UCHAR ucLaneNum; - UCHAR ucReserved[2]; --} DP_ENCODER_SERVICE_PARAMETERS; -+}DP_ENCODER_SERVICE_PARAMETERS; - --/* ucAction */ -+// ucAction - #define ATOM_DP_ACTION_GET_SINK_TYPE 0x01 -+/* obselete */ - #define ATOM_DP_ACTION_TRAINING_START 0x02 - #define ATOM_DP_ACTION_TRAINING_COMPLETE 0x03 - #define ATOM_DP_ACTION_TRAINING_PATTERN_SEL 0x04 -@@ -4318,7 +5273,7 @@ typedef struct _DP_ENCODER_SERVICE_PARAMETERS { - #define ATOM_DP_ACTION_GET_VSWING_PREEMP 0x06 - #define ATOM_DP_ACTION_BLANKING 0x07 - --/* ucConfig */ -+// ucConfig - #define ATOM_DP_CONFIG_ENCODER_SEL_MASK 0x03 - #define ATOM_DP_CONFIG_DIG1_ENCODER 0x00 - #define ATOM_DP_CONFIG_DIG2_ENCODER 0x01 -@@ -4326,14 +5281,14 @@ typedef struct _DP_ENCODER_SERVICE_PARAMETERS { - #define ATOM_DP_CONFIG_LINK_SEL_MASK 0x04 - #define ATOM_DP_CONFIG_LINK_A 0x00 - #define ATOM_DP_CONFIG_LINK_B 0x04 -- -+/* /obselete */ - #define DP_ENCODER_SERVICE_PS_ALLOCATION WRITE_ONE_BYTE_HW_I2C_DATA_PARAMETERS - --/* DP_TRAINING_TABLE */ --#define DPCD_SET_LINKRATE_LANENUM_PATTERN1_TBL_ADDR ATOM_DP_TRAINING_TBL_ADDR -+// DP_TRAINING_TABLE -+#define DPCD_SET_LINKRATE_LANENUM_PATTERN1_TBL_ADDR ATOM_DP_TRAINING_TBL_ADDR - #define DPCD_SET_SS_CNTL_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 8 ) --#define DPCD_SET_LANE_VSWING_PREEMP_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 16) --#define DPCD_SET_TRAINING_PATTERN0_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 24) -+#define DPCD_SET_LANE_VSWING_PREEMP_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 16 ) -+#define DPCD_SET_TRAINING_PATTERN0_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 24 ) - #define DPCD_SET_TRAINING_PATTERN2_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 32) - #define DPCD_GET_LINKRATE_LANENUM_SS_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 40) - #define DPCD_GET_LANE_STATUS_ADJUST_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 48) -@@ -4341,183 +5296,241 @@ typedef struct _DP_ENCODER_SERVICE_PARAMETERS { - #define DP_I2C_AUX_DDC_WRITE_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 64) - #define DP_I2C_AUX_DDC_READ_START_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 72) - #define DP_I2C_AUX_DDC_READ_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 76) --#define DP_I2C_AUX_DDC_READ_END_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 80) -+#define DP_I2C_AUX_DDC_WRITE_END_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 80) -+#define DP_I2C_AUX_DDC_READ_END_TBL_ADDR (ATOM_DP_TRAINING_TBL_ADDR + 84) - --typedef struct _PROCESS_I2C_CHANNEL_TRANSACTION_PARAMETERS { -- UCHAR ucI2CSpeed; -- union { -- UCHAR ucRegIndex; -- UCHAR ucStatus; -+typedef struct _PROCESS_I2C_CHANNEL_TRANSACTION_PARAMETERS -+{ -+ UCHAR ucI2CSpeed; -+ union -+ { -+ UCHAR ucRegIndex; -+ UCHAR ucStatus; - }; -- USHORT lpI2CDataOut; -- UCHAR ucFlag; -- UCHAR ucTransBytes; -- UCHAR ucSlaveAddr; -- UCHAR ucLineNumber; --} PROCESS_I2C_CHANNEL_TRANSACTION_PARAMETERS; -+ USHORT lpI2CDataOut; -+ UCHAR ucFlag; -+ UCHAR ucTransBytes; -+ UCHAR ucSlaveAddr; -+ UCHAR ucLineNumber; -+}PROCESS_I2C_CHANNEL_TRANSACTION_PARAMETERS; - - #define PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION PROCESS_I2C_CHANNEL_TRANSACTION_PARAMETERS - --/* ucFlag */ -+//ucFlag - #define HW_I2C_WRITE 1 - #define HW_I2C_READ 0 -+#define I2C_2BYTE_ADDR 0x02 - -+typedef struct _SET_HWBLOCK_INSTANCE_PARAMETER_V2 -+{ -+ UCHAR ucHWBlkInst; // HW block instance, 0, 1, 2, ... -+ UCHAR ucReserved[3]; -+}SET_HWBLOCK_INSTANCE_PARAMETER_V2; -+ -+#define HWBLKINST_INSTANCE_MASK 0x07 -+#define HWBLKINST_HWBLK_MASK 0xF0 -+#define HWBLKINST_HWBLK_SHIFT 0x04 -+ -+//ucHWBlock -+#define SELECT_DISP_ENGINE 0 -+#define SELECT_DISP_PLL 1 -+#define SELECT_DCIO_UNIPHY_LINK0 2 -+#define SELECT_DCIO_UNIPHY_LINK1 3 -+#define SELECT_DCIO_IMPCAL 4 -+#define SELECT_DCIO_DIG 6 -+#define SELECT_CRTC_PIXEL_RATE 7 -+ -+/****************************************************************************/ -+//Portion VI: Definitinos for vbios MC scratch registers that driver used - /****************************************************************************/ --/* Portion VI: Definitinos being oboselete */ -+ -+#define MC_MISC0__MEMORY_TYPE_MASK 0xF0000000 -+#define MC_MISC0__MEMORY_TYPE__GDDR1 0x10000000 -+#define MC_MISC0__MEMORY_TYPE__DDR2 0x20000000 -+#define MC_MISC0__MEMORY_TYPE__GDDR3 0x30000000 -+#define MC_MISC0__MEMORY_TYPE__GDDR4 0x40000000 -+#define MC_MISC0__MEMORY_TYPE__GDDR5 0x50000000 -+#define MC_MISC0__MEMORY_TYPE__DDR3 0xB0000000 -+ -+/****************************************************************************/ -+//Portion VI: Definitinos being oboselete - /****************************************************************************/ - --/* ========================================================================================== */ --/* Remove the definitions below when driver is ready! */ --typedef struct _ATOM_DAC_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usMaxFrequency; /* in 10kHz unit */ -- USHORT usReserved; --} ATOM_DAC_INFO; -- --typedef struct _COMPASSIONATE_DATA { -- ATOM_COMMON_TABLE_HEADER sHeader; -- -- /* ============================== DAC1 portion */ -- UCHAR ucDAC1_BG_Adjustment; -- UCHAR ucDAC1_DAC_Adjustment; -- USHORT usDAC1_FORCE_Data; -- /* ============================== DAC2 portion */ -- UCHAR ucDAC2_CRT2_BG_Adjustment; -- UCHAR ucDAC2_CRT2_DAC_Adjustment; -- USHORT usDAC2_CRT2_FORCE_Data; -- USHORT usDAC2_CRT2_MUX_RegisterIndex; -- UCHAR ucDAC2_CRT2_MUX_RegisterInfo; /* Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low */ -- UCHAR ucDAC2_NTSC_BG_Adjustment; -- UCHAR ucDAC2_NTSC_DAC_Adjustment; -- USHORT usDAC2_TV1_FORCE_Data; -- USHORT usDAC2_TV1_MUX_RegisterIndex; -- UCHAR ucDAC2_TV1_MUX_RegisterInfo; /* Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low */ -- UCHAR ucDAC2_CV_BG_Adjustment; -- UCHAR ucDAC2_CV_DAC_Adjustment; -- USHORT usDAC2_CV_FORCE_Data; -- USHORT usDAC2_CV_MUX_RegisterIndex; -- UCHAR ucDAC2_CV_MUX_RegisterInfo; /* Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low */ -- UCHAR ucDAC2_PAL_BG_Adjustment; -- UCHAR ucDAC2_PAL_DAC_Adjustment; -- USHORT usDAC2_TV2_FORCE_Data; --} COMPASSIONATE_DATA; -+//========================================================================================== -+//Remove the definitions below when driver is ready! -+typedef struct _ATOM_DAC_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usMaxFrequency; // in 10kHz unit -+ USHORT usReserved; -+}ATOM_DAC_INFO; -+ -+ -+typedef struct _COMPASSIONATE_DATA -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ -+ //============================== DAC1 portion -+ UCHAR ucDAC1_BG_Adjustment; -+ UCHAR ucDAC1_DAC_Adjustment; -+ USHORT usDAC1_FORCE_Data; -+ //============================== DAC2 portion -+ UCHAR ucDAC2_CRT2_BG_Adjustment; -+ UCHAR ucDAC2_CRT2_DAC_Adjustment; -+ USHORT usDAC2_CRT2_FORCE_Data; -+ USHORT usDAC2_CRT2_MUX_RegisterIndex; -+ UCHAR ucDAC2_CRT2_MUX_RegisterInfo; //Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low -+ UCHAR ucDAC2_NTSC_BG_Adjustment; -+ UCHAR ucDAC2_NTSC_DAC_Adjustment; -+ USHORT usDAC2_TV1_FORCE_Data; -+ USHORT usDAC2_TV1_MUX_RegisterIndex; -+ UCHAR ucDAC2_TV1_MUX_RegisterInfo; //Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low -+ UCHAR ucDAC2_CV_BG_Adjustment; -+ UCHAR ucDAC2_CV_DAC_Adjustment; -+ USHORT usDAC2_CV_FORCE_Data; -+ USHORT usDAC2_CV_MUX_RegisterIndex; -+ UCHAR ucDAC2_CV_MUX_RegisterInfo; //Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low -+ UCHAR ucDAC2_PAL_BG_Adjustment; -+ UCHAR ucDAC2_PAL_DAC_Adjustment; -+ USHORT usDAC2_TV2_FORCE_Data; -+}COMPASSIONATE_DATA; - - /****************************Supported Device Info Table Definitions**********************/ --/* ucConnectInfo: */ --/* [7:4] - connector type */ --/* = 1 - VGA connector */ --/* = 2 - DVI-I */ --/* = 3 - DVI-D */ --/* = 4 - DVI-A */ --/* = 5 - SVIDEO */ --/* = 6 - COMPOSITE */ --/* = 7 - LVDS */ --/* = 8 - DIGITAL LINK */ --/* = 9 - SCART */ --/* = 0xA - HDMI_type A */ --/* = 0xB - HDMI_type B */ --/* = 0xE - Special case1 (DVI+DIN) */ --/* Others=TBD */ --/* [3:0] - DAC Associated */ --/* = 0 - no DAC */ --/* = 1 - DACA */ --/* = 2 - DACB */ --/* = 3 - External DAC */ --/* Others=TBD */ --/* */ -- --typedef struct _ATOM_CONNECTOR_INFO { -+// ucConnectInfo: -+// [7:4] - connector type -+// = 1 - VGA connector -+// = 2 - DVI-I -+// = 3 - DVI-D -+// = 4 - DVI-A -+// = 5 - SVIDEO -+// = 6 - COMPOSITE -+// = 7 - LVDS -+// = 8 - DIGITAL LINK -+// = 9 - SCART -+// = 0xA - HDMI_type A -+// = 0xB - HDMI_type B -+// = 0xE - Special case1 (DVI+DIN) -+// Others=TBD -+// [3:0] - DAC Associated -+// = 0 - no DAC -+// = 1 - DACA -+// = 2 - DACB -+// = 3 - External DAC -+// Others=TBD -+// -+ -+typedef struct _ATOM_CONNECTOR_INFO -+{ - #if ATOM_BIG_ENDIAN -- UCHAR bfConnectorType:4; -- UCHAR bfAssociatedDAC:4; -+ UCHAR bfConnectorType:4; -+ UCHAR bfAssociatedDAC:4; - #else -- UCHAR bfAssociatedDAC:4; -- UCHAR bfConnectorType:4; -+ UCHAR bfAssociatedDAC:4; -+ UCHAR bfConnectorType:4; - #endif --} ATOM_CONNECTOR_INFO; -+}ATOM_CONNECTOR_INFO; -+ -+typedef union _ATOM_CONNECTOR_INFO_ACCESS -+{ -+ ATOM_CONNECTOR_INFO sbfAccess; -+ UCHAR ucAccess; -+}ATOM_CONNECTOR_INFO_ACCESS; - --typedef union _ATOM_CONNECTOR_INFO_ACCESS { -- ATOM_CONNECTOR_INFO sbfAccess; -- UCHAR ucAccess; --} ATOM_CONNECTOR_INFO_ACCESS; -+typedef struct _ATOM_CONNECTOR_INFO_I2C -+{ -+ ATOM_CONNECTOR_INFO_ACCESS sucConnectorInfo; -+ ATOM_I2C_ID_CONFIG_ACCESS sucI2cId; -+}ATOM_CONNECTOR_INFO_I2C; - --typedef struct _ATOM_CONNECTOR_INFO_I2C { -- ATOM_CONNECTOR_INFO_ACCESS sucConnectorInfo; -- ATOM_I2C_ID_CONFIG_ACCESS sucI2cId; --} ATOM_CONNECTOR_INFO_I2C; - --typedef struct _ATOM_SUPPORTED_DEVICES_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usDeviceSupport; -- ATOM_CONNECTOR_INFO_I2C asConnInfo[ATOM_MAX_SUPPORTED_DEVICE_INFO]; --} ATOM_SUPPORTED_DEVICES_INFO; -+typedef struct _ATOM_SUPPORTED_DEVICES_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usDeviceSupport; -+ ATOM_CONNECTOR_INFO_I2C asConnInfo[ATOM_MAX_SUPPORTED_DEVICE_INFO]; -+}ATOM_SUPPORTED_DEVICES_INFO; - - #define NO_INT_SRC_MAPPED 0xFF - --typedef struct _ATOM_CONNECTOR_INC_SRC_BITMAP { -- UCHAR ucIntSrcBitmap; --} ATOM_CONNECTOR_INC_SRC_BITMAP; -- --typedef struct _ATOM_SUPPORTED_DEVICES_INFO_2 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usDeviceSupport; -- ATOM_CONNECTOR_INFO_I2C asConnInfo[ATOM_MAX_SUPPORTED_DEVICE_INFO_2]; -- ATOM_CONNECTOR_INC_SRC_BITMAP -- asIntSrcInfo[ATOM_MAX_SUPPORTED_DEVICE_INFO_2]; --} ATOM_SUPPORTED_DEVICES_INFO_2; -- --typedef struct _ATOM_SUPPORTED_DEVICES_INFO_2d1 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usDeviceSupport; -- ATOM_CONNECTOR_INFO_I2C asConnInfo[ATOM_MAX_SUPPORTED_DEVICE]; -- ATOM_CONNECTOR_INC_SRC_BITMAP asIntSrcInfo[ATOM_MAX_SUPPORTED_DEVICE]; --} ATOM_SUPPORTED_DEVICES_INFO_2d1; -+typedef struct _ATOM_CONNECTOR_INC_SRC_BITMAP -+{ -+ UCHAR ucIntSrcBitmap; -+}ATOM_CONNECTOR_INC_SRC_BITMAP; -+ -+typedef struct _ATOM_SUPPORTED_DEVICES_INFO_2 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usDeviceSupport; -+ ATOM_CONNECTOR_INFO_I2C asConnInfo[ATOM_MAX_SUPPORTED_DEVICE_INFO_2]; -+ ATOM_CONNECTOR_INC_SRC_BITMAP asIntSrcInfo[ATOM_MAX_SUPPORTED_DEVICE_INFO_2]; -+}ATOM_SUPPORTED_DEVICES_INFO_2; -+ -+typedef struct _ATOM_SUPPORTED_DEVICES_INFO_2d1 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usDeviceSupport; -+ ATOM_CONNECTOR_INFO_I2C asConnInfo[ATOM_MAX_SUPPORTED_DEVICE]; -+ ATOM_CONNECTOR_INC_SRC_BITMAP asIntSrcInfo[ATOM_MAX_SUPPORTED_DEVICE]; -+}ATOM_SUPPORTED_DEVICES_INFO_2d1; - - #define ATOM_SUPPORTED_DEVICES_INFO_LAST ATOM_SUPPORTED_DEVICES_INFO_2d1 - --typedef struct _ATOM_MISC_CONTROL_INFO { -- USHORT usFrequency; -- UCHAR ucPLL_ChargePump; /* PLL charge-pump gain control */ -- UCHAR ucPLL_DutyCycle; /* PLL duty cycle control */ -- UCHAR ucPLL_VCO_Gain; /* PLL VCO gain control */ -- UCHAR ucPLL_VoltageSwing; /* PLL driver voltage swing control */ --} ATOM_MISC_CONTROL_INFO; -+ -+ -+typedef struct _ATOM_MISC_CONTROL_INFO -+{ -+ USHORT usFrequency; -+ UCHAR ucPLL_ChargePump; // PLL charge-pump gain control -+ UCHAR ucPLL_DutyCycle; // PLL duty cycle control -+ UCHAR ucPLL_VCO_Gain; // PLL VCO gain control -+ UCHAR ucPLL_VoltageSwing; // PLL driver voltage swing control -+}ATOM_MISC_CONTROL_INFO; -+ - - #define ATOM_MAX_MISC_INFO 4 - --typedef struct _ATOM_TMDS_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usMaxFrequency; /* in 10Khz */ -- ATOM_MISC_CONTROL_INFO asMiscInfo[ATOM_MAX_MISC_INFO]; --} ATOM_TMDS_INFO; -+typedef struct _ATOM_TMDS_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usMaxFrequency; // in 10Khz -+ ATOM_MISC_CONTROL_INFO asMiscInfo[ATOM_MAX_MISC_INFO]; -+}ATOM_TMDS_INFO; -+ -+ -+typedef struct _ATOM_ENCODER_ANALOG_ATTRIBUTE -+{ -+ UCHAR ucTVStandard; //Same as TV standards defined above, -+ UCHAR ucPadding[1]; -+}ATOM_ENCODER_ANALOG_ATTRIBUTE; - --typedef struct _ATOM_ENCODER_ANALOG_ATTRIBUTE { -- UCHAR ucTVStandard; /* Same as TV standards defined above, */ -- UCHAR ucPadding[1]; --} ATOM_ENCODER_ANALOG_ATTRIBUTE; -+typedef struct _ATOM_ENCODER_DIGITAL_ATTRIBUTE -+{ -+ UCHAR ucAttribute; //Same as other digital encoder attributes defined above -+ UCHAR ucPadding[1]; -+}ATOM_ENCODER_DIGITAL_ATTRIBUTE; - --typedef struct _ATOM_ENCODER_DIGITAL_ATTRIBUTE { -- UCHAR ucAttribute; /* Same as other digital encoder attributes defined above */ -- UCHAR ucPadding[1]; --} ATOM_ENCODER_DIGITAL_ATTRIBUTE; -+typedef union _ATOM_ENCODER_ATTRIBUTE -+{ -+ ATOM_ENCODER_ANALOG_ATTRIBUTE sAlgAttrib; -+ ATOM_ENCODER_DIGITAL_ATTRIBUTE sDigAttrib; -+}ATOM_ENCODER_ATTRIBUTE; - --typedef union _ATOM_ENCODER_ATTRIBUTE { -- ATOM_ENCODER_ANALOG_ATTRIBUTE sAlgAttrib; -- ATOM_ENCODER_DIGITAL_ATTRIBUTE sDigAttrib; --} ATOM_ENCODER_ATTRIBUTE; - --typedef struct _DVO_ENCODER_CONTROL_PARAMETERS { -- USHORT usPixelClock; -- USHORT usEncoderID; -- UCHAR ucDeviceType; /* Use ATOM_DEVICE_xxx1_Index to indicate device type only. */ -- UCHAR ucAction; /* ATOM_ENABLE/ATOM_DISABLE/ATOM_HPD_INIT */ -- ATOM_ENCODER_ATTRIBUTE usDevAttr; --} DVO_ENCODER_CONTROL_PARAMETERS; -+typedef struct _DVO_ENCODER_CONTROL_PARAMETERS -+{ -+ USHORT usPixelClock; -+ USHORT usEncoderID; -+ UCHAR ucDeviceType; //Use ATOM_DEVICE_xxx1_Index to indicate device type only. -+ UCHAR ucAction; //ATOM_ENABLE/ATOM_DISABLE/ATOM_HPD_INIT -+ ATOM_ENCODER_ATTRIBUTE usDevAttr; -+}DVO_ENCODER_CONTROL_PARAMETERS; -+ -+typedef struct _DVO_ENCODER_CONTROL_PS_ALLOCATION -+{ -+ DVO_ENCODER_CONTROL_PARAMETERS sDVOEncoder; -+ WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; //Caller doesn't need to init this portion -+}DVO_ENCODER_CONTROL_PS_ALLOCATION; - --typedef struct _DVO_ENCODER_CONTROL_PS_ALLOCATION { -- DVO_ENCODER_CONTROL_PARAMETERS sDVOEncoder; -- WRITE_ONE_BYTE_HW_I2C_DATA_PS_ALLOCATION sReserved; /* Caller doesn't need to init this portion */ --} DVO_ENCODER_CONTROL_PS_ALLOCATION; - - #define ATOM_XTMDS_ASIC_SI164_ID 1 - #define ATOM_XTMDS_ASIC_SI178_ID 2 -@@ -4526,27 +5539,30 @@ typedef struct _DVO_ENCODER_CONTROL_PS_ALLOCATION { - #define ATOM_XTMDS_SUPPORTED_DUALLINK 0x00000002 - #define ATOM_XTMDS_MVPU_FPGA 0x00000004 - --typedef struct _ATOM_XTMDS_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- USHORT usSingleLinkMaxFrequency; -- ATOM_I2C_ID_CONFIG_ACCESS sucI2cId; /* Point the ID on which I2C is used to control external chip */ -- UCHAR ucXtransimitterID; -- UCHAR ucSupportedLink; /* Bit field, bit0=1, single link supported;bit1=1,dual link supported */ -- UCHAR ucSequnceAlterID; /* Even with the same external TMDS asic, it's possible that the program seqence alters */ -- /* due to design. This ID is used to alert driver that the sequence is not "standard"! */ -- UCHAR ucMasterAddress; /* Address to control Master xTMDS Chip */ -- UCHAR ucSlaveAddress; /* Address to control Slave xTMDS Chip */ --} ATOM_XTMDS_INFO; -- --typedef struct _DFP_DPMS_STATUS_CHANGE_PARAMETERS { -- UCHAR ucEnable; /* ATOM_ENABLE=On or ATOM_DISABLE=Off */ -- UCHAR ucDevice; /* ATOM_DEVICE_DFP1_INDEX.... */ -- UCHAR ucPadding[2]; --} DFP_DPMS_STATUS_CHANGE_PARAMETERS; -+ -+typedef struct _ATOM_XTMDS_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ USHORT usSingleLinkMaxFrequency; -+ ATOM_I2C_ID_CONFIG_ACCESS sucI2cId; //Point the ID on which I2C is used to control external chip -+ UCHAR ucXtransimitterID; -+ UCHAR ucSupportedLink; // Bit field, bit0=1, single link supported;bit1=1,dual link supported -+ UCHAR ucSequnceAlterID; // Even with the same external TMDS asic, it's possible that the program seqence alters -+ // due to design. This ID is used to alert driver that the sequence is not "standard"! -+ UCHAR ucMasterAddress; // Address to control Master xTMDS Chip -+ UCHAR ucSlaveAddress; // Address to control Slave xTMDS Chip -+}ATOM_XTMDS_INFO; -+ -+typedef struct _DFP_DPMS_STATUS_CHANGE_PARAMETERS -+{ -+ UCHAR ucEnable; // ATOM_ENABLE=On or ATOM_DISABLE=Off -+ UCHAR ucDevice; // ATOM_DEVICE_DFP1_INDEX.... -+ UCHAR ucPadding[2]; -+}DFP_DPMS_STATUS_CHANGE_PARAMETERS; - - /****************************Legacy Power Play Table Definitions **********************/ - --/* Definitions for ulPowerPlayMiscInfo */ -+//Definitions for ulPowerPlayMiscInfo - #define ATOM_PM_MISCINFO_SPLIT_CLOCK 0x00000000L - #define ATOM_PM_MISCINFO_USING_MCLK_SRC 0x00000001L - #define ATOM_PM_MISCINFO_USING_SCLK_SRC 0x00000002L -@@ -4558,8 +5574,8 @@ typedef struct _DFP_DPMS_STATUS_CHANGE_PARAMETERS { - - #define ATOM_PM_MISCINFO_ENGINE_CLOCK_CONTRL_EN 0x00000020L - #define ATOM_PM_MISCINFO_MEMORY_CLOCK_CONTRL_EN 0x00000040L --#define ATOM_PM_MISCINFO_PROGRAM_VOLTAGE 0x00000080L /* When this bit set, ucVoltageDropIndex is not an index for GPIO pin, but a voltage ID that SW needs program */ -- -+#define ATOM_PM_MISCINFO_PROGRAM_VOLTAGE 0x00000080L //When this bit set, ucVoltageDropIndex is not an index for GPIO pin, but a voltage ID that SW needs program -+ - #define ATOM_PM_MISCINFO_ASIC_REDUCED_SPEED_SCLK_EN 0x00000100L - #define ATOM_PM_MISCINFO_ASIC_DYNAMIC_VOLTAGE_EN 0x00000200L - #define ATOM_PM_MISCINFO_ASIC_SLEEP_MODE_EN 0x00000400L -@@ -4569,22 +5585,22 @@ typedef struct _DFP_DPMS_STATUS_CHANGE_PARAMETERS { - #define ATOM_PM_MISCINFO_LOW_LCD_REFRESH_RATE 0x00004000L - - #define ATOM_PM_MISCINFO_DRIVER_DEFAULT_MODE 0x00008000L --#define ATOM_PM_MISCINFO_OVER_CLOCK_MODE 0x00010000L -+#define ATOM_PM_MISCINFO_OVER_CLOCK_MODE 0x00010000L - #define ATOM_PM_MISCINFO_OVER_DRIVE_MODE 0x00020000L - #define ATOM_PM_MISCINFO_POWER_SAVING_MODE 0x00040000L - #define ATOM_PM_MISCINFO_THERMAL_DIODE_MODE 0x00080000L - --#define ATOM_PM_MISCINFO_FRAME_MODULATION_MASK 0x00300000L /* 0-FM Disable, 1-2 level FM, 2-4 level FM, 3-Reserved */ --#define ATOM_PM_MISCINFO_FRAME_MODULATION_SHIFT 20 -+#define ATOM_PM_MISCINFO_FRAME_MODULATION_MASK 0x00300000L //0-FM Disable, 1-2 level FM, 2-4 level FM, 3-Reserved -+#define ATOM_PM_MISCINFO_FRAME_MODULATION_SHIFT 20 - - #define ATOM_PM_MISCINFO_DYN_CLK_3D_IDLE 0x00400000L - #define ATOM_PM_MISCINFO_DYNAMIC_CLOCK_DIVIDER_BY_2 0x00800000L - #define ATOM_PM_MISCINFO_DYNAMIC_CLOCK_DIVIDER_BY_4 0x01000000L --#define ATOM_PM_MISCINFO_DYNAMIC_HDP_BLOCK_EN 0x02000000L /* When set, Dynamic */ --#define ATOM_PM_MISCINFO_DYNAMIC_MC_HOST_BLOCK_EN 0x04000000L /* When set, Dynamic */ --#define ATOM_PM_MISCINFO_3D_ACCELERATION_EN 0x08000000L /* When set, This mode is for acceleated 3D mode */ -+#define ATOM_PM_MISCINFO_DYNAMIC_HDP_BLOCK_EN 0x02000000L //When set, Dynamic -+#define ATOM_PM_MISCINFO_DYNAMIC_MC_HOST_BLOCK_EN 0x04000000L //When set, Dynamic -+#define ATOM_PM_MISCINFO_3D_ACCELERATION_EN 0x08000000L //When set, This mode is for acceleated 3D mode - --#define ATOM_PM_MISCINFO_POWERPLAY_SETTINGS_GROUP_MASK 0x70000000L /* 1-Optimal Battery Life Group, 2-High Battery, 3-Balanced, 4-High Performance, 5- Optimal Performance (Default state with Default clocks) */ -+#define ATOM_PM_MISCINFO_POWERPLAY_SETTINGS_GROUP_MASK 0x70000000L //1-Optimal Battery Life Group, 2-High Battery, 3-Balanced, 4-High Performance, 5- Optimal Performance (Default state with Default clocks) - #define ATOM_PM_MISCINFO_POWERPLAY_SETTINGS_GROUP_SHIFT 28 - #define ATOM_PM_MISCINFO_ENABLE_BACK_BIAS 0x80000000L - -@@ -4594,55 +5610,59 @@ typedef struct _DFP_DPMS_STATUS_CHANGE_PARAMETERS { - #define ATOM_PM_MISCINFO2_FS3D_OVERDRIVE_INFO 0x00000008L - #define ATOM_PM_MISCINFO2_FORCEDLOWPWR_MODE 0x00000010L - #define ATOM_PM_MISCINFO2_VDDCI_DYNAMIC_VOLTAGE_EN 0x00000020L --#define ATOM_PM_MISCINFO2_VIDEO_PLAYBACK_CAPABLE 0x00000040L /* If this bit is set in multi-pp mode, then driver will pack up one with the minior power consumption. */ -- /* If it's not set in any pp mode, driver will use its default logic to pick a pp mode in video playback */ -+#define ATOM_PM_MISCINFO2_VIDEO_PLAYBACK_CAPABLE 0x00000040L //If this bit is set in multi-pp mode, then driver will pack up one with the minior power consumption. -+ //If it's not set in any pp mode, driver will use its default logic to pick a pp mode in video playback - #define ATOM_PM_MISCINFO2_NOT_VALID_ON_DC 0x00000080L - #define ATOM_PM_MISCINFO2_STUTTER_MODE_EN 0x00000100L --#define ATOM_PM_MISCINFO2_UVD_SUPPORT_MODE 0x00000200L -- --/* ucTableFormatRevision=1 */ --/* ucTableContentRevision=1 */ --typedef struct _ATOM_POWERMODE_INFO { -- ULONG ulMiscInfo; /* The power level should be arranged in ascending order */ -- ULONG ulReserved1; /* must set to 0 */ -- ULONG ulReserved2; /* must set to 0 */ -- USHORT usEngineClock; -- USHORT usMemoryClock; -- UCHAR ucVoltageDropIndex; /* index to GPIO table */ -- UCHAR ucSelectedPanel_RefreshRate; /* panel refresh rate */ -- UCHAR ucMinTemperature; -- UCHAR ucMaxTemperature; -- UCHAR ucNumPciELanes; /* number of PCIE lanes */ --} ATOM_POWERMODE_INFO; -- --/* ucTableFormatRevision=2 */ --/* ucTableContentRevision=1 */ --typedef struct _ATOM_POWERMODE_INFO_V2 { -- ULONG ulMiscInfo; /* The power level should be arranged in ascending order */ -- ULONG ulMiscInfo2; -- ULONG ulEngineClock; -- ULONG ulMemoryClock; -- UCHAR ucVoltageDropIndex; /* index to GPIO table */ -- UCHAR ucSelectedPanel_RefreshRate; /* panel refresh rate */ -- UCHAR ucMinTemperature; -- UCHAR ucMaxTemperature; -- UCHAR ucNumPciELanes; /* number of PCIE lanes */ --} ATOM_POWERMODE_INFO_V2; -- --/* ucTableFormatRevision=2 */ --/* ucTableContentRevision=2 */ --typedef struct _ATOM_POWERMODE_INFO_V3 { -- ULONG ulMiscInfo; /* The power level should be arranged in ascending order */ -- ULONG ulMiscInfo2; -- ULONG ulEngineClock; -- ULONG ulMemoryClock; -- UCHAR ucVoltageDropIndex; /* index to Core (VDDC) votage table */ -- UCHAR ucSelectedPanel_RefreshRate; /* panel refresh rate */ -- UCHAR ucMinTemperature; -- UCHAR ucMaxTemperature; -- UCHAR ucNumPciELanes; /* number of PCIE lanes */ -- UCHAR ucVDDCI_VoltageDropIndex; /* index to VDDCI votage table */ --} ATOM_POWERMODE_INFO_V3; -+#define ATOM_PM_MISCINFO2_UVD_SUPPORT_MODE 0x00000200L -+ -+//ucTableFormatRevision=1 -+//ucTableContentRevision=1 -+typedef struct _ATOM_POWERMODE_INFO -+{ -+ ULONG ulMiscInfo; //The power level should be arranged in ascending order -+ ULONG ulReserved1; // must set to 0 -+ ULONG ulReserved2; // must set to 0 -+ USHORT usEngineClock; -+ USHORT usMemoryClock; -+ UCHAR ucVoltageDropIndex; // index to GPIO table -+ UCHAR ucSelectedPanel_RefreshRate;// panel refresh rate -+ UCHAR ucMinTemperature; -+ UCHAR ucMaxTemperature; -+ UCHAR ucNumPciELanes; // number of PCIE lanes -+}ATOM_POWERMODE_INFO; -+ -+//ucTableFormatRevision=2 -+//ucTableContentRevision=1 -+typedef struct _ATOM_POWERMODE_INFO_V2 -+{ -+ ULONG ulMiscInfo; //The power level should be arranged in ascending order -+ ULONG ulMiscInfo2; -+ ULONG ulEngineClock; -+ ULONG ulMemoryClock; -+ UCHAR ucVoltageDropIndex; // index to GPIO table -+ UCHAR ucSelectedPanel_RefreshRate;// panel refresh rate -+ UCHAR ucMinTemperature; -+ UCHAR ucMaxTemperature; -+ UCHAR ucNumPciELanes; // number of PCIE lanes -+}ATOM_POWERMODE_INFO_V2; -+ -+//ucTableFormatRevision=2 -+//ucTableContentRevision=2 -+typedef struct _ATOM_POWERMODE_INFO_V3 -+{ -+ ULONG ulMiscInfo; //The power level should be arranged in ascending order -+ ULONG ulMiscInfo2; -+ ULONG ulEngineClock; -+ ULONG ulMemoryClock; -+ UCHAR ucVoltageDropIndex; // index to Core (VDDC) votage table -+ UCHAR ucSelectedPanel_RefreshRate;// panel refresh rate -+ UCHAR ucMinTemperature; -+ UCHAR ucMaxTemperature; -+ UCHAR ucNumPciELanes; // number of PCIE lanes -+ UCHAR ucVDDCI_VoltageDropIndex; // index to VDDCI votage table -+}ATOM_POWERMODE_INFO_V3; -+ - - #define ATOM_MAX_NUMBEROF_POWER_BLOCK 8 - -@@ -4655,40 +5675,44 @@ typedef struct _ATOM_POWERMODE_INFO_V3 { - #define ATOM_PP_OVERDRIVE_THERMALCONTROLLER_MUA6649 0x04 - #define ATOM_PP_OVERDRIVE_THERMALCONTROLLER_LM64 0x05 - #define ATOM_PP_OVERDRIVE_THERMALCONTROLLER_F75375 0x06 --#define ATOM_PP_OVERDRIVE_THERMALCONTROLLER_ASC7512 0x07 /* Andigilog */ -- --typedef struct _ATOM_POWERPLAY_INFO { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR ucOverdriveThermalController; -- UCHAR ucOverdriveI2cLine; -- UCHAR ucOverdriveIntBitmap; -- UCHAR ucOverdriveControllerAddress; -- UCHAR ucSizeOfPowerModeEntry; -- UCHAR ucNumOfPowerModeEntries; -- ATOM_POWERMODE_INFO asPowerPlayInfo[ATOM_MAX_NUMBEROF_POWER_BLOCK]; --} ATOM_POWERPLAY_INFO; -- --typedef struct _ATOM_POWERPLAY_INFO_V2 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR ucOverdriveThermalController; -- UCHAR ucOverdriveI2cLine; -- UCHAR ucOverdriveIntBitmap; -- UCHAR ucOverdriveControllerAddress; -- UCHAR ucSizeOfPowerModeEntry; -- UCHAR ucNumOfPowerModeEntries; -- ATOM_POWERMODE_INFO_V2 asPowerPlayInfo[ATOM_MAX_NUMBEROF_POWER_BLOCK]; --} ATOM_POWERPLAY_INFO_V2; -- --typedef struct _ATOM_POWERPLAY_INFO_V3 { -- ATOM_COMMON_TABLE_HEADER sHeader; -- UCHAR ucOverdriveThermalController; -- UCHAR ucOverdriveI2cLine; -- UCHAR ucOverdriveIntBitmap; -- UCHAR ucOverdriveControllerAddress; -- UCHAR ucSizeOfPowerModeEntry; -- UCHAR ucNumOfPowerModeEntries; -- ATOM_POWERMODE_INFO_V3 asPowerPlayInfo[ATOM_MAX_NUMBEROF_POWER_BLOCK]; --} ATOM_POWERPLAY_INFO_V3; -+#define ATOM_PP_OVERDRIVE_THERMALCONTROLLER_ASC7512 0x07 // Andigilog -+ -+ -+typedef struct _ATOM_POWERPLAY_INFO -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR ucOverdriveThermalController; -+ UCHAR ucOverdriveI2cLine; -+ UCHAR ucOverdriveIntBitmap; -+ UCHAR ucOverdriveControllerAddress; -+ UCHAR ucSizeOfPowerModeEntry; -+ UCHAR ucNumOfPowerModeEntries; -+ ATOM_POWERMODE_INFO asPowerPlayInfo[ATOM_MAX_NUMBEROF_POWER_BLOCK]; -+}ATOM_POWERPLAY_INFO; -+ -+typedef struct _ATOM_POWERPLAY_INFO_V2 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR ucOverdriveThermalController; -+ UCHAR ucOverdriveI2cLine; -+ UCHAR ucOverdriveIntBitmap; -+ UCHAR ucOverdriveControllerAddress; -+ UCHAR ucSizeOfPowerModeEntry; -+ UCHAR ucNumOfPowerModeEntries; -+ ATOM_POWERMODE_INFO_V2 asPowerPlayInfo[ATOM_MAX_NUMBEROF_POWER_BLOCK]; -+}ATOM_POWERPLAY_INFO_V2; -+ -+typedef struct _ATOM_POWERPLAY_INFO_V3 -+{ -+ ATOM_COMMON_TABLE_HEADER sHeader; -+ UCHAR ucOverdriveThermalController; -+ UCHAR ucOverdriveI2cLine; -+ UCHAR ucOverdriveIntBitmap; -+ UCHAR ucOverdriveControllerAddress; -+ UCHAR ucSizeOfPowerModeEntry; -+ UCHAR ucNumOfPowerModeEntries; -+ ATOM_POWERMODE_INFO_V3 asPowerPlayInfo[ATOM_MAX_NUMBEROF_POWER_BLOCK]; -+}ATOM_POWERPLAY_INFO_V3; - - /* New PPlib */ - /**************************************************************************/ -@@ -4873,40 +5897,42 @@ typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO - UCHAR ucMaxHTLinkWidth; // From SBIOS - {2, 4, 8, 16} - UCHAR ucMinHTLinkWidth; // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could be bigger as display BW requriement. - USHORT usHTLinkFreq; // See definition ATOM_PPLIB_RS780_HTLINKFREQ_xxx or in MHz(>=200). -- ULONG ulFlags; -+ ULONG ulFlags; - } ATOM_PPLIB_RS780_CLOCK_INFO; - --#define ATOM_PPLIB_RS780_VOLTAGE_NONE 0 --#define ATOM_PPLIB_RS780_VOLTAGE_LOW 1 --#define ATOM_PPLIB_RS780_VOLTAGE_HIGH 2 --#define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE 3 -+#define ATOM_PPLIB_RS780_VOLTAGE_NONE 0 -+#define ATOM_PPLIB_RS780_VOLTAGE_LOW 1 -+#define ATOM_PPLIB_RS780_VOLTAGE_HIGH 2 -+#define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE 3 - - #define ATOM_PPLIB_RS780_SPMCLK_NONE 0 // We cannot change the side port memory clock, leave it as it is. - #define ATOM_PPLIB_RS780_SPMCLK_LOW 1 - #define ATOM_PPLIB_RS780_SPMCLK_HIGH 2 - --#define ATOM_PPLIB_RS780_HTLINKFREQ_NONE 0 --#define ATOM_PPLIB_RS780_HTLINKFREQ_LOW 1 --#define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH 2 -+#define ATOM_PPLIB_RS780_HTLINKFREQ_NONE 0 -+#define ATOM_PPLIB_RS780_HTLINKFREQ_LOW 1 -+#define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH 2 - - /**************************************************************************/ - --/* Following definitions are for compatiblity issue in different SW components. */ -+ -+// Following definitions are for compatiblity issue in different SW components. - #define ATOM_MASTER_DATA_TABLE_REVISION 0x01 --#define Object_Info Object_Header -+#define Object_Info Object_Header - #define AdjustARB_SEQ MC_InitParameter - #define VRAM_GPIO_DetectionInfo VoltageObjectInfo --#define ASIC_VDDCI_Info ASIC_ProfilingInfo -+#define ASIC_VDDCI_Info ASIC_ProfilingInfo - #define ASIC_MVDDQ_Info MemoryTrainingInfo --#define SS_Info PPLL_SS_Info -+#define SS_Info PPLL_SS_Info - #define ASIC_MVDDC_Info ASIC_InternalSS_Info - #define DispDevicePriorityInfo SaveRestoreInfo - #define DispOutInfo TV_VideoMode - -+ - #define ATOM_ENCODER_OBJECT_TABLE ATOM_OBJECT_TABLE - #define ATOM_CONNECTOR_OBJECT_TABLE ATOM_OBJECT_TABLE - --/* New device naming, remove them when both DAL/VBIOS is ready */ -+//New device naming, remove them when both DAL/VBIOS is ready - #define DFP2I_OUTPUT_CONTROL_PARAMETERS CRT1_OUTPUT_CONTROL_PARAMETERS - #define DFP2I_OUTPUT_CONTROL_PS_ALLOCATION DFP2I_OUTPUT_CONTROL_PARAMETERS - -@@ -4921,7 +5947,7 @@ typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO - - #define ATOM_DEVICE_DFP1I_INDEX ATOM_DEVICE_DFP1_INDEX - #define ATOM_DEVICE_DFP1X_INDEX ATOM_DEVICE_DFP2_INDEX -- -+ - #define ATOM_DEVICE_DFP2I_INDEX 0x00000009 - #define ATOM_DEVICE_DFP2I_SUPPORT (0x1L << ATOM_DEVICE_DFP2I_INDEX) - -@@ -4939,7 +5965,7 @@ typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO - - #define ATOM_S3_DFP2I_ACTIVEb1 0x02 - --#define ATOM_S3_DFP1I_ACTIVE ATOM_S3_DFP1_ACTIVE -+#define ATOM_S3_DFP1I_ACTIVE ATOM_S3_DFP1_ACTIVE - #define ATOM_S3_DFP1X_ACTIVE ATOM_S3_DFP2_ACTIVE - - #define ATOM_S3_DFP2I_ACTIVE 0x00000200L -@@ -4958,14 +5984,14 @@ typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO - #define ATOM_S6_ACC_REQ_DFP2Ib3 0x02 - #define ATOM_S6_ACC_REQ_DFP2I 0x02000000L - --#define TMDS1XEncoderControl DVOEncoderControl -+#define TMDS1XEncoderControl DVOEncoderControl - #define DFP1XOutputControl DVOOutputControl - - #define ExternalDFPOutputControl DFP1XOutputControl - #define EnableExternalTMDS_Encoder TMDS1XEncoderControl - - #define DFP1IOutputControl TMDSAOutputControl --#define DFP2IOutputControl LVTMAOutputControl -+#define DFP2IOutputControl LVTMAOutputControl - - #define DAC1_ENCODER_CONTROL_PARAMETERS DAC_ENCODER_CONTROL_PARAMETERS - #define DAC1_ENCODER_CONTROL_PS_ALLOCATION DAC_ENCODER_CONTROL_PS_ALLOCATION -@@ -4974,7 +6000,7 @@ typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO - #define DAC2_ENCODER_CONTROL_PS_ALLOCATION DAC_ENCODER_CONTROL_PS_ALLOCATION - - #define ucDac1Standard ucDacStandard --#define ucDac2Standard ucDacStandard -+#define ucDac2Standard ucDacStandard - - #define TMDS1EncoderControl TMDSAEncoderControl - #define TMDS2EncoderControl LVTMAEncoderControl -@@ -4984,12 +6010,56 @@ typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO - #define CRT1OutputControl DAC1OutputControl - #define CRT2OutputControl DAC2OutputControl - --/* These two lines will be removed for sure in a few days, will follow up with Michael V. */ -+//These two lines will be removed for sure in a few days, will follow up with Michael V. - #define EnableLVDS_SS EnableSpreadSpectrumOnPPLL --#define ENABLE_LVDS_SS_PARAMETERS_V3 ENABLE_SPREAD_SPECTRUM_ON_PPLL -+#define ENABLE_LVDS_SS_PARAMETERS_V3 ENABLE_SPREAD_SPECTRUM_ON_PPLL -+ -+//#define ATOM_S2_CRT1_DPMS_STATE 0x00010000L -+//#define ATOM_S2_LCD1_DPMS_STATE ATOM_S2_CRT1_DPMS_STATE -+//#define ATOM_S2_TV1_DPMS_STATE ATOM_S2_CRT1_DPMS_STATE -+//#define ATOM_S2_DFP1_DPMS_STATE ATOM_S2_CRT1_DPMS_STATE -+//#define ATOM_S2_CRT2_DPMS_STATE ATOM_S2_CRT1_DPMS_STATE -+ -+#define ATOM_S6_ACC_REQ_TV2 0x00400000L -+#define ATOM_DEVICE_TV2_INDEX 0x00000006 -+#define ATOM_DEVICE_TV2_SUPPORT (0x1L << ATOM_DEVICE_TV2_INDEX) -+#define ATOM_S0_TV2 0x00100000L -+#define ATOM_S3_TV2_ACTIVE ATOM_S3_DFP6_ACTIVE -+#define ATOM_S3_TV2_CRTC_ACTIVE ATOM_S3_DFP6_CRTC_ACTIVE -+ -+// -+#define ATOM_S2_CRT1_DPMS_STATE 0x00010000L -+#define ATOM_S2_LCD1_DPMS_STATE 0x00020000L -+#define ATOM_S2_TV1_DPMS_STATE 0x00040000L -+#define ATOM_S2_DFP1_DPMS_STATE 0x00080000L -+#define ATOM_S2_CRT2_DPMS_STATE 0x00100000L -+#define ATOM_S2_LCD2_DPMS_STATE 0x00200000L -+#define ATOM_S2_TV2_DPMS_STATE 0x00400000L -+#define ATOM_S2_DFP2_DPMS_STATE 0x00800000L -+#define ATOM_S2_CV_DPMS_STATE 0x01000000L -+#define ATOM_S2_DFP3_DPMS_STATE 0x02000000L -+#define ATOM_S2_DFP4_DPMS_STATE 0x04000000L -+#define ATOM_S2_DFP5_DPMS_STATE 0x08000000L -+ -+#define ATOM_S2_CRT1_DPMS_STATEb2 0x01 -+#define ATOM_S2_LCD1_DPMS_STATEb2 0x02 -+#define ATOM_S2_TV1_DPMS_STATEb2 0x04 -+#define ATOM_S2_DFP1_DPMS_STATEb2 0x08 -+#define ATOM_S2_CRT2_DPMS_STATEb2 0x10 -+#define ATOM_S2_LCD2_DPMS_STATEb2 0x20 -+#define ATOM_S2_TV2_DPMS_STATEb2 0x40 -+#define ATOM_S2_DFP2_DPMS_STATEb2 0x80 -+#define ATOM_S2_CV_DPMS_STATEb3 0x01 -+#define ATOM_S2_DFP3_DPMS_STATEb3 0x02 -+#define ATOM_S2_DFP4_DPMS_STATEb3 0x04 -+#define ATOM_S2_DFP5_DPMS_STATEb3 0x08 -+ -+#define ATOM_S3_ASIC_GUI_ENGINE_HUNGb3 0x20 -+#define ATOM_S3_ALLOW_FAST_PWR_SWITCHb3 0x40 -+#define ATOM_S3_RQST_GPU_USE_MIN_PWRb3 0x80 - - /*********************************************************************************/ - --#pragma pack() /* BIOS data must use byte aligment */ -+#pragma pack() // BIOS data must use byte aligment - - #endif /* _ATOMBIOS_H */ -diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c -index af464e3..c076eac 100644 ---- a/drivers/gpu/drm/radeon/atombios_crtc.c -+++ b/drivers/gpu/drm/radeon/atombios_crtc.c -@@ -245,21 +245,25 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode) - - switch (mode) { - case DRM_MODE_DPMS_ON: -- atombios_enable_crtc(crtc, 1); -+ atombios_enable_crtc(crtc, ATOM_ENABLE); - if (ASIC_IS_DCE3(rdev)) -- atombios_enable_crtc_memreq(crtc, 1); -- atombios_blank_crtc(crtc, 0); -- drm_vblank_post_modeset(dev, radeon_crtc->crtc_id); -+ atombios_enable_crtc_memreq(crtc, ATOM_ENABLE); -+ atombios_blank_crtc(crtc, ATOM_DISABLE); -+ /* XXX re-enable when interrupt support is added */ -+ if (!ASIC_IS_DCE4(rdev)) -+ drm_vblank_post_modeset(dev, radeon_crtc->crtc_id); - radeon_crtc_load_lut(crtc); - break; - case DRM_MODE_DPMS_STANDBY: - case DRM_MODE_DPMS_SUSPEND: - case DRM_MODE_DPMS_OFF: -- drm_vblank_pre_modeset(dev, radeon_crtc->crtc_id); -- atombios_blank_crtc(crtc, 1); -+ /* XXX re-enable when interrupt support is added */ -+ if (!ASIC_IS_DCE4(rdev)) -+ drm_vblank_pre_modeset(dev, radeon_crtc->crtc_id); -+ atombios_blank_crtc(crtc, ATOM_ENABLE); - if (ASIC_IS_DCE3(rdev)) -- atombios_enable_crtc_memreq(crtc, 0); -- atombios_enable_crtc(crtc, 0); -+ atombios_enable_crtc_memreq(crtc, ATOM_DISABLE); -+ atombios_enable_crtc(crtc, ATOM_DISABLE); - break; - } - } -@@ -363,6 +367,10 @@ static void atombios_set_ss(struct drm_crtc *crtc, int enable) - uint16_t percentage = 0; - uint8_t type = 0, step = 0, delay = 0, range = 0; - -+ /* XXX add ss support for DCE4 */ -+ if (ASIC_IS_DCE4(rdev)) -+ return; -+ - list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { - if (encoder->crtc == crtc) { - radeon_encoder = to_radeon_encoder(encoder); -@@ -409,6 +417,7 @@ static void atombios_set_ss(struct drm_crtc *crtc, int enable) - - union adjust_pixel_clock { - ADJUST_DISPLAY_PLL_PS_ALLOCATION v1; -+ ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 v3; - }; - - static u32 atombios_adjust_pll(struct drm_crtc *crtc, -@@ -420,6 +429,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, - struct drm_encoder *encoder = NULL; - struct radeon_encoder *radeon_encoder = NULL; - u32 adjusted_clock = mode->clock; -+ int encoder_mode = 0; - - /* reset the pll flags */ - pll->flags = 0; -@@ -448,6 +458,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, - list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { - if (encoder->crtc == crtc) { - radeon_encoder = to_radeon_encoder(encoder); -+ encoder_mode = atombios_get_encoder_mode(encoder); - if (ASIC_IS_AVIVO(rdev)) { - /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ - if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1) -@@ -468,14 +479,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, - */ - if (ASIC_IS_DCE3(rdev)) { - union adjust_pixel_clock args; -- struct radeon_encoder_atom_dig *dig; - u8 frev, crev; - int index; - -- if (!radeon_encoder->enc_priv) -- return adjusted_clock; -- dig = radeon_encoder->enc_priv; -- - index = GetIndexIntoMasterTable(COMMAND, AdjustDisplayPll); - atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, - &crev); -@@ -489,12 +495,56 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, - case 2: - args.v1.usPixelClock = cpu_to_le16(mode->clock / 10); - args.v1.ucTransmitterID = radeon_encoder->encoder_id; -- args.v1.ucEncodeMode = atombios_get_encoder_mode(encoder); -+ args.v1.ucEncodeMode = encoder_mode; - - atom_execute_table(rdev->mode_info.atom_context, - index, (uint32_t *)&args); - adjusted_clock = le16_to_cpu(args.v1.usPixelClock) * 10; - break; -+ case 3: -+ args.v3.sInput.usPixelClock = cpu_to_le16(mode->clock / 10); -+ args.v3.sInput.ucTransmitterID = radeon_encoder->encoder_id; -+ args.v3.sInput.ucEncodeMode = encoder_mode; -+ args.v3.sInput.ucDispPllConfig = 0; -+ if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { -+ struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; -+ -+ if (encoder_mode == ATOM_ENCODER_MODE_DP) -+ args.v3.sInput.ucDispPllConfig |= -+ DISPPLL_CONFIG_COHERENT_MODE; -+ else { -+ if (dig->coherent_mode) -+ args.v3.sInput.ucDispPllConfig |= -+ DISPPLL_CONFIG_COHERENT_MODE; -+ if (mode->clock > 165000) -+ args.v3.sInput.ucDispPllConfig |= -+ DISPPLL_CONFIG_DUAL_LINK; -+ } -+ } else if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { -+ /* may want to enable SS on DP/eDP eventually */ -+ /*args.v3.sInput.ucDispPllConfig |= -+ DISPPLL_CONFIG_SS_ENABLE;*/ -+ if (encoder_mode == ATOM_ENCODER_MODE_DP) -+ args.v3.sInput.ucDispPllConfig |= -+ DISPPLL_CONFIG_COHERENT_MODE; -+ else { -+ if (mode->clock > 165000) -+ args.v3.sInput.ucDispPllConfig |= -+ DISPPLL_CONFIG_DUAL_LINK; -+ } -+ } -+ atom_execute_table(rdev->mode_info.atom_context, -+ index, (uint32_t *)&args); -+ adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10; -+ if (args.v3.sOutput.ucRefDiv) { -+ pll->flags |= RADEON_PLL_USE_REF_DIV; -+ pll->reference_div = args.v3.sOutput.ucRefDiv; -+ } -+ if (args.v3.sOutput.ucPostDiv) { -+ pll->flags |= RADEON_PLL_USE_POST_DIV; -+ pll->post_div = args.v3.sOutput.ucPostDiv; -+ } -+ break; - default: - DRM_ERROR("Unknown table version %d %d\n", frev, crev); - return adjusted_clock; -@@ -513,9 +563,47 @@ union set_pixel_clock { - PIXEL_CLOCK_PARAMETERS v1; - PIXEL_CLOCK_PARAMETERS_V2 v2; - PIXEL_CLOCK_PARAMETERS_V3 v3; -+ PIXEL_CLOCK_PARAMETERS_V5 v5; - }; - --void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) -+static void atombios_crtc_set_dcpll(struct drm_crtc *crtc) -+{ -+ struct drm_device *dev = crtc->dev; -+ struct radeon_device *rdev = dev->dev_private; -+ u8 frev, crev; -+ int index; -+ union set_pixel_clock args; -+ -+ memset(&args, 0, sizeof(args)); -+ -+ index = GetIndexIntoMasterTable(COMMAND, SetPixelClock); -+ atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, -+ &crev); -+ -+ switch (frev) { -+ case 1: -+ switch (crev) { -+ case 5: -+ /* if the default dcpll clock is specified, -+ * SetPixelClock provides the dividers -+ */ -+ args.v5.ucCRTC = ATOM_CRTC_INVALID; -+ args.v5.usPixelClock = rdev->clock.default_dispclk; -+ args.v5.ucPpll = ATOM_DCPLL; -+ break; -+ default: -+ DRM_ERROR("Unknown table version %d %d\n", frev, crev); -+ return; -+ } -+ break; -+ default: -+ DRM_ERROR("Unknown table version %d %d\n", frev, crev); -+ return; -+ } -+ atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); -+} -+ -+static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) - { - struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); - struct drm_device *dev = crtc->dev; -@@ -529,12 +617,14 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) - u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; - struct radeon_pll *pll; - u32 adjusted_clock; -+ int encoder_mode = 0; - - memset(&args, 0, sizeof(args)); - - list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { - if (encoder->crtc == crtc) { - radeon_encoder = to_radeon_encoder(encoder); -+ encoder_mode = atombios_get_encoder_mode(encoder); - break; - } - } -@@ -542,10 +632,18 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) - if (!radeon_encoder) - return; - -- if (radeon_crtc->crtc_id == 0) -+ switch (radeon_crtc->pll_id) { -+ case ATOM_PPLL1: - pll = &rdev->clock.p1pll; -- else -+ break; -+ case ATOM_PPLL2: - pll = &rdev->clock.p2pll; -+ break; -+ case ATOM_DCPLL: -+ case ATOM_PPLL_INVALID: -+ pll = &rdev->clock.dcpll; -+ break; -+ } - - /* adjust pixel clock as needed */ - adjusted_clock = atombios_adjust_pll(crtc, mode, pll); -@@ -576,8 +674,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) - args.v1.usFbDiv = cpu_to_le16(fb_div); - args.v1.ucFracFbDiv = frac_fb_div; - args.v1.ucPostDiv = post_div; -- args.v1.ucPpll = -- radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1; -+ args.v1.ucPpll = radeon_crtc->pll_id; - args.v1.ucCRTC = radeon_crtc->crtc_id; - args.v1.ucRefDivSrc = 1; - break; -@@ -587,8 +684,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) - args.v2.usFbDiv = cpu_to_le16(fb_div); - args.v2.ucFracFbDiv = frac_fb_div; - args.v2.ucPostDiv = post_div; -- args.v2.ucPpll = -- radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1; -+ args.v2.ucPpll = radeon_crtc->pll_id; - args.v2.ucCRTC = radeon_crtc->crtc_id; - args.v2.ucRefDivSrc = 1; - break; -@@ -598,12 +694,22 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) - args.v3.usFbDiv = cpu_to_le16(fb_div); - args.v3.ucFracFbDiv = frac_fb_div; - args.v3.ucPostDiv = post_div; -- args.v3.ucPpll = -- radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1; -- args.v3.ucMiscInfo = (radeon_crtc->crtc_id << 2); -+ args.v3.ucPpll = radeon_crtc->pll_id; -+ args.v3.ucMiscInfo = (radeon_crtc->pll_id << 2); - args.v3.ucTransmitterId = radeon_encoder->encoder_id; -- args.v3.ucEncoderMode = -- atombios_get_encoder_mode(encoder); -+ args.v3.ucEncoderMode = encoder_mode; -+ break; -+ case 5: -+ args.v5.ucCRTC = radeon_crtc->crtc_id; -+ args.v5.usPixelClock = cpu_to_le16(mode->clock / 10); -+ args.v5.ucRefDiv = ref_div; -+ args.v5.usFbDiv = cpu_to_le16(fb_div); -+ args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000); -+ args.v5.ucPostDiv = post_div; -+ args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */ -+ args.v5.ucTransmitterID = radeon_encoder->encoder_id; -+ args.v5.ucEncoderMode = encoder_mode; -+ args.v5.ucPpll = radeon_crtc->pll_id; - break; - default: - DRM_ERROR("Unknown table version %d %d\n", frev, crev); -@@ -618,6 +724,140 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) - atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); - } - -+static int evergreen_crtc_set_base(struct drm_crtc *crtc, int x, int y, -+ struct drm_framebuffer *old_fb) -+{ -+ struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); -+ struct drm_device *dev = crtc->dev; -+ struct radeon_device *rdev = dev->dev_private; -+ struct radeon_framebuffer *radeon_fb; -+ struct drm_gem_object *obj; -+ struct radeon_bo *rbo; -+ uint64_t fb_location; -+ uint32_t fb_format, fb_pitch_pixels, tiling_flags; -+ int r; -+ -+ /* no fb bound */ -+ if (!crtc->fb) { -+ DRM_DEBUG("No FB bound\n"); -+ return 0; -+ } -+ -+ radeon_fb = to_radeon_framebuffer(crtc->fb); -+ -+ /* Pin framebuffer & get tilling informations */ -+ obj = radeon_fb->obj; -+ rbo = obj->driver_private; -+ r = radeon_bo_reserve(rbo, false); -+ if (unlikely(r != 0)) -+ return r; -+ r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location); -+ if (unlikely(r != 0)) { -+ radeon_bo_unreserve(rbo); -+ return -EINVAL; -+ } -+ radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); -+ radeon_bo_unreserve(rbo); -+ -+ switch (crtc->fb->bits_per_pixel) { -+ case 8: -+ fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_8BPP) | -+ EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_INDEXED)); -+ break; -+ case 15: -+ fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_16BPP) | -+ EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB1555)); -+ break; -+ case 16: -+ fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_16BPP) | -+ EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB565)); -+ break; -+ case 24: -+ case 32: -+ fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_32BPP) | -+ EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB8888)); -+ break; -+ default: -+ DRM_ERROR("Unsupported screen depth %d\n", -+ crtc->fb->bits_per_pixel); -+ return -EINVAL; -+ } -+ -+ switch (radeon_crtc->crtc_id) { -+ case 0: -+ WREG32(AVIVO_D1VGA_CONTROL, 0); -+ break; -+ case 1: -+ WREG32(AVIVO_D2VGA_CONTROL, 0); -+ break; -+ case 2: -+ WREG32(EVERGREEN_D3VGA_CONTROL, 0); -+ break; -+ case 3: -+ WREG32(EVERGREEN_D4VGA_CONTROL, 0); -+ break; -+ case 4: -+ WREG32(EVERGREEN_D5VGA_CONTROL, 0); -+ break; -+ case 5: -+ WREG32(EVERGREEN_D6VGA_CONTROL, 0); -+ break; -+ default: -+ break; -+ } -+ -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset, -+ upper_32_bits(fb_location)); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset, -+ upper_32_bits(fb_location)); -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, -+ (u32)fb_location & EVERGREEN_GRPH_SURFACE_ADDRESS_MASK); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, -+ (u32) fb_location & EVERGREEN_GRPH_SURFACE_ADDRESS_MASK); -+ WREG32(EVERGREEN_GRPH_CONTROL + radeon_crtc->crtc_offset, fb_format); -+ -+ WREG32(EVERGREEN_GRPH_SURFACE_OFFSET_X + radeon_crtc->crtc_offset, 0); -+ WREG32(EVERGREEN_GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, 0); -+ WREG32(EVERGREEN_GRPH_X_START + radeon_crtc->crtc_offset, 0); -+ WREG32(EVERGREEN_GRPH_Y_START + radeon_crtc->crtc_offset, 0); -+ WREG32(EVERGREEN_GRPH_X_END + radeon_crtc->crtc_offset, crtc->fb->width); -+ WREG32(EVERGREEN_GRPH_Y_END + radeon_crtc->crtc_offset, crtc->fb->height); -+ -+ fb_pitch_pixels = crtc->fb->pitch / (crtc->fb->bits_per_pixel / 8); -+ WREG32(EVERGREEN_GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels); -+ WREG32(EVERGREEN_GRPH_ENABLE + radeon_crtc->crtc_offset, 1); -+ -+ WREG32(EVERGREEN_DESKTOP_HEIGHT + radeon_crtc->crtc_offset, -+ crtc->mode.vdisplay); -+ x &= ~3; -+ y &= ~1; -+ WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset, -+ (x << 16) | y); -+ WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset, -+ (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay); -+ -+ if (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) -+ WREG32(EVERGREEN_DATA_FORMAT + radeon_crtc->crtc_offset, -+ EVERGREEN_INTERLEAVE_EN); -+ else -+ WREG32(EVERGREEN_DATA_FORMAT + radeon_crtc->crtc_offset, 0); -+ -+ if (old_fb && old_fb != crtc->fb) { -+ radeon_fb = to_radeon_framebuffer(old_fb); -+ rbo = radeon_fb->obj->driver_private; -+ r = radeon_bo_reserve(rbo, false); -+ if (unlikely(r != 0)) -+ return r; -+ radeon_bo_unpin(rbo); -+ radeon_bo_unreserve(rbo); -+ } -+ -+ /* Bytes per pixel may have changed */ -+ radeon_bandwidth_update(rdev); -+ -+ return 0; -+} -+ - static int avivo_crtc_set_base(struct drm_crtc *crtc, int x, int y, - struct drm_framebuffer *old_fb) - { -@@ -755,7 +995,9 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, - struct drm_device *dev = crtc->dev; - struct radeon_device *rdev = dev->dev_private; - -- if (ASIC_IS_AVIVO(rdev)) -+ if (ASIC_IS_DCE4(rdev)) -+ return evergreen_crtc_set_base(crtc, x, y, old_fb); -+ else if (ASIC_IS_AVIVO(rdev)) - return avivo_crtc_set_base(crtc, x, y, old_fb); - else - return radeon_crtc_set_base(crtc, x, y, old_fb); -@@ -785,6 +1027,46 @@ static void radeon_legacy_atom_fixup(struct drm_crtc *crtc) - } - } - -+static int radeon_atom_pick_pll(struct drm_crtc *crtc) -+{ -+ struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); -+ struct drm_device *dev = crtc->dev; -+ struct radeon_device *rdev = dev->dev_private; -+ struct drm_encoder *test_encoder; -+ struct drm_crtc *test_crtc; -+ uint32_t pll_in_use = 0; -+ -+ if (ASIC_IS_DCE4(rdev)) { -+ /* if crtc is driving DP and we have an ext clock, use that */ -+ list_for_each_entry(test_encoder, &dev->mode_config.encoder_list, head) { -+ if (test_encoder->crtc && (test_encoder->crtc == crtc)) { -+ if (atombios_get_encoder_mode(test_encoder) == ATOM_ENCODER_MODE_DP) { -+ if (rdev->clock.dp_extclk) -+ return ATOM_PPLL_INVALID; -+ } -+ } -+ } -+ -+ /* otherwise, pick one of the plls */ -+ list_for_each_entry(test_crtc, &dev->mode_config.crtc_list, head) { -+ struct radeon_crtc *radeon_test_crtc; -+ -+ if (crtc == test_crtc) -+ continue; -+ -+ radeon_test_crtc = to_radeon_crtc(test_crtc); -+ if ((radeon_test_crtc->pll_id >= ATOM_PPLL1) && -+ (radeon_test_crtc->pll_id <= ATOM_PPLL2)) -+ pll_in_use |= (1 << radeon_test_crtc->pll_id); -+ } -+ if (!(pll_in_use & 1)) -+ return ATOM_PPLL1; -+ return ATOM_PPLL2; -+ } else -+ return radeon_crtc->crtc_id; -+ -+} -+ - int atombios_crtc_mode_set(struct drm_crtc *crtc, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode, -@@ -796,19 +1078,27 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc, - - /* TODO color tiling */ - -+ /* pick pll */ -+ radeon_crtc->pll_id = radeon_atom_pick_pll(crtc); -+ - atombios_set_ss(crtc, 0); -+ /* always set DCPLL */ -+ if (ASIC_IS_DCE4(rdev)) -+ atombios_crtc_set_dcpll(crtc); - atombios_crtc_set_pll(crtc, adjusted_mode); - atombios_set_ss(crtc, 1); -- atombios_crtc_set_timing(crtc, adjusted_mode); - -- if (ASIC_IS_AVIVO(rdev)) -- atombios_crtc_set_base(crtc, x, y, old_fb); -+ if (ASIC_IS_DCE4(rdev)) -+ atombios_set_crtc_dtd_timing(crtc, adjusted_mode); -+ else if (ASIC_IS_AVIVO(rdev)) -+ atombios_crtc_set_timing(crtc, adjusted_mode); - else { -+ atombios_crtc_set_timing(crtc, adjusted_mode); - if (radeon_crtc->crtc_id == 0) - atombios_set_crtc_dtd_timing(crtc, adjusted_mode); -- atombios_crtc_set_base(crtc, x, y, old_fb); - radeon_legacy_atom_fixup(crtc); - } -+ atombios_crtc_set_base(crtc, x, y, old_fb); - atombios_overscan_setup(crtc, mode, adjusted_mode); - atombios_scaler_setup(crtc); - return 0; -@@ -825,14 +1115,14 @@ static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc, - - static void atombios_crtc_prepare(struct drm_crtc *crtc) - { -- atombios_lock_crtc(crtc, 1); -+ atombios_lock_crtc(crtc, ATOM_ENABLE); - atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); - } - - static void atombios_crtc_commit(struct drm_crtc *crtc) - { - atombios_crtc_dpms(crtc, DRM_MODE_DPMS_ON); -- atombios_lock_crtc(crtc, 0); -+ atombios_lock_crtc(crtc, ATOM_DISABLE); - } - - static const struct drm_crtc_helper_funcs atombios_helper_funcs = { -@@ -848,8 +1138,37 @@ static const struct drm_crtc_helper_funcs atombios_helper_funcs = { - void radeon_atombios_init_crtc(struct drm_device *dev, - struct radeon_crtc *radeon_crtc) - { -- if (radeon_crtc->crtc_id == 1) -- radeon_crtc->crtc_offset = -- AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL; -+ struct radeon_device *rdev = dev->dev_private; -+ -+ if (ASIC_IS_DCE4(rdev)) { -+ switch (radeon_crtc->crtc_id) { -+ case 0: -+ default: -+ radeon_crtc->crtc_offset = EVERGREEN_CRTC0_REGISTER_OFFSET; -+ break; -+ case 1: -+ radeon_crtc->crtc_offset = EVERGREEN_CRTC1_REGISTER_OFFSET; -+ break; -+ case 2: -+ radeon_crtc->crtc_offset = EVERGREEN_CRTC2_REGISTER_OFFSET; -+ break; -+ case 3: -+ radeon_crtc->crtc_offset = EVERGREEN_CRTC3_REGISTER_OFFSET; -+ break; -+ case 4: -+ radeon_crtc->crtc_offset = EVERGREEN_CRTC4_REGISTER_OFFSET; -+ break; -+ case 5: -+ radeon_crtc->crtc_offset = EVERGREEN_CRTC5_REGISTER_OFFSET; -+ break; -+ } -+ } else { -+ if (radeon_crtc->crtc_id == 1) -+ radeon_crtc->crtc_offset = -+ AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL; -+ else -+ radeon_crtc->crtc_offset = 0; -+ } -+ radeon_crtc->pll_id = -1; - drm_crtc_helper_add(&radeon_crtc->base, &atombios_helper_funcs); - } -diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c -index 99915a6..28b31c6 100644 ---- a/drivers/gpu/drm/radeon/atombios_dp.c -+++ b/drivers/gpu/drm/radeon/atombios_dp.c -@@ -321,6 +321,10 @@ static void dp_get_adjust_train(u8 link_status[DP_LINK_STATUS_SIZE], - train_set[lane] = v | p; - } - -+union aux_channel_transaction { -+ PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION v1; -+ PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS_V2 v2; -+}; - - /* radeon aux chan functions */ - bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes, -@@ -329,7 +333,7 @@ bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes, - { - struct drm_device *dev = chan->dev; - struct radeon_device *rdev = dev->dev_private; -- PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION args; -+ union aux_channel_transaction args; - int index = GetIndexIntoMasterTable(COMMAND, ProcessAuxChannelTransaction); - unsigned char *base; - int retry_count = 0; -@@ -341,31 +345,33 @@ bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes, - retry: - memcpy(base, req_bytes, num_bytes); - -- args.lpAuxRequest = 0; -- args.lpDataOut = 16; -- args.ucDataOutLen = 0; -- args.ucChannelID = chan->rec.i2c_id; -- args.ucDelay = delay / 10; -+ args.v1.lpAuxRequest = 0; -+ args.v1.lpDataOut = 16; -+ args.v1.ucDataOutLen = 0; -+ args.v1.ucChannelID = chan->rec.i2c_id; -+ args.v1.ucDelay = delay / 10; -+ if (ASIC_IS_DCE4(rdev)) -+ args.v2.ucHPD_ID = chan->rec.hpd_id; - - atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); - -- if (args.ucReplyStatus && !args.ucDataOutLen) { -- if (args.ucReplyStatus == 0x20 && retry_count++ < 10) -+ if (args.v1.ucReplyStatus && !args.v1.ucDataOutLen) { -+ if (args.v1.ucReplyStatus == 0x20 && retry_count++ < 10) - goto retry; - DRM_DEBUG("failed to get auxch %02x%02x %02x %02x 0x%02x %02x after %d retries\n", - req_bytes[1], req_bytes[0], req_bytes[2], req_bytes[3], -- chan->rec.i2c_id, args.ucReplyStatus, retry_count); -+ chan->rec.i2c_id, args.v1.ucReplyStatus, retry_count); - return false; - } - -- if (args.ucDataOutLen && read_byte && read_buf_len) { -- if (read_buf_len < args.ucDataOutLen) { -+ if (args.v1.ucDataOutLen && read_byte && read_buf_len) { -+ if (read_buf_len < args.v1.ucDataOutLen) { - DRM_ERROR("Buffer to small for return answer %d %d\n", -- read_buf_len, args.ucDataOutLen); -+ read_buf_len, args.v1.ucDataOutLen); - return false; - } - { -- int len = min(read_buf_len, args.ucDataOutLen); -+ int len = min(read_buf_len, args.v1.ucDataOutLen); - memcpy(read_byte, base + 16, len); - } - } -@@ -626,12 +632,19 @@ void dp_link_train(struct drm_encoder *encoder, - dp_set_link_bw_lanes(radeon_connector, link_configuration); - /* disable downspread on the sink */ - dp_set_downspread(radeon_connector, 0); -- /* start training on the source */ -- radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_START, -- dig_connector->dp_clock, enc_id, 0); -- /* set training pattern 1 on the source */ -- radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_PATTERN_SEL, -- dig_connector->dp_clock, enc_id, 0); -+ if (ASIC_IS_DCE4(rdev)) { -+ /* start training on the source */ -+ atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_START); -+ /* set training pattern 1 on the source */ -+ atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN1); -+ } else { -+ /* start training on the source */ -+ radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_START, -+ dig_connector->dp_clock, enc_id, 0); -+ /* set training pattern 1 on the source */ -+ radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_PATTERN_SEL, -+ dig_connector->dp_clock, enc_id, 0); -+ } - - /* set initial vs/emph */ - memset(train_set, 0, 4); -@@ -691,8 +704,11 @@ void dp_link_train(struct drm_encoder *encoder, - /* set training pattern 2 on the sink */ - dp_set_training(radeon_connector, DP_TRAINING_PATTERN_2); - /* set training pattern 2 on the source */ -- radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_PATTERN_SEL, -- dig_connector->dp_clock, enc_id, 1); -+ if (ASIC_IS_DCE4(rdev)) -+ atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN2); -+ else -+ radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_PATTERN_SEL, -+ dig_connector->dp_clock, enc_id, 1); - - /* channel equalization loop */ - tries = 0; -@@ -731,8 +747,12 @@ void dp_link_train(struct drm_encoder *encoder, - /* disable the training pattern on the sink */ - dp_set_training(radeon_connector, DP_TRAINING_PATTERN_DISABLE); - -- radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_COMPLETE, -- dig_connector->dp_clock, enc_id, 0); -+ /* disable the training pattern on the source */ -+ if (ASIC_IS_DCE4(rdev)) -+ atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_COMPLETE); -+ else -+ radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_COMPLETE, -+ dig_connector->dp_clock, enc_id, 0); - } - - int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, -diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c -new file mode 100644 -index 0000000..c2f9752 ---- /dev/null -+++ b/drivers/gpu/drm/radeon/evergreen.c -@@ -0,0 +1,794 @@ -+/* -+ * Copyright 2010 Advanced Micro Devices, Inc. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sublicense, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included in -+ * all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR -+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ * -+ * Authors: Alex Deucher -+ */ -+#include -+#include -+#include "drmP.h" -+#include "radeon.h" -+#include "radeon_drm.h" -+#include "rv770d.h" -+#include "atom.h" -+#include "avivod.h" -+#include "evergreen_reg.h" -+ -+static void evergreen_gpu_init(struct radeon_device *rdev); -+void evergreen_fini(struct radeon_device *rdev); -+ -+bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) -+{ -+ bool connected = false; -+ /* XXX */ -+ return connected; -+} -+ -+void evergreen_hpd_set_polarity(struct radeon_device *rdev, -+ enum radeon_hpd_id hpd) -+{ -+ /* XXX */ -+} -+ -+void evergreen_hpd_init(struct radeon_device *rdev) -+{ -+ /* XXX */ -+} -+ -+ -+void evergreen_bandwidth_update(struct radeon_device *rdev) -+{ -+ /* XXX */ -+} -+ -+void evergreen_hpd_fini(struct radeon_device *rdev) -+{ -+ /* XXX */ -+} -+ -+static int evergreen_mc_wait_for_idle(struct radeon_device *rdev) -+{ -+ unsigned i; -+ u32 tmp; -+ -+ for (i = 0; i < rdev->usec_timeout; i++) { -+ /* read MC_STATUS */ -+ tmp = RREG32(SRBM_STATUS) & 0x1F00; -+ if (!tmp) -+ return 0; -+ udelay(1); -+ } -+ return -1; -+} -+ -+/* -+ * GART -+ */ -+int evergreen_pcie_gart_enable(struct radeon_device *rdev) -+{ -+ u32 tmp; -+ int r, i; -+ -+ if (rdev->gart.table.vram.robj == NULL) { -+ dev_err(rdev->dev, "No VRAM object for PCIE GART.\n"); -+ return -EINVAL; -+ } -+ r = radeon_gart_table_vram_pin(rdev); -+ if (r) -+ return r; -+ /* Setup L2 cache */ -+ WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | -+ ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | -+ EFFECTIVE_L2_QUEUE_SIZE(7)); -+ WREG32(VM_L2_CNTL2, 0); -+ WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); -+ /* Setup TLB control */ -+ tmp = ENABLE_L1_TLB | ENABLE_L1_FRAGMENT_PROCESSING | -+ SYSTEM_ACCESS_MODE_NOT_IN_SYS | -+ SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU | -+ EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5); -+ WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); -+ WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp); -+ WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp); -+ WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); -+ WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); -+ WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); -+ WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | -+ RANGE_PROTECTION_FAULT_ENABLE_DEFAULT); -+ WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR, -+ (u32)(rdev->dummy_page.addr >> 12)); -+ for (i = 1; i < 7; i++) -+ WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); -+ -+ r600_pcie_gart_tlb_flush(rdev); -+ rdev->gart.ready = true; -+ return 0; -+} -+ -+void evergreen_pcie_gart_disable(struct radeon_device *rdev) -+{ -+ u32 tmp; -+ int i, r; -+ -+ /* Disable all tables */ -+ for (i = 0; i < 7; i++) -+ WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); -+ -+ /* Setup L2 cache */ -+ WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING | -+ EFFECTIVE_L2_QUEUE_SIZE(7)); -+ WREG32(VM_L2_CNTL2, 0); -+ WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); -+ /* Setup TLB control */ -+ tmp = EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5); -+ WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); -+ WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp); -+ WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp); -+ if (rdev->gart.table.vram.robj) { -+ r = radeon_bo_reserve(rdev->gart.table.vram.robj, false); -+ if (likely(r == 0)) { -+ radeon_bo_kunmap(rdev->gart.table.vram.robj); -+ radeon_bo_unpin(rdev->gart.table.vram.robj); -+ radeon_bo_unreserve(rdev->gart.table.vram.robj); -+ } -+ } -+} -+ -+void evergreen_pcie_gart_fini(struct radeon_device *rdev) -+{ -+ evergreen_pcie_gart_disable(rdev); -+ radeon_gart_table_vram_free(rdev); -+ radeon_gart_fini(rdev); -+} -+ -+ -+void evergreen_agp_enable(struct radeon_device *rdev) -+{ -+ u32 tmp; -+ int i; -+ -+ /* Setup L2 cache */ -+ WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | -+ ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | -+ EFFECTIVE_L2_QUEUE_SIZE(7)); -+ WREG32(VM_L2_CNTL2, 0); -+ WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); -+ /* Setup TLB control */ -+ tmp = ENABLE_L1_TLB | ENABLE_L1_FRAGMENT_PROCESSING | -+ SYSTEM_ACCESS_MODE_NOT_IN_SYS | -+ SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU | -+ EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5); -+ WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); -+ WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp); -+ WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp); -+ WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp); -+ for (i = 0; i < 7; i++) -+ WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); -+} -+ -+static void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save) -+{ -+ save->vga_control[0] = RREG32(D1VGA_CONTROL); -+ save->vga_control[1] = RREG32(D2VGA_CONTROL); -+ save->vga_control[2] = RREG32(EVERGREEN_D3VGA_CONTROL); -+ save->vga_control[3] = RREG32(EVERGREEN_D4VGA_CONTROL); -+ save->vga_control[4] = RREG32(EVERGREEN_D5VGA_CONTROL); -+ save->vga_control[5] = RREG32(EVERGREEN_D6VGA_CONTROL); -+ save->vga_render_control = RREG32(VGA_RENDER_CONTROL); -+ save->vga_hdp_control = RREG32(VGA_HDP_CONTROL); -+ save->crtc_control[0] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET); -+ save->crtc_control[1] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET); -+ save->crtc_control[2] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET); -+ save->crtc_control[3] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET); -+ save->crtc_control[4] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET); -+ save->crtc_control[5] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET); -+ -+ /* Stop all video */ -+ WREG32(VGA_RENDER_CONTROL, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); -+ -+ WREG32(D1VGA_CONTROL, 0); -+ WREG32(D2VGA_CONTROL, 0); -+ WREG32(EVERGREEN_D3VGA_CONTROL, 0); -+ WREG32(EVERGREEN_D4VGA_CONTROL, 0); -+ WREG32(EVERGREEN_D5VGA_CONTROL, 0); -+ WREG32(EVERGREEN_D6VGA_CONTROL, 0); -+} -+ -+static void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save) -+{ -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC0_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC0_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + EVERGREEN_CRTC0_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + EVERGREEN_CRTC0_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC1_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC1_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + EVERGREEN_CRTC1_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + EVERGREEN_CRTC1_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC2_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC2_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + EVERGREEN_CRTC2_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + EVERGREEN_CRTC2_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC3_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC3_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + EVERGREEN_CRTC3_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + EVERGREEN_CRTC3_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC4_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC4_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + EVERGREEN_CRTC4_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + EVERGREEN_CRTC4_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC5_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC5_REGISTER_OFFSET, -+ upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + EVERGREEN_CRTC5_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + EVERGREEN_CRTC5_REGISTER_OFFSET, -+ (u32)rdev->mc.vram_start); -+ -+ WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH, upper_32_bits(rdev->mc.vram_start)); -+ WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start); -+ /* Unlock host access */ -+ WREG32(VGA_HDP_CONTROL, save->vga_hdp_control); -+ mdelay(1); -+ /* Restore video state */ -+ WREG32(D1VGA_CONTROL, save->vga_control[0]); -+ WREG32(D2VGA_CONTROL, save->vga_control[1]); -+ WREG32(EVERGREEN_D3VGA_CONTROL, save->vga_control[2]); -+ WREG32(EVERGREEN_D4VGA_CONTROL, save->vga_control[3]); -+ WREG32(EVERGREEN_D5VGA_CONTROL, save->vga_control[4]); -+ WREG32(EVERGREEN_D6VGA_CONTROL, save->vga_control[5]); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 1); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, save->crtc_control[0]); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, save->crtc_control[1]); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, save->crtc_control[2]); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, save->crtc_control[3]); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, save->crtc_control[4]); -+ WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, save->crtc_control[5]); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); -+ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); -+ WREG32(VGA_RENDER_CONTROL, save->vga_render_control); -+} -+ -+static void evergreen_mc_program(struct radeon_device *rdev) -+{ -+ struct evergreen_mc_save save; -+ u32 tmp; -+ int i, j; -+ -+ /* Initialize HDP */ -+ for (i = 0, j = 0; i < 32; i++, j += 0x18) { -+ WREG32((0x2c14 + j), 0x00000000); -+ WREG32((0x2c18 + j), 0x00000000); -+ WREG32((0x2c1c + j), 0x00000000); -+ WREG32((0x2c20 + j), 0x00000000); -+ WREG32((0x2c24 + j), 0x00000000); -+ } -+ WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0); -+ -+ evergreen_mc_stop(rdev, &save); -+ if (evergreen_mc_wait_for_idle(rdev)) { -+ dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); -+ } -+ /* Lockout access through VGA aperture*/ -+ WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); -+ /* Update configuration */ -+ if (rdev->flags & RADEON_IS_AGP) { -+ if (rdev->mc.vram_start < rdev->mc.gtt_start) { -+ /* VRAM before AGP */ -+ WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR, -+ rdev->mc.vram_start >> 12); -+ WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, -+ rdev->mc.gtt_end >> 12); -+ } else { -+ /* VRAM after AGP */ -+ WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR, -+ rdev->mc.gtt_start >> 12); -+ WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, -+ rdev->mc.vram_end >> 12); -+ } -+ } else { -+ WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR, -+ rdev->mc.vram_start >> 12); -+ WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, -+ rdev->mc.vram_end >> 12); -+ } -+ WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0); -+ tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16; -+ tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); -+ WREG32(MC_VM_FB_LOCATION, tmp); -+ WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8)); -+ WREG32(HDP_NONSURFACE_INFO, (2 << 7)); -+ WREG32(HDP_NONSURFACE_SIZE, (rdev->mc.mc_vram_size - 1) | 0x3FF); -+ if (rdev->flags & RADEON_IS_AGP) { -+ WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16); -+ WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16); -+ WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22); -+ } else { -+ WREG32(MC_VM_AGP_BASE, 0); -+ WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF); -+ WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF); -+ } -+ if (evergreen_mc_wait_for_idle(rdev)) { -+ dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); -+ } -+ evergreen_mc_resume(rdev, &save); -+ /* we need to own VRAM, so turn off the VGA renderer here -+ * to stop it overwriting our objects */ -+ rv515_vga_render_disable(rdev); -+} -+ -+#if 0 -+/* -+ * CP. -+ */ -+static void evergreen_cp_stop(struct radeon_device *rdev) -+{ -+ /* XXX */ -+} -+ -+ -+static int evergreen_cp_load_microcode(struct radeon_device *rdev) -+{ -+ /* XXX */ -+ -+ return 0; -+} -+ -+ -+/* -+ * Core functions -+ */ -+static u32 evergreen_get_tile_pipe_to_backend_map(u32 num_tile_pipes, -+ u32 num_backends, -+ u32 backend_disable_mask) -+{ -+ u32 backend_map = 0; -+ -+ return backend_map; -+} -+#endif -+ -+static void evergreen_gpu_init(struct radeon_device *rdev) -+{ -+ /* XXX */ -+} -+ -+int evergreen_mc_init(struct radeon_device *rdev) -+{ -+ fixed20_12 a; -+ u32 tmp; -+ int chansize, numchan; -+ int r; -+ -+ /* Get VRAM informations */ -+ rdev->mc.vram_is_ddr = true; -+ tmp = RREG32(MC_ARB_RAMCFG); -+ if (tmp & CHANSIZE_OVERRIDE) { -+ chansize = 16; -+ } else if (tmp & CHANSIZE_MASK) { -+ chansize = 64; -+ } else { -+ chansize = 32; -+ } -+ tmp = RREG32(MC_SHARED_CHMAP); -+ switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) { -+ case 0: -+ default: -+ numchan = 1; -+ break; -+ case 1: -+ numchan = 2; -+ break; -+ case 2: -+ numchan = 4; -+ break; -+ case 3: -+ numchan = 8; -+ break; -+ } -+ rdev->mc.vram_width = numchan * chansize; -+ /* Could aper size report 0 ? */ -+ rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); -+ rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); -+ /* Setup GPU memory space */ -+ /* size in MB on evergreen */ -+ rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; -+ rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; -+ -+ if (rdev->mc.mc_vram_size > rdev->mc.aper_size) -+ rdev->mc.mc_vram_size = rdev->mc.aper_size; -+ -+ if (rdev->mc.real_vram_size > rdev->mc.aper_size) -+ rdev->mc.real_vram_size = rdev->mc.aper_size; -+ -+ if (rdev->flags & RADEON_IS_AGP) { -+ r = radeon_agp_init(rdev); -+ if (r) -+ return r; -+ /* gtt_size is setup by radeon_agp_init */ -+ rdev->mc.gtt_location = rdev->mc.agp_base; -+ tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size; -+ /* Try to put vram before or after AGP because we -+ * we want SYSTEM_APERTURE to cover both VRAM and -+ * AGP so that GPU can catch out of VRAM/AGP access -+ */ -+ if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) { -+ /* Enought place before */ -+ rdev->mc.vram_location = rdev->mc.gtt_location - -+ rdev->mc.mc_vram_size; -+ } else if (tmp > rdev->mc.mc_vram_size) { -+ /* Enought place after */ -+ rdev->mc.vram_location = rdev->mc.gtt_location + -+ rdev->mc.gtt_size; -+ } else { -+ /* Try to setup VRAM then AGP might not -+ * not work on some card -+ */ -+ rdev->mc.vram_location = 0x00000000UL; -+ rdev->mc.gtt_location = rdev->mc.mc_vram_size; -+ } -+ } else { -+ rdev->mc.vram_location = 0x00000000UL; -+ rdev->mc.gtt_location = rdev->mc.mc_vram_size; -+ rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; -+ } -+ rdev->mc.vram_start = rdev->mc.vram_location; -+ rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; -+ rdev->mc.gtt_start = rdev->mc.gtt_location; -+ rdev->mc.gtt_end = rdev->mc.gtt_location + rdev->mc.gtt_size - 1; -+ /* FIXME: we should enforce default clock in case GPU is not in -+ * default setup -+ */ -+ a.full = rfixed_const(100); -+ rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk); -+ rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a); -+ return 0; -+} -+int evergreen_gpu_reset(struct radeon_device *rdev) -+{ -+ /* FIXME: implement for evergreen */ -+ return 0; -+} -+ -+static int evergreen_startup(struct radeon_device *rdev) -+{ -+#if 0 -+ int r; -+ -+ if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) { -+ r = r600_init_microcode(rdev); -+ if (r) { -+ DRM_ERROR("Failed to load firmware!\n"); -+ return r; -+ } -+ } -+#endif -+ evergreen_mc_program(rdev); -+#if 0 -+ if (rdev->flags & RADEON_IS_AGP) { -+ evergreem_agp_enable(rdev); -+ } else { -+ r = evergreen_pcie_gart_enable(rdev); -+ if (r) -+ return r; -+ } -+#endif -+ evergreen_gpu_init(rdev); -+#if 0 -+ if (!rdev->r600_blit.shader_obj) { -+ r = r600_blit_init(rdev); -+ if (r) { -+ DRM_ERROR("radeon: failed blitter (%d).\n", r); -+ return r; -+ } -+ } -+ -+ r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); -+ if (unlikely(r != 0)) -+ return r; -+ r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM, -+ &rdev->r600_blit.shader_gpu_addr); -+ radeon_bo_unreserve(rdev->r600_blit.shader_obj); -+ if (r) { -+ DRM_ERROR("failed to pin blit object %d\n", r); -+ return r; -+ } -+ -+ /* Enable IRQ */ -+ r = r600_irq_init(rdev); -+ if (r) { -+ DRM_ERROR("radeon: IH init failed (%d).\n", r); -+ radeon_irq_kms_fini(rdev); -+ return r; -+ } -+ r600_irq_set(rdev); -+ -+ r = radeon_ring_init(rdev, rdev->cp.ring_size); -+ if (r) -+ return r; -+ r = evergreen_cp_load_microcode(rdev); -+ if (r) -+ return r; -+ r = r600_cp_resume(rdev); -+ if (r) -+ return r; -+ /* write back buffer are not vital so don't worry about failure */ -+ r600_wb_enable(rdev); -+#endif -+ return 0; -+} -+ -+int evergreen_resume(struct radeon_device *rdev) -+{ -+ int r; -+ -+ /* Do not reset GPU before posting, on rv770 hw unlike on r500 hw, -+ * posting will perform necessary task to bring back GPU into good -+ * shape. -+ */ -+ /* post card */ -+ atom_asic_init(rdev->mode_info.atom_context); -+ /* Initialize clocks */ -+ r = radeon_clocks_init(rdev); -+ if (r) { -+ return r; -+ } -+ -+ r = evergreen_startup(rdev); -+ if (r) { -+ DRM_ERROR("r600 startup failed on resume\n"); -+ return r; -+ } -+#if 0 -+ r = r600_ib_test(rdev); -+ if (r) { -+ DRM_ERROR("radeon: failled testing IB (%d).\n", r); -+ return r; -+ } -+#endif -+ return r; -+ -+} -+ -+int evergreen_suspend(struct radeon_device *rdev) -+{ -+#if 0 -+ int r; -+ -+ /* FIXME: we should wait for ring to be empty */ -+ r700_cp_stop(rdev); -+ rdev->cp.ready = false; -+ r600_wb_disable(rdev); -+ evergreen_pcie_gart_disable(rdev); -+ /* unpin shaders bo */ -+ r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); -+ if (likely(r == 0)) { -+ radeon_bo_unpin(rdev->r600_blit.shader_obj); -+ radeon_bo_unreserve(rdev->r600_blit.shader_obj); -+ } -+#endif -+ return 0; -+} -+ -+static bool evergreen_card_posted(struct radeon_device *rdev) -+{ -+ u32 reg; -+ -+ /* first check CRTCs */ -+ reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) | -+ RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET) | -+ RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) | -+ RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET) | -+ RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) | -+ RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET); -+ if (reg & EVERGREEN_CRTC_MASTER_EN) -+ return true; -+ -+ /* then check MEM_SIZE, in case the crtcs are off */ -+ if (RREG32(CONFIG_MEMSIZE)) -+ return true; -+ -+ return false; -+} -+ -+/* Plan is to move initialization in that function and use -+ * helper function so that radeon_device_init pretty much -+ * do nothing more than calling asic specific function. This -+ * should also allow to remove a bunch of callback function -+ * like vram_info. -+ */ -+int evergreen_init(struct radeon_device *rdev) -+{ -+ int r; -+ -+ r = radeon_dummy_page_init(rdev); -+ if (r) -+ return r; -+ /* This don't do much */ -+ r = radeon_gem_init(rdev); -+ if (r) -+ return r; -+ /* Read BIOS */ -+ if (!radeon_get_bios(rdev)) { -+ if (ASIC_IS_AVIVO(rdev)) -+ return -EINVAL; -+ } -+ /* Must be an ATOMBIOS */ -+ if (!rdev->is_atom_bios) { -+ dev_err(rdev->dev, "Expecting atombios for R600 GPU\n"); -+ return -EINVAL; -+ } -+ r = radeon_atombios_init(rdev); -+ if (r) -+ return r; -+ /* Post card if necessary */ -+ if (!evergreen_card_posted(rdev)) { -+ if (!rdev->bios) { -+ dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); -+ return -EINVAL; -+ } -+ DRM_INFO("GPU not posted. posting now...\n"); -+ atom_asic_init(rdev->mode_info.atom_context); -+ } -+ /* Initialize scratch registers */ -+ r600_scratch_init(rdev); -+ /* Initialize surface registers */ -+ radeon_surface_init(rdev); -+ /* Initialize clocks */ -+ radeon_get_clock_info(rdev->ddev); -+ r = radeon_clocks_init(rdev); -+ if (r) -+ return r; -+ /* Initialize power management */ -+ radeon_pm_init(rdev); -+ /* Fence driver */ -+ r = radeon_fence_driver_init(rdev); -+ if (r) -+ return r; -+ r = evergreen_mc_init(rdev); -+ if (r) -+ return r; -+ /* Memory manager */ -+ r = radeon_bo_init(rdev); -+ if (r) -+ return r; -+#if 0 -+ r = radeon_irq_kms_init(rdev); -+ if (r) -+ return r; -+ -+ rdev->cp.ring_obj = NULL; -+ r600_ring_init(rdev, 1024 * 1024); -+ -+ rdev->ih.ring_obj = NULL; -+ r600_ih_ring_init(rdev, 64 * 1024); -+ -+ r = r600_pcie_gart_init(rdev); -+ if (r) -+ return r; -+#endif -+ rdev->accel_working = false; -+ r = evergreen_startup(rdev); -+ if (r) { -+ evergreen_suspend(rdev); -+ /*r600_wb_fini(rdev);*/ -+ /*radeon_ring_fini(rdev);*/ -+ /*evergreen_pcie_gart_fini(rdev);*/ -+ rdev->accel_working = false; -+ } -+ if (rdev->accel_working) { -+ r = radeon_ib_pool_init(rdev); -+ if (r) { -+ DRM_ERROR("radeon: failed initializing IB pool (%d).\n", r); -+ rdev->accel_working = false; -+ } -+ r = r600_ib_test(rdev); -+ if (r) { -+ DRM_ERROR("radeon: failed testing IB (%d).\n", r); -+ rdev->accel_working = false; -+ } -+ } -+ return 0; -+} -+ -+void evergreen_fini(struct radeon_device *rdev) -+{ -+ evergreen_suspend(rdev); -+#if 0 -+ r600_blit_fini(rdev); -+ r600_irq_fini(rdev); -+ radeon_irq_kms_fini(rdev); -+ radeon_ring_fini(rdev); -+ r600_wb_fini(rdev); -+ evergreen_pcie_gart_fini(rdev); -+#endif -+ radeon_gem_fini(rdev); -+ radeon_fence_driver_fini(rdev); -+ radeon_clocks_fini(rdev); -+ radeon_agp_fini(rdev); -+ radeon_bo_fini(rdev); -+ radeon_atombios_fini(rdev); -+ kfree(rdev->bios); -+ rdev->bios = NULL; -+ radeon_dummy_page_fini(rdev); -+} -diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h -new file mode 100644 -index 0000000..f7c7c96 ---- /dev/null -+++ b/drivers/gpu/drm/radeon/evergreen_reg.h -@@ -0,0 +1,176 @@ -+/* -+ * Copyright 2010 Advanced Micro Devices, Inc. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sublicense, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included in -+ * all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR -+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ * -+ * Authors: Alex Deucher -+ */ -+#ifndef __EVERGREEN_REG_H__ -+#define __EVERGREEN_REG_H__ -+ -+/* evergreen */ -+#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS 0x310 -+#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH 0x324 -+#define EVERGREEN_D3VGA_CONTROL 0x3e0 -+#define EVERGREEN_D4VGA_CONTROL 0x3e4 -+#define EVERGREEN_D5VGA_CONTROL 0x3e8 -+#define EVERGREEN_D6VGA_CONTROL 0x3ec -+ -+#define EVERGREEN_P1PLL_SS_CNTL 0x414 -+#define EVERGREEN_P2PLL_SS_CNTL 0x454 -+# define EVERGREEN_PxPLL_SS_EN (1 << 12) -+/* GRPH blocks at 0x6800, 0x7400, 0x10000, 0x10c00, 0x11800, 0x12400 */ -+#define EVERGREEN_GRPH_ENABLE 0x6800 -+#define EVERGREEN_GRPH_CONTROL 0x6804 -+# define EVERGREEN_GRPH_DEPTH(x) (((x) & 0x3) << 0) -+# define EVERGREEN_GRPH_DEPTH_8BPP 0 -+# define EVERGREEN_GRPH_DEPTH_16BPP 1 -+# define EVERGREEN_GRPH_DEPTH_32BPP 2 -+# define EVERGREEN_GRPH_FORMAT(x) (((x) & 0x7) << 8) -+/* 8 BPP */ -+# define EVERGREEN_GRPH_FORMAT_INDEXED 0 -+/* 16 BPP */ -+# define EVERGREEN_GRPH_FORMAT_ARGB1555 0 -+# define EVERGREEN_GRPH_FORMAT_ARGB565 1 -+# define EVERGREEN_GRPH_FORMAT_ARGB4444 2 -+# define EVERGREEN_GRPH_FORMAT_AI88 3 -+# define EVERGREEN_GRPH_FORMAT_MONO16 4 -+# define EVERGREEN_GRPH_FORMAT_BGRA5551 5 -+/* 32 BPP */ -+# define EVERGREEN_GRPH_FORMAT_ARGB8888 0 -+# define EVERGREEN_GRPH_FORMAT_ARGB2101010 1 -+# define EVERGREEN_GRPH_FORMAT_32BPP_DIG 2 -+# define EVERGREEN_GRPH_FORMAT_8B_ARGB2101010 3 -+# define EVERGREEN_GRPH_FORMAT_BGRA1010102 4 -+# define EVERGREEN_GRPH_FORMAT_8B_BGRA1010102 5 -+# define EVERGREEN_GRPH_FORMAT_RGB111110 6 -+# define EVERGREEN_GRPH_FORMAT_BGR101111 7 -+#define EVERGREEN_GRPH_SWAP_CONTROL 0x680c -+# define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) -+# define EVERGREEN_GRPH_ENDIAN_NONE 0 -+# define EVERGREEN_GRPH_ENDIAN_8IN16 1 -+# define EVERGREEN_GRPH_ENDIAN_8IN32 2 -+# define EVERGREEN_GRPH_ENDIAN_8IN64 3 -+# define EVERGREEN_GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4) -+# define EVERGREEN_GRPH_RED_SEL_R 0 -+# define EVERGREEN_GRPH_RED_SEL_G 1 -+# define EVERGREEN_GRPH_RED_SEL_B 2 -+# define EVERGREEN_GRPH_RED_SEL_A 3 -+# define EVERGREEN_GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6) -+# define EVERGREEN_GRPH_GREEN_SEL_G 0 -+# define EVERGREEN_GRPH_GREEN_SEL_B 1 -+# define EVERGREEN_GRPH_GREEN_SEL_A 2 -+# define EVERGREEN_GRPH_GREEN_SEL_R 3 -+# define EVERGREEN_GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8) -+# define EVERGREEN_GRPH_BLUE_SEL_B 0 -+# define EVERGREEN_GRPH_BLUE_SEL_A 1 -+# define EVERGREEN_GRPH_BLUE_SEL_R 2 -+# define EVERGREEN_GRPH_BLUE_SEL_G 3 -+# define EVERGREEN_GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10) -+# define EVERGREEN_GRPH_ALPHA_SEL_A 0 -+# define EVERGREEN_GRPH_ALPHA_SEL_R 1 -+# define EVERGREEN_GRPH_ALPHA_SEL_G 2 -+# define EVERGREEN_GRPH_ALPHA_SEL_B 3 -+#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS 0x6810 -+#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS 0x6814 -+# define EVERGREEN_GRPH_DFQ_ENABLE (1 << 0) -+# define EVERGREEN_GRPH_SURFACE_ADDRESS_MASK 0xffffff00 -+#define EVERGREEN_GRPH_PITCH 0x6818 -+#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x681c -+#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x6820 -+#define EVERGREEN_GRPH_SURFACE_OFFSET_X 0x6824 -+#define EVERGREEN_GRPH_SURFACE_OFFSET_Y 0x6828 -+#define EVERGREEN_GRPH_X_START 0x682c -+#define EVERGREEN_GRPH_Y_START 0x6830 -+#define EVERGREEN_GRPH_X_END 0x6834 -+#define EVERGREEN_GRPH_Y_END 0x6838 -+ -+/* CUR blocks at 0x6998, 0x7598, 0x10198, 0x10d98, 0x11998, 0x12598 */ -+#define EVERGREEN_CUR_CONTROL 0x6998 -+# define EVERGREEN_CURSOR_EN (1 << 0) -+# define EVERGREEN_CURSOR_MODE(x) (((x) & 0x3) << 8) -+# define EVERGREEN_CURSOR_MONO 0 -+# define EVERGREEN_CURSOR_24_1 1 -+# define EVERGREEN_CURSOR_24_8_PRE_MULT 2 -+# define EVERGREEN_CURSOR_24_8_UNPRE_MULT 3 -+# define EVERGREEN_CURSOR_2X_MAGNIFY (1 << 16) -+# define EVERGREEN_CURSOR_FORCE_MC_ON (1 << 20) -+# define EVERGREEN_CURSOR_URGENT_CONTROL(x) (((x) & 0x7) << 24) -+# define EVERGREEN_CURSOR_URGENT_ALWAYS 0 -+# define EVERGREEN_CURSOR_URGENT_1_8 1 -+# define EVERGREEN_CURSOR_URGENT_1_4 2 -+# define EVERGREEN_CURSOR_URGENT_3_8 3 -+# define EVERGREEN_CURSOR_URGENT_1_2 4 -+#define EVERGREEN_CUR_SURFACE_ADDRESS 0x699c -+# define EVERGREEN_CUR_SURFACE_ADDRESS_MASK 0xfffff000 -+#define EVERGREEN_CUR_SIZE 0x69a0 -+#define EVERGREEN_CUR_SURFACE_ADDRESS_HIGH 0x69a4 -+#define EVERGREEN_CUR_POSITION 0x69a8 -+#define EVERGREEN_CUR_HOT_SPOT 0x69ac -+#define EVERGREEN_CUR_COLOR1 0x69b0 -+#define EVERGREEN_CUR_COLOR2 0x69b4 -+#define EVERGREEN_CUR_UPDATE 0x69b8 -+# define EVERGREEN_CURSOR_UPDATE_PENDING (1 << 0) -+# define EVERGREEN_CURSOR_UPDATE_TAKEN (1 << 1) -+# define EVERGREEN_CURSOR_UPDATE_LOCK (1 << 16) -+# define EVERGREEN_CURSOR_DISABLE_MULTIPLE_UPDATE (1 << 24) -+ -+/* LUT blocks at 0x69e0, 0x75e0, 0x101e0, 0x10de0, 0x119e0, 0x125e0 */ -+#define EVERGREEN_DC_LUT_RW_MODE 0x69e0 -+#define EVERGREEN_DC_LUT_RW_INDEX 0x69e4 -+#define EVERGREEN_DC_LUT_SEQ_COLOR 0x69e8 -+#define EVERGREEN_DC_LUT_PWL_DATA 0x69ec -+#define EVERGREEN_DC_LUT_30_COLOR 0x69f0 -+#define EVERGREEN_DC_LUT_VGA_ACCESS_ENABLE 0x69f4 -+#define EVERGREEN_DC_LUT_WRITE_EN_MASK 0x69f8 -+#define EVERGREEN_DC_LUT_AUTOFILL 0x69fc -+#define EVERGREEN_DC_LUT_CONTROL 0x6a00 -+#define EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE 0x6a04 -+#define EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN 0x6a08 -+#define EVERGREEN_DC_LUT_BLACK_OFFSET_RED 0x6a0c -+#define EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE 0x6a10 -+#define EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN 0x6a14 -+#define EVERGREEN_DC_LUT_WHITE_OFFSET_RED 0x6a18 -+ -+#define EVERGREEN_DATA_FORMAT 0x6b00 -+# define EVERGREEN_INTERLEAVE_EN (1 << 0) -+#define EVERGREEN_DESKTOP_HEIGHT 0x6b04 -+ -+#define EVERGREEN_VIEWPORT_START 0x6d70 -+#define EVERGREEN_VIEWPORT_SIZE 0x6d74 -+ -+/* display controller offsets used for crtc/cur/lut/grph/viewport/etc. */ -+#define EVERGREEN_CRTC0_REGISTER_OFFSET (0x6df0 - 0x6df0) -+#define EVERGREEN_CRTC1_REGISTER_OFFSET (0x79f0 - 0x6df0) -+#define EVERGREEN_CRTC2_REGISTER_OFFSET (0x105f0 - 0x6df0) -+#define EVERGREEN_CRTC3_REGISTER_OFFSET (0x111f0 - 0x6df0) -+#define EVERGREEN_CRTC4_REGISTER_OFFSET (0x11df0 - 0x6df0) -+#define EVERGREEN_CRTC5_REGISTER_OFFSET (0x129f0 - 0x6df0) -+ -+/* CRTC blocks at 0x6df0, 0x79f0, 0x105f0, 0x111f0, 0x11df0, 0x129f0 */ -+#define EVERGREEN_CRTC_CONTROL 0x6e70 -+# define EVERGREEN_CRTC_MASTER_EN (1 << 0) -+#define EVERGREEN_CRTC_UPDATE_LOCK 0x6ed4 -+ -+#define EVERGREEN_DC_GPIO_HPD_MASK 0x64b0 -+#define EVERGREEN_DC_GPIO_HPD_A 0x64b4 -+#define EVERGREEN_DC_GPIO_HPD_EN 0x64b8 -+#define EVERGREEN_DC_GPIO_HPD_Y 0x64bc -+ -+#endif -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index c0356bb..d564c62 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -138,11 +138,14 @@ void radeon_dummy_page_fini(struct radeon_device *rdev); - struct radeon_clock { - struct radeon_pll p1pll; - struct radeon_pll p2pll; -+ struct radeon_pll dcpll; - struct radeon_pll spll; - struct radeon_pll mpll; - /* 10 Khz units */ - uint32_t default_mclk; - uint32_t default_sclk; -+ uint32_t default_dispclk; -+ uint32_t dp_extclk; - }; - - /* -@@ -830,6 +833,7 @@ struct radeon_device { - struct r600_ih ih; /* r6/700 interrupt ring */ - struct workqueue_struct *wq; - struct work_struct hotplug_work; -+ int num_crtc; /* number of crtcs */ - - /* audio stuff */ - struct timer_list audio_timer; -@@ -956,7 +960,7 @@ void r100_pll_errata_after_index(struct radeon_device *rdev); - #define ASIC_IS_AVIVO(rdev) ((rdev->family >= CHIP_RS600)) - #define ASIC_IS_DCE3(rdev) ((rdev->family >= CHIP_RV620)) - #define ASIC_IS_DCE32(rdev) ((rdev->family >= CHIP_RV730)) -- -+#define ASIC_IS_DCE4(rdev) ((rdev->family >= CHIP_CEDAR)) - - /* - * BIOS helpers. -@@ -1189,6 +1193,14 @@ extern void r600_hdmi_update_audio_settings(struct drm_encoder *encoder, - uint8_t status_bits, - uint8_t category_code); - -+/* evergreen */ -+struct evergreen_mc_save { -+ u32 vga_control[6]; -+ u32 vga_render_control; -+ u32 vga_hdp_control; -+ u32 crtc_control[6]; -+}; -+ - #include "radeon_object.h" - - #endif -diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h -index 05ee1ae..f7734c3 100644 ---- a/drivers/gpu/drm/radeon/radeon_asic.h -+++ b/drivers/gpu/drm/radeon/radeon_asic.h -@@ -539,7 +539,7 @@ static struct radeon_asic r600_asic = { - .get_memory_clock = &radeon_atom_get_memory_clock, - .set_memory_clock = &radeon_atom_set_memory_clock, - .set_pcie_lanes = NULL, -- .set_clock_gating = &radeon_atom_set_clock_gating, -+ .set_clock_gating = NULL, - .set_surface_reg = r600_set_surface_reg, - .clear_surface_reg = r600_clear_surface_reg, - .bandwidth_update = &rv515_bandwidth_update, -@@ -595,4 +595,54 @@ static struct radeon_asic rv770_asic = { - .ioctl_wait_idle = r600_ioctl_wait_idle, - }; - -+/* -+ * evergreen -+ */ -+int evergreen_init(struct radeon_device *rdev); -+void evergreen_fini(struct radeon_device *rdev); -+int evergreen_suspend(struct radeon_device *rdev); -+int evergreen_resume(struct radeon_device *rdev); -+int evergreen_gpu_reset(struct radeon_device *rdev); -+void evergreen_bandwidth_update(struct radeon_device *rdev); -+void evergreen_hpd_init(struct radeon_device *rdev); -+void evergreen_hpd_fini(struct radeon_device *rdev); -+bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); -+void evergreen_hpd_set_polarity(struct radeon_device *rdev, -+ enum radeon_hpd_id hpd); -+ -+static struct radeon_asic evergreen_asic = { -+ .init = &evergreen_init, -+ .fini = &evergreen_fini, -+ .suspend = &evergreen_suspend, -+ .resume = &evergreen_resume, -+ .cp_commit = NULL, -+ .gpu_reset = &evergreen_gpu_reset, -+ .vga_set_state = &r600_vga_set_state, -+ .gart_tlb_flush = &r600_pcie_gart_tlb_flush, -+ .gart_set_page = &rs600_gart_set_page, -+ .ring_test = NULL, -+ .ring_ib_execute = NULL, -+ .irq_set = NULL, -+ .irq_process = NULL, -+ .get_vblank_counter = NULL, -+ .fence_ring_emit = NULL, -+ .cs_parse = NULL, -+ .copy_blit = NULL, -+ .copy_dma = NULL, -+ .copy = NULL, -+ .get_engine_clock = &radeon_atom_get_engine_clock, -+ .set_engine_clock = &radeon_atom_set_engine_clock, -+ .get_memory_clock = &radeon_atom_get_memory_clock, -+ .set_memory_clock = &radeon_atom_set_memory_clock, -+ .set_pcie_lanes = NULL, -+ .set_clock_gating = NULL, -+ .set_surface_reg = r600_set_surface_reg, -+ .clear_surface_reg = r600_clear_surface_reg, -+ .bandwidth_update = &evergreen_bandwidth_update, -+ .hpd_init = &evergreen_hpd_init, -+ .hpd_fini = &evergreen_hpd_fini, -+ .hpd_sense = &evergreen_hpd_sense, -+ .hpd_set_polarity = &evergreen_hpd_set_polarity, -+}; -+ - #endif -diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c -index 4d88315..381ebdd 100644 ---- a/drivers/gpu/drm/radeon/radeon_atombios.c -+++ b/drivers/gpu/drm/radeon/radeon_atombios.c -@@ -159,8 +159,15 @@ static struct radeon_hpd radeon_atom_get_hpd_info_from_gpio(struct radeon_device - struct radeon_gpio_rec *gpio) - { - struct radeon_hpd hpd; -+ u32 reg; -+ -+ if (ASIC_IS_DCE4(rdev)) -+ reg = EVERGREEN_DC_GPIO_HPD_A; -+ else -+ reg = AVIVO_DC_GPIO_HPD_A; -+ - hpd.gpio = *gpio; -- if (gpio->reg == AVIVO_DC_GPIO_HPD_A) { -+ if (gpio->reg == reg) { - switch(gpio->mask) { - case (1 << 0): - hpd.hpd = RADEON_HPD_1; -@@ -574,6 +581,9 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) - ddc_bus.valid = false; - } - -+ /* needed for aux chan transactions */ -+ ddc_bus.hpd_id = hpd.hpd ? (hpd.hpd - 1) : 0; -+ - conn_id = le16_to_cpu(path->usConnObjectId); - - if (!radeon_atom_apply_quirks -@@ -838,6 +848,7 @@ union firmware_info { - ATOM_FIRMWARE_INFO_V1_2 info_12; - ATOM_FIRMWARE_INFO_V1_3 info_13; - ATOM_FIRMWARE_INFO_V1_4 info_14; -+ ATOM_FIRMWARE_INFO_V2_1 info_21; - }; - - bool radeon_atom_get_clock_info(struct drm_device *dev) -@@ -849,6 +860,7 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) - uint8_t frev, crev; - struct radeon_pll *p1pll = &rdev->clock.p1pll; - struct radeon_pll *p2pll = &rdev->clock.p2pll; -+ struct radeon_pll *dcpll = &rdev->clock.dcpll; - struct radeon_pll *spll = &rdev->clock.spll; - struct radeon_pll *mpll = &rdev->clock.mpll; - uint16_t data_offset; -@@ -951,8 +963,19 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) - rdev->clock.default_mclk = - le32_to_cpu(firmware_info->info.ulDefaultMemoryClock); - -+ if (ASIC_IS_DCE4(rdev)) { -+ rdev->clock.default_dispclk = -+ le32_to_cpu(firmware_info->info_21.ulDefaultDispEngineClkFreq); -+ if (rdev->clock.default_dispclk == 0) -+ rdev->clock.default_dispclk = 60000; /* 600 Mhz */ -+ rdev->clock.dp_extclk = -+ le16_to_cpu(firmware_info->info_21.usUniphyDPModeExtClkFreq); -+ } -+ *dcpll = *p1pll; -+ - return true; - } -+ - return false; - } - -@@ -1395,16 +1418,6 @@ void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable) - atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); - } - --void radeon_atom_static_pwrmgt_setup(struct radeon_device *rdev, int enable) --{ -- ENABLE_ASIC_STATIC_PWR_MGT_PS_ALLOCATION args; -- int index = GetIndexIntoMasterTable(COMMAND, EnableASIC_StaticPwrMgt); -- -- args.ucEnable = enable; -- -- atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); --} -- - uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev) - { - GET_ENGINE_CLOCK_PS_ALLOCATION args; -diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c -index 73c4405..f64936c 100644 ---- a/drivers/gpu/drm/radeon/radeon_clocks.c -+++ b/drivers/gpu/drm/radeon/radeon_clocks.c -@@ -96,6 +96,7 @@ void radeon_get_clock_info(struct drm_device *dev) - struct radeon_device *rdev = dev->dev_private; - struct radeon_pll *p1pll = &rdev->clock.p1pll; - struct radeon_pll *p2pll = &rdev->clock.p2pll; -+ struct radeon_pll *dcpll = &rdev->clock.dcpll; - struct radeon_pll *spll = &rdev->clock.spll; - struct radeon_pll *mpll = &rdev->clock.mpll; - int ret; -@@ -204,6 +205,17 @@ void radeon_get_clock_info(struct drm_device *dev) - p2pll->max_frac_feedback_div = 0; - } - -+ /* dcpll is DCE4 only */ -+ dcpll->min_post_div = 2; -+ dcpll->max_post_div = 0x7f; -+ dcpll->min_frac_feedback_div = 0; -+ dcpll->max_frac_feedback_div = 9; -+ dcpll->min_ref_div = 2; -+ dcpll->max_ref_div = 0x3ff; -+ dcpll->min_feedback_div = 4; -+ dcpll->max_feedback_div = 0xfff; -+ dcpll->best_vco = 0; -+ - p1pll->min_ref_div = 2; - p1pll->max_ref_div = 0x3ff; - p1pll->min_feedback_div = 4; -@@ -846,8 +858,10 @@ int radeon_static_clocks_init(struct drm_device *dev) - /* XXX make sure engine is idle */ - - if (radeon_dynclks != -1) { -- if (radeon_dynclks) -- radeon_set_clock_gating(rdev, 1); -+ if (radeon_dynclks) { -+ if (rdev->asic->set_clock_gating) -+ radeon_set_clock_gating(rdev, 1); -+ } - } - radeon_apply_clock_quirks(rdev); - return 0; -diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c -index e7b1944..e3388a9 100644 ---- a/drivers/gpu/drm/radeon/radeon_combios.c -+++ b/drivers/gpu/drm/radeon/radeon_combios.c -@@ -507,6 +507,7 @@ static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rde - } - i2c.mm_i2c = false; - i2c.i2c_id = 0; -+ i2c.hpd_id = 0; - - if (ddc_line) - i2c.valid = true; -diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c -index 28772a3..7ecf5e1 100644 ---- a/drivers/gpu/drm/radeon/radeon_cursor.c -+++ b/drivers/gpu/drm/radeon/radeon_cursor.c -@@ -36,7 +36,14 @@ static void radeon_lock_cursor(struct drm_crtc *crtc, bool lock) - struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); - uint32_t cur_lock; - -- if (ASIC_IS_AVIVO(rdev)) { -+ if (ASIC_IS_DCE4(rdev)) { -+ cur_lock = RREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset); -+ if (lock) -+ cur_lock |= EVERGREEN_CURSOR_UPDATE_LOCK; -+ else -+ cur_lock &= ~EVERGREEN_CURSOR_UPDATE_LOCK; -+ WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); -+ } else if (ASIC_IS_AVIVO(rdev)) { - cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset); - if (lock) - cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK; -@@ -58,7 +65,10 @@ static void radeon_hide_cursor(struct drm_crtc *crtc) - struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); - struct radeon_device *rdev = crtc->dev->dev_private; - -- if (ASIC_IS_AVIVO(rdev)) { -+ if (ASIC_IS_DCE4(rdev)) { -+ WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset); -+ WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT)); -+ } else if (ASIC_IS_AVIVO(rdev)) { - WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset); - WREG32(RADEON_MM_DATA, (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT)); - } else { -@@ -81,10 +91,14 @@ static void radeon_show_cursor(struct drm_crtc *crtc) - struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); - struct radeon_device *rdev = crtc->dev->dev_private; - -- if (ASIC_IS_AVIVO(rdev)) { -+ if (ASIC_IS_DCE4(rdev)) { -+ WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset); -+ WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_EN | -+ EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT)); -+ } else if (ASIC_IS_AVIVO(rdev)) { - WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset); - WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN | -- (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT)); -+ (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT)); - } else { - switch (radeon_crtc->crtc_id) { - case 0: -@@ -109,7 +123,10 @@ static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj, - struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); - struct radeon_device *rdev = crtc->dev->dev_private; - -- if (ASIC_IS_AVIVO(rdev)) { -+ if (ASIC_IS_DCE4(rdev)) { -+ WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset, 0); -+ WREG32(EVERGREEN_CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); -+ } else if (ASIC_IS_AVIVO(rdev)) { - if (rdev->family >= CHIP_RV770) { - if (radeon_crtc->crtc_id) - WREG32(R700_D2CUR_SURFACE_ADDRESS_HIGH, 0); -@@ -201,7 +218,20 @@ int radeon_crtc_cursor_move(struct drm_crtc *crtc, - yorigin = CURSOR_HEIGHT - 1; - - radeon_lock_cursor(crtc, true); -- if (ASIC_IS_AVIVO(rdev)) { -+ if (ASIC_IS_DCE4(rdev)) { -+ /* cursors are offset into the total surface */ -+ x += crtc->x; -+ y += crtc->y; -+ DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); -+ -+ /* XXX: check if evergreen has the same issues as avivo chips */ -+ WREG32(EVERGREEN_CUR_POSITION + radeon_crtc->crtc_offset, -+ ((xorigin ? 0 : x) << 16) | -+ (yorigin ? 0 : y)); -+ WREG32(EVERGREEN_CUR_HOT_SPOT + radeon_crtc->crtc_offset, (xorigin << 16) | yorigin); -+ WREG32(EVERGREEN_CUR_SIZE + radeon_crtc->crtc_offset, -+ ((radeon_crtc->cursor_width - 1) << 16) | (radeon_crtc->cursor_height - 1)); -+ } else if (ASIC_IS_AVIVO(rdev)) { - int w = radeon_crtc->cursor_width; - int i = 0; - struct drm_crtc *crtc_p; -diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c -index 768b150..4ca5ddc 100644 ---- a/drivers/gpu/drm/radeon/radeon_device.c -+++ b/drivers/gpu/drm/radeon/radeon_device.c -@@ -182,7 +182,16 @@ bool radeon_card_posted(struct radeon_device *rdev) - uint32_t reg; - - /* first check CRTCs */ -- if (ASIC_IS_AVIVO(rdev)) { -+ if (ASIC_IS_DCE4(rdev)) { -+ reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) | -+ RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET) | -+ RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) | -+ RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET) | -+ RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) | -+ RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET); -+ if (reg & EVERGREEN_CRTC_MASTER_EN) -+ return true; -+ } else if (ASIC_IS_AVIVO(rdev)) { - reg = RREG32(AVIVO_D1CRTC_CONTROL) | - RREG32(AVIVO_D2CRTC_CONTROL); - if (reg & AVIVO_CRTC_EN) { -@@ -310,7 +319,7 @@ void radeon_register_accessor_init(struct radeon_device *rdev) - rdev->mc_rreg = &rs600_mc_rreg; - rdev->mc_wreg = &rs600_mc_wreg; - } -- if (rdev->family >= CHIP_R600) { -+ if ((rdev->family >= CHIP_R600) && (rdev->family <= CHIP_RV740)) { - rdev->pciep_rreg = &r600_pciep_rreg; - rdev->pciep_wreg = &r600_pciep_wreg; - } -@@ -387,6 +396,13 @@ int radeon_asic_init(struct radeon_device *rdev) - case CHIP_RV740: - rdev->asic = &rv770_asic; - break; -+ case CHIP_CEDAR: -+ case CHIP_REDWOOD: -+ case CHIP_JUNIPER: -+ case CHIP_CYPRESS: -+ case CHIP_HEMLOCK: -+ rdev->asic = &evergreen_asic; -+ break; - default: - /* FIXME: not supported yet */ - return -EINVAL; -diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c -index 7e17a36..86a9f01 100644 ---- a/drivers/gpu/drm/radeon/radeon_display.c -+++ b/drivers/gpu/drm/radeon/radeon_display.c -@@ -68,6 +68,36 @@ static void avivo_crtc_load_lut(struct drm_crtc *crtc) - WREG32(AVIVO_D1GRPH_LUT_SEL + radeon_crtc->crtc_offset, radeon_crtc->crtc_id); - } - -+static void evergreen_crtc_load_lut(struct drm_crtc *crtc) -+{ -+ struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); -+ struct drm_device *dev = crtc->dev; -+ struct radeon_device *rdev = dev->dev_private; -+ int i; -+ -+ DRM_DEBUG("%d\n", radeon_crtc->crtc_id); -+ WREG32(EVERGREEN_DC_LUT_CONTROL + radeon_crtc->crtc_offset, 0); -+ -+ WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); -+ WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0); -+ WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0); -+ -+ WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff); -+ WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff); -+ WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff); -+ -+ WREG32(EVERGREEN_DC_LUT_RW_MODE, radeon_crtc->crtc_id); -+ WREG32(EVERGREEN_DC_LUT_WRITE_EN_MASK, 0x00000007); -+ -+ WREG32(EVERGREEN_DC_LUT_RW_INDEX, 0); -+ for (i = 0; i < 256; i++) { -+ WREG32(EVERGREEN_DC_LUT_30_COLOR, -+ (radeon_crtc->lut_r[i] << 20) | -+ (radeon_crtc->lut_g[i] << 10) | -+ (radeon_crtc->lut_b[i] << 0)); -+ } -+} -+ - static void legacy_crtc_load_lut(struct drm_crtc *crtc) - { - struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); -@@ -100,7 +130,9 @@ void radeon_crtc_load_lut(struct drm_crtc *crtc) - if (!crtc->enabled) - return; - -- if (ASIC_IS_AVIVO(rdev)) -+ if (ASIC_IS_DCE4(rdev)) -+ evergreen_crtc_load_lut(crtc); -+ else if (ASIC_IS_AVIVO(rdev)) - avivo_crtc_load_lut(crtc); - else - legacy_crtc_load_lut(crtc); -@@ -819,7 +851,7 @@ static int radeon_modeset_create_props(struct radeon_device *rdev) - - int radeon_modeset_init(struct radeon_device *rdev) - { -- int num_crtc = 2, i; -+ int i; - int ret; - - drm_mode_config_init(rdev->ddev); -@@ -843,10 +875,16 @@ int radeon_modeset_init(struct radeon_device *rdev) - } - - if (rdev->flags & RADEON_SINGLE_CRTC) -- num_crtc = 1; -+ rdev->num_crtc = 1; -+ else { -+ if (ASIC_IS_DCE4(rdev)) -+ rdev->num_crtc = 6; -+ else -+ rdev->num_crtc = 2; -+ } - - /* allocate crtcs */ -- for (i = 0; i < num_crtc; i++) { -+ for (i = 0; i < rdev->num_crtc; i++) { - radeon_crtc_init(rdev->ddev, i); - } - -diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c -index 3c91724..cac9e06 100644 ---- a/drivers/gpu/drm/radeon/radeon_encoders.c -+++ b/drivers/gpu/drm/radeon/radeon_encoders.c -@@ -53,7 +53,7 @@ static uint32_t radeon_encoder_clones(struct drm_encoder *encoder) - /* DVO requires 2x ppll clocks depending on tmds chip */ - if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) - return index_mask; -- -+ - count = -1; - list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) { - struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder); -@@ -228,6 +228,32 @@ radeon_get_connector_for_encoder(struct drm_encoder *encoder) - return NULL; - } - -+static struct radeon_connector_atom_dig * -+radeon_get_atom_connector_priv_from_encoder(struct drm_encoder *encoder) -+{ -+ struct drm_device *dev = encoder->dev; -+ struct radeon_device *rdev = dev->dev_private; -+ struct drm_connector *connector; -+ struct radeon_connector *radeon_connector; -+ struct radeon_connector_atom_dig *dig_connector; -+ -+ if (!rdev->is_atom_bios) -+ return NULL; -+ -+ connector = radeon_get_connector_for_encoder(encoder); -+ if (!connector) -+ return NULL; -+ -+ radeon_connector = to_radeon_connector(connector); -+ -+ if (!radeon_connector->con_priv) -+ return NULL; -+ -+ dig_connector = radeon_connector->con_priv; -+ -+ return dig_connector; -+} -+ - static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) -@@ -273,7 +299,7 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, - } - - if (ASIC_IS_DCE3(rdev) && -- (radeon_encoder->active_device & (ATOM_DEVICE_DFP_SUPPORT))) { -+ (radeon_encoder->active_device & (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT))) { - struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); - radeon_dp_set_link_config(connector, mode); - } -@@ -458,34 +484,20 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) - struct drm_device *dev = encoder->dev; - struct radeon_device *rdev = dev->dev_private; - struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); -+ struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; -+ struct radeon_connector_atom_dig *dig_connector = -+ radeon_get_atom_connector_priv_from_encoder(encoder); - union lvds_encoder_control args; - int index = 0; - int hdmi_detected = 0; - uint8_t frev, crev; -- struct radeon_encoder_atom_dig *dig; -- struct drm_connector *connector; -- struct radeon_connector *radeon_connector; -- struct radeon_connector_atom_dig *dig_connector; -- -- connector = radeon_get_connector_for_encoder(encoder); -- if (!connector) -- return; -- -- radeon_connector = to_radeon_connector(connector); - -- if (!radeon_encoder->enc_priv) -+ if (!dig || !dig_connector) - return; - -- dig = radeon_encoder->enc_priv; -- -- if (!radeon_connector->con_priv) -- return; -- -- if (drm_detect_hdmi_monitor(radeon_connector->edid)) -+ if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) - hdmi_detected = 1; - -- dig_connector = radeon_connector->con_priv; -- - memset(&args, 0, sizeof(args)); - - switch (radeon_encoder->encoder_id) { -@@ -586,7 +598,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) - { - struct drm_connector *connector; - struct radeon_connector *radeon_connector; -- struct radeon_connector_atom_dig *radeon_dig_connector; -+ struct radeon_connector_atom_dig *dig_connector; - - connector = radeon_get_connector_for_encoder(encoder); - if (!connector) -@@ -617,9 +629,9 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) - break; - case DRM_MODE_CONNECTOR_DisplayPort: - case DRM_MODE_CONNECTOR_eDP: -- radeon_dig_connector = radeon_connector->con_priv; -- if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || -- (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) -+ dig_connector = radeon_connector->con_priv; -+ if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || -+ (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) - return ATOM_ENCODER_MODE_DP; - else if (drm_detect_hdmi_monitor(radeon_connector->edid)) - return ATOM_ENCODER_MODE_HDMI; -@@ -656,6 +668,18 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) - * - 2 DIG encoder blocks. - * DIG1/2 can drive UNIPHY0/1/2 link A or link B - * -+ * DCE 4.0 -+ * - 3 DIG transmitter blocks UNPHY0/1/2 (links A and B). -+ * Supports up to 6 digital outputs -+ * - 6 DIG encoder blocks. -+ * - DIG to PHY mapping is hardcoded -+ * DIG1 drives UNIPHY0 link A, A+B -+ * DIG2 drives UNIPHY0 link B -+ * DIG3 drives UNIPHY1 link A, A+B -+ * DIG4 drives UNIPHY1 link B -+ * DIG5 drives UNIPHY2 link A, A+B -+ * DIG6 drives UNIPHY2 link B -+ * - * Routing - * crtc -> dig encoder -> UNIPHY/LVTMA (1 or 2 links) - * Examples: -@@ -664,88 +688,77 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) - * crtc0 -> dig1 -> UNIPHY2 link A -> LVDS - * crtc1 -> dig2 -> UNIPHY1 link B+A -> TMDS/HDMI - */ --static void -+ -+union dig_encoder_control { -+ DIG_ENCODER_CONTROL_PS_ALLOCATION v1; -+ DIG_ENCODER_CONTROL_PARAMETERS_V2 v2; -+ DIG_ENCODER_CONTROL_PARAMETERS_V3 v3; -+}; -+ -+void - atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) - { - struct drm_device *dev = encoder->dev; - struct radeon_device *rdev = dev->dev_private; - struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); -- DIG_ENCODER_CONTROL_PS_ALLOCATION args; -- int index = 0, num = 0; -+ struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; -+ struct radeon_connector_atom_dig *dig_connector = -+ radeon_get_atom_connector_priv_from_encoder(encoder); -+ union dig_encoder_control args; -+ int index = 0; - uint8_t frev, crev; -- struct radeon_encoder_atom_dig *dig; -- struct drm_connector *connector; -- struct radeon_connector *radeon_connector; -- struct radeon_connector_atom_dig *dig_connector; -- -- connector = radeon_get_connector_for_encoder(encoder); -- if (!connector) -- return; -- -- radeon_connector = to_radeon_connector(connector); - -- if (!radeon_connector->con_priv) -+ if (!dig || !dig_connector) - return; - -- dig_connector = radeon_connector->con_priv; -- -- if (!radeon_encoder->enc_priv) -- return; -- -- dig = radeon_encoder->enc_priv; -- - memset(&args, 0, sizeof(args)); - -- if (dig->dig_encoder) -- index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl); -- else -- index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); -- num = dig->dig_encoder + 1; -+ if (ASIC_IS_DCE4(rdev)) -+ index = GetIndexIntoMasterTable(COMMAND, DIGxEncoderControl); -+ else { -+ if (dig->dig_encoder) -+ index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl); -+ else -+ index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); -+ } - - atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); - -- args.ucAction = action; -- args.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); -+ args.v1.ucAction = action; -+ args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); -+ args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder); - -- if (ASIC_IS_DCE32(rdev)) { -+ if (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) { -+ if (dig_connector->dp_clock == 270000) -+ args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; -+ args.v1.ucLaneNum = dig_connector->dp_lane_count; -+ } else if (radeon_encoder->pixel_clock > 165000) -+ args.v1.ucLaneNum = 8; -+ else -+ args.v1.ucLaneNum = 4; -+ -+ if (ASIC_IS_DCE4(rdev)) { -+ args.v3.acConfig.ucDigSel = dig->dig_encoder; -+ args.v3.ucBitPerColor = PANEL_8BIT_PER_COLOR; -+ } else { - switch (radeon_encoder->encoder_id) { - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: -- args.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER1; -+ args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER1; - break; - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: -- args.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER2; -+ case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: -+ args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER2; - break; - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: -- args.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3; -- break; -- } -- } else { -- switch (radeon_encoder->encoder_id) { -- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: -- args.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER1; -- break; -- case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: -- args.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER2; -+ args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3; - break; - } -+ if (dig_connector->linkb) -+ args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB; -+ else -+ args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA; - } - -- args.ucEncoderMode = atombios_get_encoder_mode(encoder); -- -- if (args.ucEncoderMode == ATOM_ENCODER_MODE_DP) { -- if (dig_connector->dp_clock == 270000) -- args.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; -- args.ucLaneNum = dig_connector->dp_lane_count; -- } else if (radeon_encoder->pixel_clock > 165000) -- args.ucLaneNum = 8; -- else -- args.ucLaneNum = 4; -- -- if (dig_connector->linkb) -- args.ucConfig |= ATOM_ENCODER_CONFIG_LINKB; -- else -- args.ucConfig |= ATOM_ENCODER_CONFIG_LINKA; -- - atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); - - } -@@ -753,6 +766,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) - union dig_transmitter_control { - DIG_TRANSMITTER_CONTROL_PS_ALLOCATION v1; - DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2; -+ DIG_TRANSMITTER_CONTROL_PARAMETERS_V3 v3; - }; - - void -@@ -761,37 +775,29 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t - struct drm_device *dev = encoder->dev; - struct radeon_device *rdev = dev->dev_private; - struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); -- union dig_transmitter_control args; -- int index = 0, num = 0; -- uint8_t frev, crev; -- struct radeon_encoder_atom_dig *dig; -+ struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; -+ struct radeon_connector_atom_dig *dig_connector = -+ radeon_get_atom_connector_priv_from_encoder(encoder); - struct drm_connector *connector; - struct radeon_connector *radeon_connector; -- struct radeon_connector_atom_dig *dig_connector; -+ union dig_transmitter_control args; -+ int index = 0; -+ uint8_t frev, crev; - bool is_dp = false; -+ int pll_id = 0; - -- connector = radeon_get_connector_for_encoder(encoder); -- if (!connector) -+ if (!dig || !dig_connector) - return; - -+ connector = radeon_get_connector_for_encoder(encoder); - radeon_connector = to_radeon_connector(connector); - -- if (!radeon_encoder->enc_priv) -- return; -- -- dig = radeon_encoder->enc_priv; -- -- if (!radeon_connector->con_priv) -- return; -- -- dig_connector = radeon_connector->con_priv; -- - if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) - is_dp = true; - - memset(&args, 0, sizeof(args)); - -- if (ASIC_IS_DCE32(rdev)) -+ if (ASIC_IS_DCE32(rdev) || ASIC_IS_DCE4(rdev)) - index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl); - else { - switch (radeon_encoder->encoder_id) { -@@ -821,24 +827,64 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t - else - args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); - } -- if (ASIC_IS_DCE32(rdev)) { -- if (dig->dig_encoder == 1) -- args.v2.acConfig.ucEncoderSel = 1; -+ if (ASIC_IS_DCE4(rdev)) { -+ if (is_dp) -+ args.v3.ucLaneNum = dig_connector->dp_lane_count; -+ else if (radeon_encoder->pixel_clock > 165000) -+ args.v3.ucLaneNum = 8; -+ else -+ args.v3.ucLaneNum = 4; -+ -+ if (dig_connector->linkb) { -+ args.v3.acConfig.ucLinkSel = 1; -+ args.v3.acConfig.ucEncoderSel = 1; -+ } -+ -+ /* Select the PLL for the PHY -+ * DP PHY should be clocked from external src if there is -+ * one. -+ */ -+ if (encoder->crtc) { -+ struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); -+ pll_id = radeon_crtc->pll_id; -+ } -+ if (is_dp && rdev->clock.dp_extclk) -+ args.v3.acConfig.ucRefClkSource = 2; /* external src */ -+ else -+ args.v3.acConfig.ucRefClkSource = pll_id; -+ -+ switch (radeon_encoder->encoder_id) { -+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: -+ args.v3.acConfig.ucTransmitterSel = 0; -+ break; -+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: -+ args.v3.acConfig.ucTransmitterSel = 1; -+ break; -+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: -+ args.v3.acConfig.ucTransmitterSel = 2; -+ break; -+ } -+ -+ if (is_dp) -+ args.v3.acConfig.fCoherentMode = 1; /* DP requires coherent */ -+ else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { -+ if (dig->coherent_mode) -+ args.v3.acConfig.fCoherentMode = 1; -+ } -+ } else if (ASIC_IS_DCE32(rdev)) { -+ args.v2.acConfig.ucEncoderSel = dig->dig_encoder; - if (dig_connector->linkb) - args.v2.acConfig.ucLinkSel = 1; - - switch (radeon_encoder->encoder_id) { - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: - args.v2.acConfig.ucTransmitterSel = 0; -- num = 0; - break; - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: - args.v2.acConfig.ucTransmitterSel = 1; -- num = 1; - break; - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: - args.v2.acConfig.ucTransmitterSel = 2; -- num = 2; - break; - } - -@@ -849,7 +895,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t - args.v2.acConfig.fCoherentMode = 1; - } - } else { -- - args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; - - if (dig->dig_encoder) -@@ -857,31 +902,25 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t - else - args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; - -- switch (radeon_encoder->encoder_id) { -- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: -- if (rdev->flags & RADEON_IS_IGP) { -- if (radeon_encoder->pixel_clock > 165000) { -- if (dig_connector->igp_lane_info & 0x3) -- args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; -- else if (dig_connector->igp_lane_info & 0xc) -- args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; -- } else { -- if (dig_connector->igp_lane_info & 0x1) -- args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; -- else if (dig_connector->igp_lane_info & 0x2) -- args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; -- else if (dig_connector->igp_lane_info & 0x4) -- args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; -- else if (dig_connector->igp_lane_info & 0x8) -- args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; -- } -+ if ((rdev->flags & RADEON_IS_IGP) && -+ (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_UNIPHY)) { -+ if (is_dp || (radeon_encoder->pixel_clock <= 165000)) { -+ if (dig_connector->igp_lane_info & 0x1) -+ args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; -+ else if (dig_connector->igp_lane_info & 0x2) -+ args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; -+ else if (dig_connector->igp_lane_info & 0x4) -+ args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; -+ else if (dig_connector->igp_lane_info & 0x8) -+ args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; -+ } else { -+ if (dig_connector->igp_lane_info & 0x3) -+ args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; -+ else if (dig_connector->igp_lane_info & 0xc) -+ args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; - } -- break; - } - -- if (radeon_encoder->pixel_clock > 165000) -- args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK; -- - if (dig_connector->linkb) - args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB; - else -@@ -892,6 +931,8 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t - else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { - if (dig->coherent_mode) - args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; -+ if (radeon_encoder->pixel_clock > 165000) -+ args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK; - } - } - -@@ -998,16 +1039,25 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) - if (is_dig) { - switch (mode) { - case DRM_MODE_DPMS_ON: -- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); -- { -+ if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) { - struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); -+ - dp_link_train(encoder, connector); -+ if (ASIC_IS_DCE4(rdev)) -+ atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_ON); - } -+ if (!ASIC_IS_DCE4(rdev)) -+ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); - break; - case DRM_MODE_DPMS_STANDBY: - case DRM_MODE_DPMS_SUSPEND: - case DRM_MODE_DPMS_OFF: -- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0); -+ if (!ASIC_IS_DCE4(rdev)) -+ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0); -+ if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) { -+ if (ASIC_IS_DCE4(rdev)) -+ atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF); -+ } - break; - } - } else { -@@ -1026,7 +1076,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) - radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); - } - --union crtc_sourc_param { -+union crtc_source_param { - SELECT_CRTC_SOURCE_PS_ALLOCATION v1; - SELECT_CRTC_SOURCE_PARAMETERS_V2 v2; - }; -@@ -1038,7 +1088,7 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder) - struct radeon_device *rdev = dev->dev_private; - struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); - struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); -- union crtc_sourc_param args; -+ union crtc_source_param args; - int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source); - uint8_t frev, crev; - struct radeon_encoder_atom_dig *dig; -@@ -1107,10 +1157,26 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder) - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: - case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: - dig = radeon_encoder->enc_priv; -- if (dig->dig_encoder) -- args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; -- else -+ switch (dig->dig_encoder) { -+ case 0: - args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; -+ break; -+ case 1: -+ args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; -+ break; -+ case 2: -+ args.v2.ucEncoderID = ASIC_INT_DIG3_ENCODER_ID; -+ break; -+ case 3: -+ args.v2.ucEncoderID = ASIC_INT_DIG4_ENCODER_ID; -+ break; -+ case 4: -+ args.v2.ucEncoderID = ASIC_INT_DIG5_ENCODER_ID; -+ break; -+ case 5: -+ args.v2.ucEncoderID = ASIC_INT_DIG6_ENCODER_ID; -+ break; -+ } - break; - case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: - args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID; -@@ -1167,6 +1233,7 @@ atombios_apply_encoder_quirks(struct drm_encoder *encoder, - } - - /* set scaler clears this on some chips */ -+ /* XXX check DCE4 */ - if (!(radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))) { - if (ASIC_IS_AVIVO(rdev) && (mode->flags & DRM_MODE_FLAG_INTERLACE)) - WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, -@@ -1183,6 +1250,33 @@ static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder) - struct drm_encoder *test_encoder; - struct radeon_encoder_atom_dig *dig; - uint32_t dig_enc_in_use = 0; -+ -+ if (ASIC_IS_DCE4(rdev)) { -+ struct radeon_connector_atom_dig *dig_connector = -+ radeon_get_atom_connector_priv_from_encoder(encoder); -+ -+ switch (radeon_encoder->encoder_id) { -+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: -+ if (dig_connector->linkb) -+ return 1; -+ else -+ return 0; -+ break; -+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: -+ if (dig_connector->linkb) -+ return 3; -+ else -+ return 2; -+ break; -+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: -+ if (dig_connector->linkb) -+ return 5; -+ else -+ return 4; -+ break; -+ } -+ } -+ - /* on DCE32 and encoder can driver any block so just crtc id */ - if (ASIC_IS_DCE32(rdev)) { - return radeon_crtc->crtc_id; -@@ -1254,15 +1348,26 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: - case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: -- /* disable the encoder and transmitter */ -- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); -- atombios_dig_encoder_setup(encoder, ATOM_DISABLE); -- -- /* setup and enable the encoder and transmitter */ -- atombios_dig_encoder_setup(encoder, ATOM_ENABLE); -- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0); -- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); -- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); -+ if (ASIC_IS_DCE4(rdev)) { -+ /* disable the transmitter */ -+ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); -+ /* setup and enable the encoder */ -+ atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP); -+ -+ /* init and enable the transmitter */ -+ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0); -+ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); -+ } else { -+ /* disable the encoder and transmitter */ -+ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); -+ atombios_dig_encoder_setup(encoder, ATOM_DISABLE); -+ -+ /* setup and enable the encoder and transmitter */ -+ atombios_dig_encoder_setup(encoder, ATOM_ENABLE); -+ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0); -+ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); -+ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); -+ } - break; - case ENCODER_OBJECT_ID_INTERNAL_DDI: - atombios_ddia_setup(encoder, ATOM_ENABLE); -@@ -1282,7 +1387,9 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, - } - atombios_apply_encoder_quirks(encoder, adjusted_mode); - -- r600_hdmi_setmode(encoder, adjusted_mode); -+ /* XXX */ -+ if (!ASIC_IS_DCE4(rdev)) -+ r600_hdmi_setmode(encoder, adjusted_mode); - } - - static bool -@@ -1480,10 +1587,18 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su - return; - - encoder = &radeon_encoder->base; -- if (rdev->flags & RADEON_SINGLE_CRTC) -+ switch (rdev->num_crtc) { -+ case 1: - encoder->possible_crtcs = 0x1; -- else -+ break; -+ case 2: -+ default: - encoder->possible_crtcs = 0x3; -+ break; -+ case 6: -+ encoder->possible_crtcs = 0x3f; -+ break; -+ } - - radeon_encoder->enc_priv = NULL; - -diff --git a/drivers/gpu/drm/radeon/radeon_family.h b/drivers/gpu/drm/radeon/radeon_family.h -index 797972e..93c7d5d 100644 ---- a/drivers/gpu/drm/radeon/radeon_family.h -+++ b/drivers/gpu/drm/radeon/radeon_family.h -@@ -75,6 +75,11 @@ enum radeon_family { - CHIP_RV730, - CHIP_RV710, - CHIP_RV740, -+ CHIP_CEDAR, -+ CHIP_REDWOOD, -+ CHIP_JUNIPER, -+ CHIP_CYPRESS, -+ CHIP_HEMLOCK, - CHIP_LAST, - }; - -diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c -index d71e346..0059242 100644 ---- a/drivers/gpu/drm/radeon/radeon_fb.c -+++ b/drivers/gpu/drm/radeon/radeon_fb.c -@@ -148,7 +148,6 @@ int radeonfb_create(struct drm_device *dev, - unsigned long tmp; - bool fb_tiled = false; /* useful for testing */ - u32 tiling_flags = 0; -- int crtc_count; - - mode_cmd.width = surface_width; - mode_cmd.height = surface_height; -@@ -239,11 +238,7 @@ int radeonfb_create(struct drm_device *dev, - rfbdev = info->par; - rfbdev->helper.funcs = &radeon_fb_helper_funcs; - rfbdev->helper.dev = dev; -- if (rdev->flags & RADEON_SINGLE_CRTC) -- crtc_count = 1; -- else -- crtc_count = 2; -- ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, crtc_count, -+ ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, rdev->num_crtc, - RADEONFB_CONN_LIMIT); - if (ret) - goto out_unref; -diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h -index e81b2ae..2f582a2 100644 ---- a/drivers/gpu/drm/radeon/radeon_mode.h -+++ b/drivers/gpu/drm/radeon/radeon_mode.h -@@ -83,6 +83,8 @@ struct radeon_i2c_bus_rec { - bool valid; - /* id used by atom */ - uint8_t i2c_id; -+ /* id used by atom */ -+ uint8_t hpd_id; - /* can be used with hw i2c engine */ - bool hw_capable; - /* uses multi-media i2c engine */ -@@ -193,7 +195,7 @@ struct radeon_mode_info { - struct card_info *atom_card_info; - enum radeon_connector_table connector_table; - bool mode_config_initialized; -- struct radeon_crtc *crtcs[2]; -+ struct radeon_crtc *crtcs[6]; - /* DVI-I properties */ - struct drm_property *coherent_mode_property; - /* DAC enable load detect */ -@@ -237,6 +239,7 @@ struct radeon_crtc { - fixed20_12 vsc; - fixed20_12 hsc; - struct drm_display_mode native_mode; -+ int pll_id; - }; - - struct radeon_encoder_primary_dac { -@@ -398,6 +401,7 @@ extern void dp_link_train(struct drm_encoder *encoder, - struct drm_connector *connector); - extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); - extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); -+extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action); - extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, - int action, uint8_t lane_num, - uint8_t lane_set); -diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h -index 6d0a009..7f0c752 100644 ---- a/drivers/gpu/drm/radeon/radeon_reg.h -+++ b/drivers/gpu/drm/radeon/radeon_reg.h -@@ -54,7 +54,7 @@ - #include "r300_reg.h" - #include "r500_reg.h" - #include "r600_reg.h" -- -+#include "evergreen_reg.h" - - #define RADEON_MC_AGP_LOCATION 0x014c - #define RADEON_MC_AGP_START_MASK 0x0000FFFF -diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h -index a1367ab..9506f8c 100644 ---- a/drivers/gpu/drm/radeon/rv770d.h -+++ b/drivers/gpu/drm/radeon/rv770d.h -@@ -343,4 +343,6 @@ - - #define WAIT_UNTIL 0x8040 - -+#define SRBM_STATUS 0x0E50 -+ - #endif -diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h -index e6f3b12..403490c 100644 ---- a/include/drm/drm_pciids.h -+++ b/include/drm/drm_pciids.h -@@ -141,6 +141,41 @@ - {0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x6880, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x6888, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x6889, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x688A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x6898, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x6899, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x689c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HEMLOCK|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x689d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HEMLOCK|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x689e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68a0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68a1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68a8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68a9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68b8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68b9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68be, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68c1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68c8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68c9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68d9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68da, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68de, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68e0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68e1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68e4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68e5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68e8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68e9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68f1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68f8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68f9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ -+ {0x1002, 0x68fe, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ diff --git a/debian/patches/features/all/ipheth-add.patch b/debian/patches/features/all/ipheth-add.patch deleted file mode 100644 index 9a4a26294..000000000 --- a/debian/patches/features/all/ipheth-add.patch +++ /dev/null @@ -1,638 +0,0 @@ -Subject: drivers/net/usb: Add new driver ipheth -Date: Sun, 18 Apr 2010 08:35:16 -0000 -From: Diego Giagio - -Add new driver to use tethering with an iPhone device. After initial submission, -apply fixes to fit the new driver into the kernel standards. - -There are still a couple of minor (almost cosmetic-level) issues, but the driver -is fully functional right now. - -Signed-off-by: L. Alberto Giménez -Signed-off-by: Diego Giagio - ---- - drivers/net/Makefile | 1 + - drivers/net/usb/Kconfig | 12 + - drivers/net/usb/Makefile | 1 + - drivers/net/usb/ipheth.c | 568 ++++++++++++++++++++++++++++++++++++++++++++++ - 4 files changed, 582 insertions(+), 0 deletions(-) - create mode 100644 drivers/net/usb/ipheth.c - -diff --git a/drivers/net/Makefile b/drivers/net/Makefile -index a583b50..12b280a 100644 ---- a/drivers/net/Makefile -+++ b/drivers/net/Makefile -@@ -273,6 +273,7 @@ obj-$(CONFIG_USB_RTL8150) += usb/ - obj-$(CONFIG_USB_HSO) += usb/ - obj-$(CONFIG_USB_USBNET) += usb/ - obj-$(CONFIG_USB_ZD1201) += usb/ -+obj-$(CONFIG_USB_IPHETH) += usb/ - - obj-y += wireless/ - obj-$(CONFIG_NET_TULIP) += tulip/ -diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig -index ba56ce4..63be4ca 100644 ---- a/drivers/net/usb/Kconfig -+++ b/drivers/net/usb/Kconfig -@@ -385,4 +385,16 @@ config USB_CDC_PHONET - cellular modem, as found on most Nokia handsets with the - "PC suite" USB profile. - -+config USB_IPHETH -+ tristate "Apple iPhone USB Ethernet driver" -+ default n -+ ---help--- -+ Module used to share Internet connection (tethering) from your -+ iPhone (Original, 3G and 3GS) to your system. -+ Note that you need userspace libraries and programs that are needed -+ to pair your device with your system and that understand the iPhone -+ protocol. -+ -+ For more information: http://giagio.com/wiki/moin.cgi/iPhoneEthernetDriver -+ - endmenu -diff --git a/drivers/net/usb/Makefile b/drivers/net/usb/Makefile -index 82ea629..edb09c0 100644 ---- a/drivers/net/usb/Makefile -+++ b/drivers/net/usb/Makefile -@@ -23,4 +23,5 @@ obj-$(CONFIG_USB_NET_MCS7830) += mcs7830.o - obj-$(CONFIG_USB_USBNET) += usbnet.o - obj-$(CONFIG_USB_NET_INT51X1) += int51x1.o - obj-$(CONFIG_USB_CDC_PHONET) += cdc-phonet.o -+obj-$(CONFIG_USB_IPHETH) += ipheth.o - -diff --git a/drivers/net/usb/ipheth.c b/drivers/net/usb/ipheth.c -new file mode 100644 -index 0000000..fd10331 ---- /dev/null -+++ b/drivers/net/usb/ipheth.c -@@ -0,0 +1,568 @@ -+/* -+ * ipheth.c - Apple iPhone USB Ethernet driver -+ * -+ * Copyright (c) 2009 Diego Giagio -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. Neither the name of GIAGIO.COM nor the names of its contributors -+ * may be used to endorse or promote products derived from this software -+ * without specific prior written permission. -+ * -+ * Alternatively, provided that this notice is retained in full, this -+ * software may be distributed under the terms of the GNU General -+ * Public License ("GPL") version 2, in which case the provisions of the -+ * GPL apply INSTEAD OF those given above. -+ * -+ * The provided data structures and external interfaces from this code -+ * are not restricted to be used by modules with a GPL compatible license. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH -+ * DAMAGE. -+ * -+ * -+ * Attention: iPhone device must be paired, otherwise it won't respond to our -+ * driver. For more info: http://giagio.com/wiki/moin.cgi/iPhoneEthernetDriver -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define USB_VENDOR_APPLE 0x05ac -+#define USB_PRODUCT_IPHONE 0x1290 -+#define USB_PRODUCT_IPHONE_3G 0x1292 -+#define USB_PRODUCT_IPHONE_3GS 0x1294 -+ -+#define IPHETH_USBINTF_CLASS 255 -+#define IPHETH_USBINTF_SUBCLASS 253 -+#define IPHETH_USBINTF_PROTO 1 -+ -+#define IPHETH_BUF_SIZE 1516 -+#define IPHETH_TX_TIMEOUT (5 * HZ) -+ -+#define IPHETH_INTFNUM 2 -+#define IPHETH_ALT_INTFNUM 1 -+ -+#define IPHETH_CTRL_ENDP 0x00 -+#define IPHETH_CTRL_BUF_SIZE 0x40 -+#define IPHETH_CTRL_TIMEOUT (5 * HZ) -+ -+#define IPHETH_CMD_GET_MACADDR 0x00 -+#define IPHETH_CMD_CARRIER_CHECK 0x45 -+ -+#define IPHETH_CARRIER_CHECK_TIMEOUT round_jiffies_relative(1 * HZ) -+#define IPHETH_CARRIER_ON 0x04 -+ -+static struct usb_device_id ipheth_table[] = { -+ { USB_DEVICE_AND_INTERFACE_INFO( -+ USB_VENDOR_APPLE, USB_PRODUCT_IPHONE, -+ IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, -+ IPHETH_USBINTF_PROTO) }, -+ { USB_DEVICE_AND_INTERFACE_INFO( -+ USB_VENDOR_APPLE, USB_PRODUCT_IPHONE_3G, -+ IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, -+ IPHETH_USBINTF_PROTO) }, -+ { USB_DEVICE_AND_INTERFACE_INFO( -+ USB_VENDOR_APPLE, USB_PRODUCT_IPHONE_3GS, -+ IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, -+ IPHETH_USBINTF_PROTO) }, -+ { } -+}; -+MODULE_DEVICE_TABLE(usb, ipheth_table); -+ -+struct ipheth_device { -+ struct usb_device *udev; -+ struct usb_interface *intf; -+ struct net_device *net; -+ struct sk_buff *tx_skb; -+ struct urb *tx_urb; -+ struct urb *rx_urb; -+ unsigned char *tx_buf; -+ unsigned char *rx_buf; -+ unsigned char *ctrl_buf; -+ u8 bulk_in; -+ u8 bulk_out; -+ struct delayed_work carrier_work; -+}; -+ -+static int ipheth_rx_submit(struct ipheth_device *dev, gfp_t mem_flags); -+ -+static int ipheth_alloc_urbs(struct ipheth_device *iphone) -+{ -+ struct urb *tx_urb = NULL; -+ struct urb *rx_urb = NULL; -+ u8 *tx_buf = NULL; -+ u8 *rx_buf = NULL; -+ -+ tx_urb = usb_alloc_urb(0, GFP_KERNEL); -+ if (tx_urb == NULL) -+ goto error; -+ -+ rx_urb = usb_alloc_urb(0, GFP_KERNEL); -+ if (rx_urb == NULL) -+ goto error; -+ -+ tx_buf = usb_buffer_alloc(iphone->udev, -+ IPHETH_BUF_SIZE, -+ GFP_KERNEL, -+ &tx_urb->transfer_dma); -+ if (tx_buf == NULL) -+ goto error; -+ -+ rx_buf = usb_buffer_alloc(iphone->udev, -+ IPHETH_BUF_SIZE, -+ GFP_KERNEL, -+ &rx_urb->transfer_dma); -+ if (rx_buf == NULL) -+ goto error; -+ -+ -+ iphone->tx_urb = tx_urb; -+ iphone->rx_urb = rx_urb; -+ iphone->tx_buf = tx_buf; -+ iphone->rx_buf = rx_buf; -+ return 0; -+ -+error: -+ usb_buffer_free(iphone->udev, IPHETH_BUF_SIZE, rx_buf, -+ rx_urb->transfer_dma); -+ usb_buffer_free(iphone->udev, IPHETH_BUF_SIZE, tx_buf, -+ tx_urb->transfer_dma); -+ usb_free_urb(rx_urb); -+ usb_free_urb(tx_urb); -+ return -ENOMEM; -+} -+ -+static void ipheth_free_urbs(struct ipheth_device *iphone) -+{ -+ usb_buffer_free(iphone->udev, IPHETH_BUF_SIZE, iphone->rx_buf, -+ iphone->rx_urb->transfer_dma); -+ usb_buffer_free(iphone->udev, IPHETH_BUF_SIZE, iphone->tx_buf, -+ iphone->tx_urb->transfer_dma); -+ usb_free_urb(iphone->rx_urb); -+ usb_free_urb(iphone->tx_urb); -+} -+ -+static void ipheth_kill_urbs(struct ipheth_device *dev) -+{ -+ usb_kill_urb(dev->tx_urb); -+ usb_kill_urb(dev->rx_urb); -+} -+ -+static void ipheth_rcvbulk_callback(struct urb *urb) -+{ -+ struct ipheth_device *dev; -+ struct sk_buff *skb; -+ int status; -+ char *buf; -+ int len; -+ -+ dev = urb->context; -+ if (dev == NULL) -+ return; -+ -+ status = urb->status; -+ switch (status) { -+ case -ENOENT: -+ case -ECONNRESET: -+ case -ESHUTDOWN: -+ return; -+ case 0: -+ break; -+ default: -+ err("%s: urb status: %d", __func__, urb->status); -+ return; -+ } -+ -+ len = urb->actual_length; -+ buf = urb->transfer_buffer; -+ -+ skb = dev_alloc_skb(NET_IP_ALIGN + len); -+ if (!skb) { -+ err("%s: dev_alloc_skb: -ENOMEM", __func__); -+ dev->net->stats.rx_dropped++; -+ return; -+ } -+ -+ skb_reserve(skb, NET_IP_ALIGN); -+ memcpy(skb_put(skb, len), buf + NET_IP_ALIGN, len - NET_IP_ALIGN); -+ skb->dev = dev->net; -+ skb->protocol = eth_type_trans(skb, dev->net); -+ -+ dev->net->stats.rx_packets++; -+ dev->net->stats.rx_bytes += len; -+ -+ netif_rx(skb); -+ ipheth_rx_submit(dev, GFP_ATOMIC); -+} -+ -+static void ipheth_sndbulk_callback(struct urb *urb) -+{ -+ struct ipheth_device *dev; -+ -+ dev = urb->context; -+ if (dev == NULL) -+ return; -+ -+ if (urb->status != 0 && -+ urb->status != -ENOENT && -+ urb->status != -ECONNRESET && -+ urb->status != -ESHUTDOWN) -+ err("%s: urb status: %d", __func__, urb->status); -+ -+ dev_kfree_skb_irq(dev->tx_skb); -+ netif_wake_queue(dev->net); -+} -+ -+static int ipheth_carrier_set(struct ipheth_device *dev) -+{ -+ struct usb_device *udev = dev->udev; -+ int retval; -+ -+ retval = usb_control_msg(udev, -+ usb_rcvctrlpipe(udev, IPHETH_CTRL_ENDP), -+ IPHETH_CMD_CARRIER_CHECK, /* request */ -+ 0xc0, /* request type */ -+ 0x00, /* value */ -+ 0x02, /* index */ -+ dev->ctrl_buf, IPHETH_CTRL_BUF_SIZE, -+ IPHETH_CTRL_TIMEOUT); -+ if (retval < 0) { -+ err("%s: usb_control_msg: %d", __func__, retval); -+ return retval; -+ } -+ -+ if (dev->ctrl_buf[0] == IPHETH_CARRIER_ON) -+ netif_carrier_on(dev->net); -+ else -+ netif_carrier_off(dev->net); -+ -+ return 0; -+} -+ -+static void ipheth_carrier_check_work(struct work_struct *work) -+{ -+ struct ipheth_device *dev = container_of(work, struct ipheth_device, -+ carrier_work.work); -+ -+ ipheth_carrier_set(dev); -+ schedule_delayed_work(&dev->carrier_work, IPHETH_CARRIER_CHECK_TIMEOUT); -+} -+ -+static int ipheth_get_macaddr(struct ipheth_device *dev) -+{ -+ struct usb_device *udev = dev->udev; -+ struct net_device *net = dev->net; -+ int retval; -+ -+ retval = usb_control_msg(udev, -+ usb_rcvctrlpipe(udev, IPHETH_CTRL_ENDP), -+ IPHETH_CMD_GET_MACADDR, /* request */ -+ 0xc0, /* request type */ -+ 0x00, /* value */ -+ 0x02, /* index */ -+ dev->ctrl_buf, -+ IPHETH_CTRL_BUF_SIZE, -+ IPHETH_CTRL_TIMEOUT); -+ if (retval < 0) { -+ err("%s: usb_control_msg: %d", __func__, retval); -+ } else if (retval < ETH_ALEN) { -+ err("%s: usb_control_msg: short packet: %d bytes", -+ __func__, retval); -+ retval = -EINVAL; -+ } else { -+ memcpy(net->dev_addr, dev->ctrl_buf, ETH_ALEN); -+ retval = 0; -+ } -+ -+ return retval; -+} -+ -+static int ipheth_rx_submit(struct ipheth_device *dev, gfp_t mem_flags) -+{ -+ struct usb_device *udev = dev->udev; -+ int retval; -+ -+ usb_fill_bulk_urb(dev->rx_urb, udev, -+ usb_rcvbulkpipe(udev, dev->bulk_in), -+ dev->rx_buf, IPHETH_BUF_SIZE, -+ ipheth_rcvbulk_callback, -+ dev); -+ dev->rx_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; -+ -+ retval = usb_submit_urb(dev->rx_urb, mem_flags); -+ if (retval) -+ err("%s: usb_submit_urb: %d", __func__, retval); -+ return retval; -+} -+ -+static int ipheth_open(struct net_device *net) -+{ -+ struct ipheth_device *dev = netdev_priv(net); -+ struct usb_device *udev = dev->udev; -+ int retval = 0; -+ -+ usb_set_interface(udev, IPHETH_INTFNUM, IPHETH_ALT_INTFNUM); -+ -+ retval = ipheth_carrier_set(dev); -+ if (retval) -+ return retval; -+ -+ retval = ipheth_rx_submit(dev, GFP_KERNEL); -+ if (retval) -+ return retval; -+ -+ schedule_delayed_work(&dev->carrier_work, IPHETH_CARRIER_CHECK_TIMEOUT); -+ netif_start_queue(net); -+ return retval; -+} -+ -+static int ipheth_close(struct net_device *net) -+{ -+ struct ipheth_device *dev = netdev_priv(net); -+ -+ cancel_delayed_work_sync(&dev->carrier_work); -+ netif_stop_queue(net); -+ return 0; -+} -+ -+static int ipheth_tx(struct sk_buff *skb, struct net_device *net) -+{ -+ struct ipheth_device *dev = netdev_priv(net); -+ struct usb_device *udev = dev->udev; -+ int retval; -+ -+ /* Paranoid */ -+ if (skb->len > IPHETH_BUF_SIZE) { -+ WARN(1, "%s: skb too large: %d bytes", __func__, skb->len); -+ dev->net->stats.tx_dropped++; -+ dev_kfree_skb_irq(skb); -+ return NETDEV_TX_OK; -+ } -+ -+ memcpy(dev->tx_buf, skb->data, skb->len); -+ if (skb->len < IPHETH_BUF_SIZE) -+ memset(dev->tx_buf + skb->len, 0, IPHETH_BUF_SIZE - skb->len); -+ -+ usb_fill_bulk_urb(dev->tx_urb, udev, -+ usb_sndbulkpipe(udev, dev->bulk_out), -+ dev->tx_buf, IPHETH_BUF_SIZE, -+ ipheth_sndbulk_callback, -+ dev); -+ dev->tx_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; -+ -+ retval = usb_submit_urb(dev->tx_urb, GFP_ATOMIC); -+ if (retval) { -+ err("%s: usb_submit_urb: %d", __func__, retval); -+ dev->net->stats.tx_errors++; -+ dev_kfree_skb_irq(skb); -+ } else { -+ dev->tx_skb = skb; -+ -+ dev->net->stats.tx_packets++; -+ dev->net->stats.tx_bytes += skb->len; -+ netif_stop_queue(net); -+ } -+ -+ return NETDEV_TX_OK; -+} -+ -+static void ipheth_tx_timeout(struct net_device *net) -+{ -+ struct ipheth_device *dev = netdev_priv(net); -+ -+ err("%s: TX timeout", __func__); -+ dev->net->stats.tx_errors++; -+ usb_unlink_urb(dev->tx_urb); -+} -+ -+static struct net_device_stats *ipheth_stats(struct net_device *net) -+{ -+ struct ipheth_device *dev = netdev_priv(net); -+ return &dev->net->stats; -+} -+ -+static u32 ipheth_ethtool_op_get_link(struct net_device *net) -+{ -+ struct ipheth_device *dev = netdev_priv(net); -+ return netif_carrier_ok(dev->net); -+} -+ -+static struct ethtool_ops ops = { -+ .get_link = ipheth_ethtool_op_get_link -+}; -+ -+static const struct net_device_ops ipheth_netdev_ops = { -+ .ndo_open = &ipheth_open, -+ .ndo_stop = &ipheth_close, -+ .ndo_start_xmit = &ipheth_tx, -+ .ndo_tx_timeout = &ipheth_tx_timeout, -+ .ndo_get_stats = &ipheth_stats, -+}; -+ -+static struct device_type ipheth_type = { -+ .name = "wwan", -+}; -+ -+static int ipheth_probe(struct usb_interface *intf, -+ const struct usb_device_id *id) -+{ -+ struct usb_device *udev = interface_to_usbdev(intf); -+ struct usb_host_interface *hintf; -+ struct usb_endpoint_descriptor *endp; -+ struct ipheth_device *dev; -+ struct net_device *netdev; -+ int i; -+ int retval; -+ -+ netdev = alloc_etherdev(sizeof(struct ipheth_device)); -+ if (!netdev) -+ return -ENOMEM; -+ -+ netdev->netdev_ops = &ipheth_netdev_ops; -+ netdev->watchdog_timeo = IPHETH_TX_TIMEOUT; -+ strcpy(netdev->name, "wwan%d"); -+ -+ dev = netdev_priv(netdev); -+ dev->udev = udev; -+ dev->net = netdev; -+ dev->intf = intf; -+ -+ /* Set up endpoints */ -+ hintf = usb_altnum_to_altsetting(intf, IPHETH_ALT_INTFNUM); -+ if (hintf == NULL) { -+ retval = -ENODEV; -+ err("Unable to find alternate settings interface"); -+ goto err_endpoints; -+ } -+ -+ for (i = 0; i < hintf->desc.bNumEndpoints; i++) { -+ endp = &hintf->endpoint[i].desc; -+ if (usb_endpoint_is_bulk_in(endp)) -+ dev->bulk_in = endp->bEndpointAddress; -+ else if (usb_endpoint_is_bulk_out(endp)) -+ dev->bulk_out = endp->bEndpointAddress; -+ } -+ if (!(dev->bulk_in && dev->bulk_out)) { -+ retval = -ENODEV; -+ err("Unable to find endpoints"); -+ goto err_endpoints; -+ } -+ -+ dev->ctrl_buf = kmalloc(IPHETH_CTRL_BUF_SIZE, GFP_KERNEL); -+ if (dev->ctrl_buf == NULL) { -+ retval = -ENOMEM; -+ goto err_alloc_ctrl_buf; -+ } -+ -+ retval = ipheth_get_macaddr(dev); -+ if (retval) -+ goto err_get_macaddr; -+ -+ INIT_DELAYED_WORK(&dev->carrier_work, ipheth_carrier_check_work); -+ -+ retval = ipheth_alloc_urbs(dev); -+ if (retval) { -+ err("error allocating urbs: %d", retval); -+ goto err_alloc_urbs; -+ } -+ -+ usb_set_intfdata(intf, dev); -+ -+ SET_NETDEV_DEV(netdev, &intf->dev); -+ SET_ETHTOOL_OPS(netdev, &ops); -+ SET_NETDEV_DEVTYPE(netdev, &ipheth_type); -+ -+ retval = register_netdev(netdev); -+ if (retval) { -+ err("error registering netdev: %d", retval); -+ retval = -EIO; -+ goto err_register_netdev; -+ } -+ -+ dev_info(&intf->dev, "Apple iPhone USB Ethernet device attached\n"); -+ return 0; -+ -+err_register_netdev: -+ ipheth_free_urbs(dev); -+err_alloc_urbs: -+err_get_macaddr: -+err_alloc_ctrl_buf: -+ kfree(dev->ctrl_buf); -+err_endpoints: -+ free_netdev(netdev); -+ return retval; -+} -+ -+static void ipheth_disconnect(struct usb_interface *intf) -+{ -+ struct ipheth_device *dev; -+ -+ dev = usb_get_intfdata(intf); -+ if (dev != NULL) { -+ unregister_netdev(dev->net); -+ ipheth_kill_urbs(dev); -+ ipheth_free_urbs(dev); -+ kfree(dev->ctrl_buf); -+ free_netdev(dev->net); -+ } -+ usb_set_intfdata(intf, NULL); -+ dev_info(&intf->dev, "Apple iPhone USB Ethernet now disconnected\n"); -+} -+ -+static struct usb_driver ipheth_driver = { -+ .name = "ipheth", -+ .probe = ipheth_probe, -+ .disconnect = ipheth_disconnect, -+ .id_table = ipheth_table, -+}; -+ -+static int __init ipheth_init(void) -+{ -+ int retval; -+ -+ retval = usb_register(&ipheth_driver); -+ if (retval) { -+ err("usb_register failed: %d", retval); -+ return retval; -+ } -+ return 0; -+} -+ -+static void __exit ipheth_exit(void) -+{ -+ usb_deregister(&ipheth_driver); -+} -+ -+module_init(ipheth_init); -+module_exit(ipheth_exit); -+ -+MODULE_AUTHOR("Diego Giagio "); -+MODULE_DESCRIPTION("Apple iPhone USB Ethernet driver"); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/debian/patches/features/all/module-firmware/0025-tty-declare-MODULE_FIRMWARE-in-various-drivers.patch b/debian/patches/features/all/module-firmware/0025-tty-declare-MODULE_FIRMWARE-in-various-drivers.patch deleted file mode 100644 index 682aaa799..000000000 --- a/debian/patches/features/all/module-firmware/0025-tty-declare-MODULE_FIRMWARE-in-various-drivers.patch +++ /dev/null @@ -1,69 +0,0 @@ -Based on: - -From: Ben Hutchings -Subject: [PATCH] tty: declare MODULE_FIRMWARE in various drivers - ---- a/drivers/char/cyclades.c -+++ b/drivers/char/cyclades.c -@@ -4195,3 +4195,4 @@ module_exit(cy_cleanup_module); - MODULE_LICENSE("GPL"); - MODULE_VERSION(CY_VERSION); - MODULE_ALIAS_CHARDEV_MAJOR(CYCLADES_MAJOR); -+MODULE_FIRMWARE("cyzfirm.bin"); ---- a/drivers/char/ip2/ip2main.c -+++ b/drivers/char/ip2/ip2main.c -@@ -3196,3 +3196,5 @@ static struct pci_device_id ip2main_pci_tbl[] __devinitdata = { - }; - - MODULE_DEVICE_TABLE(pci, ip2main_pci_tbl); -+ -+MODULE_FIRMWARE("intelliport2.bin"); ---- a/drivers/char/isicom.c -+++ b/drivers/char/isicom.c -@@ -1720,3 +1720,8 @@ module_exit(isicom_exit); - MODULE_AUTHOR("MultiTech"); - MODULE_DESCRIPTION("Driver for the ISI series of cards by MultiTech"); - MODULE_LICENSE("GPL"); -+MODULE_FIRMWARE("isi608.bin"); -+MODULE_FIRMWARE("isi608em.bin"); -+MODULE_FIRMWARE("isi616em.bin"); -+MODULE_FIRMWARE("isi4608.bin"); -+MODULE_FIRMWARE("isi4616.bin"); ---- a/drivers/char/moxa.c -+++ b/drivers/char/moxa.c -@@ -172,6 +172,9 @@ static unsigned int numports[MAX_BOARDS]; - MODULE_AUTHOR("William Chen"); - MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver"); - MODULE_LICENSE("GPL"); -+MODULE_FIRMWARE("c218tunx.cod"); -+MODULE_FIRMWARE("cp204unx.cod"); -+MODULE_FIRMWARE("c320tunx.cod"); - #ifdef MODULE - module_param_array(type, uint, NULL, 0); - MODULE_PARM_DESC(type, "card type: C218=2, C320=4"); ---- a/drivers/serial/icom.c -+++ b/drivers/serial/icom.c -@@ -1654,4 +1654,6 @@ MODULE_DESCRIPTION("IBM iSeries Serial IOA driver"); - MODULE_SUPPORTED_DEVICE - ("IBM iSeries 2745, 2771, 2772, 2742, 2793 and 2805 Communications adapters"); - MODULE_LICENSE("GPL"); -- -+MODULE_FIRMWARE("icom_call_setup.bin"); -+MODULE_FIRMWARE("icom_res_dce.bin"); -+MODULE_FIRMWARE("icom_asc.bin"); ---- a/drivers/usb/serial/keyspan_pda.c -+++ b/drivers/usb/serial/keyspan_pda.c -@@ -789,6 +789,13 @@ static int keyspan_pda_fake_startup(struct usb_serial *serial) - return 1; - } - -+#ifdef KEYSPAN -+MODULE_FIRMWARE("keyspan_pda/keyspan_pda.fw"); -+#endif -+#ifdef XIRCOM -+MODULE_FIRMWARE("keyspan_pda/xircom_pgs.fw"); -+#endif -+ - static int keyspan_pda_startup(struct usb_serial *serial) - { - diff --git a/debian/patches/features/all/module-firmware/0026-staging-declare-MODULE_FIRMWARE-in-various-drivers.patch b/debian/patches/features/all/module-firmware/0026-staging-declare-MODULE_FIRMWARE-in-various-drivers.patch deleted file mode 100644 index 4f423034f..000000000 --- a/debian/patches/features/all/module-firmware/0026-staging-declare-MODULE_FIRMWARE-in-various-drivers.patch +++ /dev/null @@ -1,97 +0,0 @@ -Based on: - -From: Ben Hutchings -Subject: [PATCH] staging: declare MODULE_FIRMWARE in various drivers - ---- a/drivers/staging/comedi/drivers/jr3_pci.c -+++ b/drivers/staging/comedi/drivers/jr3_pci.c -@@ -954,6 +954,8 @@ out: - return result; - } - -+MODULE_FIRMWARE("comedi/jr3pci.idm"); -+ - static int jr3_pci_detach(struct comedi_device *dev) - { - int i; ---- a/drivers/staging/go7007/go7007-driver.c -+++ b/drivers/staging/go7007/go7007-driver.c -@@ -128,6 +128,8 @@ static int go7007_load_encoder(struct go7007 *go) - return rv; - } - -+MODULE_FIRMWARE("go7007fw.bin"); -+ - /* - * Boot the encoder and register the I2C adapter if requested. Do the - * minimum initialization necessary, since the board-specific code may ---- a/drivers/staging/go7007/go7007-usb.c -+++ b/drivers/staging/go7007/go7007-usb.c -@@ -444,6 +444,8 @@ static struct go7007_usb_board board_sensoray_2250 = { - }, - }; - -+MODULE_FIRMWARE("go7007tv.bin"); -+ - static struct usb_device_id go7007_usb_id_table[] = { - { - .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION | ---- a/drivers/staging/go7007/saa7134-go7007.c -+++ b/drivers/staging/go7007/saa7134-go7007.c -@@ -84,6 +84,7 @@ static struct go7007_board_info board_voyager = { - }, - }, - }; -+MODULE_FIRMWARE("go7007tv.bin"); - - /********************* Driver for GPIO HPI interface *********************/ - ---- a/drivers/staging/rtl8192e/r819xE_firmware.c -+++ b/drivers/staging/rtl8192e/r819xE_firmware.c -@@ -365,3 +365,7 @@ download_firmware_fail: - return rt_status; - - } -+ -+MODULE_FIRMWARE("RTL8192E/boot.img"); -+MODULE_FIRMWARE("RTL8192E/main.img"); -+MODULE_FIRMWARE("RTL8192E/data.img"); ---- a/drivers/staging/rtl8192su/r8192S_firmware.c -+++ b/drivers/staging/rtl8192su/r8192S_firmware.c -@@ -538,3 +538,4 @@ bool FirmwareDownload92S(struct net_device *dev) - return rtStatus; - } - -+MODULE_FIRMWARE("RTL8192SU/rtl8192sfw.bin"); ---- a/drivers/staging/slicoss/slicoss.c -+++ b/drivers/staging/slicoss/slicoss.c -@@ -1866,6 +1866,9 @@ static int slic_card_download_gbrcv(struct adapter *adapter) - return 0; - } - -+MODULE_FIRMWARE("slicoss/oasisrcvucode.sys"); -+MODULE_FIRMWARE("slicoss/gbrcvucode.sys"); -+ - static int slic_card_download(struct adapter *adapter) - { - const struct firmware *fw; -@@ -1977,6 +1980,9 @@ static int slic_card_download(struct adapter *adapter) - return STATUS_SUCCESS; - } - -+MODULE_FIRMWARE("slicoss/oasisdownload.sys"); -+MODULE_FIRMWARE("slicoss/gbdownload.sys"); -+ - static void slic_adapter_set_hwaddr(struct adapter *adapter) - { - struct sliccard *card = adapter->card; ---- a/drivers/staging/wlan-ng/prism2fw.c -+++ b/drivers/staging/wlan-ng/prism2fw.c -@@ -53,6 +53,7 @@ - /* Local Constants */ - - #define PRISM2_USB_FWFILE "prism2_ru.fw" -+MODULE_FIRMWARE(PRISM2_USB_FWFILE); - - #define S3DATA_MAX 5000 - #define S3PLUG_MAX 200 diff --git a/debian/patches/features/all/module-firmware/0027-sep-include-driver-name-in-firmware-filenames.patch b/debian/patches/features/all/module-firmware/0027-sep-include-driver-name-in-firmware-filenames.patch deleted file mode 100644 index 789841e23..000000000 --- a/debian/patches/features/all/module-firmware/0027-sep-include-driver-name-in-firmware-filenames.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 9210aeb3bd3ad862f2063b7128ba4b33799b4092 Mon Sep 17 00:00:00 2001 -From: Ben Hutchings -Date: Sat, 7 Nov 2009 20:09:26 +0000 -Subject: [PATCH] sep: include driver name in firmware filenames - -The current names "cache.image.bin" and "resident.image.bin" are far -too generic. ---- - drivers/staging/sep/sep_driver.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/staging/sep/sep_driver.c b/drivers/staging/sep/sep_driver.c -index e7bc9ec..6b763b7 100644 ---- a/drivers/staging/sep/sep_driver.c -+++ b/drivers/staging/sep/sep_driver.c -@@ -182,8 +182,8 @@ static DECLARE_WAIT_QUEUE_HEAD(sep_event); - static int sep_load_firmware(struct sep_device *sep) - { - const struct firmware *fw; -- char *cache_name = "cache.image.bin"; -- char *res_name = "resident.image.bin"; -+ char *cache_name = "sep/cache.image.bin"; -+ char *res_name = "sep/resident.image.bin"; - int error; - - edbg("SEP Driver:rar_virtual is %p\n", sep->rar_addr); --- -1.6.6 - diff --git a/debian/patches/features/all/module-firmware/0028-sep-declare-MODULE_FIRMWARE.patch b/debian/patches/features/all/module-firmware/0028-sep-declare-MODULE_FIRMWARE.patch deleted file mode 100644 index 4c06ba3de..000000000 --- a/debian/patches/features/all/module-firmware/0028-sep-declare-MODULE_FIRMWARE.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 94820c94108bf46801939d3e342e9a07a81da64e Mon Sep 17 00:00:00 2001 -From: Ben Hutchings -Date: Sat, 7 Nov 2009 20:10:23 +0000 -Subject: [PATCH] sep: declare MODULE_FIRMWARE - ---- - drivers/staging/sep/sep_driver.c | 3 +++ - 1 files changed, 3 insertions(+), 0 deletions(-) - -diff --git a/drivers/staging/sep/sep_driver.c b/drivers/staging/sep/sep_driver.c -index 6b763b7..916a9c1 100644 ---- a/drivers/staging/sep/sep_driver.c -+++ b/drivers/staging/sep/sep_driver.c -@@ -222,6 +222,9 @@ static int sep_load_firmware(struct sep_device *sep) - return 0; - } - -+MODULE_FIRMWARE("sep/cache.image.bin"); -+MODULE_FIRMWARE("sep/resident.image.bin"); -+ - /** - * sep_map_and_alloc_shared_area - allocate shared block - * @sep: security processor --- -1.6.6 - diff --git a/debian/patches/features/all/module-firmware/0029-isight-firmware-declare-MODULE_FIRMWARE.patch b/debian/patches/features/all/module-firmware/0029-isight-firmware-declare-MODULE_FIRMWARE.patch deleted file mode 100644 index 548c290bd..000000000 --- a/debian/patches/features/all/module-firmware/0029-isight-firmware-declare-MODULE_FIRMWARE.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 34e37eaacc94a27d50151d1ab4fae67f1c3ffda5 Mon Sep 17 00:00:00 2001 -From: Ben Hutchings -Date: Sat, 7 Nov 2009 20:21:37 +0000 -Subject: [PATCH] isight-firmware: declare MODULE_FIRMWARE - ---- - drivers/usb/misc/isight_firmware.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - -diff --git a/drivers/usb/misc/isight_firmware.c b/drivers/usb/misc/isight_firmware.c -index b897f65..1a88e27 100644 ---- a/drivers/usb/misc/isight_firmware.c -+++ b/drivers/usb/misc/isight_firmware.c -@@ -112,6 +112,8 @@ out: - return ret; - } - -+MODULE_FIRMWARE("isight.fw"); -+ - static void isight_firmware_disconnect(struct usb_interface *intf) - { - } --- -1.6.6 - diff --git a/debian/patches/features/all/rt28x0sta-constify-RTUSBMultiWrite-RTUSBFirmwareWrite.patch b/debian/patches/features/all/rt28x0sta-constify-RTUSBMultiWrite-RTUSBFirmwareWrite.patch deleted file mode 100644 index 1ff6caf8b..000000000 --- a/debian/patches/features/all/rt28x0sta-constify-RTUSBMultiWrite-RTUSBFirmwareWrite.patch +++ /dev/null @@ -1,87 +0,0 @@ -From fb9c62c3bbf88aa3a3c9bb0c9feb26740eb29ddf Mon Sep 17 00:00:00 2001 -From: Ben Hutchings -Date: Mon, 18 Jan 2010 02:50:24 +0000 -Subject: [PATCH] Staging: rt2870sta: constify RTUSBMultiWrite(), RTUSBFirmwareWrite() - -These functions do not modify the data they are passed. - -Signed-off-by: Ben Hutchings -Signed-off-by: Greg Kroah-Hartman ---- - drivers/staging/rt2860/rtmp.h | 6 +++--- - drivers/staging/rt2870/common/rtusb_io.c | 10 +++++----- - 2 files changed, 8 insertions(+), 8 deletions(-) - -diff --git a/drivers/staging/rt2860/rtmp.h b/drivers/staging/rt2860/rtmp.h -index c50abf4..6c6503d 100644 ---- a/drivers/staging/rt2860/rtmp.h -+++ b/drivers/staging/rt2860/rtmp.h -@@ -4043,10 +4043,10 @@ int RTUSBMultiRead(struct rt_rtmp_adapter *pAd, - u16 Offset, u8 *pData, u16 length); - - int RTUSBMultiWrite(struct rt_rtmp_adapter *pAd, -- u16 Offset, u8 *pData, u16 length); -+ u16 Offset, const u8 *pData, u16 length); - - int RTUSBMultiWrite_OneByte(struct rt_rtmp_adapter *pAd, -- u16 Offset, u8 *pData); -+ u16 Offset, const u8 *pData); - - int RTUSBReadBBPRegister(struct rt_rtmp_adapter *pAd, - u8 Id, u8 *pValue); -@@ -4112,7 +4112,7 @@ int RTUSBSingleWrite(struct rt_rtmp_adapter *pAd, - u16 Offset, u16 Value); - - int RTUSBFirmwareWrite(struct rt_rtmp_adapter *pAd, -- u8 *pFwImage, unsigned long FwLen); -+ const u8 *pFwImage, unsigned long FwLen); - - int RTUSBVenderReset(struct rt_rtmp_adapter *pAd); - -diff --git a/drivers/staging/rt2870/common/rtusb_io.c b/drivers/staging/rt2870/common/rtusb_io.c -index 34443f2..cf0d2f5 100644 ---- a/drivers/staging/rt2870/common/rtusb_io.c -+++ b/drivers/staging/rt2870/common/rtusb_io.c -@@ -84,7 +84,7 @@ static int RTUSBFirmwareRun(struct rt_rtmp_adapter *pAd) - ======================================================================== - */ - int RTUSBFirmwareWrite(struct rt_rtmp_adapter *pAd, -- u8 *pFwImage, unsigned long FwLen) -+ const u8 *pFwImage, unsigned long FwLen) - { - u32 MacReg; - int Status; -@@ -167,7 +167,7 @@ int RTUSBMultiRead(struct rt_rtmp_adapter *pAd, - ======================================================================== - */ - int RTUSBMultiWrite_OneByte(struct rt_rtmp_adapter *pAd, -- u16 Offset, u8 *pData) -+ u16 Offset, const u8 *pData) - { - int Status; - -@@ -175,18 +175,18 @@ int RTUSBMultiWrite_OneByte(struct rt_rtmp_adapter *pAd, - Status = RTUSB_VendorRequest(pAd, - USBD_TRANSFER_DIRECTION_OUT, - DEVICE_VENDOR_REQUEST_OUT, -- 0x6, 0, Offset, pData, 1); -+ 0x6, 0, Offset, (u8 *)pData, 1); - - return Status; - } - - int RTUSBMultiWrite(struct rt_rtmp_adapter *pAd, -- u16 Offset, u8 *pData, u16 length) -+ u16 Offset, const u8 *pData, u16 length) - { - int Status; - - u16 index = 0, Value; -- u8 *pSrc = pData; -+ const u8 *pSrc = pData; - u16 resude = 0; - - resude = length % 2; --- -1.6.6.2 - diff --git a/debian/patches/features/all/rt28x0sta-use-request_firmware.patch b/debian/patches/features/all/rt28x0sta-use-request_firmware.patch deleted file mode 100644 index f8220335c..000000000 --- a/debian/patches/features/all/rt28x0sta-use-request_firmware.patch +++ /dev/null @@ -1,266 +0,0 @@ -From: Ben Hutchings -Subject: [PATCH] Staging: rt{2860,2870}sta: Use request_firmware() to load firmware - -When originally introduced into staging, these drivers had custom -firmware-loading code which checked a version number and CRC at the -end of each blob. This reintroduces those checks, using crc-ccitt -instead of custom code. - -The removed firmware will be added to the linux-firmware.git -repository. - -Based on work by Darren Salt . - ---- a/drivers/staging/rt2860/Kconfig -+++ b/drivers/staging/rt2860/Kconfig -@@ -1,9 +1,10 @@ config RT2860 - config RT2860 - tristate "Ralink 2860/3090 wireless support" - depends on PCI && X86 && WLAN -- depends on BROKEN - select WIRELESS_EXT - select WEXT_PRIV -+ select CRC_CCITT -+ select FW_LOADER - ---help--- - This is an experimental driver for the Ralink 2860 and 3090 - wireless chips. ---- a/drivers/staging/rt2860/common/rtmp_mcu.c -+++ b/drivers/staging/rt2860/common/rtmp_mcu.c -@@ -37,35 +37,38 @@ - - #include "../rt_config.h" - --#if defined(RT2860) || defined(RT3090) --#include "firmware.h" --#include "../../rt3090/firmware.h" --#endif --#ifdef RT2870 --#include "../../rt3070/firmware.h" --#include "firmware_3070.h" --#endif -- --#include -+#include -+#include - - #ifdef RTMP_MAC_USB --/* */ --/* RT2870 Firmware Spec only used 1 oct for version expression */ --/* */ --#define FIRMWARE_MINOR_VERSION 7 --#endif /* RTMP_MAC_USB // */ - --/* New 8k byte firmware size for RT3071/RT3072 */ --#define FIRMWAREIMAGE_MAX_LENGTH 0x2000 --#define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(u8)) --#define FIRMWARE_MAJOR_VERSION 0 -+#define FIRMWAREIMAGE_LENGTH 0x1000 - --#define FIRMWAREIMAGEV1_LENGTH 0x1000 --#define FIRMWAREIMAGEV2_LENGTH 0x1000 -+#define FIRMWARE_2870_MIN_VERSION 12 -+#define FIRMWARE_2870_FILENAME "rt2870.bin" -+MODULE_FIRMWARE(FIRMWARE_2870_FILENAME); - --#ifdef RTMP_MAC_PCI --#define FIRMWARE_MINOR_VERSION 2 --#endif /* RTMP_MAC_PCI // */ -+#define FIRMWARE_3070_MIN_VERSION 17 -+#define FIRMWARE_3070_FILENAME "rt3070.bin" -+MODULE_FIRMWARE(FIRMWARE_3070_FILENAME); -+ -+#define FIRMWARE_3071_MIN_VERSION 17 -+#define FIRMWARE_3071_FILENAME "rt3071.bin" /* for RT3071/RT3072 */ -+MODULE_FIRMWARE(FIRMWARE_3071_FILENAME); -+ -+#else /* RTMP_MAC_PCI */ -+ -+#define FIRMWAREIMAGE_LENGTH 0x2000 -+ -+#define FIRMWARE_2860_MIN_VERSION 11 -+#define FIRMWARE_2860_FILENAME "rt2860.bin" -+MODULE_FIRMWARE(FIRMWARE_2860_FILENAME); -+ -+#define FIRMWARE_3090_MIN_VERSION 19 -+#define FIRMWARE_3090_FILENAME "rt3090.bin" /* for RT3090/RT3390 */ -+MODULE_FIRMWARE(FIRMWARE_3090_FILENAME); -+ -+#endif - - /* - ======================================================================== -@@ -90,6 +93,78 @@ int RtmpAsicEraseFirmware(struct rt_rtmp_adapter *pAd) - return 0; - } - -+static const struct firmware *rtmp_get_firmware(struct rt_rtmp_adapter *adapter) -+{ -+ const char *name; -+ const struct firmware *fw = NULL; -+ u8 min_version; -+ struct device *dev; -+ int err; -+ -+ if (adapter->firmware) -+ return adapter->firmware; -+ -+#ifdef RTMP_MAC_USB -+ if (IS_RT3071(adapter)) { -+ name = FIRMWARE_3071_FILENAME; -+ min_version = FIRMWARE_3071_MIN_VERSION; -+ } else if (IS_RT3070(adapter)) { -+ name = FIRMWARE_3070_FILENAME; -+ min_version = FIRMWARE_3070_MIN_VERSION; -+ } else { -+ name = FIRMWARE_2870_FILENAME; -+ min_version = FIRMWARE_2870_MIN_VERSION; -+ } -+ dev = &((struct os_cookie *)adapter->OS_Cookie)->pUsb_Dev->dev; -+#else /* RTMP_MAC_PCI */ -+ if (IS_RT3090(adapter) || IS_RT3390(adapter)) { -+ name = FIRMWARE_3090_FILENAME; -+ min_version = FIRMWARE_3090_MIN_VERSION; -+ } else { -+ name = FIRMWARE_2860_FILENAME; -+ min_version = FIRMWARE_2860_MIN_VERSION; -+ } -+ dev = &((struct os_cookie *)adapter->OS_Cookie)->pci_dev->dev; -+#endif -+ -+ err = request_firmware(&fw, name, dev); -+ if (err) { -+ dev_err(dev, "firmware file %s request failed (%d)\n", -+ name, err); -+ return NULL; -+ } -+ -+ if (fw->size < FIRMWAREIMAGE_LENGTH) { -+ dev_err(dev, "firmware file %s size is invalid\n", name); -+ goto invalid; -+ } -+ -+ /* is it new enough? */ -+ adapter->FirmwareVersion = fw->data[FIRMWAREIMAGE_LENGTH - 3]; -+ if (adapter->FirmwareVersion < min_version) { -+ dev_err(dev, -+ "firmware file %s is too old;" -+ " driver requires v%d or later\n", -+ name, min_version); -+ goto invalid; -+ } -+ -+ /* is the internal CRC correct? */ -+ if (crc_ccitt(0xffff, fw->data, FIRMWAREIMAGE_LENGTH - 2) != -+ (fw->data[FIRMWAREIMAGE_LENGTH - 2] | -+ (fw->data[FIRMWAREIMAGE_LENGTH - 1] << 8))) { -+ dev_err(dev, "firmware file %s failed internal CRC\n", name); -+ goto invalid; -+ } -+ -+ adapter->firmware = fw; -+ return fw; -+ -+invalid: -+ release_firmware(fw); -+ return NULL; -+} -+ - /* - ======================================================================== - -@@ -109,46 +184,16 @@ int RtmpAsicEraseFirmware(struct rt_rtmp_adapter *pAd) - */ - int RtmpAsicLoadFirmware(struct rt_rtmp_adapter *pAd) - { -- -+ const struct firmware *fw; - int Status = NDIS_STATUS_SUCCESS; -- u8 *pFirmwareImage = NULL; -- unsigned long FileLength, Index; -+ unsigned long Index; - u32 MacReg = 0; --#ifdef RTMP_MAC_USB -- u32 Version = (pAd->MACVersion >> 16); --#endif - -- /* New 8k byte firmware size for RT3071/RT3072 */ -- { --#ifdef RTMP_MAC_PCI -- if (IS_RT3090(pAd) || IS_RT3390(pAd)) { -- pFirmwareImage = FirmwareImage_3090; -- FileLength = FIRMWAREIMAGE_MAX_LENGTH; -- } else { -- pFirmwareImage = FirmwareImage_2860; -- FileLength = FIRMWAREIMAGE_MAX_LENGTH; -- } --#endif /* RTMP_MAC_PCI // */ --#ifdef RTMP_MAC_USB -- /* the firmware image consists of two parts */ -- if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070)) { /* use the second part */ -- /*printk("KH:Use New Version,part2\n"); */ -- pFirmwareImage = -- (u8 *)& -- FirmwareImage_3070[FIRMWAREIMAGEV1_LENGTH]; -- FileLength = FIRMWAREIMAGEV2_LENGTH; -- } else { -- /*printk("KH:Use New Version,part1\n"); */ -- if (Version == 0x3070) -- pFirmwareImage = FirmwareImage_3070; -- else -- pFirmwareImage = FirmwareImage_2870; -- FileLength = FIRMWAREIMAGEV1_LENGTH; -- } --#endif /* RTMP_MAC_USB // */ -- } -+ fw = rtmp_get_firmware(pAd); -+ if (!fw) -+ return NDIS_STATUS_FAILURE; - -- RTMP_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength); -+ RTMP_WRITE_FIRMWARE(pAd, fw->data, FIRMWAREIMAGE_LENGTH); - - /* check if MCU is ready */ - Index = 0; ---- a/drivers/staging/rt2860/rt_linux.c -+++ b/drivers/staging/rt2860/rt_linux.c -@@ -25,6 +25,7 @@ - ************************************************************************* - */ - -+#include - #include - #include "rt_config.h" - -@@ -260,6 +261,8 @@ void RTMPFreeAdapter(struct rt_rtmp_adapter *pAd) - - NdisFreeSpinLock(&pAd->irq_lock); - -+ release_firmware(pAd->firmware); -+ - vfree(pAd); /* pci_free_consistent(os_cookie->pci_dev,sizeof(struct rt_rtmp_adapter),pAd,os_cookie->pAd_pa); */ - if (os_cookie) - kfree(os_cookie); ---- a/drivers/staging/rt2860/rtmp.h -+++ b/drivers/staging/rt2860/rtmp.h -@@ -1719,6 +1719,7 @@ struct rt_rtmp_adapter { - void *OS_Cookie; /* save specific structure relative to OS */ - struct net_device *net_dev; - unsigned long VirtualIfCnt; -+ const struct firmware *firmware; - - struct rt_rtmp_chip_op chipOps; - u16 ThisTbttNumToNextWakeUp; ---- a/drivers/staging/rt2870/Kconfig -+++ b/drivers/staging/rt2870/Kconfig -@@ -1,8 +1,9 @@ config RT2870 - config RT2870 - tristate "Ralink 2870/3070 wireless support" - depends on USB && X86 && WLAN -- depends on BROKEN - select WIRELESS_EXT - select WEXT_PRIV -+ select CRC_CCITT -+ select FW_LOADER - ---help--- - This is an experimental driver for the Ralink xx70 wireless chips. diff --git a/debian/patches/features/all/rtl8192su-always-use-request_firmware.patch b/debian/patches/features/all/rtl8192su-always-use-request_firmware.patch deleted file mode 100644 index ac8a08284..000000000 --- a/debian/patches/features/all/rtl8192su-always-use-request_firmware.patch +++ /dev/null @@ -1,854 +0,0 @@ -From: Florian Schilhabel -Date: Fri, 19 Feb 2010 20:10:00 +0100 -Subject: [PATCH] Staging: rtl8192su: Remove Firmware from r8192SU_HWImg.c - -Because the Firmware is loaded from RTL8192SU/rtl8192sfw.bin, -it it save, to remove it from r8192SU_HWImg.c - -Signed-off-by: Florian Schilhabel -Signed-off-by: Greg Kroah-Hartman -[bwh: Adjust to apply to Debian source] - ---- a/drivers/staging/rtl8192su/Kconfig -+++ b/drivers/staging/rtl8192su/Kconfig -@@ -2,6 +2,5 @@ - tristate "RealTek RTL8192SU Wireless LAN NIC driver" - depends on PCI && WLAN && USB - depends on WIRELESS_EXT -- depends on BROKEN - default N - ---help--- ---- /dev/null -+++ b/drivers/staging/rtl8192su/r8192SU_HWImg.c -@@ -0,0 +1,626 @@ -+/*Created on 2009/ 1/15, 3:10*/ -+ -+#include "r8192SU_HWImg.h" -+ -+u8 Rtl8192SUFwMainArray[MainArrayLength] = { -+0x0, }; -+ -+u8 Rtl8192SUFwDataArray[DataArrayLength] = { -+0x0, }; -+ -+u32 Rtl8192SUPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength] = { -+0x01c,0x07000000, -+0x800,0x00040000, -+0x804,0x00008003, -+0x808,0x0000fc00, -+0x80c,0x0000000a, -+0x810,0x10005088, -+0x814,0x020c3d10, -+0x818,0x00200185, -+0x81c,0x00000000, -+0x820,0x01000000, -+0x824,0x00390004, -+0x828,0x01000000, -+0x82c,0x00390004, -+0x830,0x00000004, -+0x834,0x00690200, -+0x838,0x00000004, -+0x83c,0x00690200, -+0x840,0x00010000, -+0x844,0x00010000, -+0x848,0x00000000, -+0x84c,0x00000000, -+0x850,0x00000000, -+0x854,0x00000000, -+0x858,0x48484848, -+0x85c,0x65a965a9, -+0x860,0x0f7f0130, -+0x864,0x0f7f0130, -+0x868,0x0f7f0130, -+0x86c,0x0f7f0130, -+0x870,0x03000700, -+0x874,0x03000300, -+0x878,0x00020002, -+0x87c,0x004f0201, -+0x880,0xa8300ac1, -+0x884,0x00000058, -+0x888,0x00000008, -+0x88c,0x00000004, -+0x890,0x00000000, -+0x894,0xfffffffe, -+0x898,0x40302010, -+0x89c,0x00706050, -+0x8b0,0x00000000, -+0x8e0,0x00000000, -+0x8e4,0x00000000, -+0xe00,0x30333333, -+0xe04,0x2a2d2e2f, -+0xe08,0x00003232, -+0xe10,0x30333333, -+0xe14,0x2a2d2e2f, -+0xe18,0x30333333, -+0xe1c,0x2a2d2e2f, -+0xe30,0x01007c00, -+0xe34,0x01004800, -+0xe38,0x1000dc1f, -+0xe3c,0x10008c1f, -+0xe40,0x021400a0, -+0xe44,0x281600a0, -+0xe48,0xf8000001, -+0xe4c,0x00002910, -+0xe50,0x01007c00, -+0xe54,0x01004800, -+0xe58,0x1000dc1f, -+0xe5c,0x10008c1f, -+0xe60,0x021400a0, -+0xe64,0x281600a0, -+0xe6c,0x00002910, -+0xe70,0x31ed92fb, -+0xe74,0x361536fb, -+0xe78,0x361536fb, -+0xe7c,0x361536fb, -+0xe80,0x361536fb, -+0xe84,0x000d92fb, -+0xe88,0x000d92fb, -+0xe8c,0x31ed92fb, -+0xed0,0x31ed92fb, -+0xed4,0x31ed92fb, -+0xed8,0x000d92fb, -+0xedc,0x000d92fb, -+0xee0,0x000d92fb, -+0xee4,0x015e5448, -+0xee8,0x21555448, -+0x900,0x00000000, -+0x904,0x00000023, -+0x908,0x00000000, -+0x90c,0x03321333, -+0xa00,0x00d047c8, -+0xa04,0x80ff0008, -+0xa08,0x8ccd8300, -+0xa0c,0x2e62120f, -+0xa10,0x9500bb78, -+0xa14,0x11144028, -+0xa18,0x00881117, -+0xa1c,0x89140f00, -+0xa20,0x1a1b0000, -+0xa24,0x090e1317, -+0xa28,0x00000204, -+0xa2c,0x10d30000, -+0xc00,0x40071d40, -+0xc04,0x00a05633, -+0xc08,0x000000e4, -+0xc0c,0x6c6c6c6c, -+0xc10,0x08800000, -+0xc14,0x40000100, -+0xc18,0x08000000, -+0xc1c,0x40000100, -+0xc20,0x08000000, -+0xc24,0x40000100, -+0xc28,0x08000000, -+0xc2c,0x40000100, -+0xc30,0x6de9ac44, -+0xc34,0x469652cf, -+0xc38,0x49795994, -+0xc3c,0x0a979764, -+0xc40,0x1f7c403f, -+0xc44,0x000100b7, -+0xc48,0xec020000, -+0xc4c,0x007f037f, -+0xc50,0x69543420, -+0xc54,0x433c0094, -+0xc58,0x69543420, -+0xc5c,0x433c0094, -+0xc60,0x69543420, -+0xc64,0x433c0094, -+0xc68,0x69543420, -+0xc6c,0x433c0094, -+0xc70,0x2c7f000d, -+0xc74,0x0186155b, -+0xc78,0x0000001f, -+0xc7c,0x00b91612, -+0xc80,0x40000100, -+0xc84,0x20f60000, -+0xc88,0x20000080, -+0xc8c,0x20200000, -+0xc90,0x40000100, -+0xc94,0x00000000, -+0xc98,0x40000100, -+0xc9c,0x00000000, -+0xca0,0x00492492, -+0xca4,0x00000000, -+0xca8,0x00000000, -+0xcac,0x00000000, -+0xcb0,0x00000000, -+0xcb4,0x00000000, -+0xcb8,0x00000000, -+0xcbc,0x28000000, -+0xcc0,0x00000000, -+0xcc4,0x00000000, -+0xcc8,0x00000000, -+0xccc,0x00000000, -+0xcd0,0x00000000, -+0xcd4,0x00000000, -+0xcd8,0x64b22427, -+0xcdc,0x00766932, -+0xce0,0x00222222, -+0xce4,0x00000000, -+0xce8,0x37644302, -+0xcec,0x2f97d40c, -+0xd00,0x00000750, -+0xd04,0x00000403, -+0xd08,0x0000907f, -+0xd0c,0x00000001, -+0xd10,0xa0633333, -+0xd14,0x33333c63, -+0xd18,0x6a8f5b6b, -+0xd1c,0x00000000, -+0xd20,0x00000000, -+0xd24,0x00000000, -+0xd28,0x00000000, -+0xd2c,0xcc979975, -+0xd30,0x00000000, -+0xd34,0x00000000, -+0xd38,0x00000000, -+0xd3c,0x00027293, -+0xd40,0x00000000, -+0xd44,0x00000000, -+0xd48,0x00000000, -+0xd50,0x6437140a, -+0xd54,0x024dbd02, -+0xd58,0x00000000, -+0xd5c,0x30032064, -+0xd60,0x4653de68, -+0xd64,0x00518a3c, -+0xd68,0x00002101, -+0xf14,0x00000003, -+0xf4c,0x00000000, -+0xf00,0x00000300, -+}; -+ -+u32 Rtl8192SUPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength] = { -+0x0, }; -+ -+u32 Rtl8192SUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength] = { -+0x844,0xffffffff,0x00010000, -+0x804,0x0000000f,0x00000001, -+0x824,0x00f0000f,0x00300004, -+0x82c,0x00f0000f,0x00100002, -+0x870,0x04000000,0x00000001, -+0x864,0x00000400,0x00000000, -+0x878,0x000f000f,0x00000002, -+0xe74,0x0f000000,0x00000002, -+0xe78,0x0f000000,0x00000002, -+0xe7c,0x0f000000,0x00000002, -+0xe80,0x0f000000,0x00000002, -+0x90c,0x000000ff,0x00000011, -+0xc04,0x000000ff,0x00000011, -+0xd04,0x0000000f,0x00000001, -+0x1f4,0xffff0000,0x00007777, -+0x234,0xf8000000,0x0000000a, -+}; -+ -+u32 Rtl8192SUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength] = { -+0x804,0x0000000f,0x00000003, -+0x824,0x00f0000f,0x00300004, -+0x82c,0x00f0000f,0x00300002, -+0x870,0x04000000,0x00000001, -+0x864,0x00000400,0x00000000, -+0x878,0x000f000f,0x00000002, -+0xe74,0x0f000000,0x00000002, -+0xe78,0x0f000000,0x00000002, -+0xe7c,0x0f000000,0x00000002, -+0xe80,0x0f000000,0x00000002, -+0x90c,0x000000ff,0x00000011, -+0xc04,0x000000ff,0x00000033, -+0xd04,0x0000000f,0x00000003, -+0x1f4,0xffff0000,0x00007777, -+0x234,0xf8000000,0x0000000a, -+}; -+ -+u32 Rtl8192SUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = { -+0x804,0x0000000f,0x00000003, -+0x824,0x00f0000f,0x00300004, -+0x82c,0x00f0000f,0x00300004, -+0x870,0x04000000,0x00000001, -+0x864,0x00000400,0x00000001, -+0x878,0x000f000f,0x00020002, -+0xe74,0x0f000000,0x00000006, -+0xe78,0x0f000000,0x00000006, -+0xe7c,0x0f000000,0x00000006, -+0xe80,0x0f000000,0x00000006, -+0x90c,0x000000ff,0x00000033, -+0xc04,0x000000ff,0x00000033, -+0xd04,0x0000000f,0x00000003, -+0x1f4,0xffff0000,0x0000ffff, -+0x234,0xf8000000,0x00000013, -+}; -+ -+u32 Rtl8192SUPHY_REG_Array_PG[PHY_REG_Array_PGLength] = { -+0xe00,0xffffffff,0x06090909, -+0xe04,0xffffffff,0x00030406, -+0xe08,0x0000ff00,0x00000000, -+0xe10,0xffffffff,0x0a0c0d0e, -+0xe14,0xffffffff,0x04070809, -+0xe18,0xffffffff,0x0a0c0d0e, -+0xe1c,0xffffffff,0x04070809, -+}; -+ -+u32 Rtl8192SURadioA_1T_Array[RadioA_1T_ArrayLength] = { -+0x000,0x00030159, -+0x001,0x00030250, -+0x002,0x00010000, -+0x010,0x0008000f, -+0x011,0x000231fc, -+0x010,0x000c000f, -+0x011,0x0003f9f8, -+0x010,0x0002000f, -+0x011,0x00020101, -+0x014,0x0001093e, -+0x014,0x0009093e, -+0x015,0x000198f4, -+0x017,0x000f6500, -+0x01a,0x00013056, -+0x01b,0x00060000, -+0x01c,0x00000300, -+0x01e,0x00031059, -+0x021,0x00054000, -+0x022,0x0000083c, -+0x023,0x00001558, -+0x024,0x00000060, -+0x025,0x00022583, -+0x026,0x0000f200, -+0x027,0x000eacf1, -+0x028,0x0009bd54, -+0x029,0x00004582, -+0x02a,0x00000001, -+0x02b,0x00021334, -+0x02a,0x00000000, -+0x02b,0x0000000a, -+0x02a,0x00000001, -+0x02b,0x00000808, -+0x02b,0x00053333, -+0x02c,0x0000000c, -+0x02a,0x00000002, -+0x02b,0x00000808, -+0x02b,0x0005b333, -+0x02c,0x0000000d, -+0x02a,0x00000003, -+0x02b,0x00000808, -+0x02b,0x00063333, -+0x02c,0x0000000d, -+0x02a,0x00000004, -+0x02b,0x00000808, -+0x02b,0x0006b333, -+0x02c,0x0000000d, -+0x02a,0x00000005, -+0x02b,0x00000709, -+0x02b,0x00053333, -+0x02c,0x0000000d, -+0x02a,0x00000006, -+0x02b,0x00000709, -+0x02b,0x0005b333, -+0x02c,0x0000000d, -+0x02a,0x00000007, -+0x02b,0x00000709, -+0x02b,0x00063333, -+0x02c,0x0000000d, -+0x02a,0x00000008, -+0x02b,0x00000709, -+0x02b,0x0006b333, -+0x02c,0x0000000d, -+0x02a,0x00000009, -+0x02b,0x0000060a, -+0x02b,0x00053333, -+0x02c,0x0000000d, -+0x02a,0x0000000a, -+0x02b,0x0000060a, -+0x02b,0x0005b333, -+0x02c,0x0000000d, -+0x02a,0x0000000b, -+0x02b,0x0000060a, -+0x02b,0x00063333, -+0x02c,0x0000000d, -+0x02a,0x0000000c, -+0x02b,0x0000060a, -+0x02b,0x0006b333, -+0x02c,0x0000000d, -+0x02a,0x0000000d, -+0x02b,0x0000050b, -+0x02b,0x00053333, -+0x02c,0x0000000d, -+0x02a,0x0000000e, -+0x02b,0x0000050b, -+0x02b,0x00066623, -+0x02c,0x0000001a, -+0x02a,0x000e4000, -+0x030,0x00020000, -+0x031,0x000b9631, -+0x032,0x0000130d, -+0x033,0x00000187, -+0x013,0x00019e6c, -+0x013,0x00015e94, -+0x000,0x00010159, -+0x018,0x0000f401, -+0x0fe,0x00000000, -+0x01e,0x0003105b, -+0x0fe,0x00000000, -+0x000,0x00030159, -+0x010,0x0004000f, -+0x011,0x000203f9, -+}; -+ -+u32 Rtl8192SURadioB_Array[RadioB_ArrayLength] = { -+0x000,0x00030159, -+0x001,0x00001041, -+0x002,0x00011000, -+0x005,0x00080fc0, -+0x007,0x000fc803, -+0x013,0x00017cb0, -+0x013,0x00011cc0, -+0x013,0x0000dc60, -+0x013,0x00008c60, -+0x013,0x00004450, -+0x013,0x00000020, -+}; -+ -+u32 Rtl8192SURadioA_to1T_Array[RadioA_to1T_ArrayLength] = { -+0x000,0x00000000, -+}; -+ -+u32 Rtl8192SURadioA_to2T_Array[RadioA_to2T_ArrayLength] = { -+0x000,0x00000000, -+}; -+ -+u32 Rtl8192SURadioB_GM_Array[RadioB_GM_ArrayLength] = { -+0x000,0x00030159, -+0x001,0x00001041, -+0x002,0x00011000, -+0x005,0x00080fc0, -+0x007,0x000fc803, -+0x013,0x0000bef0, -+0x013,0x00007e90, -+0x013,0x00003e30, -+}; -+ -+u32 Rtl8192SUMAC_2T_Array[MAC_2T_ArrayLength] = { -+0x020,0x00000035, -+0x048,0x0000000e, -+0x049,0x000000f0, -+0x04a,0x00000077, -+0x04b,0x00000083, -+0x0b5,0x00000021, -+0x0dc,0x000000ff, -+0x0dd,0x000000ff, -+0x0de,0x000000ff, -+0x0df,0x000000ff, -+0x116,0x00000000, -+0x117,0x00000000, -+0x118,0x00000000, -+0x119,0x00000000, -+0x11a,0x00000000, -+0x11b,0x00000000, -+0x11c,0x00000000, -+0x11d,0x00000000, -+0x160,0x0000000b, -+0x161,0x0000000b, -+0x162,0x0000000b, -+0x163,0x0000000b, -+0x164,0x0000000b, -+0x165,0x0000000b, -+0x166,0x0000000b, -+0x167,0x0000000b, -+0x168,0x0000000b, -+0x169,0x0000000b, -+0x16a,0x0000000b, -+0x16b,0x0000000b, -+0x16c,0x0000000b, -+0x16d,0x0000000b, -+0x16e,0x0000000b, -+0x16f,0x0000000b, -+0x170,0x0000000b, -+0x171,0x0000000b, -+0x172,0x0000000b, -+0x173,0x0000000b, -+0x174,0x0000000b, -+0x175,0x0000000b, -+0x176,0x0000000b, -+0x177,0x0000000b, -+0x178,0x0000000b, -+0x179,0x0000000b, -+0x17a,0x0000000b, -+0x17b,0x0000000b, -+0x17c,0x0000000b, -+0x17d,0x0000000b, -+0x17e,0x0000000b, -+0x17f,0x0000000b, -+0x236,0x0000000c, -+0x503,0x00000022, -+0x560,0x00000009, -+}; -+ -+u32 Rtl8192SUMACPHY_Array_PG[MACPHY_Array_PGLength] = { -+0x0, }; -+ -+u32 Rtl8192SUAGCTAB_Array[AGCTAB_ArrayLength] = { -+0xc78,0x7f000001, -+0xc78,0x7f010001, -+0xc78,0x7e020001, -+0xc78,0x7d030001, -+0xc78,0x7c040001, -+0xc78,0x7b050001, -+0xc78,0x7a060001, -+0xc78,0x79070001, -+0xc78,0x78080001, -+0xc78,0x77090001, -+0xc78,0x760a0001, -+0xc78,0x750b0001, -+0xc78,0x740c0001, -+0xc78,0x730d0001, -+0xc78,0x720e0001, -+0xc78,0x710f0001, -+0xc78,0x70100001, -+0xc78,0x6f110001, -+0xc78,0x6f120001, -+0xc78,0x6e130001, -+0xc78,0x6d140001, -+0xc78,0x6d150001, -+0xc78,0x6c160001, -+0xc78,0x6b170001, -+0xc78,0x6a180001, -+0xc78,0x6a190001, -+0xc78,0x691a0001, -+0xc78,0x681b0001, -+0xc78,0x671c0001, -+0xc78,0x661d0001, -+0xc78,0x651e0001, -+0xc78,0x641f0001, -+0xc78,0x63200001, -+0xc78,0x4c210001, -+0xc78,0x4b220001, -+0xc78,0x4a230001, -+0xc78,0x49240001, -+0xc78,0x48250001, -+0xc78,0x47260001, -+0xc78,0x46270001, -+0xc78,0x45280001, -+0xc78,0x44290001, -+0xc78,0x2c2a0001, -+0xc78,0x2b2b0001, -+0xc78,0x2a2c0001, -+0xc78,0x292d0001, -+0xc78,0x282e0001, -+0xc78,0x272f0001, -+0xc78,0x26300001, -+0xc78,0x25310001, -+0xc78,0x24320001, -+0xc78,0x23330001, -+0xc78,0x22340001, -+0xc78,0x09350001, -+0xc78,0x08360001, -+0xc78,0x07370001, -+0xc78,0x06380001, -+0xc78,0x05390001, -+0xc78,0x043a0001, -+0xc78,0x033b0001, -+0xc78,0x023c0001, -+0xc78,0x013d0001, -+0xc78,0x003e0001, -+0xc78,0x003f0001, -+0xc78,0x7f400001, -+0xc78,0x7f410001, -+0xc78,0x7e420001, -+0xc78,0x7d430001, -+0xc78,0x7c440001, -+0xc78,0x7b450001, -+0xc78,0x7a460001, -+0xc78,0x79470001, -+0xc78,0x78480001, -+0xc78,0x77490001, -+0xc78,0x764a0001, -+0xc78,0x754b0001, -+0xc78,0x744c0001, -+0xc78,0x734d0001, -+0xc78,0x724e0001, -+0xc78,0x714f0001, -+0xc78,0x70500001, -+0xc78,0x6f510001, -+0xc78,0x6f520001, -+0xc78,0x6e530001, -+0xc78,0x6d540001, -+0xc78,0x6d550001, -+0xc78,0x6c560001, -+0xc78,0x6b570001, -+0xc78,0x6a580001, -+0xc78,0x6a590001, -+0xc78,0x695a0001, -+0xc78,0x685b0001, -+0xc78,0x675c0001, -+0xc78,0x665d0001, -+0xc78,0x655e0001, -+0xc78,0x645f0001, -+0xc78,0x63600001, -+0xc78,0x4c610001, -+0xc78,0x4b620001, -+0xc78,0x4a630001, -+0xc78,0x49640001, -+0xc78,0x48650001, -+0xc78,0x47660001, -+0xc78,0x46670001, -+0xc78,0x45680001, -+0xc78,0x44690001, -+0xc78,0x2c6a0001, -+0xc78,0x2b6b0001, -+0xc78,0x2a6c0001, -+0xc78,0x296d0001, -+0xc78,0x286e0001, -+0xc78,0x276f0001, -+0xc78,0x26700001, -+0xc78,0x25710001, -+0xc78,0x24720001, -+0xc78,0x23730001, -+0xc78,0x22740001, -+0xc78,0x09750001, -+0xc78,0x08760001, -+0xc78,0x07770001, -+0xc78,0x06780001, -+0xc78,0x05790001, -+0xc78,0x047a0001, -+0xc78,0x037b0001, -+0xc78,0x027c0001, -+0xc78,0x017d0001, -+0xc78,0x007e0001, -+0xc78,0x007f0001, -+0xc78,0x3000001e, -+0xc78,0x3001001e, -+0xc78,0x3002001e, -+0xc78,0x3003001e, -+0xc78,0x3004001e, -+0xc78,0x3405001e, -+0xc78,0x3806001e, -+0xc78,0x3e07001e, -+0xc78,0x3e08001e, -+0xc78,0x4409001e, -+0xc78,0x460a001e, -+0xc78,0x480b001e, -+0xc78,0x480c001e, -+0xc78,0x4e0d001e, -+0xc78,0x560e001e, -+0xc78,0x5a0f001e, -+0xc78,0x5e10001e, -+0xc78,0x6211001e, -+0xc78,0x6c12001e, -+0xc78,0x7213001e, -+0xc78,0x7214001e, -+0xc78,0x7215001e, -+0xc78,0x7216001e, -+0xc78,0x7217001e, -+0xc78,0x7218001e, -+0xc78,0x7219001e, -+0xc78,0x721a001e, -+0xc78,0x721b001e, -+0xc78,0x721c001e, -+0xc78,0x721d001e, -+0xc78,0x721e001e, -+0xc78,0x721f001e, -+}; -+ -diff --git a/drivers/staging/rtl8192su/r8192SU_HWImg.h b/drivers/staging/rtl8192su/r8192SU_HWImg.h -index 96b1525..36e84af 100644 ---- a/drivers/staging/rtl8192su/r8192SU_HWImg.h -+++ b/drivers/staging/rtl8192su/r8192SU_HWImg.h -@@ -5,8 +5,6 @@ - - /*Created on 2009/ 3/ 6, 5:29*/ - --#define ImgArrayLength 68368 --extern u8 Rtl8192SUFwImgArray[ImgArrayLength]; - #define MainArrayLength 1 - extern u8 Rtl8192SUFwMainArray[MainArrayLength]; - #define DataArrayLength 1 -diff --git a/drivers/staging/rtl8192su/r8192S_firmware.c b/drivers/staging/rtl8192su/r8192S_firmware.c -index ff65bd1..752a3f1 100644 ---- a/drivers/staging/rtl8192su/r8192S_firmware.c -+++ b/drivers/staging/rtl8192su/r8192S_firmware.c -@@ -360,117 +360,58 @@ bool FirmwareDownload92S(struct net_device *dev) - - RT_TRACE(COMP_FIRMWARE, " --->FirmwareDownload92S()\n"); - -- //3// -- //3 //<1> Open Image file, and map file to contineous memory if open file success. -- //3 // or read image file from array. Default load from BIN file -- //3// -- priv->firmware_source = FW_SOURCE_IMG_FILE;// We should decided by Reg. -- -- switch( priv->firmware_source ) -+/* -+* Load the firmware from RTL8192SU/rtl8192sfw.bin -+*/ -+ if(pFirmware->szFwTmpBufferLen == 0) - { -- case FW_SOURCE_IMG_FILE: -- if(pFirmware->szFwTmpBufferLen == 0) -- { -- -- rc = request_firmware(&fw_entry, pFwImageFileName[ulInitStep],&priv->udev->dev);//===>1 -- if(rc < 0 ) { -- RT_TRACE(COMP_ERR, "request firmware fail!\n"); -- goto DownloadFirmware_Fail; -- } -- -- if(fw_entry->size > sizeof(pFirmware->szFwTmpBuffer)) -- { -- RT_TRACE(COMP_ERR, "img file size exceed the container buffer fail!\n"); -- release_firmware(fw_entry); -- goto DownloadFirmware_Fail; -- } -+ rc = request_firmware(&fw_entry, pFwImageFileName[ulInitStep],&priv->udev->dev); -+ if(rc < 0 ) { -+ RT_TRACE(COMP_ERR, "request firmware fail!\n"); -+ goto DownloadFirmware_Fail; -+ } - -- memcpy(pFirmware->szFwTmpBuffer,fw_entry->data,fw_entry->size); -- pFirmware->szFwTmpBufferLen = fw_entry->size; -+ if(fw_entry->size > sizeof(pFirmware->szFwTmpBuffer)) { -+ RT_TRACE(COMP_ERR, "img file size exceed the container buffer fail!\n"); - release_firmware(fw_entry); -- -- pucMappedFile = pFirmware->szFwTmpBuffer; -- file_length = pFirmware->szFwTmpBufferLen; -- -- //Retrieve FW header. -- pFirmware->pFwHeader = (PRT_8192S_FIRMWARE_HDR) pucMappedFile; -- pFwHdr = pFirmware->pFwHeader; -- RT_TRACE(COMP_FIRMWARE,"signature:%x, version:%x, size:%x, imemsize:%x, sram size:%x\n", \ -- pFwHdr->Signature, pFwHdr->Version, pFwHdr->DMEMSize, \ -- pFwHdr->IMG_IMEM_SIZE, pFwHdr->IMG_SRAM_SIZE); -- pFirmware->FirmwareVersion = byte(pFwHdr->Version ,0); -- if ((pFwHdr->IMG_IMEM_SIZE==0) || (pFwHdr->IMG_IMEM_SIZE > sizeof(pFirmware->FwIMEM))) -- { -- RT_TRACE(COMP_ERR, "%s: memory for data image is less than IMEM required\n",\ -- __FUNCTION__); -- goto DownloadFirmware_Fail; -- } else { -- pucMappedFile+=FwHdrSize; -- -- //Retrieve IMEM image. -- memcpy(pFirmware->FwIMEM, pucMappedFile, pFwHdr->IMG_IMEM_SIZE); -- pFirmware->FwIMEMLen = pFwHdr->IMG_IMEM_SIZE; -- } -- -- if (pFwHdr->IMG_SRAM_SIZE > sizeof(pFirmware->FwEMEM)) -- { -- RT_TRACE(COMP_ERR, "%s: memory for data image is less than EMEM required\n",\ -- __FUNCTION__); -- goto DownloadFirmware_Fail; -- } else { -- pucMappedFile += pFirmware->FwIMEMLen; -- -- /* Retriecve EMEM image */ -- memcpy(pFirmware->FwEMEM, pucMappedFile, pFwHdr->IMG_SRAM_SIZE);//===>6 -- pFirmware->FwEMEMLen = pFwHdr->IMG_SRAM_SIZE; -- } -- -- -+ goto DownloadFirmware_Fail; - } -- break; - -- case FW_SOURCE_HEADER_FILE: --#if 1 --#define Rtl819XFwImageArray Rtl8192SUFwImgArray -- //2008.11.10 Add by tynli. -- pucMappedFile = Rtl819XFwImageArray; -- ulFileLength = ImgArrayLength; -+ memcpy(pFirmware->szFwTmpBuffer,fw_entry->data,fw_entry->size); -+ pFirmware->szFwTmpBufferLen = fw_entry->size; -+ release_firmware(fw_entry); -+ -+ pucMappedFile = pFirmware->szFwTmpBuffer; -+ file_length = pFirmware->szFwTmpBufferLen; - -- RT_TRACE(COMP_INIT,"Fw download from header.\n"); -- /* Retrieve FW header*/ -+ /* Retrieve FW header. */ - pFirmware->pFwHeader = (PRT_8192S_FIRMWARE_HDR) pucMappedFile; - pFwHdr = pFirmware->pFwHeader; - RT_TRACE(COMP_FIRMWARE,"signature:%x, version:%x, size:%x, imemsize:%x, sram size:%x\n", \ - pFwHdr->Signature, pFwHdr->Version, pFwHdr->DMEMSize, \ - pFwHdr->IMG_IMEM_SIZE, pFwHdr->IMG_SRAM_SIZE); - pFirmware->FirmwareVersion = byte(pFwHdr->Version ,0); -- -- if ((pFwHdr->IMG_IMEM_SIZE==0) || (pFwHdr->IMG_IMEM_SIZE > sizeof(pFirmware->FwIMEM))) -- { -- printk("FirmwareDownload92S(): memory for data image is less than IMEM required\n"); -+ if ((pFwHdr->IMG_IMEM_SIZE==0) || (pFwHdr->IMG_IMEM_SIZE > sizeof(pFirmware->FwIMEM))) { -+ RT_TRACE(COMP_ERR, "%s: memory for data image is less than IMEM required\n",\ -+ __FUNCTION__); - goto DownloadFirmware_Fail; - } else { - pucMappedFile+=FwHdrSize; -- //Retrieve IMEM image. -+ /* Retrieve IMEM image. */ - memcpy(pFirmware->FwIMEM, pucMappedFile, pFwHdr->IMG_IMEM_SIZE); - pFirmware->FwIMEMLen = pFwHdr->IMG_IMEM_SIZE; - } - -- if (pFwHdr->IMG_SRAM_SIZE > sizeof(pFirmware->FwEMEM)) -- { -- printk(" FirmwareDownload92S(): memory for data image is less than EMEM required\n"); -- goto DownloadFirmware_Fail; -- } else { -- pucMappedFile+= pFirmware->FwIMEMLen; -- -- //Retriecve EMEM image. -- memcpy(pFirmware->FwEMEM, pucMappedFile, pFwHdr->IMG_SRAM_SIZE); -- pFirmware->FwEMEMLen = pFwHdr->IMG_SRAM_SIZE; -- } --#endif -- break; -- default: -- break; -+ if (pFwHdr->IMG_SRAM_SIZE > sizeof(pFirmware->FwEMEM)) { -+ RT_TRACE(COMP_ERR, "%s: memory for data image is less than EMEM required\n",\ -+ __FUNCTION__); -+ goto DownloadFirmware_Fail; -+ } else { -+ pucMappedFile += pFirmware->FwIMEMLen; -+ /* Retriecve EMEM image */ -+ memcpy(pFirmware->FwEMEM, pucMappedFile, pFwHdr->IMG_SRAM_SIZE);//===>6 -+ pFirmware->FwEMEMLen = pFwHdr->IMG_SRAM_SIZE; -+ } - } - - FwStatus = FirmwareGetNextStatus(pFirmware->FWStatus); -diff --git a/drivers/staging/rtl8192su/r8192S_firmware.h b/drivers/staging/rtl8192su/r8192S_firmware.h -index c525380..2c2cf80 100644 ---- a/drivers/staging/rtl8192su/r8192S_firmware.h -+++ b/drivers/staging/rtl8192su/r8192S_firmware.h -@@ -59,12 +59,6 @@ typedef enum _desc_packet_type_e{ - DESC_PACKET_TYPE_NORMAL = 1, - }desc_packet_type_e; - --typedef enum _firmware_source{ -- FW_SOURCE_IMG_FILE = 0, -- FW_SOURCE_HEADER_FILE = 1, --}firmware_source_e, *pfirmware_source_e; -- -- - typedef enum _opt_rst_type{ - OPT_SYSTEM_RESET = 0, - OPT_FIRMWARE_RESET = 1, -@@ -185,7 +179,6 @@ typedef enum _FIRMWARE_8192S_STATUS{ - #define RTL8190_MAX_FIRMWARE_CODE_SIZE 64000 //64k - - typedef struct _rt_firmware{ -- firmware_source_e eFWSource; - PRT_8192S_FIRMWARE_HDR pFwHeader; - FIRMWARE_8192S_STATUS FWStatus; - u16 FirmwareVersion; -diff --git a/drivers/staging/rtl8192su/r8192U.h b/drivers/staging/rtl8192su/r8192U.h -index 2a11e01..ba87623 100644 ---- a/drivers/staging/rtl8192su/r8192U.h -+++ b/drivers/staging/rtl8192su/r8192U.h -@@ -1258,7 +1258,6 @@ typedef struct r8192_priv - u8 Rf_Mode; //add for Firmware RF -R/W switch - prt_firmware pFirmware; - rtl819xUsb_loopback_e LoopbackMode; -- firmware_source_e firmware_source; - bool usb_error; - - u16 EEPROMTxPowerDiff; diff --git a/debian/patches/series/base b/debian/patches/series/base index c9d24c66d..c4953b93d 100644 --- a/debian/patches/series/base +++ b/debian/patches/series/base @@ -8,31 +8,23 @@ + features/all/drivers-infiniband-hw-ipath-iba7220-use-request_firmware.patch + features/all/drivers-media-dvb-usb-af9005-request_firmware.patch -+ features/all/rt28x0sta-constify-RTUSBMultiWrite-RTUSBFirmwareWrite.patch -+ features/all/rt28x0sta-use-request_firmware.patch + features/all/lgs8gxx-lgs8g75-request_firmware.patch + features/all/r8169-rtl8168d-1-2-request_firmware-2.patch + features/all/sound-pci-cs46xx-request_firmware.patch -+ features/all/module-firmware/0025-tty-declare-MODULE_FIRMWARE-in-various-drivers.patch -+ features/all/module-firmware/0026-staging-declare-MODULE_FIRMWARE-in-various-drivers.patch -+ features/all/module-firmware/0027-sep-include-driver-name-in-firmware-filenames.patch -+ features/all/module-firmware/0028-sep-declare-MODULE_FIRMWARE.patch -+ features/all/module-firmware/0029-isight-firmware-declare-MODULE_FIRMWARE.patch - # patches from aufs2 repository, with s/EXPORT_SYMBOL/&_GPL/ -+ features/all/aufs2/aufs2-base.patch -+ features/all/aufs2/aufs2-standalone.patch -+ features/all/aufs2/aufs2-kbuild.patch +#+ features/all/aufs2/aufs2-base.patch +#+ features/all/aufs2/aufs2-standalone.patch +#+ features/all/aufs2/aufs2-kbuild.patch # content of fs/ and include/ from aufs2 repository -+ features/all/aufs2/aufs2-add.patch +#+ features/all/aufs2/aufs2-add.patch # mark as staging/crap -+ features/all/aufs2/mark-as-staging.patch +#+ features/all/aufs2/mark-as-staging.patch # content of src/ from speakup package; generated with: # diff -ur --unidirectional-new-file nonexistent src | filterdiff --strip=1 --addoldprefix=a/drivers/staging/speakup/ --addnewprefix=b/drivers/staging/speakup/ + features/all/speakup/speakup-add.patch -+ features/all/speakup/speakup-kbuild.patch +#+ features/all/speakup/speakup-kbuild.patch #+ bugfix/ia64/hardcode-arch-script-output.patch + bugfix/mips/disable-advansys.patch @@ -40,25 +32,19 @@ + bugfix/mips/disable-werror.patch + bugfix/powerpc/lpar-console.patch #+ bugfix/all/wireless-regulatory-default-EU.patch -+ debian/dfsg/radeon-add-clarifying-comment-to-r600-blit.patch -+ features/arm/compression-add-lzma.patch -+ features/arm/openrd-client.patch +#+ features/arm/compression-add-lzma.patch +#+ features/arm/openrd-client.patch + features/all/i915-autoload-without-CONFIG_DRM_I915_KMS.patch -+ bugfix/ia64/ia64-Include-linux-personality.h-header-in-asm-fcntl.patch ++ bugfix/ia65/ia64-Include-linux-personality.h-header-in-asm-fcntl.patch + debian/sysrq-mask.patch -+ features/arm/dns323-rev-a1-powerled.patch -+ features/arm/openrd-base-uart.patch -+ features/all/rtl8192su-always-use-request_firmware.patch - -+ bugfix/all/stable/2.6.33.1.patch -+ bugfix/all/stable/2.6.33.2.patch +#+ features/arm/dns323-rev-a1-powerled.patch +#+ features/arm/openrd-base-uart.patch + debian/arch-sh4-fix-uimage-build.patch -+ bugfix/all/stable/2.6.33.3.patch + features/all/phylib-Support-phy-module-autoloading.patch + features/all/phylib-Add-module-table-to-all-existing-phy-drivers.patch @@ -66,31 +52,13 @@ + bugfix/x86/PCI-Disable-MSI-for-MCP55-on-P5N32-E-SLI.patch + bugfix/all/phylib-fix-typo-in-bcm6xx-PHY-driver-table.patch + features/arm/dns323-rev-a1-gpio-request.patch -+ bugfix/all/drm-i915-Stop-trying-to-use-ACPI-lid-status-to-deter.patch -+ bugfix/all/forcedeth-fix-tx-limit2-flag-check.patch -+ bugfix/all/reiserfs-fix-permissions-on-reiserfs_priv.patch -+ bugfix/all/libata-ata_piix-clear-spurious-IRQ.patch -+ bugfix/all/block-blk_abort_request-lock-fix.patch + bugfix/mips/enable-pata-platform.patch + bugfix/all/rndis_host-Poll-status-channel-before-control-channel.patch -+ features/all/ipheth-add.patch -+ bugfix/all/ipheth-potential-null-dereferences-on-error-path.patch -+ bugfix/all/libata-fix-accesses-at-LBA28-boundary.patch + bugfix/all/thinkpad-acpi-add-x100e.patch -+ features/all/drm-radeon-evergreen.patch -+ bugfix/all/drm-radeon-kms-further-spread-spectrum-fixes.patch -+ bugfix/all/p54pci-move-tx-cleanup-into-tasklet.patch -+ bugfix/all/p54pci-revise-tx-locking.patch -+ bugfix/all/p54usb-Add-usbid-for-Corega-CG-WLUSB2GT.patch -+ bugfix/all/drivers-net-wireless-p54-txrx.c-Fix-off-by-one-error.patch + bugfix/all/p54pci-prevent-stuck-rx-ring.patch + bugfix/all/p54pci-fix-serious-sparse-warning.patch + bugfix/all/p54pci-fix-bugs-in-p54p_check_tx_ring.patch + bugfix/all/p54pci-fix-regression.patch -+ bugfix/all/hugetlb-fix-infinite-loop-in-get_futex_key-when-backed-by-huge-pages.patch -+ bugfix/all/ext4-issue-discard-operation-before-releasing-blocks.patch + bugfix/all/libiscsi-regression-fix-header-digest-errors.patch + bugfix/all/sctp-fix-skb_over_panic-resulting-from-multiple-invalid-parameter-errors.patch + bugfix/all/cifs-allow-null-nd-on-create.patch -+ bugfix/all/tipc-fix-oops-on-send-prior-to-entering-networked-mode.patch -+ bugfix/powerpc/kgdb-dont-needlessly-skip-PAGE_USER-test-for-Fsl-booke.patch