MIPS stuff that got committed to Linus' git tree right after rc5
svn path=/dists/trunk/linux-2.6/; revision=5985
This commit is contained in:
parent
576d63c474
commit
44862259f9
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@ -0,0 +1,376 @@
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MIPS stuff that got committed to Linus' git tree right after rc5
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From: Linus Torvalds <torvalds@g5.osdl.org>
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Date: Mon, 27 Feb 2006 17:46:24 +0000 (-0800)
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Subject: Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
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X-Git-Url: http://www.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=de5f503cfbe4f942492269c6bd97a16a4d61e488
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Merge branch 'upstream' of git://ftp.linux-mips.org/upstream-linus
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---
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--- a/arch/mips/kernel/linux32.c
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+++ b/arch/mips/kernel/linux32.c
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@@ -161,60 +161,6 @@ out:
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return error;
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}
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-struct dirent32 {
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- unsigned int d_ino;
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- unsigned int d_off;
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- unsigned short d_reclen;
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- char d_name[NAME_MAX + 1];
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-};
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-
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-static void
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-xlate_dirent(void *dirent64, void *dirent32, long n)
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-{
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- long off;
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- struct dirent *dirp;
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- struct dirent32 *dirp32;
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-
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- off = 0;
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- while (off < n) {
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- dirp = (struct dirent *)(dirent64 + off);
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- dirp32 = (struct dirent32 *)(dirent32 + off);
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- off += dirp->d_reclen;
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- dirp32->d_ino = dirp->d_ino;
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- dirp32->d_off = (unsigned int)dirp->d_off;
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- dirp32->d_reclen = dirp->d_reclen;
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- strncpy(dirp32->d_name, dirp->d_name, dirp->d_reclen - ((3 * 4) + 2));
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- }
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- return;
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-}
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-
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-asmlinkage long
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-sys32_getdents(unsigned int fd, void * dirent32, unsigned int count)
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-{
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- long n;
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- void *dirent64;
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-
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- dirent64 = (void *)((unsigned long)(dirent32 + (sizeof(long) - 1)) & ~(sizeof(long) - 1));
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- if ((n = sys_getdents(fd, dirent64, count - (dirent64 - dirent32))) < 0)
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- return(n);
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- xlate_dirent(dirent64, dirent32, n);
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- return(n);
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-}
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-
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-asmlinkage int old_readdir(unsigned int fd, void * dirent, unsigned int count);
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-
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-asmlinkage int
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-sys32_readdir(unsigned int fd, void * dirent32, unsigned int count)
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-{
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- int n;
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- struct dirent dirent64;
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-
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- if ((n = old_readdir(fd, &dirent64, count)) < 0)
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- return(n);
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- xlate_dirent(&dirent64, dirent32, dirent64.d_reclen);
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- return(n);
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-}
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-
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asmlinkage int
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sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, int options)
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{
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--- a/arch/mips/kernel/scall64-n32.S
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+++ b/arch/mips/kernel/scall64-n32.S
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@@ -195,7 +195,7 @@ EXPORT(sysn32_call_table)
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PTR sys_fdatasync
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PTR sys_truncate
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PTR sys_ftruncate /* 6075 */
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- PTR sys32_getdents
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+ PTR compat_sys_getdents
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PTR sys_getcwd
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PTR sys_chdir
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PTR sys_fchdir
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--- a/arch/mips/kernel/scall64-o32.S
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+++ b/arch/mips/kernel/scall64-o32.S
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@@ -293,7 +293,7 @@ sys_call_table:
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PTR sys_uselib
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PTR sys_swapon
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PTR sys_reboot
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- PTR sys32_readdir
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+ PTR compat_sys_old_readdir
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PTR old_mmap /* 4090 */
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PTR sys_munmap
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PTR sys_truncate
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@@ -345,7 +345,7 @@ sys_call_table:
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PTR sys_setfsuid
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PTR sys_setfsgid
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PTR sys32_llseek /* 4140 */
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- PTR sys32_getdents
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+ PTR compat_sys_getdents
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PTR compat_sys_select
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PTR sys_flock
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PTR sys_msync
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--- a/arch/mips/kernel/setup.c
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+++ b/arch/mips/kernel/setup.c
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@@ -540,6 +540,9 @@ void __init setup_arch(char **cmdline_p)
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sparse_init();
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paging_init();
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resource_init();
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+#ifdef CONFIG_SMP
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+ plat_smp_setup();
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+#endif
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}
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int __init fpu_disable(char *s)
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--- a/arch/mips/kernel/smp.c
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+++ b/arch/mips/kernel/smp.c
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@@ -236,7 +236,7 @@ void __init smp_prepare_cpus(unsigned in
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init_new_context(current, &init_mm);
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current_thread_info()->cpu = 0;
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smp_tune_scheduling();
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- prom_prepare_cpus(max_cpus);
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+ plat_prepare_cpus(max_cpus);
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}
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/* preload SMP state for boot cpu */
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--- a/arch/mips/kernel/smp_mt.c
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+++ b/arch/mips/kernel/smp_mt.c
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@@ -143,7 +143,7 @@ static struct irqaction irq_call = {
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* Make sure all CPU's are in a sensible state before we boot any of the
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* secondarys
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*/
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-void prom_prepare_cpus(unsigned int max_cpus)
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+void plat_smp_setup(void)
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{
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unsigned long val;
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int i, num;
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@@ -179,11 +179,9 @@ void prom_prepare_cpus(unsigned int max_
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write_vpe_c0_vpeconf0(tmp);
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/* Record this as available CPU */
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- if (i < max_cpus) {
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- cpu_set(i, phys_cpu_present_map);
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- __cpu_number_map[i] = ++num;
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- __cpu_logical_map[num] = i;
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- }
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+ cpu_set(i, phys_cpu_present_map);
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+ __cpu_number_map[i] = ++num;
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+ __cpu_logical_map[num] = i;
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}
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/* disable multi-threading with TC's */
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@@ -241,7 +239,10 @@ void prom_prepare_cpus(unsigned int max_
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set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
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set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
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}
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+}
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+void __init plat_prepare_cpus(unsigned int max_cpus)
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+{
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cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
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cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ;
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--- a/arch/mips/pmc-sierra/yosemite/smp.c
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+++ b/arch/mips/pmc-sierra/yosemite/smp.c
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@@ -50,37 +50,25 @@ void __init prom_grab_secondary(void)
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* We don't want to start the secondary CPU yet nor do we have a nice probing
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* feature in PMON so we just assume presence of the secondary core.
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*/
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-static char maxcpus_string[] __initdata =
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- KERN_WARNING "max_cpus set to 0; using 1 instead\n";
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-
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-void __init prom_prepare_cpus(unsigned int max_cpus)
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+void __init plat_smp_setup(void)
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{
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- int enabled = 0, i;
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-
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- if (max_cpus == 0) {
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- printk(maxcpus_string);
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- max_cpus = 1;
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- }
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+ int i;
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cpus_clear(phys_cpu_present_map);
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for (i = 0; i < 2; i++) {
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- if (i == max_cpus)
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- break;
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-
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- /*
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- * The boot CPU
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- */
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cpu_set(i, phys_cpu_present_map);
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__cpu_number_map[i] = i;
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__cpu_logical_map[i] = i;
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- enabled++;
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}
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+}
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+void __init plat_prepare_cpus(unsigned int max_cpus)
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+{
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/*
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* Be paranoid. Enable the IPI only if we're really about to go SMP.
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*/
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- if (enabled > 1)
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+ if (cpus_weight(cpu_possible_map))
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set_c0_status(STATUSF_IP5);
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}
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--- a/arch/mips/sgi-ip27/ip27-smp.c
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+++ b/arch/mips/sgi-ip27/ip27-smp.c
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@@ -140,7 +140,7 @@ static __init void intr_clear_all(nasid_
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REMOTE_HUB_CLR_INTR(nasid, i);
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}
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-void __init prom_prepare_cpus(unsigned int max_cpus)
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+void __init plat_smp_setup(void)
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{
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cnodeid_t cnode;
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@@ -161,6 +161,11 @@ void __init prom_prepare_cpus(unsigned i
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alloc_cpupda(0, 0);
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}
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+void __init plat_prepare_cpus(unsigned int max_cpus)
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+{
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+ /* We already did everything necessary earlier */
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+}
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+
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/*
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* Launch a slave into smp_bootstrap(). It doesn't take an argument, and we
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* set sp to the kernel stack of the newly created idle process, gp to the proc
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--- a/arch/mips/sibyte/cfe/smp.c
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+++ b/arch/mips/sibyte/cfe/smp.c
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@@ -31,7 +31,7 @@
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*
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* Common setup before any secondaries are started
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*/
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-void __init prom_prepare_cpus(unsigned int max_cpus)
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+void __init plat_smp_setup(void)
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{
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int i, num;
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@@ -40,14 +40,18 @@ void __init prom_prepare_cpus(unsigned i
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__cpu_number_map[0] = 0;
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__cpu_logical_map[0] = 0;
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- for (i=1, num=0; i<NR_CPUS; i++) {
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+ for (i = 1, num = 0; i < NR_CPUS; i++) {
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if (cfe_cpu_stop(i) == 0) {
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cpu_set(i, phys_cpu_present_map);
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__cpu_number_map[i] = ++num;
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__cpu_logical_map[num] = i;
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}
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}
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- printk("Detected %i available secondary CPU(s)\n", num);
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+ printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
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+}
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+
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+void __init plat_prepare_cpus(unsigned int max_cpus)
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+{
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}
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/*
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--- a/include/asm-mips/atomic.h
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+++ b/include/asm-mips/atomic.h
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@@ -250,7 +250,10 @@ static __inline__ int atomic_sub_if_posi
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" subu %0, %1, %3 \n"
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" bltz %0, 1f \n"
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" sc %0, %2 \n"
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+ " .set noreorder \n"
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" beqzl %0, 1b \n"
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+ " subu %0, %1, %3 \n"
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+ " .set reorder \n"
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" sync \n"
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"1: \n"
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" .set mips0 \n"
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@@ -266,7 +269,10 @@ static __inline__ int atomic_sub_if_posi
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" subu %0, %1, %3 \n"
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" bltz %0, 1f \n"
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" sc %0, %2 \n"
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+ " .set noreorder \n"
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" beqz %0, 1b \n"
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+ " subu %0, %1, %3 \n"
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+ " .set reorder \n"
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" sync \n"
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"1: \n"
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" .set mips0 \n"
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@@ -598,7 +604,10 @@ static __inline__ long atomic64_sub_if_p
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" dsubu %0, %1, %3 \n"
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" bltz %0, 1f \n"
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" scd %0, %2 \n"
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+ " .set noreorder \n"
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" beqzl %0, 1b \n"
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+ " dsubu %0, %1, %3 \n"
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+ " .set reorder \n"
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" sync \n"
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"1: \n"
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" .set mips0 \n"
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@@ -614,7 +623,10 @@ static __inline__ long atomic64_sub_if_p
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" dsubu %0, %1, %3 \n"
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" bltz %0, 1f \n"
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" scd %0, %2 \n"
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+ " .set noreorder \n"
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" beqz %0, 1b \n"
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+ " dsubu %0, %1, %3 \n"
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+ " .set reorder \n"
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" sync \n"
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"1: \n"
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" .set mips0 \n"
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--- a/include/asm-mips/smp.h
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+++ b/include/asm-mips/smp.h
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@@ -58,7 +58,9 @@ static inline int num_booting_cpus(void)
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return cpus_weight(cpu_callout_map);
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}
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-/* These are defined by the board-specific code. */
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+/*
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+ * These are defined by the board-specific code.
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+ */
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/*
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* Cause the function described by call_data to be executed on the passed
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@@ -79,7 +81,12 @@ extern void prom_boot_secondary(int cpu,
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extern void prom_init_secondary(void);
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/*
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- * Detect available CPUs, populate phys_cpu_present_map before smp_init
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+ * Populate cpu_possible_map before smp_init, called from setup_arch.
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+ */
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+extern void plat_smp_setup(void);
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+
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+/*
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+ * Called after init_IRQ but before __cpu_up.
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*/
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extern void prom_prepare_cpus(unsigned int max_cpus);
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--- a/include/asm-mips/system.h
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+++ b/include/asm-mips/system.h
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@@ -322,7 +322,7 @@ static inline unsigned long __cmpxchg_u3
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#endif
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"2: \n"
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" .set pop \n"
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- : "=&r" (retval), "=m" (*m)
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+ : "=&r" (retval), "=R" (*m)
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: "R" (*m), "Jr" (old), "Jr" (new)
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: "memory");
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} else if (cpu_has_llsc) {
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@@ -342,7 +342,7 @@ static inline unsigned long __cmpxchg_u3
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#endif
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"2: \n"
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" .set pop \n"
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- : "=&r" (retval), "=m" (*m)
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+ : "=&r" (retval), "=R" (*m)
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: "R" (*m), "Jr" (old), "Jr" (new)
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: "memory");
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} else {
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@@ -379,7 +379,7 @@ static inline unsigned long __cmpxchg_u6
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#endif
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"2: \n"
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" .set pop \n"
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- : "=&r" (retval), "=m" (*m)
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+ : "=&r" (retval), "=R" (*m)
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: "R" (*m), "Jr" (old), "Jr" (new)
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: "memory");
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} else if (cpu_has_llsc) {
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@@ -397,7 +397,7 @@ static inline unsigned long __cmpxchg_u6
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#endif
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"2: \n"
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" .set pop \n"
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- : "=&r" (retval), "=m" (*m)
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+ : "=&r" (retval), "=R" (*m)
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: "R" (*m), "Jr" (old), "Jr" (new)
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: "memory");
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} else {
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@ -23,3 +23,4 @@
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+ mips-sb1-probe-ide.patch
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+ mips-ip22zilog_oops.patch
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+ mips-scache-fix.patch
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+ mips-linus-merge-post-rc5
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