* debian/changelog: Update.
* debian/patches/debian/dfsg/drivers-net-tg3-fix-simple.patch: Add. * debian/patches/series/1~experimental.1: Update. svn path=/dists/trunk/linux-2.6/; revision=9677
This commit is contained in:
Bastian Blank
parent
0f9d0ec48a
commit
313b83ed81
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@ -71,7 +71,6 @@ linux-2.6 (2.6.23-1~experimental.1) UNRELEASED; urgency=low
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- Broadcom NetXtremeII support
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* Disable now broken drivers:
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- Alteon AceNIC/3Com 3C985/NetGear GA620 Gigabit support
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- Broadcom Tigon3 support
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- USB Keyspan USA-xxx Serial Driver
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- Technotrend/Hauppauge Nova-USB devices
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- YAM driver for AX.25
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@ -102,7 +101,7 @@ linux-2.6 (2.6.23-1~experimental.1) UNRELEASED; urgency=low
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[ dann frazier ]
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* [ia64] Re-enable various unintentionally disabled config options
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-- Bastian Blank <waldi@debian.org> Sun, 14 Oct 2007 16:23:53 +0200
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-- Bastian Blank <waldi@debian.org> Fri, 26 Oct 2007 00:15:41 +0200
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linux-2.6 (2.6.22-5) unstable; urgency=low
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@ -0,0 +1,283 @@
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--- a/drivers/net/Kconfig
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+++ b/drivers/net/Kconfig
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@@ -2229,7 +2229,6 @@
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config TIGON3
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tristate "Broadcom Tigon3 support"
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- depends on BROKEN
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depends on PCI
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help
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This driver supports Broadcom Tigon3 based gigabit Ethernet cards.
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--- a/drivers/net/tg3.c
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+++ b/drivers/net/tg3.c
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@@ -5124,11 +5124,6 @@
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}
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-#define RX_CPU_SCRATCH_BASE 0x30000
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-#define RX_CPU_SCRATCH_SIZE 0x04000
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-#define TX_CPU_SCRATCH_BASE 0x34000
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-#define TX_CPU_SCRATCH_SIZE 0x04000
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-
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/* tp->lock is held. */
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static int tg3_halt_cpu(struct tg3 *tp, u32 offset)
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{
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@@ -5177,205 +5172,6 @@
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return 0;
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}
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-struct fw_info {
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- unsigned int text_base;
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- unsigned int text_len;
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- const u32 *text_data;
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- unsigned int rodata_base;
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- unsigned int rodata_len;
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- const u32 *rodata_data;
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- unsigned int data_base;
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- unsigned int data_len;
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- const u32 *data_data;
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-};
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-
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-/* tp->lock is held. */
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-static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base, u32 cpu_scratch_base,
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- int cpu_scratch_size, struct fw_info *info)
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-{
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- int err, lock_err, i;
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- void (*write_op)(struct tg3 *, u32, u32);
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-
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- if (cpu_base == TX_CPU_BASE &&
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- (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) {
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- printk(KERN_ERR PFX "tg3_load_firmware_cpu: Trying to load "
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- "TX cpu firmware on %s which is 5705.\n",
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- tp->dev->name);
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- return -EINVAL;
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- }
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-
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- if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
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- write_op = tg3_write_mem;
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- else
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- write_op = tg3_write_indirect_reg32;
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-
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- /* It is possible that bootcode is still loading at this point.
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- * Get the nvram lock first before halting the cpu.
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- */
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- lock_err = tg3_nvram_lock(tp);
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- err = tg3_halt_cpu(tp, cpu_base);
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- if (!lock_err)
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- tg3_nvram_unlock(tp);
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- if (err)
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- goto out;
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-
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- for (i = 0; i < cpu_scratch_size; i += sizeof(u32))
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- write_op(tp, cpu_scratch_base + i, 0);
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- tw32(cpu_base + CPU_STATE, 0xffffffff);
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- tw32(cpu_base + CPU_MODE, tr32(cpu_base+CPU_MODE)|CPU_MODE_HALT);
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- for (i = 0; i < (info->text_len / sizeof(u32)); i++)
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- write_op(tp, (cpu_scratch_base +
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- (info->text_base & 0xffff) +
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- (i * sizeof(u32))),
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- (info->text_data ?
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- info->text_data[i] : 0));
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- for (i = 0; i < (info->rodata_len / sizeof(u32)); i++)
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- write_op(tp, (cpu_scratch_base +
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- (info->rodata_base & 0xffff) +
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- (i * sizeof(u32))),
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- (info->rodata_data ?
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- info->rodata_data[i] : 0));
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- for (i = 0; i < (info->data_len / sizeof(u32)); i++)
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- write_op(tp, (cpu_scratch_base +
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- (info->data_base & 0xffff) +
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- (i * sizeof(u32))),
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- (info->data_data ?
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- info->data_data[i] : 0));
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-
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- err = 0;
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-
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-out:
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- return err;
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-}
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-
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-/* tp->lock is held. */
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-static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp)
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-{
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- struct fw_info info;
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- int err, i;
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-
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- info.text_base = TG3_FW_TEXT_ADDR;
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- info.text_len = TG3_FW_TEXT_LEN;
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- info.text_data = &tg3FwText[0];
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- info.rodata_base = TG3_FW_RODATA_ADDR;
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- info.rodata_len = TG3_FW_RODATA_LEN;
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- info.rodata_data = &tg3FwRodata[0];
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- info.data_base = TG3_FW_DATA_ADDR;
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- info.data_len = TG3_FW_DATA_LEN;
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- info.data_data = NULL;
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-
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- err = tg3_load_firmware_cpu(tp, RX_CPU_BASE,
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- RX_CPU_SCRATCH_BASE, RX_CPU_SCRATCH_SIZE,
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- &info);
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- if (err)
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- return err;
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-
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- err = tg3_load_firmware_cpu(tp, TX_CPU_BASE,
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- TX_CPU_SCRATCH_BASE, TX_CPU_SCRATCH_SIZE,
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- &info);
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- if (err)
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- return err;
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-
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- /* Now startup only the RX cpu. */
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- tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff);
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- tw32_f(RX_CPU_BASE + CPU_PC, TG3_FW_TEXT_ADDR);
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-
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- for (i = 0; i < 5; i++) {
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- if (tr32(RX_CPU_BASE + CPU_PC) == TG3_FW_TEXT_ADDR)
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- break;
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- tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff);
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- tw32(RX_CPU_BASE + CPU_MODE, CPU_MODE_HALT);
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- tw32_f(RX_CPU_BASE + CPU_PC, TG3_FW_TEXT_ADDR);
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- udelay(1000);
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- }
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- if (i >= 5) {
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- printk(KERN_ERR PFX "tg3_load_firmware fails for %s "
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- "to set RX CPU PC, is %08x should be %08x\n",
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- tp->dev->name, tr32(RX_CPU_BASE + CPU_PC),
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- TG3_FW_TEXT_ADDR);
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- return -ENODEV;
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- }
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- tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff);
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- tw32_f(RX_CPU_BASE + CPU_MODE, 0x00000000);
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-
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- return 0;
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-}
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-
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-
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-
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-/* tp->lock is held. */
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-static int tg3_load_tso_firmware(struct tg3 *tp)
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-{
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- struct fw_info info;
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- unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size;
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- int err, i;
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-
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- if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
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- return 0;
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-
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- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) {
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- info.text_base = TG3_TSO5_FW_TEXT_ADDR;
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- info.text_len = TG3_TSO5_FW_TEXT_LEN;
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- info.text_data = &tg3Tso5FwText[0];
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- info.rodata_base = TG3_TSO5_FW_RODATA_ADDR;
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- info.rodata_len = TG3_TSO5_FW_RODATA_LEN;
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- info.rodata_data = &tg3Tso5FwRodata[0];
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- info.data_base = TG3_TSO5_FW_DATA_ADDR;
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- info.data_len = TG3_TSO5_FW_DATA_LEN;
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- info.data_data = &tg3Tso5FwData[0];
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- cpu_base = RX_CPU_BASE;
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- cpu_scratch_base = NIC_SRAM_MBUF_POOL_BASE5705;
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- cpu_scratch_size = (info.text_len +
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- info.rodata_len +
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- info.data_len +
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- TG3_TSO5_FW_SBSS_LEN +
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- TG3_TSO5_FW_BSS_LEN);
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- } else {
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- info.text_base = TG3_TSO_FW_TEXT_ADDR;
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- info.text_len = TG3_TSO_FW_TEXT_LEN;
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- info.text_data = &tg3TsoFwText[0];
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- info.rodata_base = TG3_TSO_FW_RODATA_ADDR;
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- info.rodata_len = TG3_TSO_FW_RODATA_LEN;
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- info.rodata_data = &tg3TsoFwRodata[0];
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- info.data_base = TG3_TSO_FW_DATA_ADDR;
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- info.data_len = TG3_TSO_FW_DATA_LEN;
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- info.data_data = &tg3TsoFwData[0];
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- cpu_base = TX_CPU_BASE;
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- cpu_scratch_base = TX_CPU_SCRATCH_BASE;
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- cpu_scratch_size = TX_CPU_SCRATCH_SIZE;
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- }
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-
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- err = tg3_load_firmware_cpu(tp, cpu_base,
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- cpu_scratch_base, cpu_scratch_size,
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- &info);
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- if (err)
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- return err;
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-
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- /* Now startup the cpu. */
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- tw32(cpu_base + CPU_STATE, 0xffffffff);
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- tw32_f(cpu_base + CPU_PC, info.text_base);
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-
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- for (i = 0; i < 5; i++) {
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- if (tr32(cpu_base + CPU_PC) == info.text_base)
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- break;
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- tw32(cpu_base + CPU_STATE, 0xffffffff);
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- tw32(cpu_base + CPU_MODE, CPU_MODE_HALT);
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- tw32_f(cpu_base + CPU_PC, info.text_base);
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- udelay(1000);
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- }
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- if (i >= 5) {
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- printk(KERN_ERR PFX "tg3_load_tso_firmware fails for %s "
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- "to set CPU PC, is %08x should be %08x\n",
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- tp->dev->name, tr32(cpu_base + CPU_PC),
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- info.text_base);
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- return -ENODEV;
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- }
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- tw32(cpu_base + CPU_STATE, 0xffffffff);
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- tw32_f(cpu_base + CPU_MODE, 0x00000000);
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- return 0;
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-}
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-
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-
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/* tp->lock is held. */
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static void __tg3_set_mac_addr(struct tg3 *tp, int skip_mac_1)
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{
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@@ -5590,18 +5386,8 @@
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tw32(BUFMGR_DMA_DESC_POOL_SIZE, NIC_SRAM_DMA_DESC_POOL_SIZE);
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}
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else if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) {
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- int fw_len;
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-
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- fw_len = (TG3_TSO5_FW_TEXT_LEN +
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- TG3_TSO5_FW_RODATA_LEN +
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- TG3_TSO5_FW_DATA_LEN +
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- TG3_TSO5_FW_SBSS_LEN +
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- TG3_TSO5_FW_BSS_LEN);
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- fw_len = (fw_len + (0x80 - 1)) & ~(0x80 - 1);
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- tw32(BUFMGR_MB_POOL_ADDR,
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- NIC_SRAM_MBUF_POOL_BASE5705 + fw_len);
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- tw32(BUFMGR_MB_POOL_SIZE,
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- NIC_SRAM_MBUF_POOL_SIZE5705 - fw_len - 0xa00);
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+ tw32(BUFMGR_MB_POOL_ADDR, NIC_SRAM_MBUF_POOL_BASE5705);
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+ tw32(BUFMGR_MB_POOL_SIZE, NIC_SRAM_MBUF_POOL_SIZE5705 - 0xa00);
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}
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if (tp->dev->mtu <= ETH_DATA_LEN) {
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@@ -5980,18 +5766,6 @@
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tw32(SNDBDI_MODE, SNDBDI_MODE_ENABLE | SNDBDI_MODE_ATTN_ENABLE);
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tw32(SNDBDS_MODE, SNDBDS_MODE_ENABLE | SNDBDS_MODE_ATTN_ENABLE);
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- if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0) {
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- err = tg3_load_5701_a0_firmware_fix(tp);
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- if (err)
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- return err;
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- }
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-
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- if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) {
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- err = tg3_load_tso_firmware(tp);
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- if (err)
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- return err;
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- }
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-
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tp->tx_mode = TX_MODE_ENABLE;
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tw32_f(MAC_TX_MODE, tp->tx_mode);
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udelay(100);
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@@ -11284,6 +11058,12 @@
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goto err_out_iounmap;
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}
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+ if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0) {
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+ printk(KERN_ERR PFX "5701 A0 firmware fix not available, aborting.\n");
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+ err = -ENODEV;
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+ goto err_out_iounmap;
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+ }
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+
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/* The EPB bridge inside 5714, 5715, and 5780 and any
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* device behind the EPB cannot support DMA addresses > 40-bit.
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* On 64-bit systems with IOMMU, use 40-bit dma_mask.
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@ -7,6 +7,8 @@
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+ debian/drivers-ata-ata_piix-postpone-pata.patch
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+ debian/dfsg/drivers-net-tg3-fix-simple.patch
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+ bugfix/powerpc/build-links.patch
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+ bugfix/powerpc/mv643xx-hotplug-support.patch
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+ bugfix/powerpc/oldworld-boot-fix.patch
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