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add mips patches 

svn path=/dists/trunk/linux-2.6/; revision=5983
This commit is contained in:
Martin Michlmayr 2006-02-27 21:36:39 +00:00
parent d13d95a758
commit 2901605e3c
12 changed files with 889 additions and 0 deletions
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45
debian/patches/mips-arch-makefile.patch vendored Normal file
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@ -0,0 +1,45 @@
## DP: Fix Makefile for compiles with modern toolchains.
## DP: Patch author: Thiemo Seufer <ths@networkno.de>
## DP: Upstream status: Thiemo will go through the Makefile and completely
## redo it. Until this happens, this patch is needed for Debian.
From: Thiemo Seufer <ths@networkno.de>
Fix Makefile for compiles with modern toolchains.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
--
diff -u -p -r1.186 Makefile
--- a/arch/mips/Makefile 18 Dec 2004 01:15:52 -0000 1.186
+++ b/arch/mips/Makefile 10 Jan 2005 22:10:32 -0000
@@ -118,7 +118,7 @@ if $(CC) $$gcc_abi -S -o /dev/null -xc /
else \
gcc_abi=; gcc_isa=-$(5); \
fi; \
-gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
+gas_abi=-Wa,-mabi=$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
while :; do \
for gas_opt in -Wa,-march= -Wa,-mcpu=; do \
$(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \
@@ -129,7 +129,7 @@ while :; do \
break; \
done; \
if test "$(gcc-abi)" != "$(gas-abi)"; then \
- gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
+ gas_abi="-Wa,-mabi=$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
fi; \
if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \
$(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \
@@ -581,7 +597,7 @@ endif
# will break.
#
core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
-cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
+cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32 -Wa,-mfix7000
load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
#

23
debian/patches/mips-fix_iomap_nonpci.patch vendored Normal file
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@ -0,0 +1,23 @@
## DP: Only include iomap on systems with PCI
## DP: Patch author: Maciej W. Rozycki <macro@linux-mips.org>
## DP: Upstream status: temporary fix to get iomap to compile on
## DECstation; the real solution is to fix iomap
## DECstation fails to compile without this path:
## tbm> CC arch/mips/lib/iomap.o
# tbm> arch/mips/lib/iomap.c: In function ‘pci_iomap’:
# tbm> arch/mips/lib/iomap.c:66: error: ‘_CACHE_CACHABLE_COW’ undeclared (first use in this function)
#
# Yes, R3000 does not define _CACHE_CACHABLE_COW.
--- a/arch/mips/lib/Makefile~ 2006-01-23 12:42:02.000000000 +0000
+++ b/arch/mips/lib/Makefile 2006-01-23 12:42:11.000000000 +0000
@@ -4,6 +4,6 @@
lib-y += csum_partial_copy.o memcpy.o promlib.o strlen_user.o strncpy_user.o \
strnlen_user.o uncached.o
-obj-y += iomap.o
+obj-$(CONFIG_PCI) += iomap.o
EXTRA_AFLAGS := $(CFLAGS)

330
debian/patches/mips-gettimeofday.patch vendored Normal file
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@ -0,0 +1,330 @@
# DP: Fix for gettimeofday jumping backwards, then forwards.
# DP: Patch author: Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>
# DP: Upstream status: submitted to linux-mips list
From: Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>
[MIPS] Fix for gettimeofday jumping backwards, then forwards.
Below are 2 fixes to do with time jumping around as reported by
gettimeofday(). One is SB1250 specific and one appears generic.
The symptom is revealed by running multile copies (1 per cpu) of a
simple test program that calls gettimeofday() as fast as possible
looking for time to go backwards.
When a jump is detected the program outputs a few samples before and
after each jump:
value delta
1121781527.912525: 1
1121781527.912525: 0
1121781527.912526: 1
1121781527.912526: 0
1121781527.912527: 1
1121781527.912527: 0
1121781527.912527: 0
1121781527.912527: 0
1121781527.911528: -999
1121781527.911529: 1
1121781527.911530: 1
1121781527.912532: 1002
1121781527.912533: 1
1121781527.912533: 0
1121781527.912534: 1
1121781527.912534: 0
1121781527.912535: 1
1121781527.912536: 1
value delta
1121781545.635524: 1
1121781545.635524: 0
1121781545.635525: 1
1121781545.635525: 0
1121781545.635526: 1
1121781545.635526: 0
1121781545.635527: 1
1121781545.635527: 0
1121781545.634527: -1000
1121781545.635527: 1000
1121781545.635528: 1
1121781545.635529: 1
1121781545.635529: 0
1121781545.635530: 1
1121781545.635530: 0
1121781545.635531: 1
1121781545.635531: 0
1121781545.635532: 1
1121781545.635533: 1
Time jumps backwards 1msec then forwards 1msec a few usec
later. Usually lasts < 2us but I've seen it as long as 5us if the
system is under load.
First problem I found is that sb1250_gettimeoffset() simply reads the
current cpu 0 timer remaining value, however once this counter reaches
0 and the interrupt is raised, it immediately resets and begins to
count down again.
If sb1250_gettimeoffset() is called on cpu 1 via do_gettimeofday()
after the timer has reset but prior to cpu 0 processing the interrupt
and taking write_seqlock() in timer_interrupt() it will return a
full value (or close to it) causing time to jump backwards 1ms. Once
cpu 0 handles the interrupt and timer_interrupt() gets far enough
along it will jump forward 1ms.
To fix this problem I implemented mips_hpt_*() on sb1250 using a spare
timer unrelated to the existing periodic interrupt timers. It runs at
1Mhz with a full 23bit counter. This eliminated the custom
do_gettimeoffset() for sb1250 and allowed use of the generic
fixed_rate_gettimeoffset() using mips_hpt_*() and timerhi/timerlo.
The second problem is that more of timer_interrupt() needs to be
protected by xtime_lock:
* do_timer() expects the arch-specific handler to take the lock as it
modifies jiffies[_64] and xtime.
* writing timerhi/lo in timer_interrupt() will mess up
fixed_rate_gettimeoffset() which reads timerhi/lo.
With both changes do_gettimeofday() works correctly on both cpu 0 and
cpu 1.
Other changes/cleanups:
The existing sb1250 periodic timers were slow by 999ppm (given a
perfect 100mhz reference). The timers need to be loaded with 1 less
than the desired interval not the interval itself.
M_SCD_TIMER_INIT and M_SCD_TIMER_CNT had the wrong field width (should
be 23 bits not 20 bits)
Signed-off-by: Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
---
arch/mips/kernel/time.c | 6 +-
arch/mips/sibyte/sb1250/time.c | 77 ++++++++++++++++++++++++++---------
arch/mips/sibyte/swarm/setup.c | 7 +++
include/asm-mips/sibyte/sb1250.h | 2
include/asm-mips/sibyte/sb1250_scd.h | 5 +-
5 files changed, 73 insertions(+), 24 deletions(-)
diff -urN linux-mips/arch/mips/kernel/time.c new/arch/mips/kernel/time.c
--- linux-mips/arch/mips/kernel/time.c 2006-01-10 11:21:15.000000000 +0000
+++ new/arch/mips/kernel/time.c 2006-01-16 16:40:10.000000000 +0000
@@ -423,6 +423,8 @@
unsigned long j;
unsigned int count;
+ write_seqlock(&xtime_lock);
+
count = mips_hpt_read();
mips_timer_ack();
@@ -440,7 +442,6 @@
* CMOS clock accordingly every ~11 minutes. rtc_set_time() has to be
* called as close as possible to 500 ms before the new second starts.
*/
- write_seqlock(&xtime_lock);
if (ntp_synced() &&
xtime.tv_sec > last_rtc_update + 660 &&
(xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
@@ -452,7 +453,6 @@
last_rtc_update = xtime.tv_sec - 600;
}
}
- write_sequnlock(&xtime_lock);
/*
* If jiffies has overflown in this timer_interrupt, we must
@@ -495,6 +495,8 @@
}
}
+ write_sequnlock(&xtime_lock);
+
/*
* In UP mode, we call local_timer_interrupt() to do profiling
* and process accouting.
diff -urN linux-mips/arch/mips/sibyte/sb1250/time.c new/arch/mips/sibyte/sb1250/time.c
--- linux-mips/arch/mips/sibyte/sb1250/time.c 2006-01-10 11:21:16.000000000 +0000
+++ new/arch/mips/sibyte/sb1250/time.c 2006-01-16 16:39:27.000000000 +0000
@@ -47,23 +47,51 @@
#define IMR_IP3_VAL K_INT_MAP_I1
#define IMR_IP4_VAL K_INT_MAP_I2
+#define SB1250_HPT_NUM 3
+#define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */
+#define SB1250_HPT_SHIFT ((sizeof(unsigned int)*8)-V_SCD_TIMER_WIDTH)
+
+
extern int sb1250_steal_irq(int irq);
+static unsigned int sb1250_hpt_read(void);
+static void sb1250_hpt_init(unsigned int);
+
+static unsigned int hpt_offset;
+
+void __init sb1250_hpt_setup(void)
+{
+ int cpu = smp_processor_id();
+
+ if (!cpu) {
+ /* Setup hpt using timer #3 but do not enable irq for it */
+ __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG)));
+ __raw_writeq(SB1250_HPT_VALUE,
+ IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_INIT)));
+ __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
+ IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG)));
+
+ /*
+ * we need to fill 32 bits, so just use the upper 23 bits and pretend
+ * the timer is going 512Mhz instead of 1Mhz
+ */
+ mips_hpt_frequency = V_SCD_TIMER_FREQ << SB1250_HPT_SHIFT;
+ mips_hpt_init = sb1250_hpt_init;
+ mips_hpt_read = sb1250_hpt_read;
+ }
+}
+
+
void sb1250_time_init(void)
{
int cpu = smp_processor_id();
int irq = K_INT_TIMER_0+cpu;
- /* Only have 4 general purpose timers */
- if (cpu > 3) {
+ /* Only have 4 general purpose timers, and we use last one as hpt */
+ if (cpu > 2) {
BUG();
}
- if (!cpu) {
- /* Use our own gettimeoffset() routine */
- do_gettimeoffset = sb1250_gettimeoffset;
- }
-
sb1250_mask_irq(cpu, irq);
/* Map the timer interrupt to ip[4] of this cpu */
@@ -75,10 +103,10 @@
/* Disable the timer and set up the count */
__raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
#ifdef CONFIG_SIMULATION
- __raw_writeq(50000 / HZ,
+ __raw_writeq((50000 / HZ) - 1,
IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
#else
- __raw_writeq(1000000 / HZ,
+ __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1,
IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
#endif
@@ -103,7 +131,7 @@
int cpu = smp_processor_id();
int irq = K_INT_TIMER_0 + cpu;
- /* Reset the timer */
+ /* ACK interrupt */
____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
@@ -122,15 +150,26 @@
}
/*
- * We use our own do_gettimeoffset() instead of the generic one,
- * because the generic one does not work for SMP case.
- * In addition, since we use general timer 0 for system time,
- * we can get accurate intra-jiffy offset without calibration.
+ * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
+ * again. There's no easy way to set to a specific value so store init value
+ * in hpt_offset and subtract each time.
+ *
+ * Note: Timer isn't full 32bits so shift it into the upper part making
+ * it appear to run at a higher frequency.
*/
-unsigned long sb1250_gettimeoffset(void)
+static unsigned int sb1250_hpt_read(void)
{
- unsigned long count =
- __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
+ unsigned int count;
- return 1000000/HZ - count;
- }
+ count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT))));
+
+ count = (SB1250_HPT_VALUE - count) << SB1250_HPT_SHIFT;
+
+ return count - hpt_offset;
+}
+
+static void sb1250_hpt_init(unsigned int count)
+{
+ hpt_offset = count;
+ return;
+}
diff -urN linux-mips/arch/mips/sibyte/swarm/setup.c new/arch/mips/sibyte/swarm/setup.c
--- linux-mips/arch/mips/sibyte/swarm/setup.c 2006-01-10 11:21:16.000000000 +0000
+++ new/arch/mips/sibyte/swarm/setup.c 2006-01-16 16:39:27.000000000 +0000
@@ -70,6 +70,12 @@
return "SiByte " SIBYTE_BOARD_NAME;
}
+void __init swarm_time_init(void)
+{
+ /* Setup HPT */
+ sb1250_hpt_setup();
+}
+
void __init swarm_timer_setup(struct irqaction *irq)
{
/*
@@ -109,6 +115,7 @@
panic_timeout = 5; /* For debug. */
+ board_time_init = swarm_time_init;
board_timer_setup = swarm_timer_setup;
board_be_handler = swarm_be_handler;
diff -urN linux-mips/include/asm-mips/sibyte/sb1250.h new/include/asm-mips/sibyte/sb1250.h
--- linux-mips/include/asm-mips/sibyte/sb1250.h 2006-01-10 11:21:59.000000000 +0000
+++ new/include/asm-mips/sibyte/sb1250.h 2006-01-16 16:39:27.000000000 +0000
@@ -45,8 +45,8 @@
extern unsigned int periph_rev;
extern unsigned int zbbus_mhz;
+extern void sb1250_hpt_setup(void);
extern void sb1250_time_init(void);
-extern unsigned long sb1250_gettimeoffset(void);
extern void sb1250_mask_irq(int cpu, int irq);
extern void sb1250_unmask_irq(int cpu, int irq);
extern void sb1250_smp_finish(void);
diff -urN linux-mips/include/asm-mips/sibyte/sb1250_scd.h new/include/asm-mips/sibyte/sb1250_scd.h
--- linux-mips/include/asm-mips/sibyte/sb1250_scd.h 2006-01-10 11:21:59.000000000 +0000
+++ new/include/asm-mips/sibyte/sb1250_scd.h 2006-01-16 16:39:27.000000000 +0000
@@ -359,14 +359,15 @@
*/
#define V_SCD_TIMER_FREQ 1000000
+#define V_SCD_TIMER_WIDTH 23
#define S_SCD_TIMER_INIT 0
-#define M_SCD_TIMER_INIT _SB_MAKEMASK(20,S_SCD_TIMER_INIT)
+#define M_SCD_TIMER_INIT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_INIT)
#define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_INIT)
#define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x,S_SCD_TIMER_INIT,M_SCD_TIMER_INIT)
#define S_SCD_TIMER_CNT 0
-#define M_SCD_TIMER_CNT _SB_MAKEMASK(20,S_SCD_TIMER_CNT)
+#define M_SCD_TIMER_CNT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_CNT)
#define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_CNT)
#define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x,S_SCD_TIMER_CNT,M_SCD_TIMER_CNT)

98
debian/patches/mips-ide-scan.patch vendored Normal file
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@ -0,0 +1,98 @@
## DP: Fix long IDE detection delay by not scanning non-existent channels.
## DP: Patch author: Peter Horton <pdh@colonel-panic.org>
## DP: Upstream status: submitted to linux-mips
# Fix long delay during Cobalt boot whilst scanning non-existent
# interfaces. The logic is copied from i386 i.e. we only scan 2 legacy
# ports if we have PCI IDE.
# Signed-off-by: Peter Horton <pdh@colonel-panic.org>
# Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
--- linux.git.orig/include/asm-mips/mach-generic/ide.h 2006-01-24 22:07:36.000000000 +0000
+++ linux.git/include/asm-mips/mach-generic/ide.h 2006-01-24 23:41:19.000000000 +0000
@@ -30,7 +30,7 @@
#define IDE_ARCH_OBSOLETE_DEFAULTS
-static __inline__ int ide_probe_legacy(void)
+static __inline__ int ide_legacy_ports(void)
{
#ifdef CONFIG_PCI
struct pci_dev *dev;
@@ -38,11 +38,11 @@
(dev = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL)) != NULL) {
pci_dev_put(dev);
- return 1;
+ return 2;
}
return 0;
#elif defined(CONFIG_EISA) || defined(CONFIG_ISA)
- return 1;
+ return 6;
#else
return 0;
#endif
@@ -50,30 +50,26 @@
static __inline__ int ide_default_irq(unsigned long base)
{
- if (ide_probe_legacy())
- switch (base) {
- case 0x1f0:
- return 14;
- case 0x170:
- return 15;
- case 0x1e8:
- return 11;
- case 0x168:
- return 10;
- case 0x1e0:
- return 8;
- case 0x160:
- return 12;
- default:
- return 0;
- }
- else
- return 0;
+ switch (base) {
+ case 0x1f0:
+ return 14;
+ case 0x170:
+ return 15;
+ case 0x1e8:
+ return 11;
+ case 0x168:
+ return 10;
+ case 0x1e0:
+ return 8;
+ case 0x160:
+ return 12;
+ }
+ return 0;
}
static __inline__ unsigned long ide_default_io_base(int index)
{
- if (ide_probe_legacy())
+ if (index < ide_legacy_ports())
switch (index) {
case 0:
return 0x1f0;
@@ -87,11 +83,8 @@
return 0x1e0;
case 5:
return 0x160;
- default:
- return 0;
- }
- else
- return 0;
+ }
+ return 0;
}
#define IDE_ARCH_OBSOLETE_INIT

28
debian/patches/mips-ip22zilog_oops.patch vendored Normal file
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@ -0,0 +1,28 @@
## DP: ip22zilog: Fix oops on runlevel change with serial console
## DP: Patch author: Martin Michlmayr <tbm@cyrius.com>
## DP: Upstream status: submitted to serial sub-system maintainer
[serial] ip22zilog: Fix oops on runlevel change with serial console
Incorrect uart_write_wakeup() calls cause reference to a NULL tty
pointer. This has been fixed in the sunsab and sunzilog serial drivers
in October 2005. Update the ip22zilog, which is based on sunzilog,
accordingly.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
--- a/drivers/serial/ip22zilog.c 2006-02-23 22:05:49.000000000 +0000
+++ b/drivers/serial/ip22zilog.c 2006-02-27 09:51:38.000000000 +0000
@@ -420,10 +420,8 @@
if (up->port.info == NULL)
goto ack_tx_int;
xmit = &up->port.info->xmit;
- if (uart_circ_empty(xmit)) {
- uart_write_wakeup(&up->port);
+ if (uart_circ_empty(xmit))
goto ack_tx_int;
- }
if (uart_tx_stopped(&up->port))
goto ack_tx_int;

23
debian/patches/mips-makefile.patch vendored Normal file
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@ -0,0 +1,23 @@
## DP: Accept various mips sub-types in SUBARCH
## Upstream status: in kbuild git tree
#kbuild: Accept various mips sub-types in SUBARCH
#author Martin Michlmayr <tbm@cyrius.com>
# Sat, 28 Jan 2006 18:38:15 +0000 (18:38 +0000)
#committer Sam Ravnborg <sam@mars.ravnborg.org>
# Sat, 28 Jan 2006 21:27:39 +0000 (22:27 +0100)
#commit 780d389ab8cbd91221caa97c90cf922711076f27
#tree f771061d0c33cbae06f7e40721762efea0140332 tree
#parent 91b06e616c62c7aef213cafb1435e94158d18901 commit | commitdiff
--- linux-2.6.15/Makefile 2006-01-16 17:56:00.000000000 +0000
+++ new/Makefile 2006-01-16 17:57:29.000000000 +0000
@@ -169,7 +169,7 @@
SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
-e s/arm.*/arm/ -e s/sa110/arm/ \
-e s/s390x/s390/ -e s/parisc64/parisc/ \
- -e s/ppc64/powerpc/ )
+ -e s/ppc64/powerpc/ -e s/mips.*/mips/ )
# Cross compiling and selecting different set of gcc/bin-utils
# ---------------------------------------------------------------------------

23
debian/patches/mips-sb1-probe-ide.patch vendored Normal file
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@ -0,0 +1,23 @@
# DP: Make sure we scan SWARM IDE interface for devices
# DP: Patch author: Peter Horton <pdh@colonel-panic.org>
# DP: Upstream status: submitted to linux-ide
From: Peter Horton <pdh@colonel-panic.org>
[PATCH] Make sure we scan SWARM IDE interface for devices
Signed-off-by: Peter Horton <pdh@colonel-panic.org>
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
--- linux.git.orig/drivers/ide/mips/swarm.c 2006-01-23 22:48:58.000000000 +0000
+++ linux.git/drivers/ide/mips/swarm.c 2006-01-24 08:32:45.000000000 +0000
@@ -127,6 +127,7 @@
memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
hwif->irq = hwif->hw.irq;
+ probe_hwif_init(hwif);
dev_set_drvdata(dev, hwif);
return 0;

72
debian/patches/mips-scache-fix.patch vendored Normal file
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@ -0,0 +1,72 @@
## DP: Initialize scache flushing functions when CPU has no scache
## DP: Patch author: Martin Michlmayr <tbm@cyrius.com>
## DP: Upstream status: submitted to linux-mips
# [PATCH] Initialize scache flushing functions when CPU has no scache
# When a CPU has no scache, the scache flushing functions currently
# aren't getting initialized and the NULL pointer is eventually called
# as a function. Initialize the scache flushing functions as a noop
# when there's no scache.
# Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
# ---
# c-r4k.c | 16 +++++++++++-----
# 1 file changed, 11 insertions(+), 5 deletions(-)
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -235,7 +235,9 @@ static inline void r4k_blast_scache_page
{
unsigned long sc_lsize = cpu_scache_line_size();
- if (sc_lsize == 16)
+ if (scache_size == 0)
+ r4k_blast_scache_page = (void *)no_sc_noop;
+ else if (sc_lsize == 16)
r4k_blast_scache_page = blast_scache16_page;
else if (sc_lsize == 32)
r4k_blast_scache_page = blast_scache32_page;
@@ -251,7 +253,9 @@ static inline void r4k_blast_scache_page
{
unsigned long sc_lsize = cpu_scache_line_size();
- if (sc_lsize == 16)
+ if (scache_size == 0)
+ r4k_blast_scache_page_indexed = (void *)no_sc_noop;
+ else if (sc_lsize == 16)
r4k_blast_scache_page_indexed = blast_scache16_page_indexed;
else if (sc_lsize == 32)
r4k_blast_scache_page_indexed = blast_scache32_page_indexed;
@@ -267,7 +271,9 @@ static inline void r4k_blast_scache_setu
{
unsigned long sc_lsize = cpu_scache_line_size();
- if (sc_lsize == 16)
+ if (scache_size == 0)
+ r4k_blast_scache = (void *)no_sc_noop;
+ else if (sc_lsize == 16)
r4k_blast_scache = blast_scache16;
else if (sc_lsize == 32)
r4k_blast_scache = blast_scache32;
@@ -482,7 +488,7 @@ static inline void local_r4k_flush_icach
protected_blast_dcache_range(start, end);
}
- if (!cpu_icache_snoops_remote_store) {
+ if (!cpu_icache_snoops_remote_store && scache_size) {
if (end - start > scache_size)
r4k_blast_scache();
else
@@ -651,7 +657,7 @@ static void local_r4k_flush_cache_sigtra
R4600_HIT_CACHEOP_WAR_IMPL;
protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
- if (!cpu_icache_snoops_remote_store)
+ if (!cpu_icache_snoops_remote_store && scache_size)
protected_writeback_scache_line(addr & ~(sc_lsize - 1));
protected_flush_icache_line(addr & ~(ic_lsize - 1));
if (MIPS4K_ICACHE_REFILL_WAR) {

151
debian/patches/mips-tulip.patch vendored Normal file
View File

@ -0,0 +1,151 @@
## DP: Tulip - fixes compile on MIPS64.
## DP: Path author: Grant Grundler <grundler@parisc-linux.org>
## DP: Basically got rejected as it by Jeff Garzik but needed for now.
## DP: Has been used by the HPPA folks for years
From: Jim Gifford <maillist@jg555.com>
I have been working on getting the RaQ2 to build using 64 bit. I ran
into numerous issues. After I got the kernel to compile, the tulip
driver didn't work. It kept showing error messages like
tulip_stop_rxtx() failed
This patch fixes the compile issue, this patch was create by Grant
Grundler of linux-parsic. This patch matches the tulip driver follow the
specs laid out by the manufacture. On 32 bit this patch seemed to make
the tulip more responsive on my RaQ2 systems.
diff -urN linux-mips/drivers/net/tulip/de2104x.c new/drivers/net/tulip/de2104x.c
--- linux-mips/drivers/net/tulip/de2104x.c 2006-01-10 11:21:43.000000000 +0000
+++ new/drivers/net/tulip/de2104x.c 2006-01-16 16:54:50.000000000 +0000
@@ -1787,15 +1787,10 @@
/* DEC now has a specification but early board makers
just put the address in the first EEPROM locations. */
/* This does memcmp(eedata, eedata+16, 8) */
-
-#ifndef CONFIG_MIPS_COBALT
-
for (i = 0; i < 8; i ++)
if (ee_data[i] != ee_data[16+i])
sa_offset = 20;
-#endif
-
/* store MAC address */
for (i = 0; i < 6; i ++)
de->dev->dev_addr[i] = ee_data[i + sa_offset];
@@ -1932,7 +1927,7 @@
goto fill_defaults;
}
-static int __init de_init_one (struct pci_dev *pdev,
+static int __devinit de_init_one (struct pci_dev *pdev,
const struct pci_device_id *ent)
{
struct net_device *dev;
diff -urN linux-mips/drivers/net/tulip/de4x5.c new/drivers/net/tulip/de4x5.c
--- linux-mips/drivers/net/tulip/de4x5.c 2006-01-10 11:21:43.000000000 +0000
+++ new/drivers/net/tulip/de4x5.c 2006-01-16 16:54:50.000000000 +0000
@@ -2124,7 +2124,6 @@
.remove = __devexit_p (de4x5_eisa_remove),
}
};
-MODULE_DEVICE_TABLE(eisa, de4x5_eisa_ids);
#endif
#ifdef CONFIG_PCI
diff -urN linux-mips/drivers/net/tulip/media.c new/drivers/net/tulip/media.c
--- linux-mips/drivers/net/tulip/media.c 2006-01-10 11:21:43.000000000 +0000
+++ new/drivers/net/tulip/media.c 2006-01-16 16:54:50.000000000 +0000
@@ -44,8 +44,10 @@
/* MII transceiver control section.
Read and write the MII registers using software-generated serial
- MDIO protocol. See the MII specifications or DP83840A data sheet
- for details. */
+ MDIO protocol.
+ See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
+ or DP83840A data sheet for more details.
+ */
int tulip_mdio_read(struct net_device *dev, int phy_id, int location)
{
@@ -272,13 +274,29 @@
int reset_length = p[2 + init_length];
misc_info = (u16*)(reset_sequence + reset_length);
if (startup) {
+ int timeout = 10; /* max 1 ms */
iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
for (i = 0; i < reset_length; i++)
iowrite32(reset_sequence[i], ioaddr + CSR12);
+
+ /* flush posted writes */
+ ioread32(ioaddr + CSR12);
+
+ /* Sect 3.10.3 in DP83840A.pdf (p39) */
+ udelay(500);
+
+ /* Section 4.2 in DP83840A.pdf (p43) */
+ /* and IEEE 802.3 "22.2.4.1.1 Reset" */
+ while (timeout-- &&
+ (tulip_mdio_read (dev, phy_num, MII_BMCR) & BMCR_RESET))
+ udelay(100);
}
for (i = 0; i < init_length; i++)
iowrite32(init_sequence[i], ioaddr + CSR12);
+
+ ioread32(ioaddr + CSR12); /* flush posted writes */
}
+
tmp_info = get_u16(&misc_info[1]);
if (tmp_info)
tp->advertising[phy_num] = tmp_info | 1;
@@ -365,8 +383,6 @@
tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0);
- mdelay(1);
-
return;
}
diff -urN linux-mips/drivers/net/tulip/tulip.h new/drivers/net/tulip/tulip.h
--- linux-mips/drivers/net/tulip/tulip.h 2006-01-10 11:21:43.000000000 +0000
+++ new/drivers/net/tulip/tulip.h 2006-01-16 16:54:50.000000000 +0000
@@ -474,8 +474,11 @@
udelay(10);
if (!i)
- printk(KERN_DEBUG "%s: tulip_stop_rxtx() failed\n",
- pci_name(tp->pdev));
+ printk(KERN_DEBUG "%s: tulip_stop_rxtx() failed"
+ " (CSR5 0x%x CSR6 0x%x)\n",
+ pci_name(tp->pdev),
+ ioread32(ioaddr + CSR5),
+ ioread32(ioaddr + CSR6));
}
}
diff -urN linux-mips/drivers/net/tulip/tulip_core.c new/drivers/net/tulip/tulip_core.c
--- linux-mips/drivers/net/tulip/tulip_core.c 2006-01-10 11:21:43.000000000 +0000
+++ new/drivers/net/tulip/tulip_core.c 2006-01-16 16:54:50.000000000 +0000
@@ -22,7 +22,7 @@
#else
#define DRV_VERSION "1.1.13"
#endif
-#define DRV_RELDATE "May 11, 2002"
+#define DRV_RELDATE "December 15, 2004"
#include <linux/module.h>
@@ -1505,8 +1505,8 @@
(PCI_SLOT(pdev->devfn) == 12))) {
/* Cobalt MAC address in first EEPROM locations. */
sa_offset = 0;
- /* Ensure our media table fixup get's applied */
- memcpy(ee_data + 16, ee_data, 8);
+ /* No media table either */
+ tp->flags &= ~HAS_MEDIA_TABLE;
}
#endif
#ifdef CONFIG_GSC

86
debian/patches/mips-tulip_dc21143.patch vendored Normal file
View File

@ -0,0 +1,86 @@
## DP: TULIP_MWI fix for Cobalt
## DP: Patch author: Peter Horton <pdh@colonel-panic.org>
## DP: Upstream status: submitted to netdev
This patch works around the MWI bug on the DC21143 rev 65 Tulip by ensuring
that the receive buffers don't end on a cache line boundary (as documented
in the errata).
This patch is required for the MIPs based Cobalt Qube/RaQ as supporting the
extra PCI commands seems to reduce the chance of a hard lockup between the
Tulip and the PCI bridge.
--- linux.git.orig/drivers/net/tulip/tulip_core.c 2006-01-29 21:43:40.000000000 +0000
+++ linux.git/drivers/net/tulip/tulip_core.c 2006-01-29 21:56:50.000000000 +0000
@@ -294,6 +294,8 @@
if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
iowrite32(0x00040000, ioaddr + CSR6);
+ printk(KERN_DEBUG "%s: CSR0 %08x\n", dev->name, tp->csr0);
+
/* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
iowrite32(0x00000001, ioaddr + CSR0);
udelay(100);
@@ -1155,8 +1157,10 @@
/* if we have any cache line size at all, we can do MRM */
csr0 |= MRM;
+#ifndef CONFIG_TULIP_MWI_DC21143
/* ...and barring hardware bugs, MWI */
if (!(tp->chip_id == DC21143 && tp->revision == 65))
+#endif
csr0 |= MWI;
/* set or disable MWI in the standard PCI command bit.
@@ -1182,7 +1186,7 @@
*/
switch (cache) {
case 8:
- csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
+ csr0 |= MRL | (1 << CALShift) | (8 << BurstLenShift);
break;
case 16:
csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
Index: linux.git/drivers/net/tulip/tulip.h
===================================================================
--- linux.git.orig/drivers/net/tulip/tulip.h 2006-01-29 21:43:40.000000000 +0000
+++ linux.git/drivers/net/tulip/tulip.h 2006-01-29 21:52:01.000000000 +0000
@@ -262,7 +262,15 @@
#define RX_RING_SIZE 128
#define MEDIA_MASK 31
-#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
+/* MWI can fail on 21143 rev 65 if the receive buffer ends
+ on a cache line boundary. Ensure it doesn't ...
+*/
+
+#ifdef CONFIG_TULIP_MWI_DC21143
+#define PKT_BUF_SZ (1536 + 4) /* Size of each temporary Rx buffer. */
+#else
+#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
+#endif
#define TULIP_MIN_CACHE_LINE 8 /* in units of 32-bit words */
Index: linux.git/drivers/net/tulip/Kconfig
===================================================================
--- linux.git.orig/drivers/net/tulip/Kconfig 2006-01-29 21:48:09.000000000 +0000
+++ linux.git/drivers/net/tulip/Kconfig 2006-01-29 21:50:28.000000000 +0000
@@ -57,6 +57,16 @@
If unsure, say N.
+config TULIP_MWI_DC21143
+ bool "Enable MWI workaround on dc21143 controllers"
+ depends on TULIP_MWI
+ help
+ This enables a workaround for MWI ("New bus configuration") on DC21143
+ controllers. Normally MWI is disabled on these chips because of
+ hardware errata.
+
+ If unsure, say N.
+
config TULIP_MMIO
bool "Use PCI shared mem for NIC registers"
depends on TULIP

8
debian/patches/series/0experimental.1 vendored
View File

@ -15,3 +15,11 @@
#FIXME + powerpc-apus.patch
+ sparc64-hme-lockup.patch
+ sparc64-atyfb-xl-gr.patch
+ mips-makefile.patch
+ mips-arch-makefile.patch
+ mips-fix_iomap_nonpci.patch
+ mips-gettimeofday.patch
+ mips-ide-scan.patch
+ mips-sb1-probe-ide.patch
+ mips-ip22zilog_oops.patch
+ mips-scache-fix.patch

2
debian/patches/series/0experimental.1-extra vendored
View File

@ -2,3 +2,5 @@
+ arm-nslu2-maclist.patch arm armeb
+ vserver-version.patch amd64_vserver i386_vserver hppa_vserver powerpc_vserver
+ vserver-vs2.0.2-rc9.patch amd64_vserver i386_vserver powerpc_vserver
+ mips-tulip.patch mipsel
+ mips-tulip_dc21143.patch mipsel