remove obsolete ARM patches - all in 2.6.19

svn path=/dists/trunk/linux-2.6/; revision=7827
This commit is contained in:
Martin Michlmayr 2006-11-19 14:30:22 +00:00
parent d69f1b8812
commit 133a4d0038
11 changed files with 0 additions and 1496 deletions

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@ -1,128 +0,0 @@
# Make get_unaligned() work with const pointers and GCC 4.1
# See
# http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2006-September/035862.html
From: Lennert Buytenhek <buytenh@wantstofly.org>
On Wed, Sep 06, 2006 at 09:32:58AM +0100, Russell King - ARM Linux wrote:
> > CC [M] drivers/net/wireless/zd1211rw/zd_usb.o
> > drivers/net/wireless/zd1211rw/zd_usb.c: In function 'handle_rx_packet':
> > drivers/net/wireless/zd1211rw/zd_usb.c:547: error: assignment of read-only variable '__v'
> > This comes from
> > if (get_unaligned(&length_info->tag) == cpu_to_le16(RX_LENGTH_INFO_TAG))
> > which gets expanded to arm's __get_unaligned_le(). The code ends up
> > being something like:
The attached patch makes get_unaligned() work with const pointers,
and doesn't seem to noticably affect code generation.
Original code (2.6.18-rc5), format is instructions/registers:
2.95.3 3.2.3 3.3.3 3.4.2 4.0.2 4.1.0
original, u8 1/1 1/1 1/1 1/1 1/1 1/1
original, u16 3/2 3/3 3/3 3/2 3/2 3/2
original, u32 7/4 8/5 9/5 7/5 7/4 8/5
original, u64 19/8 19/8 21/8 19/7 20/9 22/11
After patch (* denotes change):
2.95.3 3.2.3 3.3.3 3.4.2 4.0.2 4.1.0
fixed, u8 1/1 1/1 1/1 1/1 1/1 1/1
fixed, u16 3/2 3/3 3/3 3/2 3/2 3/2
fixed, u32 7/4 9/6 * 9/6 * 7/5 7/4 8/5
fixed, u64 19/8 19/8 20/8 * 19/7 20/9 22/11
So, for gcc 3.2.3 in the u32 case we need 1 insn and 1 register more,
on gcc 3.3.3 we need 1 reg more in the u32 case and save one insn in
the u64 case, and all the other compiler versions don't seem to care
at all.
--- a/include/asm-arm/unaligned.h.orig 2006-09-07 00:36:56.937552584 +0200
+++ b/include/asm-arm/unaligned.h 2006-09-07 02:03:40.522487432 +0200
@@ -3,7 +3,7 @@
#include <asm/types.h>
-extern int __bug_unaligned_x(void *ptr);
+extern int __bug_unaligned_x(const void *ptr);
/*
* What is the most efficient way of loading/storing an unaligned value?
@@ -51,47 +51,34 @@
#define __get_unaligned_4_be(__p) \
(__p[0] << 24 | __p[1] << 16 | __p[2] << 8 | __p[3])
-#define __get_unaligned_le(ptr) \
- ({ \
- __typeof__(*(ptr)) __v; \
- __u8 *__p = (__u8 *)(ptr); \
- switch (sizeof(*(ptr))) { \
- case 1: __v = *(ptr); break; \
- case 2: __v = __get_unaligned_2_le(__p); break; \
- case 4: __v = __get_unaligned_4_le(__p); break; \
- case 8: { \
- unsigned int __v1, __v2; \
- __v2 = __get_unaligned_4_le((__p+4)); \
- __v1 = __get_unaligned_4_le(__p); \
- __v = ((unsigned long long)__v2 << 32 | __v1); \
- } \
- break; \
- default: __v = __bug_unaligned_x(__p); break; \
- } \
- __v; \
+#define __get_unaligned_8_le(__p) \
+ ((unsigned long long)__get_unaligned_4_le((__p+4)) << 32 | \
+ __get_unaligned_4_le(__p))
+
+#define __get_unaligned_8_be(__p) \
+ ((unsigned long long)__get_unaligned_4_le(__p) << 32 | \
+ __get_unaligned_4_le((__p+4)))
+
+#define __get_unaligned_le(ptr) \
+ ({ \
+ const __u8 *__p = (const __u8 *)(ptr); \
+ sizeof(*(ptr)) == 1 ? *__p : \
+ sizeof(*(ptr)) == 2 ? __get_unaligned_2_le(__p) : \
+ sizeof(*(ptr)) == 4 ? __get_unaligned_4_le(__p) : \
+ sizeof(*(ptr)) == 8 ? __get_unaligned_8_le(__p) : \
+ __bug_unaligned_x(__p); \
})
-#define __get_unaligned_be(ptr) \
- ({ \
- __typeof__(*(ptr)) __v; \
- __u8 *__p = (__u8 *)(ptr); \
- switch (sizeof(*(ptr))) { \
- case 1: __v = *(ptr); break; \
- case 2: __v = __get_unaligned_2_be(__p); break; \
- case 4: __v = __get_unaligned_4_be(__p); break; \
- case 8: { \
- unsigned int __v1, __v2; \
- __v2 = __get_unaligned_4_be(__p); \
- __v1 = __get_unaligned_4_be((__p+4)); \
- __v = ((unsigned long long)__v2 << 32 | __v1); \
- } \
- break; \
- default: __v = __bug_unaligned_x(__p); break; \
- } \
- __v; \
+#define __get_unaligned_be(ptr) \
+ ({ \
+ const __u8 *__p = (const __u8 *)(ptr); \
+ sizeof(*(ptr)) == 1 ? *__p : \
+ sizeof(*(ptr)) == 2 ? __get_unaligned_2_be(__p) : \
+ sizeof(*(ptr)) == 4 ? __get_unaligned_4_be(__p) : \
+ sizeof(*(ptr)) == 8 ? __get_unaligned_8_be(__p) : \
+ __bug_unaligned_x(__p); \
})
-
static inline void __put_unaligned_2_le(__u32 __v, register __u8 *__p)
{
*__p++ = __v;

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@ -1,222 +0,0 @@
# Backport of a number of generic functions which subsequent patches use
# Upstream status: will go into 2.6.19
diff -urN a/arch/arm/mach-iop3xx/Makefile b/arch/arm/mach-iop3xx/Makefile
--- a/arch/arm/mach-iop3xx/Makefile 2006-08-03 11:39:01.664742750 +0000
+++ b/arch/arm/mach-iop3xx/Makefile 2006-08-07 17:33:38.237095500 +0000
@@ -10,7 +10,7 @@
obj-n :=
obj- :=
-obj-$(CONFIG_ARCH_IOP321) += iop321-setup.o iop321-irq.o iop321-pci.o iop321-time.o
+obj-$(CONFIG_ARCH_IOP321) += iop321-setup.o iop321-irq.o iop321-pci.o iop321-time.o iop321-gpio.o
obj-$(CONFIG_ARCH_IOP331) += iop331-setup.o iop331-irq.o iop331-pci.o iop331-time.o
diff -urN a/arch/arm/mach-iop3xx/iop321-gpio.c b/arch/arm/mach-iop3xx/iop321-gpio.c
--- a/arch/arm/mach-iop3xx/iop321-gpio.c 1970-01-01 00:00:00.000000000 +0000
+++ b/arch/arm/mach-iop3xx/iop321-gpio.c 2006-08-07 17:33:38.237095500 +0000
@@ -0,0 +1,44 @@
+/*
+ * arch/arm/plat-iop/gpio.c
+ * GPIO handling for Intel IOP3xx processors.
+ *
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#include <linux/device.h>
+#include <asm/arch/iop321.h>
+
+void gpio_line_config(int line, int direction)
+{
+ unsigned long flags;
+
+ if (direction == GPIO_IN) {
+ *IOP321_GPOE |= 1 << line;
+ } else if (direction == GPIO_OUT) {
+ *IOP321_GPOE &= ~(1 << line);
+ }
+}
+EXPORT_SYMBOL(gpio_line_config);
+
+int gpio_line_get(int line)
+{
+ return !!(*IOP321_GPID & (1 << line));
+}
+EXPORT_SYMBOL(gpio_line_get);
+
+void gpio_line_set(int line, int value)
+{
+ unsigned long flags;
+
+ if (value == GPIO_LOW) {
+ *IOP321_GPOD &= ~(1 << line);
+ } else if (value == GPIO_HIGH) {
+ *IOP321_GPOD |= 1 << line;
+ }
+}
+EXPORT_SYMBOL(gpio_line_set);
diff -urN a/arch/arm/mach-iop3xx/iop321-setup.c b/arch/arm/mach-iop3xx/iop321-setup.c
--- a/arch/arm/mach-iop3xx/iop321-setup.c 2006-08-03 11:39:01.664742750 +0000
+++ b/arch/arm/mach-iop3xx/iop321-setup.c 2006-08-07 17:33:38.237095500 +0000
@@ -75,7 +75,7 @@
}
};
-static struct resource iop32x_i2c_0_resources[] = {
+struct resource iop32x_i2c_0_resources[] = {
[0] = {
.start = 0xfffff680,
.end = 0xfffff698,
@@ -88,7 +88,7 @@
}
};
-static struct resource iop32x_i2c_1_resources[] = {
+struct resource iop32x_i2c_1_resources[] = {
[0] = {
.start = 0xfffff6a0,
.end = 0xfffff6b8,
@@ -101,14 +101,14 @@
}
};
-static struct platform_device iop32x_i2c_0_controller = {
+struct platform_device iop32x_i2c_0_controller = {
.name = "IOP3xx-I2C",
.id = 0,
.num_resources = 2,
.resource = iop32x_i2c_0_resources
};
-static struct platform_device iop32x_i2c_1_controller = {
+struct platform_device iop32x_i2c_1_controller = {
.name = "IOP3xx-I2C",
.id = 1,
.num_resources = 2,
diff -urN a/arch/arm/mach-iop3xx/iop321-time.c b/arch/arm/mach-iop3xx/iop321-time.c
--- a/arch/arm/mach-iop3xx/iop321-time.c 2006-08-03 11:39:01.664742750 +0000
+++ b/arch/arm/mach-iop3xx/iop321-time.c 2006-08-07 17:33:50.349852500 +0000
@@ -28,6 +28,19 @@
#define IOP321_TIME_SYNC 0
+static unsigned long ticks_per_jiffy;
+static unsigned long ticks_per_usec;
+static unsigned long next_jiffy_time;
+
+unsigned long iop3xx_gettimeoffset(void)
+{
+ unsigned long offset;
+
+ offset = next_jiffy_time - *IOP321_TU_TCR1;
+
+ return offset / ticks_per_usec;
+}
+
static inline unsigned long get_elapsed(void)
{
return LATCH - *IOP321_TU_TCR0;
@@ -65,6 +78,24 @@
}
static irqreturn_t
+iop3xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+ write_seqlock(&xtime_lock);
+
+ asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1));
+
+ while ((signed long)(next_jiffy_time - *IOP321_TU_TCR1)
+ >= ticks_per_jiffy) {
+ timer_tick(regs);
+ next_jiffy_time -= ticks_per_jiffy;
+ }
+
+ write_sequnlock(&xtime_lock);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t
iop321_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
u32 tisr;
@@ -82,12 +113,41 @@
return IRQ_HANDLED;
}
+static struct irqaction iop3xx_timer_irq = {
+ .name = "IOP3XX Timer Tick",
+ .handler = iop3xx_timer_interrupt,
+ .flags = IRQF_DISABLED | IRQF_TIMER,
+};
+
static struct irqaction iop321_timer_irq = {
.name = "IOP321 Timer Tick",
.handler = iop321_timer_interrupt,
.flags = IRQF_DISABLED | IRQF_TIMER,
};
+void __init iop3xx_init_time(unsigned long tick_rate)
+{
+ u32 timer_ctl;
+
+ ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
+ ticks_per_usec = tick_rate / 1000000;
+ next_jiffy_time = 0xffffffff;
+
+ timer_ctl = IOP321_TMR_EN | IOP321_TMR_PRIVILEGED | IOP321_TMR_RELOAD |
+ IOP321_TMR_RATIO_1_1;
+
+ /*
+ * We use timer 0 for our timer interrupt, and timer 1 as
+ * monotonic counter for tracking missed jiffies.
+ */
+ asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1));
+ asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
+ asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff));
+ asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl));
+
+ setup_irq(IRQ_IOP321_TIMER0, &iop3xx_timer_irq);
+}
+
static void __init iop321_timer_init(void)
{
u32 timer_ctl;
diff -urN a/include/asm-arm/arch-iop3xx/iop321.h b/include/asm-arm/arch-iop3xx/iop321.h
--- a/include/asm-arm/arch-iop3xx/iop321.h 2006-08-03 11:39:08.109145500 +0000
+++ b/include/asm-arm/arch-iop3xx/iop321.h 2006-08-07 17:33:38.241095750 +0000
@@ -232,6 +232,12 @@
#define IOP321_GPID (volatile u32 *)IOP321_REG_ADDR(0x000007C8)
#define IOP321_GPOD (volatile u32 *)IOP321_REG_ADDR(0x000007CC)
+#define GPIO_IN 0
+#define GPIO_OUT 1
+#define GPIO_LOW 0
+#define GPIO_HIGH 1
+#define IOP3XX_GPIO_LINE(x) (x)
+
/* Interrupt Controller */
#define IOP321_INTCTL (volatile u32 *)IOP321_REG_ADDR(0x000007D0)
#define IOP321_INTSTR (volatile u32 *)IOP321_REG_ADDR(0x000007D4)
@@ -340,6 +346,13 @@
extern void iop321_map_io(void);
extern void iop321_init_irq(void);
extern void iop321_time_init(void);
+extern unsigned long iop3xx_gettimeoffset(void);
+extern void iop3xx_init_time(unsigned long);
+extern struct platform_device iop32x_i2c_0_controller;
+extern struct platform_device iop32x_i2c_1_controller;
+extern void gpio_line_config(int line, int direction);
+extern int gpio_line_get(int line);
+extern void gpio_line_set(int line, int value);
#endif
#endif // _IOP321_HW_H_

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@ -1,298 +0,0 @@
diff -urN a/arch/arm/mach-iop3xx/Kconfig b/arch/arm/mach-iop3xx/Kconfig
--- a/arch/arm/mach-iop3xx/Kconfig 2006-08-11 16:23:02.024248000 +0000
+++ b/arch/arm/mach-iop3xx/Kconfig 2006-08-11 16:30:53.873736750 +0000
@@ -17,6 +17,13 @@
Say Y here if you want to run your kernel on the Thecus n2100
NAS appliance.
+config MACH_GLANTANK
+ bool "Enable support for the GLAN Tank"
+ help
+ Say Y here if you want to run your kernel on the GLAN Tank
+ NAS appliance or machines from IO-Data's HDL-Gxxx, HDL-GWxxx
+ and HDL-GZxxx series.
+
config ARCH_IQ31244
bool "Enable support for IQ31244"
select ARCH_IOP321
diff -urN a/arch/arm/mach-iop3xx/Makefile b/arch/arm/mach-iop3xx/Makefile
--- a/arch/arm/mach-iop3xx/Makefile 2006-08-11 16:23:02.024248000 +0000
+++ b/arch/arm/mach-iop3xx/Makefile 2006-08-11 16:31:02.574280500 +0000
@@ -24,3 +24,5 @@
obj-$(CONFIG_MACH_N2100) += n2100.o
+obj-$(CONFIG_MACH_GLANTANK) += glantank.o
+
diff -urN a/arch/arm/mach-iop3xx/glantank.c b/arch/arm/mach-iop3xx/glantank.c
--- a/arch/arm/mach-iop3xx/glantank.c 1970-01-01 00:00:00.000000000 +0000
+++ b/arch/arm/mach-iop3xx/glantank.c 2006-08-11 17:06:45.236188500 +0000
@@ -0,0 +1,203 @@
+/*
+ * arch/arm/mach-iop32x/glantank.c
+ *
+ * Board support code for the GLAN Tank.
+ *
+ * Copyright (C) 2006 Martin Michlmayr <tbm@cyrius.com>
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/pm.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/serial_core.h>
+#include <linux/serial_8250.h>
+#include <linux/platform_device.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/pci.h>
+#include <asm/mach/time.h>
+#include <asm/mach-types.h>
+#include <asm/page.h>
+
+#define INTA IRQ_IQ80321_INTA
+#define INTB IRQ_IQ80321_INTB
+#define INTC IRQ_IQ80321_INTC
+#define INTD IRQ_IQ80321_INTD
+
+/*
+ * GLAN Tank timer tick configuration.
+ */
+static void __init glantank_timer_init(void)
+{
+ /* 33.333 MHz crystal. */
+ iop3xx_init_time(200000000);
+}
+
+static struct sys_timer glantank_timer = {
+ .init = glantank_timer_init,
+ .offset = iop3xx_gettimeoffset,
+};
+
+/*
+ * GLAN Tank I/O.
+ */
+static struct map_desc glantank_io_desc[] __initdata = {
+ { /* on-board devices */
+ .virtual = GLANTANK_UART,
+ .pfn = __phys_to_pfn(GLANTANK_UART),
+ .length = 0x00100000,
+ .type = MT_DEVICE
+ },
+};
+
+void __init glantank_map_io(void)
+{
+ iop321_map_io();
+ iotable_init(glantank_io_desc, ARRAY_SIZE(glantank_io_desc));
+}
+
+
+/*
+ * GLAN Tank PCI.
+ */
+static inline int __init
+glantank_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
+{
+ static int pci_irq_table[][4] = {
+ /*
+ * PCI IDSEL/INTPIN->INTLINE
+ * A B C D
+ */
+ {INTD, INTD, INTD, INTD}, /* UART (8250) */
+ {INTA, INTA, INTA, INTA}, /* Ethernet (E1000) */
+ {INTB, INTB, INTB, INTB}, /* IDE (AEC6280R) */
+ {INTC, INTC, INTC, INTC}, /* USB (NEC) */
+ };
+
+ BUG_ON(pin < 1 || pin > 4);
+
+ return pci_irq_table[idsel%4][pin-1];
+}
+
+static int glantank_setup(int nr, struct pci_sys_data *sys)
+{
+ struct resource *res;
+
+ if(nr != 0)
+ return 0;
+
+ res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
+ if (!res)
+ panic("PCI: unable to alloc resources");
+
+ res[0].start = IOP321_PCI_LOWER_IO_VA;
+ res[0].end = IOP321_PCI_UPPER_IO_VA;
+ res[0].name = "GLAN Tank PCI I/O Space";
+ res[0].flags = IORESOURCE_IO;
+ request_resource(&ioport_resource, &res[0]);
+
+ res[1].start = IOP321_PCI_LOWER_MEM_PA;
+ res[1].end = IOP321_PCI_UPPER_MEM_PA;
+ res[1].name = "GLAN Tank PCI Memory Space";
+ res[1].flags = IORESOURCE_MEM;
+ request_resource(&iomem_resource, &res[1]);
+
+ sys->mem_offset = IOP321_PCI_MEM_OFFSET;
+ sys->io_offset = IOP321_PCI_IO_OFFSET;
+
+ sys->resource[0] = &res[0];
+ sys->resource[1] = &res[1];
+ sys->resource[2] = NULL;
+
+ return 1;
+}
+
+static void glantank_preinit(void)
+{
+ iop321_init();
+}
+
+static struct hw_pci glantank_pci __initdata = {
+ .swizzle = pci_std_swizzle,
+ .nr_controllers = 1,
+ .setup = glantank_setup,
+ .scan = iop321_scan_bus,
+ .preinit = glantank_preinit,
+ .map_irq = glantank_map_irq
+};
+
+static int __init glantank_pci_init(void)
+{
+ if (machine_is_glantank())
+ pci_common_init(&glantank_pci);
+
+ return 0;
+}
+
+subsys_initcall(glantank_pci_init);
+
+
+/*
+ * GLAN Tank machine initialization.
+ */
+static struct plat_serial8250_port glantank_serial_port[] = {
+ {
+ .mapbase = GLANTANK_UART,
+ .membase = (char *)GLANTANK_UART,
+ .irq = IRQ_GLANTANK_UART,
+ .flags = UPF_SKIP_TEST,
+ .iotype = UPIO_MEM,
+ .regshift = 0,
+ .uartclk = 1843200,
+ },
+ { },
+};
+
+static struct resource glantank_uart_resource = {
+ .start = GLANTANK_UART,
+ .end = GLANTANK_UART + 7,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device glantank_serial_device = {
+ .name = "serial8250",
+ .id = PLAT8250_DEV_PLATFORM,
+ .dev = {
+ .platform_data = glantank_serial_port,
+ },
+ .num_resources = 1,
+ .resource = &glantank_uart_resource,
+};
+
+static void __init glantank_init_machine(void)
+{
+ iop32x_init();
+ platform_device_register(&glantank_serial_device);
+}
+
+MACHINE_START(GLANTANK, "GLAN Tank")
+ /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */
+ .phys_io = GLANTANK_UART,
+ .io_pg_offst = ((GLANTANK_UART) >> 18) & 0xfffc,
+ .boot_params = 0xa0000100,
+ .map_io = glantank_map_io,
+ .init_irq = iop321_init_irq,
+ .timer = &glantank_timer,
+ .init_machine = glantank_init_machine,
+MACHINE_END
+
diff -urN a/arch/arm/mach-iop3xx/iop321-irq.c b/arch/arm/mach-iop3xx/iop321-irq.c
--- a/arch/arm/mach-iop3xx/iop321-irq.c 2006-08-11 16:23:02.024248000 +0000
+++ b/arch/arm/mach-iop3xx/iop321-irq.c 2006-08-11 16:30:21.151691750 +0000
@@ -83,6 +83,7 @@
intstr_write(0); // treat all as IRQ
if(machine_is_iq80321() ||
machine_is_iq31244() ||
+ machine_is_glantank() ||
machine_is_n2100()) // all interrupts are inputs to chip
*IOP321_PCIIRSR = 0x0f;
diff -urN a/arch/arm/mach-iop3xx/iop321-setup.c b/arch/arm/mach-iop3xx/iop321-setup.c
--- a/arch/arm/mach-iop3xx/iop321-setup.c 2006-08-11 16:23:02.024248000 +0000
+++ b/arch/arm/mach-iop3xx/iop321-setup.c 2006-08-11 17:08:00.472890500 +0000
@@ -132,7 +132,8 @@
void __init iop321_map_io(void)
{
iotable_init(iop321_std_desc, ARRAY_SIZE(iop321_std_desc));
- early_serial_setup(&iop321_serial_ports[0]);
+ if (!machine_is_glantank())
+ early_serial_setup(&iop321_serial_ports[0]);
}
#ifdef CONFIG_ARCH_IQ80321
--- a/arch/arm/tools/mach-types 2006-09-05 15:54:52.475751076 +0000
+++ b/arch/arm/tools/mach-types 2006-09-05 15:55:09.098279119 +0000
@@ -1093,4 +1093,5 @@
eti_b1 MACH_ETI_B1 ETI_B1 1080
za9l_series MACH_ZILOG_ZA9L ZILOG_ZA9L 1081
bit2440 MACH_BIT2440 BIT2440 1082
+glantank MACH_GLANTANK GLANTANK 1100
n2100 MACH_N2100 N2100 1101
diff -urN a/include/asm-arm/arch-iop3xx/glantank.h b/include/asm-arm/arch-iop3xx/glantank.h
--- a/include/asm-arm/arch-iop3xx/glantank.h 1970-01-01 00:00:00.000000000 +0000
+++ b/include/asm-arm/arch-iop3xx/glantank.h 2006-08-11 16:28:08.259386500 +0000
@@ -0,0 +1,19 @@
+/*
+ * include/asm/arch-iop32x/glantank.h
+ *
+ * GLAN Tank board registers
+ *
+ */
+
+#ifndef _GLANTANK_H_
+#define _GLANTANK_H_
+
+#define GLANTANK_FLASHBASE 0xf0000000
+#define GLANTANK_FLASHSIZE 0x00080000
+#define GLANTANK_FLASHWIDTH 2
+
+#define GLANTANK_UART 0xfe800000 /* UART #1 */
+#define IRQ_GLANTANK_UART IRQ_IOP321_XINT3
+
+#endif
+
diff -urN a/include/asm-arm/arch-iop3xx/hardware.h b/include/asm-arm/arch-iop3xx/hardware.h
--- a/include/asm-arm/arch-iop3xx/hardware.h 2006-08-11 16:23:07.888614500 +0000
+++ b/include/asm-arm/arch-iop3xx/hardware.h 2006-08-11 16:28:53.390207000 +0000
@@ -54,5 +54,6 @@
#include "iq80331.h"
#include "iq80332.h"
#include "n2100.h"
+#include "glantank.h"
#endif /* _ASM_ARCH_HARDWARE_H */

View File

@ -1,188 +0,0 @@
# Add an MTD maps for IOP3xx boards
# Upstream status: can be solved in a better way as of 2.6.18
diff -urN a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
--- a/drivers/mtd/maps/Kconfig 2006-08-03 11:39:05.885006500 +0000
+++ b/drivers/mtd/maps/Kconfig 2006-08-07 17:19:06.190596000 +0000
@@ -447,6 +447,14 @@
21285 bridge used with Intel's StrongARM processors. More info at
<http://www.intel.com/design/bridge/docs/21285_documentation.htm>.
+config MTD_IOP3XX
+ tristate "CFI Flash device mapped on the XScale IOP3XX board"
+ depends on ARM && MTD_CFI && ARCH_IOP3XX
+ help
+ This enables access routines for the flash chips on the Intel XScale
+ IOP3XX based evaluation board. If you have one of these boards and
+ would like to use the flash chips on it, say 'Y'.
+
config MTD_IQ80310
tristate "CFI Flash device mapped on the XScale IQ80310 board"
depends on MTD_CFI && ARCH_IQ80310
diff -urN a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
--- a/drivers/mtd/maps/Makefile 2006-08-03 11:39:05.885006500 +0000
+++ b/drivers/mtd/maps/Makefile 2006-08-07 17:18:53.981833000 +0000
@@ -15,7 +15,7 @@
obj-$(CONFIG_MTD_CSTM_MIPS_IXX) += cstm_mips_ixx.o
obj-$(CONFIG_MTD_DC21285) += dc21285.o
obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o
-obj-$(CONFIG_MTD_IQ80310) += iq80310.o
+obj-$(CONFIG_MTD_IOP3XX) += iop3xx.o
obj-$(CONFIG_MTD_L440GX) += l440gx.o
obj-$(CONFIG_MTD_AMD76XROM) += amd76xrom.o
obj-$(CONFIG_MTD_ICHXROM) += ichxrom.o
diff -urN a/drivers/mtd/maps/iop3xx.c b/drivers/mtd/maps/iop3xx.c
--- a/drivers/mtd/maps/iop3xx.c 1970-01-01 00:00:00.000000000 +0000
+++ b/drivers/mtd/maps/iop3xx.c 2006-08-07 17:18:53.981833000 +0000
@@ -0,0 +1,150 @@
+/*
+ * $Id: iop3xx.c,v 1.17 2003/06/23 11:48:18 dwmw2 Exp $
+ *
+ * Mapping for Intel XScale IOP3xx based platforms
+ *
+ * Author: Nicolas Pitre
+ * Copyright: (C) 2001-2003 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * 09/03: Cleaned up to be generic to all IOP3xx systems - ds
+ *
+ * If you add a new machine type with a different WINDOW_SIZE or
+ * physmap addr, just wrap the init in if(machine_is_X()) { }
+ * and make sure your board header gets included in
+ * include/asm-arm/arch-iop3xx/hardware.h to pick up the definitions.
+ *
+ * DO NOT fill this file with #ifdef CONFIG_ARCH_XXXX crap.
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/hardware.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+
+static struct mtd_info *mymtd;
+
+static struct map_info iop3xx_map = {
+ .name = "IOP3xx Flash",
+};
+
+static struct mtd_partition iop3xx_partitions[6] = {
+ {
+ .name = "RedBoot",
+ .size = 0x00040000,
+ .offset = 0,
+ },{
+ .name = "ramdisk",
+ .size = 0x00d00000,
+ .offset = 0x00040000,
+ },{
+ .name = "kernel",
+ .size = 0x00160000,
+ .offset = 0x00d40000
+ },{
+ .name = "user",
+ .size = 0x00120000,
+ .offset = 0x00ea0000
+ },{
+ .name = "RedBoot config",
+ .size = 0x00020000,
+ .offset = 0x00fc0000,
+ // .mask_flags = MTD_WRITEABLE
+ },{
+ .name = "FIS directory",
+ .size = 0x00020000,
+ .offset = 0x00fe0000
+ }
+};
+
+static struct mtd_info *mymtd;
+static struct mtd_partition *parsed_parts;
+static const char *probes[] = { "RedBoot", "cmdlinepart", NULL };
+
+static int __init init_iop3xx(void)
+{
+ struct mtd_partition *parts;
+ int nb_parts = 0;
+ int parsed_nr_parts = 0;
+ int ret;
+
+ if(machine_is_iq80321()) {
+ iop3xx_map.phys = IQ80321_FLASHBASE;
+ iop3xx_map.size = IQ80321_FLASHSIZE;
+ iop3xx_map.bankwidth = IQ80321_FLASHWIDTH;
+ } else if(machine_is_iq31244()) {
+ iop3xx_map.phys = IQ31244_FLASHBASE;
+ iop3xx_map.size = IQ31244_FLASHSIZE;
+ iop3xx_map.bankwidth = IQ31244_FLASHWIDTH;
+ } else if(machine_is_iq80331()) {
+ iop3xx_map.phys = IQ80331_FLASHBASE;
+ iop3xx_map.size = IQ80331_FLASHSIZE;
+ iop3xx_map.bankwidth = IQ80331_FLASHWIDTH;
+ } else if(machine_is_n2100()) {
+ iop3xx_map.phys = N2100_FLASHBASE;
+ iop3xx_map.size = N2100_FLASHSIZE;
+ iop3xx_map.bankwidth = N2100_FLASHWIDTH;
+ } else {
+ printk("Unknown IOP3xx platform - flash access disabled\n");
+ return -ENODEV;
+ }
+
+ iop3xx_map.virt =
+ (unsigned long)ioremap(iop3xx_map.phys, iop3xx_map.size );
+ if (!iop3xx_map.virt) {
+ printk("Failed to ioremap\n");
+ return -EIO;
+ }
+ simple_map_init(&iop3xx_map);
+
+ mymtd = do_map_probe("cfi_probe", &iop3xx_map);
+ if (!mymtd) {
+ iounmap((void *)iop3xx_map.virt);
+ return -ENXIO;
+ }
+ mymtd->owner = THIS_MODULE;
+
+ ret = parse_mtd_partitions(mymtd, probes, &parsed_parts, 0);
+ ret=-1;
+ if (ret > 0)
+ parsed_nr_parts = ret;
+ if (parsed_nr_parts > 0) {
+ parts = parsed_parts;
+ nb_parts = parsed_nr_parts;
+ } else {
+ parts = iop3xx_partitions;
+ nb_parts = ARRAY_SIZE(iop3xx_partitions);
+ }
+ add_mtd_partitions(mymtd, parts, nb_parts);
+ return 0;
+}
+
+static void __exit cleanup_iop3xx(void)
+{
+ if (mymtd) {
+ del_mtd_partitions(mymtd);
+ map_destroy(mymtd);
+ if (parsed_parts)
+ kfree(parsed_parts);
+ }
+ if (iop3xx_map.virt)
+ iounmap((void *)iop3xx_map.virt);
+}
+
+module_init(init_iop3xx);
+module_exit(cleanup_iop3xx);
+
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Nicolas Pitre <nico@cam.org>");
+MODULE_DESCRIPTION("MTD map driver for Intel XScale IOP3xx Platforms");

View File

@ -1,349 +0,0 @@
# Backport of Thecus N2100 support
# Upstream status: will go into 2.6.19
diff -urN a/arch/arm/mach-iop3xx/Kconfig b/arch/arm/mach-iop3xx/Kconfig
--- a/arch/arm/mach-iop3xx/Kconfig 2006-08-03 11:39:01.664742750 +0000
+++ b/arch/arm/mach-iop3xx/Kconfig 2006-08-03 13:49:30.197995500 +0000
@@ -11,6 +11,12 @@
Say Y here if you want to run your kernel on the Intel IQ80321
evaluation kit for the IOP321 chipset.
+config MACH_N2100
+ bool "Enable support for the Thecus n2100"
+ help
+ Say Y here if you want to run your kernel on the Thecus n2100
+ NAS appliance.
+
config ARCH_IQ31244
bool "Enable support for IQ31244"
select ARCH_IOP321
diff -urN a/arch/arm/mach-iop3xx/Makefile b/arch/arm/mach-iop3xx/Makefile
--- a/arch/arm/mach-iop3xx/Makefile 2006-08-03 11:39:01.664742750 +0000
+++ b/arch/arm/mach-iop3xx/Makefile 2006-08-03 13:49:30.197995500 +0000
@@ -21,3 +21,6 @@
obj-$(CONFIG_ARCH_IQ80331) += iq80331-mm.o iq80331-pci.o
obj-$(CONFIG_MACH_IQ80332) += iq80332-mm.o iq80332-pci.o
+
+obj-$(CONFIG_MACH_N2100) += n2100.o
+
diff -urN a/arch/arm/mach-iop3xx/iop321-irq.c b/arch/arm/mach-iop3xx/iop321-irq.c
--- a/arch/arm/mach-iop3xx/iop321-irq.c 2006-08-03 11:39:01.664742750 +0000
+++ b/arch/arm/mach-iop3xx/iop321-irq.c 2006-08-03 13:49:30.201995750 +0000
@@ -82,7 +82,8 @@
intctl_write(0); // disable all interrupts
intstr_write(0); // treat all as IRQ
if(machine_is_iq80321() ||
- machine_is_iq31244()) // all interrupts are inputs to chip
+ machine_is_iq31244() ||
+ machine_is_n2100()) // all interrupts are inputs to chip
*IOP321_PCIIRSR = 0x0f;
for(i = IOP321_IRQ_OFS; i < NR_IOP321_IRQS; i++)
diff -urN a/arch/arm/mach-iop3xx/n2100.c b/arch/arm/mach-iop3xx/n2100.c
--- a/arch/arm/mach-iop3xx/n2100.c 1970-01-01 00:00:00.000000000 +0000
+++ b/arch/arm/mach-iop3xx/n2100.c 2006-08-03 13:49:30.201995750 +0000
@@ -0,0 +1,233 @@
+/*
+ * arch/arm/mach-iop32x/n2100.c
+ *
+ * Board support code the the Thecus N2100 platform.
+ *
+ * Author: Rory Bolt <rorybolt@pacbell.net>
+ * Copyright (C) 2002 Rory Bolt
+ * Copyright 2003 (c) MontaVista, Software, Inc.
+ * Copyright (C) 2004 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/pm.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/serial_core.h>
+#include <linux/serial_8250.h>
+#include <linux/mtd/physmap.h>
+#include <linux/platform_device.h>
+#include <linux/reboot.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/pci.h>
+#include <asm/mach/time.h>
+#include <asm/mach-types.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+
+/*
+ * N2100 timer tick configuration.
+ */
+static void __init n2100_timer_init(void)
+{
+ /* 33.000 MHz crystal. */
+ iop3xx_init_time(198000000);
+}
+
+static struct sys_timer n2100_timer = {
+ .init = n2100_timer_init,
+ .offset = iop3xx_gettimeoffset,
+};
+
+
+/*
+ * N2100 I/O.
+ */
+static struct map_desc n2100_io_desc[] __initdata = {
+ { /* on-board devices */
+ .virtual = N2100_UART,
+ .pfn = __phys_to_pfn(N2100_UART),
+ .length = 0x00100000,
+ .type = MT_DEVICE
+ },
+};
+
+void __init n2100_map_io(void)
+{
+ iop321_map_io();
+ iotable_init(n2100_io_desc, ARRAY_SIZE(n2100_io_desc));
+}
+
+
+/*
+ * N2100 PCI.
+ */
+static inline int __init
+n2100_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int irq;
+
+ if (PCI_SLOT(dev->devfn) == 1) {
+ /* RTL8110SB #1 */
+ irq = IRQ_IOP321_XINT0;
+ } else if (PCI_SLOT(dev->devfn) == 2) {
+ /* RTL8110SB #2 */
+ irq = IRQ_IOP321_XINT1;
+ } else if (PCI_SLOT(dev->devfn) == 3) {
+ /* Sil3512 */
+ irq = IRQ_IOP321_XINT2;
+ } else if (PCI_SLOT(dev->devfn) == 4 && pin == 1) {
+ /* VT6212 INTA */
+ irq = IRQ_IOP321_XINT1;
+ } else if (PCI_SLOT(dev->devfn) == 4 && pin == 2) {
+ /* VT6212 INTB */
+ irq = IRQ_IOP321_XINT0;
+ } else if (PCI_SLOT(dev->devfn) == 4 && pin == 3) {
+ /* VT6212 INTC */
+ irq = IRQ_IOP321_XINT2;
+ } else if (PCI_SLOT(dev->devfn) == 5) {
+ /* Mini-PCI slot */
+ irq = IRQ_IOP321_XINT3;
+ } else {
+ printk(KERN_ERR "n2100_pci_map_irq() called for unknown "
+ "device PCI:%d:%d:%d\n", dev->bus->number,
+ PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
+ irq = -1;
+ }
+
+ return irq;
+}
+
+static int n2100_setup(int nr, struct pci_sys_data *sys)
+{
+ struct resource *res;
+
+ if(nr != 0)
+ return 0;
+
+ res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
+ if (!res)
+ panic("PCI: unable to alloc resources");
+
+ res[0].start = IOP321_PCI_LOWER_IO_VA;
+ res[0].end = IOP321_PCI_UPPER_IO_VA;
+ res[0].name = "N2100 PCI I/O Space";
+ res[0].flags = IORESOURCE_IO;
+ request_resource(&ioport_resource, &res[0]);
+
+ res[1].start = IOP321_PCI_LOWER_MEM_PA;
+ res[1].end = IOP321_PCI_UPPER_MEM_PA;
+ res[1].name = "N2100 PCI Memory Space";
+ res[1].flags = IORESOURCE_MEM;
+ request_resource(&iomem_resource, &res[1]);
+
+ sys->mem_offset = IOP321_PCI_MEM_OFFSET;
+ sys->io_offset = IOP321_PCI_IO_OFFSET;
+
+ sys->resource[0] = &res[0];
+ sys->resource[1] = &res[1];
+ sys->resource[2] = NULL;
+
+ return 1;
+}
+
+static void n2100_preinit(void)
+{
+ iop321_init();
+}
+
+static struct hw_pci n2100_pci __initdata = {
+ .swizzle = pci_std_swizzle,
+ .nr_controllers = 1,
+ .setup = n2100_setup,
+ .scan = iop321_scan_bus,
+ .preinit = n2100_preinit,
+ .map_irq = n2100_pci_map_irq,
+};
+
+static int __init n2100_pci_init(void)
+{
+ if (machine_is_n2100())
+ pci_common_init(&n2100_pci);
+
+ return 0;
+}
+
+subsys_initcall(n2100_pci_init);
+
+
+/*
+ * Pull PCA9532 GPIO #8 low to power off the machine.
+ */
+static void n2100_power_off(void)
+{
+ local_irq_disable();
+
+ /* Start condition, I2C address of PCA9532, write transaction. */
+ *IOP321_IDBR0 = 0xc0;
+ *IOP321_ICR0 = 0xe9;
+ mdelay(1);
+
+ /* Write address 0x08. */
+ *IOP321_IDBR0 = 0x08;
+ *IOP321_ICR0 = 0xe8;
+ mdelay(1);
+
+ /* Write data 0x01, stop condition. */
+ *IOP321_IDBR0 = 0x01;
+ *IOP321_ICR0 = 0xea;
+
+ while (1)
+ ;
+}
+
+
+static struct timer_list power_button_poll_timer;
+
+static void power_button_poll(unsigned long dummy)
+{
+ if (gpio_line_get(N2100_POWER_BUTTON) == 0) {
+ ctrl_alt_del();
+ return;
+ }
+
+ power_button_poll_timer.expires = jiffies + (HZ / 10);
+ add_timer(&power_button_poll_timer);
+}
+
+
+static void __init n2100_init_machine(void)
+{
+ platform_device_register(&iop32x_i2c_0_controller);
+
+ pm_power_off = n2100_power_off;
+
+ init_timer(&power_button_poll_timer);
+ power_button_poll_timer.function = power_button_poll;
+ power_button_poll_timer.expires = jiffies + (HZ / 10);
+ add_timer(&power_button_poll_timer);
+}
+
+MACHINE_START(N2100, "Thecus N2100")
+ /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
+ .phys_io = N2100_UART,
+ .io_pg_offst = ((N2100_UART) >> 18) & 0xfffc,
+ .boot_params = 0xa0000100,
+ .map_io = n2100_map_io,
+ .init_irq = iop321_init_irq,
+ .timer = &n2100_timer,
+ .init_machine = n2100_init_machine,
+MACHINE_END
--- a/arch/arm/tools/mach-types 2006-09-05 15:54:06.126067067 +0000
+++ b/arch/arm/tools/mach-types 2006-09-05 15:54:21.300636220 +0000
@@ -1093,3 +1093,4 @@
eti_b1 MACH_ETI_B1 ETI_B1 1080
za9l_series MACH_ZILOG_ZA9L ZILOG_ZA9L 1081
bit2440 MACH_BIT2440 BIT2440 1082
+n2100 MACH_N2100 N2100 1101
diff -urN a/include/asm-arm/arch-iop3xx/hardware.h b/include/asm-arm/arch-iop3xx/hardware.h
--- a/include/asm-arm/arch-iop3xx/hardware.h 2006-08-03 11:39:08.109145500 +0000
+++ b/include/asm-arm/arch-iop3xx/hardware.h 2006-08-03 13:49:30.201995750 +0000
@@ -53,5 +53,6 @@
#include "iq31244.h"
#include "iq80331.h"
#include "iq80332.h"
+#include "n2100.h"
#endif /* _ASM_ARCH_HARDWARE_H */
diff -urN a/include/asm-arm/arch-iop3xx/n2100.h b/include/asm-arm/arch-iop3xx/n2100.h
--- a/include/asm-arm/arch-iop3xx/n2100.h 1970-01-01 00:00:00.000000000 +0000
+++ b/include/asm-arm/arch-iop3xx/n2100.h 2006-08-03 13:49:30.205996000 +0000
@@ -0,0 +1,22 @@
+/*
+ * include/asm/arch-iop32x/n2100.h
+ *
+ * Thecus N2100 board registers
+ */
+
+#ifndef __N2100_H
+#define __N2100_H
+
+#define N2100_UART 0xfe800000 /* UART */
+
+#define N2100_FLASHBASE 0xf0000000
+#define N2100_FLASHSIZE 0x01000000
+#define N2100_FLASHWIDTH 2
+
+#define N2100_COPY_BUTTON IOP3XX_GPIO_LINE(0)
+#define N2100_PCA9532_RESET IOP3XX_GPIO_LINE(2)
+#define N2100_RESET_BUTTON IOP3XX_GPIO_LINE(3)
+#define N2100_HARDWARE_RESET IOP3XX_GPIO_LINE(4)
+#define N2100_POWER_BUTTON IOP3XX_GPIO_LINE(5)
+
+#endif
diff -urN a/include/asm-arm/arch-iop3xx/system.h b/include/asm-arm/arch-iop3xx/system.h
--- a/include/asm-arm/arch-iop3xx/system.h 2006-08-03 11:39:08.133147000 +0000
+++ b/include/asm-arm/arch-iop3xx/system.h 2006-08-03 13:49:30.205996000 +0000
@@ -8,6 +8,8 @@
* published by the Free Software Foundation.
*/
+#include <asm/mach-types.h>
+
static inline void arch_idle(void)
{
cpu_do_idle();
@@ -16,6 +18,14 @@
static inline void arch_reset(char mode)
{
+
+ if (machine_is_n2100()) {
+ gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
+ gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
+ while (1)
+ ;
+ }
+
#ifdef CONFIG_ARCH_IOP321
*IOP321_PCSR = 0x30;
#endif

View File

@ -1,75 +0,0 @@
Backported from 2.6.19-rc3, needed for ixp4xx-clocksource.patch
Index: linux-2.6.18/arch/arm/Kconfig
===================================================================
--- linux-2.6.18.orig/arch/arm/Kconfig 2006-09-19 20:42:06.000000000 -0700
+++ linux-2.6.18/arch/arm/Kconfig 2006-10-29 01:59:14.000000000 -0700
@@ -17,6 +17,10 @@
Europe. There is an ARM Linux project with a web page at
<http://www.arm.linux.org.uk/>.
+config GENERIC_TIME
+ bool
+ default n
+
config MMU
bool
default y
Index: linux-2.6.18/arch/arm/kernel/time.c
===================================================================
--- linux-2.6.18.orig/arch/arm/kernel/time.c 2006-09-19 20:42:06.000000000 -0700
+++ linux-2.6.18/arch/arm/kernel/time.c 2006-10-29 01:59:14.000000000 -0700
@@ -69,10 +69,12 @@
*/
int (*set_rtc)(void);
+#ifndef CONFIG_GENERIC_TIME
static unsigned long dummy_gettimeoffset(void)
{
return 0;
}
+#endif
/*
* Scheduler clock - returns current time in nanosec units.
@@ -230,6 +232,7 @@
#define do_leds()
#endif
+#ifndef CONFIG_GENERIC_TIME
void do_gettimeofday(struct timeval *tv)
{
unsigned long flags;
@@ -291,6 +294,7 @@
}
EXPORT_SYMBOL(do_settimeofday);
+#endif /* !CONFIG_GENERIC_TIME */
/**
* save_time_delta - Save the offset between system time and RTC time
@@ -500,8 +504,10 @@
void __init time_init(void)
{
+#ifndef CONFIG_GENERIC_TIME
if (system_timer->offset == NULL)
system_timer->offset = dummy_gettimeoffset;
+#endif
system_timer->init();
#ifdef CONFIG_NO_IDLE_HZ
Index: linux-2.6.18/include/asm-arm/mach/time.h
===================================================================
--- linux-2.6.18.orig/include/asm-arm/mach/time.h 2006-09-19 20:42:06.000000000 -0700
+++ linux-2.6.18/include/asm-arm/mach/time.h 2006-10-29 01:59:14.000000000 -0700
@@ -38,7 +38,9 @@
void (*init)(void);
void (*suspend)(void);
void (*resume)(void);
+#ifndef CONFIG_GENERIC_TIME
unsigned long (*offset)(void);
+#endif
#ifdef CONFIG_NO_IDLE_HZ
struct dyn_tick_timer *dyn_tick;

View File

@ -1,11 +0,0 @@
--- a/drivers/mtd/maps/iop3xx.c 2006-11-03 12:04:58.503631320 +0100
+++ b/drivers/mtd/maps/iop3xx.c 2006-11-03 12:05:21.880967575 +0100
@@ -57,7 +57,7 @@
.offset = 0x00ea0000
},{
.name = "RedBoot config",
- .size = 0x00020000,
+ .size = 0x00001000,
.offset = 0x00fc0000,
// .mask_flags = MTD_WRITEABLE
},{

View File

@ -1,121 +0,0 @@
From: Kevin Hilman <khilman@mvista.com>
Date: Thu, 21 Sep 2006 23:58:57 +0000 (+0100)
Subject: [ARM] 3856/1: Add clocksource for Intel IXP4xx platforms
X-Git-Url: http://www.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=84904d0ead0a8c419abd45c7b2ac8d76d50a0d48
[ARM] 3856/1: Add clocksource for Intel IXP4xx platforms
Enables the ixp4xx platforms to use Generic time-of-day.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Acked-by: John Stultz <johnstul@us.ibm.com>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Index: linux-2.6.18/arch/arm/Kconfig
===================================================================
--- linux-2.6.18.orig/arch/arm/Kconfig 2006-10-29 01:59:14.000000000 -0700
+++ linux-2.6.18/arch/arm/Kconfig 2006-10-29 01:59:38.000000000 -0700
@@ -212,6 +212,7 @@
config ARCH_IXP4XX
bool "IXP4xx-based"
depends on MMU
+ select GENERIC_TIME
help
Support for Intel's IXP4XX (XScale) family of processors.
Index: linux-2.6.18/arch/arm/mach-ixp4xx/common.c
===================================================================
--- linux-2.6.18.orig/arch/arm/mach-ixp4xx/common.c 2006-09-19 20:42:06.000000000 -0700
+++ linux-2.6.18/arch/arm/mach-ixp4xx/common.c 2006-10-29 01:00:08.000000000 -0800
@@ -26,6 +26,7 @@
#include <linux/bitops.h>
#include <linux/time.h>
#include <linux/timex.h>
+#include <linux/clocksource.h>
#include <asm/hardware.h>
#include <asm/uaccess.h>
@@ -255,16 +256,6 @@
#define CLOCK_TICKS_PER_USEC ((CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
-/* IRQs are disabled before entering here from do_gettimeofday() */
-static unsigned long ixp4xx_gettimeoffset(void)
-{
- u32 elapsed;
-
- elapsed = *IXP4XX_OSTS - last_jiffy_time;
-
- return elapsed / CLOCK_TICKS_PER_USEC;
-}
-
static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
write_seqlock(&xtime_lock);
@@ -309,7 +300,6 @@
struct sys_timer ixp4xx_timer = {
.init = ixp4xx_timer_init,
- .offset = ixp4xx_gettimeoffset,
};
static struct resource ixp46x_i2c_resources[] = {
@@ -365,3 +355,29 @@
ixp4xx_exp_bus_size >> 20);
}
+cycle_t ixp4xx_get_cycles(void)
+{
+ return *IXP4XX_OSTS;
+}
+
+static struct clocksource clocksource_ixp4xx = {
+ .name = "OSTS",
+ .rating = 200,
+ .read = ixp4xx_get_cycles,
+ .mask = CLOCKSOURCE_MASK(32),
+ .shift = 20,
+ .is_continuous = 1,
+};
+
+unsigned long ixp4xx_timer_freq = FREQ;
+static int __init ixp4xx_clocksource_init(void)
+{
+ clocksource_ixp4xx.mult =
+ clocksource_hz2mult(ixp4xx_timer_freq,
+ clocksource_ixp4xx.shift);
+ clocksource_register(&clocksource_ixp4xx);
+
+ return 0;
+}
+
+device_initcall(ixp4xx_clocksource_init);
Index: linux-2.6.18/arch/arm/mach-ixp4xx/nslu2-setup.c
===================================================================
--- linux-2.6.18.orig/arch/arm/mach-ixp4xx/nslu2-setup.c 2006-09-19 20:42:06.000000000 -0700
+++ linux-2.6.18/arch/arm/mach-ixp4xx/nslu2-setup.c 2006-10-29 01:00:08.000000000 -0800
@@ -159,6 +159,8 @@
static void __init nslu2_init(void)
{
+ ixp4xx_timer_freq = NSLU2_FREQ;
+
ixp4xx_sys_init();
nslu2_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
Index: linux-2.6.18/include/asm-arm/arch-ixp4xx/platform.h
===================================================================
--- linux-2.6.18.orig/include/asm-arm/arch-ixp4xx/platform.h 2006-09-19 20:42:06.000000000 -0700
+++ linux-2.6.18/include/asm-arm/arch-ixp4xx/platform.h 2006-10-29 01:00:08.000000000 -0800
@@ -90,6 +90,11 @@
struct sys_timer;
/*
+ * Frequency of clock used for primary clocksource
+ */
+extern unsigned long ixp4xx_timer_freq;
+
+/*
* Functions used by platform-level setup code
*/
extern void ixp4xx_map_io(void);

View File

@ -1,13 +0,0 @@
Fix the interrupt of the 2nd Ethernet slot.
--- a/arch/arm/mach-iop3xx/n2100.c~ 2006-10-26 22:23:24.053694788 +0000
+++ b/arch/arm/mach-iop3xx/n2100.c 2006-10-26 22:23:41.955186517 +0000
@@ -85,7 +85,7 @@
irq = IRQ_IOP321_XINT0;
} else if (PCI_SLOT(dev->devfn) == 2) {
/* RTL8110SB #2 */
- irq = IRQ_IOP321_XINT1;
+ irq = IRQ_IOP321_XINT3;
} else if (PCI_SLOT(dev->devfn) == 3) {
/* Sil3512 */
irq = IRQ_IOP321_XINT2;

View File

@ -1,65 +0,0 @@
Allow USB and serial to co-exist on N2100 by using a platform device for
serial and IRQ 0 for serial.
--- a/arch/arm/mach-iop3xx/iop321-setup.c~ 2006-10-26 22:06:04.000000000 +0000
+++ b/arch/arm/mach-iop3xx/iop321-setup.c 2006-10-27 07:33:24.663719957 +0000
@@ -131,7 +131,7 @@
void __init iop321_map_io(void)
{
iotable_init(iop321_std_desc, ARRAY_SIZE(iop321_std_desc));
- if (!machine_is_glantank())
+ if (!machine_is_glantank() && !machine_is_n2100())
early_serial_setup(&iop321_serial_ports[0]);
}
--- a/arch/arm/mach-iop3xx/n2100.c~ 2006-10-26 22:23:24.000000000 +0000
+++ b/arch/arm/mach-iop3xx/n2100.c 2006-10-27 07:32:15.130694184 +0000
@@ -170,6 +170,40 @@
/*
+ * N2100 machine initialisation.
+ */
+
+static struct plat_serial8250_port n2100_serial_port[] = {
+ {
+ .mapbase = N2100_UART,
+ .membase = (char *)N2100_UART,
+ .irq = 0,
+ .flags = UPF_SKIP_TEST,
+ .iotype = UPIO_MEM,
+ .regshift = 0,
+ .uartclk = 1843200,
+ },
+ { },
+};
+
+static struct resource n2100_uart_resource = {
+ .start = N2100_UART,
+ .end = N2100_UART + 7,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device n2100_serial_device = {
+ .name = "serial8250",
+ .id = PLAT8250_DEV_PLATFORM,
+ .dev = {
+ .platform_data = n2100_serial_port,
+ },
+ .num_resources = 1,
+ .resource = &n2100_uart_resource,
+};
+
+
+/*
* Pull PCA9532 GPIO #8 low to power off the machine.
*/
static void n2100_power_off(void)
@@ -212,6 +246,7 @@
static void __init n2100_init_machine(void)
{
platform_device_register(&iop32x_i2c_0_controller);
+ platform_device_register(&n2100_serial_device);
pm_power_off = n2100_power_off;

View File

@ -1,26 +0,0 @@
commit c06015148fa9a3cc452ec7121b8c3f59f4a7d6ac
Author: Paul Brook <paul@codesourcery.com>
Date: Sun Sep 24 16:54:40 2006 +0100
[ARM] 3860/1: Versatile PCI config byte accesses
The ARM Versatile board PCI config space read routines are broken for byte
accesses. The access uses a byte read, so masking the bottom two bits of the
address is wrong.
I guess this is a cut/paste error from the the halfword code which uses
aligned word access+shift+mask.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
--- linux-2.6-2.6.18/arch/arm/mach-versatile/pci.c.orig 2006-11-15 01:33:12.657102390 +0100
+++ linux-2.6-2.6.18/arch/arm/mach-versatile/pci.c 2006-11-15 01:33:19.435799210 +0100
@@ -117,7 +117,6 @@
} else {
switch (size) {
case 1:
- addr &= ~3;
v = __raw_readb(addr);
break;