This fix is upstream now
svn path=/dists/trunk/linux-2.6/; revision=8400
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From: Troy Heber <troy.heber@hp.com>
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Date: Wed, 25 Oct 2006 20:46:15 +0000 (-0600)
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Subject: [IA64] move SAL_CACHE_FLUSH check later in boot
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X-Git-Url: http://www.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=fa1d19e5d9a94120f31e5783ab44758f46892d94
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[IA64] move SAL_CACHE_FLUSH check later in boot
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The check to see if the firmware drops interrupts during a
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SAL_CACHE_FLUSH is done to early in the boot. SAL_CACHE_FLUSH expects
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to be able to make PAL calls in virtual mode, on some cell based
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machines a fault occurs causing a MCA. This patch moves the check
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after mmu_context_init so the TLB and VHPT are properly setup.
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Signed-off-by Troy Heber <troy.heber@hp.com>
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Signed-off-by: Tony Luck <tony.luck@intel.com>
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---
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--- a/arch/ia64/kernel/sal.c
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+++ b/arch/ia64/kernel/sal.c
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@@ -223,12 +223,13 @@ static void __init sal_desc_ap_wakeup(vo
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*/
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static int sal_cache_flush_drops_interrupts;
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-static void __init
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+void __init
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check_sal_cache_flush (void)
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{
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unsigned long flags;
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int cpu;
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- u64 vector;
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+ u64 vector, cache_type = 3;
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+ struct ia64_sal_retval isrv;
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cpu = get_cpu();
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local_irq_save(flags);
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@@ -243,7 +244,10 @@ check_sal_cache_flush (void)
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while (!ia64_get_irr(IA64_TIMER_VECTOR))
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cpu_relax();
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- ia64_sal_cache_flush(3);
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+ SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
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+
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+ if (isrv.status)
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+ printk(KERN_ERR "SAL_CAL_FLUSH failed with %ld\n", isrv.status);
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if (ia64_get_irr(IA64_TIMER_VECTOR)) {
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vector = ia64_get_ivr();
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@@ -331,7 +335,6 @@ ia64_sal_init (struct ia64_sal_systab *s
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p += SAL_DESC_SIZE(*p);
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}
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- check_sal_cache_flush();
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}
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int
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--- a/arch/ia64/kernel/setup.c
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+++ b/arch/ia64/kernel/setup.c
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@@ -457,6 +457,8 @@ setup_arch (char **cmdline_p)
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cpu_init(); /* initialize the bootstrap CPU */
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mmu_context_init(); /* initialize context_id bitmap */
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+ check_sal_cache_flush();
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+
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#ifdef CONFIG_ACPI
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acpi_boot_init();
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#endif
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--- a/include/asm-ia64/sal.h
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+++ b/include/asm-ia64/sal.h
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@@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which,
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}
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extern s64 ia64_sal_cache_flush (u64 cache_type);
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+extern void __init check_sal_cache_flush (void);
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/* Initialize all the processor and platform level instruction and data caches */
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static inline s64
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@ -1,62 +0,0 @@
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Upstream status: unsubmitted
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Author: Troy Heber <troyh@debian.org>
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diff -urpN -urN -X /space/dontdiff linux-2.6.18/arch/ia64/kernel/sal.c new/arch/ia64/kernel/sal.c
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--- linux-2.6.18/arch/ia64/kernel/sal.c 2006-09-19 21:42:06.000000000 -0600
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+++ new/arch/ia64/kernel/sal.c 2006-10-05 10:20:11.000000000 -0600
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@@ -223,12 +223,13 @@ static void __init sal_desc_ap_wakeup(vo
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*/
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static int sal_cache_flush_drops_interrupts;
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-static void __init
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+void __init
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check_sal_cache_flush (void)
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{
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unsigned long flags;
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int cpu;
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- u64 vector;
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+ u64 vector, cache_type=3;
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+ struct ia64_sal_retval isrv;
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cpu = get_cpu();
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local_irq_save(flags);
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@@ -243,7 +244,7 @@ check_sal_cache_flush (void)
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while (!ia64_get_irr(IA64_TIMER_VECTOR))
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cpu_relax();
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- ia64_sal_cache_flush(3);
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+ SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
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if (ia64_get_irr(IA64_TIMER_VECTOR)) {
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vector = ia64_get_ivr();
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@@ -331,7 +332,6 @@ ia64_sal_init (struct ia64_sal_systab *s
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p += SAL_DESC_SIZE(*p);
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}
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- check_sal_cache_flush();
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}
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int
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diff -urpN -urN -X /space/dontdiff linux-2.6.18/arch/ia64/kernel/setup.c new/arch/ia64/kernel/setup.c
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--- linux-2.6.18/arch/ia64/kernel/setup.c 2006-09-19 21:42:06.000000000 -0600
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+++ new/arch/ia64/kernel/setup.c 2006-10-05 10:15:39.000000000 -0600
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@@ -458,6 +458,8 @@ setup_arch (char **cmdline_p)
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cpu_init(); /* initialize the bootstrap CPU */
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mmu_context_init(); /* initialize context_id bitmap */
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+ check_sal_cache_flush();
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+
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#ifdef CONFIG_ACPI
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acpi_boot_init();
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#endif
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diff -urpN -urN -X /space/dontdiff linux-2.6.18/include/asm-ia64/sal.h new/include/asm-ia64/sal.h
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--- linux-2.6.18/include/asm-ia64/sal.h 2006-09-19 21:42:06.000000000 -0600
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+++ new/include/asm-ia64/sal.h 2006-10-05 10:13:39.000000000 -0600
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@@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which,
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}
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extern s64 ia64_sal_cache_flush (u64 cache_type);
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+extern void __init check_sal_cache_flush (void);
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/* Initialize all the processor and platform level instruction and data caches */
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static inline s64
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