This fix is upstream now

svn path=/dists/trunk/linux-2.6/; revision=8400
This commit is contained in:
dann frazier 2007-03-26 22:23:53 +00:00
parent fbf9edc0f3
commit 0ec747e73e
2 changed files with 0 additions and 138 deletions

View File

@ -1,76 +0,0 @@
From: Troy Heber <troy.heber@hp.com>
Date: Wed, 25 Oct 2006 20:46:15 +0000 (-0600)
Subject: [IA64] move SAL_CACHE_FLUSH check later in boot
X-Git-Url: http://www.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=fa1d19e5d9a94120f31e5783ab44758f46892d94
[IA64] move SAL_CACHE_FLUSH check later in boot
The check to see if the firmware drops interrupts during a
SAL_CACHE_FLUSH is done to early in the boot. SAL_CACHE_FLUSH expects
to be able to make PAL calls in virtual mode, on some cell based
machines a fault occurs causing a MCA. This patch moves the check
after mmu_context_init so the TLB and VHPT are properly setup.
Signed-off-by Troy Heber <troy.heber@hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
---
--- a/arch/ia64/kernel/sal.c
+++ b/arch/ia64/kernel/sal.c
@@ -223,12 +223,13 @@ static void __init sal_desc_ap_wakeup(vo
*/
static int sal_cache_flush_drops_interrupts;
-static void __init
+void __init
check_sal_cache_flush (void)
{
unsigned long flags;
int cpu;
- u64 vector;
+ u64 vector, cache_type = 3;
+ struct ia64_sal_retval isrv;
cpu = get_cpu();
local_irq_save(flags);
@@ -243,7 +244,10 @@ check_sal_cache_flush (void)
while (!ia64_get_irr(IA64_TIMER_VECTOR))
cpu_relax();
- ia64_sal_cache_flush(3);
+ SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
+
+ if (isrv.status)
+ printk(KERN_ERR "SAL_CAL_FLUSH failed with %ld\n", isrv.status);
if (ia64_get_irr(IA64_TIMER_VECTOR)) {
vector = ia64_get_ivr();
@@ -331,7 +335,6 @@ ia64_sal_init (struct ia64_sal_systab *s
p += SAL_DESC_SIZE(*p);
}
- check_sal_cache_flush();
}
int
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -457,6 +457,8 @@ setup_arch (char **cmdline_p)
cpu_init(); /* initialize the bootstrap CPU */
mmu_context_init(); /* initialize context_id bitmap */
+ check_sal_cache_flush();
+
#ifdef CONFIG_ACPI
acpi_boot_init();
#endif
--- a/include/asm-ia64/sal.h
+++ b/include/asm-ia64/sal.h
@@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which,
}
extern s64 ia64_sal_cache_flush (u64 cache_type);
+extern void __init check_sal_cache_flush (void);
/* Initialize all the processor and platform level instruction and data caches */
static inline s64

View File

@ -1,62 +0,0 @@
Upstream status: unsubmitted
Author: Troy Heber <troyh@debian.org>
diff -urpN -urN -X /space/dontdiff linux-2.6.18/arch/ia64/kernel/sal.c new/arch/ia64/kernel/sal.c
--- linux-2.6.18/arch/ia64/kernel/sal.c 2006-09-19 21:42:06.000000000 -0600
+++ new/arch/ia64/kernel/sal.c 2006-10-05 10:20:11.000000000 -0600
@@ -223,12 +223,13 @@ static void __init sal_desc_ap_wakeup(vo
*/
static int sal_cache_flush_drops_interrupts;
-static void __init
+void __init
check_sal_cache_flush (void)
{
unsigned long flags;
int cpu;
- u64 vector;
+ u64 vector, cache_type=3;
+ struct ia64_sal_retval isrv;
cpu = get_cpu();
local_irq_save(flags);
@@ -243,7 +244,7 @@ check_sal_cache_flush (void)
while (!ia64_get_irr(IA64_TIMER_VECTOR))
cpu_relax();
- ia64_sal_cache_flush(3);
+ SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
if (ia64_get_irr(IA64_TIMER_VECTOR)) {
vector = ia64_get_ivr();
@@ -331,7 +332,6 @@ ia64_sal_init (struct ia64_sal_systab *s
p += SAL_DESC_SIZE(*p);
}
- check_sal_cache_flush();
}
int
diff -urpN -urN -X /space/dontdiff linux-2.6.18/arch/ia64/kernel/setup.c new/arch/ia64/kernel/setup.c
--- linux-2.6.18/arch/ia64/kernel/setup.c 2006-09-19 21:42:06.000000000 -0600
+++ new/arch/ia64/kernel/setup.c 2006-10-05 10:15:39.000000000 -0600
@@ -458,6 +458,8 @@ setup_arch (char **cmdline_p)
cpu_init(); /* initialize the bootstrap CPU */
mmu_context_init(); /* initialize context_id bitmap */
+ check_sal_cache_flush();
+
#ifdef CONFIG_ACPI
acpi_boot_init();
#endif
diff -urpN -urN -X /space/dontdiff linux-2.6.18/include/asm-ia64/sal.h new/include/asm-ia64/sal.h
--- linux-2.6.18/include/asm-ia64/sal.h 2006-09-19 21:42:06.000000000 -0600
+++ new/include/asm-ia64/sal.h 2006-10-05 10:13:39.000000000 -0600
@@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which,
}
extern s64 ia64_sal_cache_flush (u64 cache_type);
+extern void __init check_sal_cache_flush (void);
/* Initialize all the processor and platform level instruction and data caches */
static inline s64