[x86] pinctrl: cherryview: Add a quirk to make Acer Chromebook keyboard work again
Closes: #862723
This commit is contained in:
Ben Hutchings
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@ -415,6 +415,8 @@ linux (4.9.30-1) UNRELEASED; urgency=medium
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(Closes: #863907)
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* Add Debian package version to "hung task" log messages
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* btrfs: warn about RAID5/6 being experimental at mount time (Closes: #863290)
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* [x86] pinctrl: cherryview: Add a quirk to make Acer Chromebook keyboard
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work again (Closes: #862723)
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[ Salvatore Bonaccorso ]
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* tracing: Use strlcpy() instead of strcpy() in __trace_find_cmdline()
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94
debian/patches/bugfix/x86/pinctrl-cherryview-add-a-quirk-to-make-acer-chromebo.patch
vendored
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94
debian/patches/bugfix/x86/pinctrl-cherryview-add-a-quirk-to-make-acer-chromebo.patch
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@ -0,0 +1,94 @@
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From: Mika Westerberg <mika.westerberg@linux.intel.com>
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Date: Mon, 10 Apr 2017 13:16:33 +0300
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Subject: pinctrl: cherryview: Add a quirk to make Acer Chromebook keyboard
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work again
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Origin: https://git.kernel.org/linus/7036502783729c2aaf7a3c24c89087c58721430f
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Bug-Debian: https://bugs.debian.org/862723
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After commit 47c950d10202 ("pinctrl: cherryview: Do not add all
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southwest and north GPIOs to IRQ domain") the driver does not add all
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GPIOs to the irqdomain. The reason for that is that those GPIOs cannot
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generate IRQs at all, only GPEs (General Purpose Events). This causes
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Linux virtual IRQ numbering to change.
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However, it seems some CYAN Chromebooks, including Acer Chromebook
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hardcodes these Linux IRQ numbers in the ACPI tables of the machine.
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Since the numbering is different now, the IRQ meant for keyboard does
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not match the Linux virtual IRQ number anymore making the keyboard
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non-functional.
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Work this around by adding special quirk just for these machines where
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we add back all GPIOs to the irqdomain. Rest of the Cherryview/Braswell
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based machines will not be affected by the change.
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Link: https://bugzilla.kernel.org/show_bug.cgi?id=194945
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Fixes: 47c950d10202 ("pinctrl: cherryview: Do not add all southwest and north GPIOs to IRQ domain")
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Reported-by: Adam S Levy <theadamlevy@gmail.com>
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Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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drivers/pinctrl/intel/pinctrl-cherryview.c | 26 ++++++++++++++++++++++++--
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1 file changed, 24 insertions(+), 2 deletions(-)
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diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c
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index f80134e3e0b6..9ff790174906 100644
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--- a/drivers/pinctrl/intel/pinctrl-cherryview.c
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+++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
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@@ -13,6 +13,7 @@
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* published by the Free Software Foundation.
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*/
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+#include <linux/dmi.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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@@ -1524,10 +1525,31 @@ static void chv_gpio_irq_handler(struct irq_desc *desc)
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chained_irq_exit(chip, desc);
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}
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+/*
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+ * Certain machines seem to hardcode Linux IRQ numbers in their ACPI
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+ * tables. Since we leave GPIOs that are not capable of generating
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+ * interrupts out of the irqdomain the numbering will be different and
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+ * cause devices using the hardcoded IRQ numbers fail. In order not to
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+ * break such machines we will only mask pins from irqdomain if the machine
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+ * is not listed below.
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+ */
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+static const struct dmi_system_id chv_no_valid_mask[] = {
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+ {
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+ /* See https://bugzilla.kernel.org/show_bug.cgi?id=194945 */
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+ .ident = "Acer Chromebook (CYAN)",
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+ .matches = {
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+ DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
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+ DMI_MATCH(DMI_PRODUCT_NAME, "Edgar"),
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+ DMI_MATCH(DMI_BIOS_DATE, "05/21/2016"),
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+ },
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+ }
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+};
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+
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static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
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{
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const struct chv_gpio_pinrange *range;
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struct gpio_chip *chip = &pctrl->chip;
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+ bool need_valid_mask = !dmi_check_system(chv_no_valid_mask);
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int ret, i, offset;
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*chip = chv_gpio_chip;
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@@ -1536,7 +1558,7 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
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chip->label = dev_name(pctrl->dev);
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chip->parent = pctrl->dev;
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chip->base = -1;
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- chip->irq_need_valid_mask = true;
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+ chip->irq_need_valid_mask = need_valid_mask;
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ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl);
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if (ret) {
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@@ -1567,7 +1589,7 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
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intsel &= CHV_PADCTRL0_INTSEL_MASK;
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intsel >>= CHV_PADCTRL0_INTSEL_SHIFT;
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- if (intsel >= pctrl->community->nirqs)
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+ if (need_valid_mask && intsel >= pctrl->community->nirqs)
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clear_bit(i, chip->irq_valid_mask);
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}
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@ -53,6 +53,7 @@ debian/amd64-don-t-warn-about-expected-w+x-pages-on-xen.patch
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# Arch bug fixes
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bugfix/arm/arm-dts-kirkwood-fix-sata-pinmux-ing-for-ts419.patch
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bugfix/x86/pinctrl-cherryview-add-a-quirk-to-make-acer-chromebo.patch
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# Arch features
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features/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch
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