Compare commits
No commits in common. "master" and "v2013.10-ti-sysmocom-odu" have entirely different histories.
master
...
v2013.10-t
|
@ -0,0 +1,23 @@
|
|||
# Not Linux, so don't expect a Linux tree.
|
||||
--no-tree
|
||||
|
||||
# Temporary for false positive in checkpatch
|
||||
--ignore COMPLEX_MACRO
|
||||
|
||||
# For CONFIG_SYS_I2C_NOPROBES
|
||||
--ignore MULTISTATEMENT_MACRO_USE_DO_WHILE
|
||||
|
||||
# For simple_strtoul
|
||||
--ignore CONSIDER_KSTRTO
|
||||
|
||||
# For min/max
|
||||
--ignore MINMAX
|
||||
|
||||
# enable more tests
|
||||
--strict
|
||||
|
||||
# Not Linux, so we don't recommend usleep_range() over udelay()
|
||||
--ignore USLEEP_RANGE
|
||||
|
||||
# Ignore networking block comment style
|
||||
--ignore NETWORKING_BLOCK_COMMENT_STYLE
|
|
@ -1 +1,93 @@
|
|||
buildroot/**
|
||||
#
|
||||
# NOTE! Don't add files that are generated in specific
|
||||
# subdirectories here. Add them in the ".gitignore" file
|
||||
# in that subdirectory instead.
|
||||
#
|
||||
# Normal rules
|
||||
#
|
||||
|
||||
*.rej
|
||||
*.orig
|
||||
*.a
|
||||
*.o
|
||||
*.su
|
||||
*~
|
||||
*.swp
|
||||
*.patch
|
||||
*.bin
|
||||
*.cfgtmp
|
||||
*.dts.tmp
|
||||
|
||||
# Build tree
|
||||
/build-*
|
||||
|
||||
#
|
||||
# Top-level generic files
|
||||
#
|
||||
|
||||
/MLO*
|
||||
/SPL
|
||||
/System.map
|
||||
/u-boot
|
||||
/u-boot.hex
|
||||
/u-boot.imx
|
||||
/u-boot-with-spl.imx
|
||||
/u-boot-with-nand-spl.imx
|
||||
/u-boot.map
|
||||
/u-boot.srec
|
||||
/u-boot.ldr
|
||||
/u-boot.ldr.hex
|
||||
/u-boot.ldr.srec
|
||||
/u-boot.img
|
||||
/u-boot.kwb
|
||||
/u-boot.sha1
|
||||
/u-boot.dis
|
||||
/u-boot.lds
|
||||
/u-boot.ubl
|
||||
/u-boot.ais
|
||||
/u-boot.dtb
|
||||
/u-boot.sb
|
||||
/u-boot.bd
|
||||
/u-boot.geany
|
||||
|
||||
#
|
||||
# Generated files
|
||||
#
|
||||
|
||||
*.depend*
|
||||
/LOG
|
||||
/errlog
|
||||
/reloc_off
|
||||
|
||||
/include/generated/
|
||||
/include/spl-autoconf.mk
|
||||
/include/tpl-autoconf.mk
|
||||
asm-offsets.s
|
||||
|
||||
# stgit generated dirs
|
||||
patches-*
|
||||
.stgit-edit.txt
|
||||
|
||||
# quilt's files
|
||||
patches
|
||||
series
|
||||
|
||||
# gdb files
|
||||
.gdb_history
|
||||
|
||||
# cscope files
|
||||
cscope.*
|
||||
|
||||
# tags files
|
||||
/tags
|
||||
/ctags
|
||||
/etags
|
||||
|
||||
# gnu global files
|
||||
GPATH
|
||||
GRTAGS
|
||||
GSYMS
|
||||
GTAGS
|
||||
|
||||
# spl ais files
|
||||
/spl/*.ais
|
||||
|
|
10
CHANGELOG
10
CHANGELOG
|
@ -1,10 +0,0 @@
|
|||
CHANGELOG
|
||||
=========
|
||||
|
||||
2014-11-04 - v2.1
|
||||
* Add configurable boot-stop string support
|
||||
* Add configurable baudrate support
|
||||
* Fix memory init bug
|
||||
|
||||
2014-10-21 - v2.0
|
||||
* Initial USB support
|
|
@ -22,10 +22,6 @@ N: Guillaume Alexandre
|
|||
E: guillaume.alexandre@gespac.ch
|
||||
D: Add PCIPPC6 configuration
|
||||
|
||||
N: Swen Anderson
|
||||
E: sand@peppercon.de
|
||||
D: ERIC Support
|
||||
|
||||
N: Pantelis Antoniou
|
||||
E: panto@intracom.gr
|
||||
D: NETVIA & NETPHONE board support, ARTOS support.
|
||||
|
@ -83,12 +79,6 @@ N: Oliver Brown
|
|||
E: obrown@adventnetworks.com
|
||||
D: Port to the gw8260 board
|
||||
|
||||
N: Curt Brune
|
||||
E: curt@cucy.com
|
||||
D: Added support for Samsung S3C4510B CPU (ARM7tdmi based SoC)
|
||||
D: Added support for ESPD-Inc. EVB4510 Board
|
||||
W: http://www.cucy.com
|
||||
|
||||
N: Jonathan De Bruyne
|
||||
E: jonathan.debruyne@siemens.atea.be
|
||||
D: Port to Siemens IAD210 board
|
||||
|
@ -105,6 +95,10 @@ N: Magnus Damm
|
|||
E: damm@opensource.se
|
||||
D: 8xxrom
|
||||
|
||||
N: Richard Danter
|
||||
E: richard.danter@windriver.com
|
||||
D: Support for Wind River PPMC 7xx/74xx boards
|
||||
|
||||
N: George G. Davis
|
||||
E: gdavis@mvista.com
|
||||
D: Board ports for ADS GraphicsClient+ and Intel Assabet
|
||||
|
@ -113,7 +107,7 @@ N: Arun Dharankar
|
|||
E: ADharankar@ATTBI.Com
|
||||
D: threads / scheduler example code
|
||||
|
||||
N: Kári Davíðsson
|
||||
N: K?ri Dav??sson
|
||||
E: kd@flaga.is
|
||||
D: FLAGA DM Support
|
||||
|
||||
|
@ -130,19 +124,23 @@ N: James F. Dougherty
|
|||
E: jfd@GigabitNetworks.COM
|
||||
D: Port to the MOUSSE board
|
||||
|
||||
N: Mike Dunn
|
||||
E: mikedunn@newsguy.com
|
||||
D: Palmtreo680 board, docg4 nand flash driver
|
||||
|
||||
N: Dave Ellis
|
||||
E: DGE@sixnetio.com
|
||||
D: EEPROM Speedup, SXNI855T port
|
||||
|
||||
N: Thomas Elste
|
||||
E: info@elste.org
|
||||
D: Port for the ModNET50 Board, NET+50 CPU Port
|
||||
W: http://www.imms.de
|
||||
|
||||
N: Daniel Engström
|
||||
N: Daniel Engstr?m
|
||||
E: daniel@omicron.se
|
||||
D: x86 port, Support for sc520_cdp board
|
||||
|
||||
N: Hayden Fraser
|
||||
E: Hayden.Fraser@freescale.com
|
||||
D: Support for ColdFire MCF5253
|
||||
W: www.freescale.com
|
||||
|
||||
N: Dr. Wolfgang Grandegger
|
||||
E: wg@denx.de
|
||||
D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
|
||||
|
@ -156,9 +154,13 @@ N: Thomas Frieden
|
|||
E: ThomasF@hyperion-entertainment.com
|
||||
D: Support for AmigaOne
|
||||
|
||||
N: Paul Gortmaker
|
||||
E: paul.gortmaker@windriver.com
|
||||
D: Support for WRS SBC8347/8349 boards
|
||||
|
||||
N: Frank Gottschling
|
||||
E: fgottschling@eltec.de
|
||||
D: Support for ELTEC MHPC/BAB7xx/ELPPC boards, cfb-console, i8042, SMI LynxEM
|
||||
D: Support for ELTEC MHPC/ELPPC boards, cfb-console, i8042, SMI LynxEM
|
||||
W: www.eltec.de
|
||||
|
||||
N: Marius Groeger
|
||||
|
@ -180,11 +182,7 @@ D: Port to Walnut405 board
|
|||
|
||||
N: Andreas Heppel
|
||||
E: aheppel@sysgo.de
|
||||
D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
|
||||
|
||||
N: August Hoeraendl
|
||||
E: august.hoerandl@gmx.at
|
||||
D: Support for the logodl board (PXA2xx)
|
||||
D: CPU Support for MPC 75x
|
||||
|
||||
N: Josh Huber
|
||||
E: huber@alum.wpi.edu
|
||||
|
@ -199,8 +197,12 @@ H: Rich Ireland
|
|||
E: r.ireland@computer.org
|
||||
D: FPGA device configuration driver
|
||||
|
||||
H: Mark Jackson
|
||||
E: mpfj@mimc.co.uk
|
||||
D: Port to MIMC200 board
|
||||
|
||||
N: Gary Jennejohn
|
||||
E: garyj@jennejohn.org, gj@denx.de
|
||||
E: garyj@jennejohn.org
|
||||
D: Support for Samsung ARM920T S3C2400X, ARM920T "TRAB"
|
||||
W: www.denx.de
|
||||
|
||||
|
@ -218,6 +220,10 @@ E: mark.jonas@freescale.com
|
|||
D: Support for Freescale Total5200 platform
|
||||
W: http://www.mobilegt.com/
|
||||
|
||||
N: Mark Jonas
|
||||
E: mark.jonas@de.bosch.com
|
||||
D: Support for MPR2 board
|
||||
|
||||
N: Sam Song
|
||||
E: samsongshu@yahoo.com.cn
|
||||
D: Port to the RPXlite_DW board
|
||||
|
@ -229,6 +235,7 @@ D: Port to Windriver ppmc8260 board
|
|||
N: Sangmoon Kim
|
||||
E: dogoil@etinsys.com
|
||||
D: Support for debris board
|
||||
D: Support for KVME080 board
|
||||
|
||||
N: Frederick W. Klatt
|
||||
E: fred.klatt@windriver.com
|
||||
|
@ -243,6 +250,10 @@ E: Raghu.Krishnaprasad@fci.com
|
|||
D: Support for Adder-II MPC852T evaluation board
|
||||
W: http://www.forcecomputers.com
|
||||
|
||||
N: Sergey Kubushyn
|
||||
E: ksi@koi8.net
|
||||
D: Support for various TI DaVinci based boards.
|
||||
|
||||
N: Bernhard Kuhn
|
||||
E: bkuhn@metrowerks.com
|
||||
D Support for Coldfire CPU; Support for Motorola M5272C3 and M5282EVB boards
|
||||
|
@ -253,18 +264,18 @@ D Support for Intrinsyc CERF PXA250 board.
|
|||
|
||||
N: Thomas Lange
|
||||
E: thomas@corelatus.se
|
||||
D: Support for GTH and dbau1x00 boards; lots of PCMCIA fixes
|
||||
|
||||
N: Marc Leeman
|
||||
E: marc.leeman@barco.com
|
||||
D: Support for Barco Streaming Video Card (SVC) and Sample Compress Network (SCN)
|
||||
W: www.barco.com
|
||||
D: Support for GTH, GTH2 and dbau1x00 boards; lots of PCMCIA fixes
|
||||
|
||||
N: The LEOX team
|
||||
E: team@leox.org
|
||||
D: Support for LEOX boards, DS164x RTC
|
||||
W: http://www.leox.org
|
||||
|
||||
N: TsiChung Liew
|
||||
E: Tsi-Chung.Liew@freescale.com
|
||||
D: Support for ColdFire MCF523x, MCF532x, MCF5445x, MCF547x_8x
|
||||
W: www.freescale.com
|
||||
|
||||
N: Leif Lindholm
|
||||
E: leif.lindholm@i3micro.com
|
||||
D: Support for AMD dbau1550 board.
|
||||
|
@ -275,10 +286,20 @@ D: Support for Nios Stratix Development Kit (DK-1S10)
|
|||
D: Support for SSV ADNP/ESC1 (Nios Cyclone)
|
||||
W: http://www.li-pro.net
|
||||
|
||||
N: Dave Liu
|
||||
E: daveliu@freescale.com
|
||||
D: Support for MPC8315, MPC832x, MPC8360, MPC837x
|
||||
W: www.freescale.com
|
||||
|
||||
N: Raymond Lo
|
||||
E: lo@routefree.com
|
||||
D: Support for DOS partitions
|
||||
|
||||
N: James MacAulay
|
||||
E: james.macaulay@amirix.com
|
||||
D: Suppport for Amirix AP1000
|
||||
W: www.amirix.com
|
||||
|
||||
N: Dan Malek
|
||||
E: dan@embeddedalley.com
|
||||
D: FADSROM, the grandfather of all of this
|
||||
|
@ -301,7 +322,7 @@ N: Frank Morauf
|
|||
E: frank.morauf@salzbrenner.com
|
||||
D: Support for Embedded Planet RPX Super Board
|
||||
|
||||
N: David Müller
|
||||
N: David M?ller
|
||||
E: d.mueller@elsoft.ch
|
||||
D: Support for Samsung ARM920T SMDK2410 eval board
|
||||
|
||||
|
@ -353,9 +374,21 @@ E: dan.poirot@windriver.com
|
|||
D: Support for the Wind River sbc405, sbc8240 board
|
||||
W: http://www.windriver.com
|
||||
|
||||
N: Stelian Pop
|
||||
E: stelian@popies.net
|
||||
D: Atmel AT91CAP9ADK support
|
||||
|
||||
N: Ricardo Ribalda Delgado
|
||||
E: ricardo.ribalda@uam.es
|
||||
D: PPC440x5 (Virtex5), ML507 Board, eeprom_simul, adt7460, v5fx30teval
|
||||
D: Virtex ppc440 generic architecture
|
||||
D: Virtex ppc405 generic architecture
|
||||
W: http://www.ii.uam.es/~rribalda
|
||||
|
||||
N: Stefan Roese
|
||||
E: stefan.roese@esd-electronics.com
|
||||
D: AMCC PPC401/403/405GP Support; Windows environment support
|
||||
E: sr@denx.de
|
||||
D: AMCC PPC4xx Support
|
||||
W: http://www.denx.de
|
||||
|
||||
N: Erwin Rol
|
||||
E: erwin@muffin.org
|
||||
|
@ -377,13 +410,32 @@ N: Paolo Scaffardi
|
|||
E: arsenio@tin.it
|
||||
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more
|
||||
|
||||
N: Andre Schwarz
|
||||
E: andre.schwarz@matrix-vision.de
|
||||
D: Support for Matrix Vision boards (MVBLM7/MVBC_P/MVSMR)
|
||||
|
||||
N: Robert Schwebel
|
||||
E: r.schwebel@pengutronix.de
|
||||
D: Support for csb226, logodl and innokom boards (PXA2xx)
|
||||
D: Support for csb226 and innokom boards (PXA2xx)
|
||||
|
||||
N: Aaron Sells
|
||||
E: sellsa@embeddedplanet.com
|
||||
D: Support for EP82xxM
|
||||
|
||||
N: Art Shipkowski
|
||||
E: art@videon-central.com
|
||||
D: Support for NetSilicon NS7520
|
||||
D: Support for ColdFire MCF5275
|
||||
|
||||
N: Jeremy C. Andrus
|
||||
E: jeremy@jeremya.com
|
||||
D: ColdFire MCF5249 initialization code
|
||||
W: jeremya.com
|
||||
|
||||
N: Michal Simek
|
||||
E: monstr@monstr.eu
|
||||
D: Support for Microblaze, ML401, XUPV2P board
|
||||
W: www.monstr.eu
|
||||
|
||||
N: Yasushi Shoji
|
||||
E: yashi@atmark-techno.com
|
||||
|
@ -398,6 +450,11 @@ E: andrea.scian@dave-tech.it
|
|||
D: Port to B2 board
|
||||
W: www.dave-tech.it
|
||||
|
||||
N: Timur Tabi
|
||||
E: timur@freescale.com
|
||||
D: Support for MPC8349E-mITX
|
||||
W: www.freescale.com
|
||||
|
||||
N: Rob Taylor
|
||||
E: robt@flyingpig.com
|
||||
D: Port to MBX860T and Sandpoint8240
|
||||
|
@ -434,6 +491,11 @@ N: Martin Winistoerfer
|
|||
E: martinwinistoerfer@gmx.ch
|
||||
D: Port to MPC555/556 microcontrollers and support for cmi board
|
||||
|
||||
N: David Wu
|
||||
E: support@arcturusnetworks.com
|
||||
D: Mercury Security EP2500
|
||||
W: http://www.arcturusnetworks.com
|
||||
|
||||
N: Ming-Len Wu
|
||||
E: minglen_wu@techware.com.tw
|
||||
D: Motorola MX1ADS board support
|
||||
|
@ -452,7 +514,27 @@ E: azu@sysgo.de
|
|||
D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
|
||||
W: www.elinos.com
|
||||
|
||||
N: James MacAulay
|
||||
E: james.macaulay@amirix.com
|
||||
D: Suppport for Amirix AP1000
|
||||
W: www.amirix.com
|
||||
N: Nobuhiro Iwamatsu
|
||||
E: iwamatsu@nigauri.org
|
||||
D: Support for SuperH, MS7750SE01 and MS7722SE01 boards.
|
||||
W: http://www.nigauri.org/~iwamatsu/
|
||||
|
||||
N: Alan Lu
|
||||
E: alnalu001@gmail.com
|
||||
D: Support for Artila M-501 starter kit
|
||||
W: http://www.artila.com/
|
||||
|
||||
N: Kimmo Leppala
|
||||
E: kimmo.leppala@sysart.fi
|
||||
D: Support for Artila M-501 starter kit
|
||||
W: http://www.sysart.fi/
|
||||
|
||||
N: Timo Tuunainen
|
||||
E: timo.tuunainen@sysart.fi
|
||||
D: Support for Artila M-501 starter kit
|
||||
W: http://www.sysart.fi/
|
||||
|
||||
N: Philip Balister
|
||||
E: philip@opensdr.com
|
||||
D: Port to Lyrtech SFFSDR development board.
|
||||
W: www.opensdr.com
|
|
@ -0,0 +1,15 @@
|
|||
|
||||
GPL License Exception:
|
||||
|
||||
Even though U-Boot in general is covered by the GPL-2.0/GPL-2.0+,
|
||||
this does *not* cover the so-called "standalone" applications that
|
||||
use U-Boot services by means of the jump table provided by U-Boot
|
||||
exactly for this purpose - this is merely considered normal use of
|
||||
U-Boot, and does *not* fall under the heading of "derived work".
|
||||
|
||||
The header files "include/image.h" and "arch/*/include/asm/u-boot.h"
|
||||
define interfaces to U-Boot. Including these (unmodified) header
|
||||
files in another file is considered normal use of U-Boot, and does
|
||||
*not* fall under the heading of "derived work".
|
||||
-- Wolfgang Denk
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
U-Boot is Free Software. It is copyrighted by Wolfgang Denk and
|
||||
many others who contributed code (see the actual source code and the
|
||||
git commit messages for details). You can redistribute U-Boot and/or
|
||||
modify it under the terms of version 2 of the GNU General Public
|
||||
License as published by the Free Software Foundation. Most of it can
|
||||
also be distributed, at your option, under any later version of the
|
||||
GNU General Public License -- see individual files for exceptions.
|
||||
|
||||
NOTE! This license does *not* cover the so-called "standalone"
|
||||
applications that use U-Boot services by means of the jump table
|
||||
provided by U-Boot exactly for this purpose - this is merely
|
||||
considered normal use of U-Boot, and does *not* fall under the
|
||||
heading of "derived work" -- see file Licenses/Exceptions for
|
||||
details.
|
||||
|
||||
Also note that the GPL and the other licenses are copyrighted by
|
||||
the Free Software Foundation and other organizations, but the
|
||||
instance of code that they refer to (the U-Boot source code) is
|
||||
copyrighted by me and others who actually wrote it.
|
||||
-- Wolfgang Denk
|
||||
|
||||
|
||||
Like many other projects, U-Boot has a tradition of including big
|
||||
blocks of License headers in all files. This not only blows up the
|
||||
source code with mostly redundant information, but also makes it very
|
||||
difficult to generate License Clearing Reports. An additional problem
|
||||
is that even the same licenses are referred to by a number of
|
||||
slightly varying text blocks (full, abbreviated, different
|
||||
indentation, line wrapping and/or white space, with obsolete address
|
||||
information, ...) which makes automatic processing a nightmare.
|
||||
|
||||
To make this easier, such license headers in the source files will be
|
||||
replaced with a single line reference to Unique License Identifiers
|
||||
as defined by the Linux Foundation's SPDX project [1]. For example,
|
||||
in a source file the full "GPL v2.0 or later" header text will be
|
||||
replaced by a single line:
|
||||
|
||||
SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
Ideally, the license terms of all files in the source tree should be
|
||||
defined by such License Identifiers; in no case a file can contain
|
||||
more than one such License Identifier list.
|
||||
|
||||
If a "SPDX-License-Identifier:" line references more than one Unique
|
||||
License Identifier, then this means that the respective file can be
|
||||
used under the terms of either of these licenses, i. e. with
|
||||
|
||||
SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause
|
||||
|
||||
you can chose between GPL-2.0+ and BSD-3-Clause licensing.
|
||||
|
||||
We use the SPDX Unique License Identifiers here; these are available
|
||||
at [2].
|
||||
|
||||
[1] http://spdx.org/
|
||||
[2] http://spdx.org/licenses/
|
||||
|
||||
Full name SPDX Identifier OSI Approved File name URI
|
||||
=======================================================================================================================================
|
||||
GNU General Public License v2.0 only GPL-2.0 Y gpl-2.0.txt http://www.gnu.org/licenses/gpl-2.0.txt
|
||||
GNU General Public License v2.0 or later GPL-2.0+ Y gpl-2.0.txt http://www.gnu.org/licenses/gpl-2.0.txt
|
||||
GNU Library General Public License v2 or later LGPL-2.0+ Y lgpl-2.0.txt http://www.gnu.org/licenses/old-licenses/lgpl-2.0.txt
|
||||
GNU Lesser General Public License v2.1 or later LGPL-2.1+ Y lgpl-2.1.txt http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt
|
||||
eCos license version 2.0 eCos-2.0 eCos-2.0.txt http://www.gnu.org/licenses/ecos-license.html
|
||||
BSD 2-Clause License BSD-2-Clause Y bsd-2-clause.txt http://spdx.org/licenses/BSD-2-Clause
|
||||
BSD 3-clause "New" or "Revised" License BSD-3-Clause Y bsd-3-clause.txt http://spdx.org/licenses/BSD-3-Clause#licenseText
|
||||
IBM PIBS (PowerPC Initialization and IBM-pibs ibm-pibs.txt
|
||||
Boot Software) license
|
|
@ -0,0 +1,25 @@
|
|||
Redistribution and use in source and binary forms, with or
|
||||
without modification, are permitted provided that the following
|
||||
conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above
|
||||
copyright notice, this list of conditions and the following
|
||||
disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above
|
||||
copyright notice, this list of conditions and the following
|
||||
disclaimer in the documentation and/or other materials
|
||||
provided with the distribution.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
@ -0,0 +1,24 @@
|
|||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions, and the following disclaimer,
|
||||
without modification.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
3. The names of the above-listed copyright holders may not be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
|
||||
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
@ -0,0 +1,43 @@
|
|||
Note that this license is not endorsed by the Free Software Foundation.
|
||||
It is available here as a convenience to readers of [1]the license
|
||||
list.
|
||||
|
||||
The eCos license version 2.0
|
||||
|
||||
This file is part of eCos, the Embedded Configurable Operating System.
|
||||
Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
|
||||
|
||||
eCos is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License as published by the Free
|
||||
Software Foundation; either version 2 or (at your option) any later
|
||||
version.
|
||||
|
||||
eCos is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License along
|
||||
with eCos; if not, write to the Free Software Foundation, Inc., 51
|
||||
Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
|
||||
As a special exception, if other files instantiate templates or use
|
||||
macros or inline functions from this file, or you compile this file and
|
||||
link it with other works to produce a work based on this file, this
|
||||
file does not by itself cause the resulting work to be covered by the
|
||||
GNU General Public License. However the source code for this file must
|
||||
still be made available in accordance with section (3) of the GNU
|
||||
General Public License.
|
||||
|
||||
This exception does not invalidate any other reasons why a work based
|
||||
on this file might be covered by the GNU General Public License.
|
||||
|
||||
Alternative licenses for eCos may be arranged by contacting Red Hat,
|
||||
Inc. at http://sources.redhat.com/ecos/ecos-license/
|
||||
-------------------------------------------
|
||||
|
||||
####ECOSGPLCOPYRIGHTEND####
|
||||
|
||||
References
|
||||
|
||||
1. http://www.gnu.org/licenses/license-list.html
|
|
@ -0,0 +1,339 @@
|
|||
GNU GENERAL PUBLIC LICENSE
|
||||
Version 2, June 1991
|
||||
|
||||
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
|
||||
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
Everyone is permitted to copy and distribute verbatim copies
|
||||
of this license document, but changing it is not allowed.
|
||||
|
||||
Preamble
|
||||
|
||||
The licenses for most software are designed to take away your
|
||||
freedom to share and change it. By contrast, the GNU General Public
|
||||
License is intended to guarantee your freedom to share and change free
|
||||
software--to make sure the software is free for all its users. This
|
||||
General Public License applies to most of the Free Software
|
||||
Foundation's software and to any other program whose authors commit to
|
||||
using it. (Some other Free Software Foundation software is covered by
|
||||
the GNU Lesser General Public License instead.) You can apply it to
|
||||
your programs, too.
|
||||
|
||||
When we speak of free software, we are referring to freedom, not
|
||||
price. Our General Public Licenses are designed to make sure that you
|
||||
have the freedom to distribute copies of free software (and charge for
|
||||
this service if you wish), that you receive source code or can get it
|
||||
if you want it, that you can change the software or use pieces of it
|
||||
in new free programs; and that you know you can do these things.
|
||||
|
||||
To protect your rights, we need to make restrictions that forbid
|
||||
anyone to deny you these rights or to ask you to surrender the rights.
|
||||
These restrictions translate to certain responsibilities for you if you
|
||||
distribute copies of the software, or if you modify it.
|
||||
|
||||
For example, if you distribute copies of such a program, whether
|
||||
gratis or for a fee, you must give the recipients all the rights that
|
||||
you have. You must make sure that they, too, receive or can get the
|
||||
source code. And you must show them these terms so they know their
|
||||
rights.
|
||||
|
||||
We protect your rights with two steps: (1) copyright the software, and
|
||||
(2) offer you this license which gives you legal permission to copy,
|
||||
distribute and/or modify the software.
|
||||
|
||||
Also, for each author's protection and ours, we want to make certain
|
||||
that everyone understands that there is no warranty for this free
|
||||
software. If the software is modified by someone else and passed on, we
|
||||
want its recipients to know that what they have is not the original, so
|
||||
that any problems introduced by others will not reflect on the original
|
||||
authors' reputations.
|
||||
|
||||
Finally, any free program is threatened constantly by software
|
||||
patents. We wish to avoid the danger that redistributors of a free
|
||||
program will individually obtain patent licenses, in effect making the
|
||||
program proprietary. To prevent this, we have made it clear that any
|
||||
patent must be licensed for everyone's free use or not licensed at all.
|
||||
|
||||
The precise terms and conditions for copying, distribution and
|
||||
modification follow.
|
||||
|
||||
GNU GENERAL PUBLIC LICENSE
|
||||
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
|
||||
|
||||
0. This License applies to any program or other work which contains
|
||||
a notice placed by the copyright holder saying it may be distributed
|
||||
under the terms of this General Public License. The "Program", below,
|
||||
refers to any such program or work, and a "work based on the Program"
|
||||
means either the Program or any derivative work under copyright law:
|
||||
that is to say, a work containing the Program or a portion of it,
|
||||
either verbatim or with modifications and/or translated into another
|
||||
language. (Hereinafter, translation is included without limitation in
|
||||
the term "modification".) Each licensee is addressed as "you".
|
||||
|
||||
Activities other than copying, distribution and modification are not
|
||||
covered by this License; they are outside its scope. The act of
|
||||
running the Program is not restricted, and the output from the Program
|
||||
is covered only if its contents constitute a work based on the
|
||||
Program (independent of having been made by running the Program).
|
||||
Whether that is true depends on what the Program does.
|
||||
|
||||
1. You may copy and distribute verbatim copies of the Program's
|
||||
source code as you receive it, in any medium, provided that you
|
||||
conspicuously and appropriately publish on each copy an appropriate
|
||||
copyright notice and disclaimer of warranty; keep intact all the
|
||||
notices that refer to this License and to the absence of any warranty;
|
||||
and give any other recipients of the Program a copy of this License
|
||||
along with the Program.
|
||||
|
||||
You may charge a fee for the physical act of transferring a copy, and
|
||||
you may at your option offer warranty protection in exchange for a fee.
|
||||
|
||||
2. You may modify your copy or copies of the Program or any portion
|
||||
of it, thus forming a work based on the Program, and copy and
|
||||
distribute such modifications or work under the terms of Section 1
|
||||
above, provided that you also meet all of these conditions:
|
||||
|
||||
a) You must cause the modified files to carry prominent notices
|
||||
stating that you changed the files and the date of any change.
|
||||
|
||||
b) You must cause any work that you distribute or publish, that in
|
||||
whole or in part contains or is derived from the Program or any
|
||||
part thereof, to be licensed as a whole at no charge to all third
|
||||
parties under the terms of this License.
|
||||
|
||||
c) If the modified program normally reads commands interactively
|
||||
when run, you must cause it, when started running for such
|
||||
interactive use in the most ordinary way, to print or display an
|
||||
announcement including an appropriate copyright notice and a
|
||||
notice that there is no warranty (or else, saying that you provide
|
||||
a warranty) and that users may redistribute the program under
|
||||
these conditions, and telling the user how to view a copy of this
|
||||
License. (Exception: if the Program itself is interactive but
|
||||
does not normally print such an announcement, your work based on
|
||||
the Program is not required to print an announcement.)
|
||||
|
||||
These requirements apply to the modified work as a whole. If
|
||||
identifiable sections of that work are not derived from the Program,
|
||||
and can be reasonably considered independent and separate works in
|
||||
themselves, then this License, and its terms, do not apply to those
|
||||
sections when you distribute them as separate works. But when you
|
||||
distribute the same sections as part of a whole which is a work based
|
||||
on the Program, the distribution of the whole must be on the terms of
|
||||
this License, whose permissions for other licensees extend to the
|
||||
entire whole, and thus to each and every part regardless of who wrote it.
|
||||
|
||||
Thus, it is not the intent of this section to claim rights or contest
|
||||
your rights to work written entirely by you; rather, the intent is to
|
||||
exercise the right to control the distribution of derivative or
|
||||
collective works based on the Program.
|
||||
|
||||
In addition, mere aggregation of another work not based on the Program
|
||||
with the Program (or with a work based on the Program) on a volume of
|
||||
a storage or distribution medium does not bring the other work under
|
||||
the scope of this License.
|
||||
|
||||
3. You may copy and distribute the Program (or a work based on it,
|
||||
under Section 2) in object code or executable form under the terms of
|
||||
Sections 1 and 2 above provided that you also do one of the following:
|
||||
|
||||
a) Accompany it with the complete corresponding machine-readable
|
||||
source code, which must be distributed under the terms of Sections
|
||||
1 and 2 above on a medium customarily used for software interchange; or,
|
||||
|
||||
b) Accompany it with a written offer, valid for at least three
|
||||
years, to give any third party, for a charge no more than your
|
||||
cost of physically performing source distribution, a complete
|
||||
machine-readable copy of the corresponding source code, to be
|
||||
distributed under the terms of Sections 1 and 2 above on a medium
|
||||
customarily used for software interchange; or,
|
||||
|
||||
c) Accompany it with the information you received as to the offer
|
||||
to distribute corresponding source code. (This alternative is
|
||||
allowed only for noncommercial distribution and only if you
|
||||
received the program in object code or executable form with such
|
||||
an offer, in accord with Subsection b above.)
|
||||
|
||||
The source code for a work means the preferred form of the work for
|
||||
making modifications to it. For an executable work, complete source
|
||||
code means all the source code for all modules it contains, plus any
|
||||
associated interface definition files, plus the scripts used to
|
||||
control compilation and installation of the executable. However, as a
|
||||
special exception, the source code distributed need not include
|
||||
anything that is normally distributed (in either source or binary
|
||||
form) with the major components (compiler, kernel, and so on) of the
|
||||
operating system on which the executable runs, unless that component
|
||||
itself accompanies the executable.
|
||||
|
||||
If distribution of executable or object code is made by offering
|
||||
access to copy from a designated place, then offering equivalent
|
||||
access to copy the source code from the same place counts as
|
||||
distribution of the source code, even though third parties are not
|
||||
compelled to copy the source along with the object code.
|
||||
|
||||
4. You may not copy, modify, sublicense, or distribute the Program
|
||||
except as expressly provided under this License. Any attempt
|
||||
otherwise to copy, modify, sublicense or distribute the Program is
|
||||
void, and will automatically terminate your rights under this License.
|
||||
However, parties who have received copies, or rights, from you under
|
||||
this License will not have their licenses terminated so long as such
|
||||
parties remain in full compliance.
|
||||
|
||||
5. You are not required to accept this License, since you have not
|
||||
signed it. However, nothing else grants you permission to modify or
|
||||
distribute the Program or its derivative works. These actions are
|
||||
prohibited by law if you do not accept this License. Therefore, by
|
||||
modifying or distributing the Program (or any work based on the
|
||||
Program), you indicate your acceptance of this License to do so, and
|
||||
all its terms and conditions for copying, distributing or modifying
|
||||
the Program or works based on it.
|
||||
|
||||
6. Each time you redistribute the Program (or any work based on the
|
||||
Program), the recipient automatically receives a license from the
|
||||
original licensor to copy, distribute or modify the Program subject to
|
||||
these terms and conditions. You may not impose any further
|
||||
restrictions on the recipients' exercise of the rights granted herein.
|
||||
You are not responsible for enforcing compliance by third parties to
|
||||
this License.
|
||||
|
||||
7. If, as a consequence of a court judgment or allegation of patent
|
||||
infringement or for any other reason (not limited to patent issues),
|
||||
conditions are imposed on you (whether by court order, agreement or
|
||||
otherwise) that contradict the conditions of this License, they do not
|
||||
excuse you from the conditions of this License. If you cannot
|
||||
distribute so as to satisfy simultaneously your obligations under this
|
||||
License and any other pertinent obligations, then as a consequence you
|
||||
may not distribute the Program at all. For example, if a patent
|
||||
license would not permit royalty-free redistribution of the Program by
|
||||
all those who receive copies directly or indirectly through you, then
|
||||
the only way you could satisfy both it and this License would be to
|
||||
refrain entirely from distribution of the Program.
|
||||
|
||||
If any portion of this section is held invalid or unenforceable under
|
||||
any particular circumstance, the balance of the section is intended to
|
||||
apply and the section as a whole is intended to apply in other
|
||||
circumstances.
|
||||
|
||||
It is not the purpose of this section to induce you to infringe any
|
||||
patents or other property right claims or to contest validity of any
|
||||
such claims; this section has the sole purpose of protecting the
|
||||
integrity of the free software distribution system, which is
|
||||
implemented by public license practices. Many people have made
|
||||
generous contributions to the wide range of software distributed
|
||||
through that system in reliance on consistent application of that
|
||||
system; it is up to the author/donor to decide if he or she is willing
|
||||
to distribute software through any other system and a licensee cannot
|
||||
impose that choice.
|
||||
|
||||
This section is intended to make thoroughly clear what is believed to
|
||||
be a consequence of the rest of this License.
|
||||
|
||||
8. If the distribution and/or use of the Program is restricted in
|
||||
certain countries either by patents or by copyrighted interfaces, the
|
||||
original copyright holder who places the Program under this License
|
||||
may add an explicit geographical distribution limitation excluding
|
||||
those countries, so that distribution is permitted only in or among
|
||||
countries not thus excluded. In such case, this License incorporates
|
||||
the limitation as if written in the body of this License.
|
||||
|
||||
9. The Free Software Foundation may publish revised and/or new versions
|
||||
of the General Public License from time to time. Such new versions will
|
||||
be similar in spirit to the present version, but may differ in detail to
|
||||
address new problems or concerns.
|
||||
|
||||
Each version is given a distinguishing version number. If the Program
|
||||
specifies a version number of this License which applies to it and "any
|
||||
later version", you have the option of following the terms and conditions
|
||||
either of that version or of any later version published by the Free
|
||||
Software Foundation. If the Program does not specify a version number of
|
||||
this License, you may choose any version ever published by the Free Software
|
||||
Foundation.
|
||||
|
||||
10. If you wish to incorporate parts of the Program into other free
|
||||
programs whose distribution conditions are different, write to the author
|
||||
to ask for permission. For software which is copyrighted by the Free
|
||||
Software Foundation, write to the Free Software Foundation; we sometimes
|
||||
make exceptions for this. Our decision will be guided by the two goals
|
||||
of preserving the free status of all derivatives of our free software and
|
||||
of promoting the sharing and reuse of software generally.
|
||||
|
||||
NO WARRANTY
|
||||
|
||||
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
|
||||
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
|
||||
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
|
||||
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
|
||||
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
|
||||
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
|
||||
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
|
||||
REPAIR OR CORRECTION.
|
||||
|
||||
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
|
||||
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
|
||||
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
|
||||
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
|
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OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
|
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TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
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YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
|
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PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
|
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POSSIBILITY OF SUCH DAMAGES.
|
||||
|
||||
END OF TERMS AND CONDITIONS
|
||||
|
||||
How to Apply These Terms to Your New Programs
|
||||
|
||||
If you develop a new program, and you want it to be of the greatest
|
||||
possible use to the public, the best way to achieve this is to make it
|
||||
free software which everyone can redistribute and change under these terms.
|
||||
|
||||
To do so, attach the following notices to the program. It is safest
|
||||
to attach them to the start of each source file to most effectively
|
||||
convey the exclusion of warranty; and each file should have at least
|
||||
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|
||||
|
||||
<one line to give the program's name and a brief idea of what it does.>
|
||||
Copyright (C) <year> <name of author>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License along
|
||||
with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
|
||||
Also add information on how to contact you by electronic and paper mail.
|
||||
|
||||
If the program is interactive, make it output a short notice like this
|
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when it starts in an interactive mode:
|
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|
||||
Gnomovision version 69, Copyright (C) year name of author
|
||||
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
|
||||
This is free software, and you are welcome to redistribute it
|
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under certain conditions; type `show c' for details.
|
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|
||||
The hypothetical commands `show w' and `show c' should show the appropriate
|
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parts of the General Public License. Of course, the commands you use may
|
||||
be called something other than `show w' and `show c'; they could even be
|
||||
mouse-clicks or menu items--whatever suits your program.
|
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|
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You should also get your employer (if you work as a programmer) or your
|
||||
school, if any, to sign a "copyright disclaimer" for the program, if
|
||||
necessary. Here is a sample; alter the names:
|
||||
|
||||
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
|
||||
`Gnomovision' (which makes passes at compilers) written by James Hacker.
|
||||
|
||||
<signature of Ty Coon>, 1 April 1989
|
||||
Ty Coon, President of Vice
|
||||
|
||||
This General Public License does not permit incorporating your program into
|
||||
proprietary programs. If your program is a subroutine library, you may
|
||||
consider it more useful to permit linking proprietary applications with the
|
||||
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|
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Public License instead of this License.
|
|
@ -0,0 +1,17 @@
|
|||
This source code has been made available to you by IBM on an AS-IS
|
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
Any user of this software should understand that IBM cannot provide
|
||||
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|
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|
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|
||||
Any person who transfers this source code or any derivative work
|
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|
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|
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|
||||
COPYRIGHT I B M CORPORATION 1995
|
||||
LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
|
|
@ -0,0 +1,481 @@
|
|||
GNU LIBRARY GENERAL PUBLIC LICENSE
|
||||
Version 2, June 1991
|
||||
|
||||
Copyright (C) 1991 Free Software Foundation, Inc.
|
||||
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
Everyone is permitted to copy and distribute verbatim copies
|
||||
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|
||||
|
||||
[This is the first released version of the library GPL. It is
|
||||
numbered 2 because it goes with version 2 of the ordinary GPL.]
|
||||
|
||||
Preamble
|
||||
|
||||
The licenses for most software are designed to take away your
|
||||
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|
||||
Licenses are intended to guarantee your freedom to share and change
|
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|
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|
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This license, the Library General Public License, applies to some
|
||||
specially designated Free Software Foundation software, and to any
|
||||
other libraries whose authors decide to use it. You can use it for
|
||||
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|
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|
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When we speak of free software, we are referring to freedom, not
|
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|
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|
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|
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|
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|
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To protect your rights, we need to make restrictions that forbid
|
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|
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These restrictions translate to certain responsibilities for you if
|
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For example, if you distribute copies of the library, whether gratis
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|
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Our method of protecting your rights has two steps: (1) copyright
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Also, for each distributor's protection, we want to make certain
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Finally, any free program is threatened constantly by software
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|
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|
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|
||||
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|
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|
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Most GNU software, including some libraries, is covered by the ordinary
|
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|
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|
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|
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|
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||||
The reason we have a separate public license for some libraries is that
|
||||
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|
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|
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|
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|
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|
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Because of this blurred distinction, using the ordinary General
|
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|
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|
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|
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However, unrestricted linking of non-free programs would deprive the
|
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|
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|
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|
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The precise terms and conditions for copying, distribution and
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Note that it is possible for a library to be covered by the ordinary
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GNU LIBRARY GENERAL PUBLIC LICENSE
|
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|
||||
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|
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A "library" means a collection of software functions and/or data
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The "Library", below, refers to any such software library or work
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(For example, a function in a library to compute square roots has
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In addition, mere aggregation of another work not based on the Library
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If distribution of object code is made by offering access to copy
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When a "work that uses the Library" uses material from a header file
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That's all there is to it!
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|
@ -0,0 +1,502 @@
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|
||||
user can modify the Library and then relink to produce a modified
|
||||
executable containing the modified Library. (It is understood
|
||||
that the user who changes the contents of definitions files in the
|
||||
Library will not necessarily be able to recompile the application
|
||||
to use the modified definitions.)
|
||||
|
||||
b) Use a suitable shared library mechanism for linking with the
|
||||
Library. A suitable mechanism is one that (1) uses at run time a
|
||||
copy of the library already present on the user's computer system,
|
||||
rather than copying library functions into the executable, and (2)
|
||||
will operate properly with a modified version of the library, if
|
||||
the user installs one, as long as the modified version is
|
||||
interface-compatible with the version that the work was made with.
|
||||
|
||||
c) Accompany the work with a written offer, valid for at
|
||||
least three years, to give the same user the materials
|
||||
specified in Subsection 6a, above, for a charge no more
|
||||
than the cost of performing this distribution.
|
||||
|
||||
d) If distribution of the work is made by offering access to copy
|
||||
from a designated place, offer equivalent access to copy the above
|
||||
specified materials from the same place.
|
||||
|
||||
e) Verify that the user has already received a copy of these
|
||||
materials or that you have already sent this user a copy.
|
||||
|
||||
For an executable, the required form of the "work that uses the
|
||||
Library" must include any data and utility programs needed for
|
||||
reproducing the executable from it. However, as a special exception,
|
||||
the materials to be distributed need not include anything that is
|
||||
normally distributed (in either source or binary form) with the major
|
||||
components (compiler, kernel, and so on) of the operating system on
|
||||
which the executable runs, unless that component itself accompanies
|
||||
the executable.
|
||||
|
||||
It may happen that this requirement contradicts the license
|
||||
restrictions of other proprietary libraries that do not normally
|
||||
accompany the operating system. Such a contradiction means you cannot
|
||||
use both them and the Library together in an executable that you
|
||||
distribute.
|
||||
|
||||
7. You may place library facilities that are a work based on the
|
||||
Library side-by-side in a single library together with other library
|
||||
facilities not covered by this License, and distribute such a combined
|
||||
library, provided that the separate distribution of the work based on
|
||||
the Library and of the other library facilities is otherwise
|
||||
permitted, and provided that you do these two things:
|
||||
|
||||
a) Accompany the combined library with a copy of the same work
|
||||
based on the Library, uncombined with any other library
|
||||
facilities. This must be distributed under the terms of the
|
||||
Sections above.
|
||||
|
||||
b) Give prominent notice with the combined library of the fact
|
||||
that part of it is a work based on the Library, and explaining
|
||||
where to find the accompanying uncombined form of the same work.
|
||||
|
||||
8. You may not copy, modify, sublicense, link with, or distribute
|
||||
the Library except as expressly provided under this License. Any
|
||||
attempt otherwise to copy, modify, sublicense, link with, or
|
||||
distribute the Library is void, and will automatically terminate your
|
||||
rights under this License. However, parties who have received copies,
|
||||
or rights, from you under this License will not have their licenses
|
||||
terminated so long as such parties remain in full compliance.
|
||||
|
||||
9. You are not required to accept this License, since you have not
|
||||
signed it. However, nothing else grants you permission to modify or
|
||||
distribute the Library or its derivative works. These actions are
|
||||
prohibited by law if you do not accept this License. Therefore, by
|
||||
modifying or distributing the Library (or any work based on the
|
||||
Library), you indicate your acceptance of this License to do so, and
|
||||
all its terms and conditions for copying, distributing or modifying
|
||||
the Library or works based on it.
|
||||
|
||||
10. Each time you redistribute the Library (or any work based on the
|
||||
Library), the recipient automatically receives a license from the
|
||||
original licensor to copy, distribute, link with or modify the Library
|
||||
subject to these terms and conditions. You may not impose any further
|
||||
restrictions on the recipients' exercise of the rights granted herein.
|
||||
You are not responsible for enforcing compliance by third parties with
|
||||
this License.
|
||||
|
||||
11. If, as a consequence of a court judgment or allegation of patent
|
||||
infringement or for any other reason (not limited to patent issues),
|
||||
conditions are imposed on you (whether by court order, agreement or
|
||||
otherwise) that contradict the conditions of this License, they do not
|
||||
excuse you from the conditions of this License. If you cannot
|
||||
distribute so as to satisfy simultaneously your obligations under this
|
||||
License and any other pertinent obligations, then as a consequence you
|
||||
may not distribute the Library at all. For example, if a patent
|
||||
license would not permit royalty-free redistribution of the Library by
|
||||
all those who receive copies directly or indirectly through you, then
|
||||
the only way you could satisfy both it and this License would be to
|
||||
refrain entirely from distribution of the Library.
|
||||
|
||||
If any portion of this section is held invalid or unenforceable under any
|
||||
particular circumstance, the balance of the section is intended to apply,
|
||||
and the section as a whole is intended to apply in other circumstances.
|
||||
|
||||
It is not the purpose of this section to induce you to infringe any
|
||||
patents or other property right claims or to contest validity of any
|
||||
such claims; this section has the sole purpose of protecting the
|
||||
integrity of the free software distribution system which is
|
||||
implemented by public license practices. Many people have made
|
||||
generous contributions to the wide range of software distributed
|
||||
through that system in reliance on consistent application of that
|
||||
system; it is up to the author/donor to decide if he or she is willing
|
||||
to distribute software through any other system and a licensee cannot
|
||||
impose that choice.
|
||||
|
||||
This section is intended to make thoroughly clear what is believed to
|
||||
be a consequence of the rest of this License.
|
||||
|
||||
12. If the distribution and/or use of the Library is restricted in
|
||||
certain countries either by patents or by copyrighted interfaces, the
|
||||
original copyright holder who places the Library under this License may add
|
||||
an explicit geographical distribution limitation excluding those countries,
|
||||
so that distribution is permitted only in or among countries not thus
|
||||
excluded. In such case, this License incorporates the limitation as if
|
||||
written in the body of this License.
|
||||
|
||||
13. The Free Software Foundation may publish revised and/or new
|
||||
versions of the Lesser General Public License from time to time.
|
||||
Such new versions will be similar in spirit to the present version,
|
||||
but may differ in detail to address new problems or concerns.
|
||||
|
||||
Each version is given a distinguishing version number. If the Library
|
||||
specifies a version number of this License which applies to it and
|
||||
"any later version", you have the option of following the terms and
|
||||
conditions either of that version or of any later version published by
|
||||
the Free Software Foundation. If the Library does not specify a
|
||||
license version number, you may choose any version ever published by
|
||||
the Free Software Foundation.
|
||||
|
||||
14. If you wish to incorporate parts of the Library into other free
|
||||
programs whose distribution conditions are incompatible with these,
|
||||
write to the author to ask for permission. For software which is
|
||||
copyrighted by the Free Software Foundation, write to the Free
|
||||
Software Foundation; we sometimes make exceptions for this. Our
|
||||
decision will be guided by the two goals of preserving the free status
|
||||
of all derivatives of our free software and of promoting the sharing
|
||||
and reuse of software generally.
|
||||
|
||||
NO WARRANTY
|
||||
|
||||
15. BECAUSE THE LIBRARY IS LICENSED FREE OF CHARGE, THERE IS NO
|
||||
WARRANTY FOR THE LIBRARY, TO THE EXTENT PERMITTED BY APPLICABLE LAW.
|
||||
EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR
|
||||
OTHER PARTIES PROVIDE THE LIBRARY "AS IS" WITHOUT WARRANTY OF ANY
|
||||
KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE
|
||||
LIBRARY IS WITH YOU. SHOULD THE LIBRARY PROVE DEFECTIVE, YOU ASSUME
|
||||
THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
|
||||
|
||||
16. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN
|
||||
WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY
|
||||
AND/OR REDISTRIBUTE THE LIBRARY AS PERMITTED ABOVE, BE LIABLE TO YOU
|
||||
FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR
|
||||
CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE
|
||||
LIBRARY (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING
|
||||
RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A
|
||||
FAILURE OF THE LIBRARY TO OPERATE WITH ANY OTHER SOFTWARE), EVEN IF
|
||||
SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
|
||||
DAMAGES.
|
||||
|
||||
END OF TERMS AND CONDITIONS
|
||||
|
||||
How to Apply These Terms to Your New Libraries
|
||||
|
||||
If you develop a new library, and you want it to be of the greatest
|
||||
possible use to the public, we recommend making it free software that
|
||||
everyone can redistribute and change. You can do so by permitting
|
||||
redistribution under these terms (or, alternatively, under the terms of the
|
||||
ordinary General Public License).
|
||||
|
||||
To apply these terms, attach the following notices to the library. It is
|
||||
safest to attach them to the start of each source file to most effectively
|
||||
convey the exclusion of warranty; and each file should have at least the
|
||||
"copyright" line and a pointer to where the full notice is found.
|
||||
|
||||
<one line to give the library's name and a brief idea of what it does.>
|
||||
Copyright (C) <year> <name of author>
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with this library; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
|
||||
Also add information on how to contact you by electronic and paper mail.
|
||||
|
||||
You should also get your employer (if you work as a programmer) or your
|
||||
school, if any, to sign a "copyright disclaimer" for the library, if
|
||||
necessary. Here is a sample; alter the names:
|
||||
|
||||
Yoyodyne, Inc., hereby disclaims all copyright interest in the
|
||||
library `Frob' (a library for tweaking knobs) written by James Random Hacker.
|
||||
|
||||
<signature of Ty Coon>, 1 April 1990
|
||||
Ty Coon, President of Vice
|
||||
|
||||
That's all there is to it!
|
|
@ -0,0 +1,861 @@
|
|||
#!/bin/bash
|
||||
# Tool mainly for U-Boot Quality Assurance: build one or more board
|
||||
# configurations with minimal verbosity, showing only warnings and
|
||||
# errors.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
usage()
|
||||
{
|
||||
# if exiting with 0, write to stdout, else write to stderr
|
||||
local ret=${1:-0}
|
||||
[ "${ret}" -eq 1 ] && exec 1>&2
|
||||
cat <<-EOF
|
||||
Usage: MAKEALL [options] [--] [boards-to-build]
|
||||
|
||||
Options:
|
||||
-a ARCH, --arch ARCH Build all boards with arch ARCH
|
||||
-c CPU, --cpu CPU Build all boards with cpu CPU
|
||||
-v VENDOR, --vendor VENDOR Build all boards with vendor VENDOR
|
||||
-s SOC, --soc SOC Build all boards with soc SOC
|
||||
-l, --list List all targets to be built
|
||||
-m, --maintainers List all targets and maintainer email
|
||||
-M, --mails List all targets and all affilated emails
|
||||
-C, --check Enable build checking
|
||||
-n, --continue Continue (skip boards already built)
|
||||
-r, --rebuild-errors Rebuild any boards that errored
|
||||
-h, --help This help output
|
||||
|
||||
Selections by these options are logically ANDed; if the same option
|
||||
is used repeatedly, such selections are ORed. So "-v FOO -v BAR"
|
||||
will select all configurations where the vendor is either FOO or
|
||||
BAR. Any additional arguments specified on the command line are
|
||||
always build additionally. See the boards.cfg file for more info.
|
||||
|
||||
If no boards are specified, then the default is "powerpc".
|
||||
|
||||
Environment variables:
|
||||
BUILD_NCPUS number of parallel make jobs (default: auto)
|
||||
CROSS_COMPILE cross-compiler toolchain prefix (default: "")
|
||||
CROSS_COMPILE_<ARCH> cross-compiler toolchain prefix for
|
||||
architecture "ARCH". Substitute "ARCH" for any
|
||||
supported architecture (default: "")
|
||||
MAKEALL_LOGDIR output all logs to here (default: ./LOG/)
|
||||
BUILD_DIR output build directory (default: ./)
|
||||
BUILD_NBUILDS number of parallel targets (default: 1)
|
||||
|
||||
Examples:
|
||||
- build all Power Architecture boards:
|
||||
MAKEALL -a powerpc
|
||||
MAKEALL --arch powerpc
|
||||
MAKEALL powerpc
|
||||
- build all PowerPC boards manufactured by vendor "esd":
|
||||
MAKEALL -a powerpc -v esd
|
||||
- build all PowerPC boards manufactured either by "keymile" or "siemens":
|
||||
MAKEALL -a powerpc -v keymile -v siemens
|
||||
- build all Freescale boards with MPC83xx CPUs, plus all 4xx boards:
|
||||
MAKEALL -c mpc83xx -v freescale 4xx
|
||||
EOF
|
||||
exit ${ret}
|
||||
}
|
||||
|
||||
SHORT_OPTS="ha:c:v:s:lmMCnr"
|
||||
LONG_OPTS="help,arch:,cpu:,vendor:,soc:,list,maintainers,mails,check,continue,rebuild-errors"
|
||||
|
||||
# Option processing based on util-linux-2.13/getopt-parse.bash
|
||||
|
||||
# Note that we use `"$@"' to let each command-line parameter expand to a
|
||||
# separate word. The quotes around `$@' are essential!
|
||||
# We need TEMP as the `eval set --' would nuke the return value of
|
||||
# getopt.
|
||||
TEMP=`getopt -o ${SHORT_OPTS} --long ${LONG_OPTS} \
|
||||
-n 'MAKEALL' -- "$@"`
|
||||
|
||||
[ $? != 0 ] && usage 1
|
||||
|
||||
# Note the quotes around `$TEMP': they are essential!
|
||||
eval set -- "$TEMP"
|
||||
|
||||
SELECTED=''
|
||||
ONLY_LIST=''
|
||||
PRINT_MAINTS=''
|
||||
MAINTAINERS_ONLY=''
|
||||
CONTINUE=''
|
||||
REBUILD_ERRORS=''
|
||||
|
||||
while true ; do
|
||||
case "$1" in
|
||||
-a|--arch)
|
||||
# echo "Option ARCH: argument \`$2'"
|
||||
if [ "$opt_a" ] ; then
|
||||
opt_a="${opt_a%)} || \$2 == \"$2\")"
|
||||
else
|
||||
opt_a="(\$2 == \"$2\")"
|
||||
fi
|
||||
SELECTED='y'
|
||||
shift 2 ;;
|
||||
-c|--cpu)
|
||||
# echo "Option CPU: argument \`$2'"
|
||||
if [ "$opt_c" ] ; then
|
||||
opt_c="${opt_c%)} || \$3 == \"$2\" || \$3 ~ /$2:/)"
|
||||
else
|
||||
opt_c="(\$3 == \"$2\" || \$3 ~ /$2:/)"
|
||||
fi
|
||||
SELECTED='y'
|
||||
shift 2 ;;
|
||||
-s|--soc)
|
||||
# echo "Option SoC: argument \`$2'"
|
||||
if [ "$opt_s" ] ; then
|
||||
opt_s="${opt_s%)} || \$4 == \"$2\" || \$4 ~ /$2/)"
|
||||
else
|
||||
opt_s="(\$4 == \"$2\" || \$4 ~ /$2/)"
|
||||
fi
|
||||
SELECTED='y'
|
||||
shift 2 ;;
|
||||
-v|--vendor)
|
||||
# echo "Option VENDOR: argument \`$2'"
|
||||
if [ "$opt_v" ] ; then
|
||||
opt_v="${opt_v%)} || \$5 == \"$2\")"
|
||||
else
|
||||
opt_v="(\$5 == \"$2\")"
|
||||
fi
|
||||
SELECTED='y'
|
||||
shift 2 ;;
|
||||
-C|--check)
|
||||
CHECK='C=1'
|
||||
shift ;;
|
||||
-n|--continue)
|
||||
CONTINUE='y'
|
||||
shift ;;
|
||||
-r|--rebuild-errors)
|
||||
REBUILD_ERRORS='y'
|
||||
shift ;;
|
||||
-l|--list)
|
||||
ONLY_LIST='y'
|
||||
shift ;;
|
||||
-m|--maintainers)
|
||||
ONLY_LIST='y'
|
||||
PRINT_MAINTS='y'
|
||||
MAINTAINERS_ONLY='y'
|
||||
shift ;;
|
||||
-M|--mails)
|
||||
ONLY_LIST='y'
|
||||
PRINT_MAINTS='y'
|
||||
shift ;;
|
||||
-h|--help)
|
||||
usage ;;
|
||||
--)
|
||||
shift ; break ;;
|
||||
*)
|
||||
echo "Internal error!" >&2 ; exit 1 ;;
|
||||
esac
|
||||
done
|
||||
# echo "Remaining arguments:"
|
||||
# for arg do echo '--> '"\`$arg'" ; done
|
||||
|
||||
FILTER="\$1 !~ /^#/"
|
||||
[ "$opt_a" ] && FILTER="${FILTER} && $opt_a"
|
||||
[ "$opt_c" ] && FILTER="${FILTER} && $opt_c"
|
||||
[ "$opt_s" ] && FILTER="${FILTER} && $opt_s"
|
||||
[ "$opt_v" ] && FILTER="${FILTER} && $opt_v"
|
||||
|
||||
if [ "$SELECTED" ] ; then
|
||||
SELECTED=$(awk '('"$FILTER"') { print $7 }' boards.cfg)
|
||||
|
||||
# Make sure some boards from boards.cfg are actually found
|
||||
if [ -z "$SELECTED" ] ; then
|
||||
echo "Error: No boards selected, invalid arguments"
|
||||
exit 1
|
||||
fi
|
||||
fi
|
||||
|
||||
#########################################################################
|
||||
|
||||
# Print statistics when we exit
|
||||
trap exit 1 2 3 15
|
||||
trap print_stats 0
|
||||
|
||||
# Determine number of CPU cores if no default was set
|
||||
: ${BUILD_NCPUS:="`getconf _NPROCESSORS_ONLN`"}
|
||||
|
||||
if [ "$BUILD_NCPUS" -gt 1 ]
|
||||
then
|
||||
JOBS="-j $((BUILD_NCPUS + 1))"
|
||||
else
|
||||
JOBS=""
|
||||
fi
|
||||
|
||||
if [ "${MAKEALL_LOGDIR}" ] ; then
|
||||
LOG_DIR=${MAKEALL_LOGDIR}
|
||||
else
|
||||
LOG_DIR="LOG"
|
||||
fi
|
||||
|
||||
: ${BUILD_NBUILDS:=1}
|
||||
BUILD_MANY=0
|
||||
|
||||
if [ "${BUILD_NBUILDS}" -gt 1 ] ; then
|
||||
BUILD_MANY=1
|
||||
: ${BUILD_DIR:=./build}
|
||||
mkdir -p "${BUILD_DIR}/ERR"
|
||||
find "${BUILD_DIR}/ERR/" -type f -exec rm -f {} +
|
||||
fi
|
||||
|
||||
: ${BUILD_DIR:=.}
|
||||
|
||||
OUTPUT_PREFIX="${BUILD_DIR}"
|
||||
|
||||
[ -d ${LOG_DIR} ] || mkdir "${LOG_DIR}" || exit 1
|
||||
if [ "$CONTINUE" != 'y' -a "$REBUILD_ERRORS" != 'y' ] ; then
|
||||
find "${LOG_DIR}/" -type f -exec rm -f {} +
|
||||
fi
|
||||
|
||||
LIST=""
|
||||
|
||||
# Keep track of the number of builds and errors
|
||||
ERR_CNT=0
|
||||
ERR_LIST=""
|
||||
WRN_CNT=0
|
||||
WRN_LIST=""
|
||||
TOTAL_CNT=0
|
||||
SKIP_CNT=0
|
||||
CURRENT_CNT=0
|
||||
OLDEST_IDX=1
|
||||
RC=0
|
||||
|
||||
# Helper funcs for parsing boards.cfg
|
||||
boards_by_field()
|
||||
{
|
||||
FS="[ \t]+"
|
||||
[ -n "$3" ] && FS="$3"
|
||||
awk \
|
||||
-v field="$1" \
|
||||
-v select="$2" \
|
||||
-F "$FS" \
|
||||
'($1 !~ /^#/ && $field == select) { print $7 }' \
|
||||
boards.cfg
|
||||
}
|
||||
boards_by_arch() { boards_by_field 2 "$@" ; }
|
||||
boards_by_cpu() { boards_by_field 3 "$@" "[: \t]+" ; }
|
||||
boards_by_soc() { boards_by_field 4 "$@" ; }
|
||||
|
||||
#########################################################################
|
||||
## MPC5xx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_5xx="$(boards_by_cpu mpc5xx)"
|
||||
|
||||
#########################################################################
|
||||
## MPC5xxx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_5xxx="$(boards_by_cpu mpc5xxx)"
|
||||
|
||||
#########################################################################
|
||||
## MPC512x Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_512x="$(boards_by_cpu mpc512x)"
|
||||
|
||||
#########################################################################
|
||||
## MPC8xx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_8xx="$(boards_by_cpu mpc8xx)"
|
||||
|
||||
#########################################################################
|
||||
## PPC4xx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_4xx="$(boards_by_cpu ppc4xx)"
|
||||
|
||||
#########################################################################
|
||||
## MPC824x Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_824x="$(boards_by_cpu mpc824x)"
|
||||
|
||||
#########################################################################
|
||||
## MPC8260 Systems (includes 8250, 8255 etc.)
|
||||
#########################################################################
|
||||
|
||||
LIST_8260="$(boards_by_cpu mpc8260)"
|
||||
|
||||
#########################################################################
|
||||
## MPC83xx Systems (includes 8349, etc.)
|
||||
#########################################################################
|
||||
|
||||
LIST_83xx="$(boards_by_cpu mpc83xx)"
|
||||
|
||||
#########################################################################
|
||||
## MPC85xx Systems (includes 8540, 8560 etc.)
|
||||
#########################################################################
|
||||
|
||||
LIST_85xx="$(boards_by_cpu mpc85xx)"
|
||||
|
||||
#########################################################################
|
||||
## MPC86xx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_86xx="$(boards_by_cpu mpc86xx)"
|
||||
|
||||
#########################################################################
|
||||
## 74xx/7xx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_74xx_7xx="$(boards_by_cpu 74xx_7xx)"
|
||||
|
||||
#########################################################################
|
||||
## PowerPC groups
|
||||
#########################################################################
|
||||
|
||||
LIST_TSEC=" \
|
||||
${LIST_83xx} \
|
||||
${LIST_85xx} \
|
||||
${LIST_86xx} \
|
||||
"
|
||||
|
||||
LIST_powerpc=" \
|
||||
${LIST_5xx} \
|
||||
${LIST_512x} \
|
||||
${LIST_5xxx} \
|
||||
${LIST_8xx} \
|
||||
${LIST_824x} \
|
||||
${LIST_8260} \
|
||||
${LIST_83xx} \
|
||||
${LIST_85xx} \
|
||||
${LIST_86xx} \
|
||||
${LIST_4xx} \
|
||||
${LIST_74xx_7xx}\
|
||||
"
|
||||
|
||||
# Alias "ppc" -> "powerpc" to not break compatibility with older scripts
|
||||
# still using "ppc" instead of "powerpc"
|
||||
LIST_ppc=" \
|
||||
${LIST_powerpc} \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## StrongARM Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_SA="$(boards_by_cpu sa1100)"
|
||||
|
||||
#########################################################################
|
||||
## ARM7 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_ARM7="$(boards_by_cpu arm720t)"
|
||||
|
||||
#########################################################################
|
||||
## ARM9 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_ARM9="$(boards_by_cpu arm920t) \
|
||||
$(boards_by_cpu arm926ejs) \
|
||||
$(boards_by_cpu arm946es) \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## ARM11 Systems
|
||||
#########################################################################
|
||||
LIST_ARM11="$(boards_by_cpu arm1136) \
|
||||
$(boards_by_cpu arm1176) \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## ARMV7 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_ARMV7="$(boards_by_cpu armv7)"
|
||||
|
||||
#########################################################################
|
||||
## AT91 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_at91="$(boards_by_soc at91)"
|
||||
|
||||
#########################################################################
|
||||
## Xscale Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_pxa="$(boards_by_cpu pxa)"
|
||||
|
||||
LIST_ixp="$(boards_by_cpu ixp)"
|
||||
|
||||
#########################################################################
|
||||
## SPEAr Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_spear="$(boards_by_soc spear)"
|
||||
|
||||
#########################################################################
|
||||
## ARM groups
|
||||
#########################################################################
|
||||
|
||||
LIST_arm="$(boards_by_arch arm)"
|
||||
|
||||
#########################################################################
|
||||
## MIPS Systems (default = big endian)
|
||||
#########################################################################
|
||||
|
||||
LIST_mips4kc=" \
|
||||
incaip \
|
||||
incaip_100MHz \
|
||||
incaip_133MHz \
|
||||
incaip_150MHz \
|
||||
qemu_mips \
|
||||
vct_platinum \
|
||||
vct_platinum_small \
|
||||
vct_platinum_onenand \
|
||||
vct_platinum_onenand_small \
|
||||
vct_platinumavc \
|
||||
vct_platinumavc_small \
|
||||
vct_platinumavc_onenand \
|
||||
vct_platinumavc_onenand_small \
|
||||
vct_premium \
|
||||
vct_premium_small \
|
||||
vct_premium_onenand \
|
||||
vct_premium_onenand_small \
|
||||
"
|
||||
|
||||
LIST_au1xx0=" \
|
||||
dbau1000 \
|
||||
dbau1100 \
|
||||
dbau1500 \
|
||||
dbau1550 \
|
||||
"
|
||||
|
||||
LIST_mips=" \
|
||||
${LIST_mips4kc} \
|
||||
${LIST_mips5kc} \
|
||||
${LIST_au1xx0} \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## MIPS Systems (little endian)
|
||||
#########################################################################
|
||||
|
||||
LIST_au1xx0_el=" \
|
||||
dbau1550_el \
|
||||
pb1000 \
|
||||
"
|
||||
LIST_mips_el=" \
|
||||
${LIST_au1xx0_el} \
|
||||
"
|
||||
#########################################################################
|
||||
## OpenRISC Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_openrisc="$(boards_by_arch openrisc)"
|
||||
|
||||
#########################################################################
|
||||
## x86 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_x86="$(boards_by_arch x86)"
|
||||
|
||||
#########################################################################
|
||||
## Nios-II Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_nios2="$(boards_by_arch nios2)"
|
||||
|
||||
#########################################################################
|
||||
## MicroBlaze Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_microblaze="$(boards_by_arch microblaze)"
|
||||
|
||||
#########################################################################
|
||||
## ColdFire Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_m68k="$(boards_by_arch m68k)"
|
||||
LIST_coldfire=${LIST_m68k}
|
||||
|
||||
#########################################################################
|
||||
## AVR32 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_avr32="$(boards_by_arch avr32)"
|
||||
|
||||
#########################################################################
|
||||
## Blackfin Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_blackfin="$(boards_by_arch blackfin)"
|
||||
|
||||
#########################################################################
|
||||
## SH Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_sh2="$(boards_by_cpu sh2)"
|
||||
LIST_sh3="$(boards_by_cpu sh3)"
|
||||
LIST_sh4="$(boards_by_cpu sh4)"
|
||||
|
||||
LIST_sh="$(boards_by_arch sh)"
|
||||
|
||||
#########################################################################
|
||||
## SPARC Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_sparc="$(boards_by_arch sparc)"
|
||||
|
||||
#########################################################################
|
||||
## NDS32 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_nds32="$(boards_by_arch nds32)"
|
||||
|
||||
#-----------------------------------------------------------------------
|
||||
|
||||
get_target_location() {
|
||||
local target=$1
|
||||
local BOARD_NAME=""
|
||||
local CONFIG_NAME=""
|
||||
local board=""
|
||||
local vendor=""
|
||||
|
||||
# Automatic mode
|
||||
local line=`awk -F '\ +' '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
|
||||
if [ -z "${line}" ] ; then echo "" ; return ; fi
|
||||
|
||||
set ${line}
|
||||
|
||||
CONFIG_NAME="${7%_config}"
|
||||
|
||||
[ "${BOARD_NAME}" ] || BOARD_NAME="${7%_config}"
|
||||
|
||||
if [ $# -gt 5 ]; then
|
||||
if [ "$6" = "-" ] ; then
|
||||
board=${BOARD_NAME}
|
||||
else
|
||||
board="$6"
|
||||
fi
|
||||
fi
|
||||
|
||||
[ $# -gt 4 ] && [ "$5" != "-" ] && vendor="$5"
|
||||
[ $# -gt 6 ] && [ "$8" != "-" ] && {
|
||||
tmp="${8%:*}"
|
||||
if [ "$tmp" ] ; then
|
||||
CONFIG_NAME="$tmp"
|
||||
fi
|
||||
}
|
||||
|
||||
# Assign board directory to BOARDIR variable
|
||||
if [ "${vendor}" == "-" ] ; then
|
||||
BOARDDIR=${board}
|
||||
else
|
||||
BOARDDIR=${vendor}/${board}
|
||||
fi
|
||||
|
||||
echo "${CONFIG_NAME}:${BOARDDIR}:${BOARD_NAME}"
|
||||
}
|
||||
|
||||
get_target_maintainers() {
|
||||
local name=`echo $1 | cut -d : -f 3`
|
||||
|
||||
local line=`awk -F '\ +' '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
|
||||
if [ -z "${line}" ]; then
|
||||
echo ""
|
||||
return ;
|
||||
fi
|
||||
|
||||
local mails=`echo ${line} | cut -d ' ' -f 9- | sed -e 's/[^<]*<//' -e 's/>.*</ /' -e 's/>[^>]*$//'`
|
||||
[ "$mails" == "-" ] && mails=""
|
||||
echo "$mails"
|
||||
}
|
||||
|
||||
get_target_arch() {
|
||||
local target=$1
|
||||
|
||||
# Automatic mode
|
||||
local line=`egrep -i "^[[:space:]]*${target}[[:space:]]" boards.cfg`
|
||||
|
||||
if [ -z "${line}" ] ; then echo "" ; return ; fi
|
||||
|
||||
set ${line}
|
||||
echo "$2"
|
||||
}
|
||||
|
||||
list_target() {
|
||||
if [ "$PRINT_MAINTS" != 'y' ] ; then
|
||||
echo "$1"
|
||||
return
|
||||
fi
|
||||
|
||||
echo -n "$1:"
|
||||
|
||||
local loc=`get_target_location $1`
|
||||
|
||||
if [ -z "${loc}" ] ; then echo "ERROR" ; return ; fi
|
||||
|
||||
local maintainers_result=`get_target_maintainers ${loc} | tr " " "\n"`
|
||||
|
||||
if [ "$MAINTAINERS_ONLY" != 'y' ] ; then
|
||||
|
||||
local dir=`echo ${loc} | cut -d ":" -f 2`
|
||||
local cfg=`echo ${loc} | cut -d ":" -f 1`
|
||||
local git_result=`git log --format=%aE board/${dir} \
|
||||
include/configs/${cfg}.h | grep "@"`
|
||||
local git_result_recent=`echo ${git_result} | tr " " "\n" | \
|
||||
head -n 3`
|
||||
local git_result_top=`echo ${git_result} | tr " " "\n" | \
|
||||
sort | uniq -c | sort -nr | head -n 3 | \
|
||||
sed "s/^ \+[0-9]\+ \+//"`
|
||||
|
||||
echo -e "$git_result_recent\n$git_result_top\n$maintainers_result" | \
|
||||
sort -u | tr "\n" " " | sed "s/ $//" ;
|
||||
else
|
||||
echo -e "$maintainers_result" | sort -u | tr "\n" " " | \
|
||||
sed "s/ $//" ;
|
||||
fi
|
||||
|
||||
echo ""
|
||||
}
|
||||
|
||||
# Each finished build will have a file called ${donep}${n},
|
||||
# where n is the index of the build. Each build
|
||||
# we've already noted as finished will have ${skipp}${n}.
|
||||
# The code managing the build process will use this information
|
||||
# to ensure that only BUILD_NBUILDS builds are in flight at once
|
||||
donep="${LOG_DIR}/._done_"
|
||||
skipp="${LOG_DIR}/._skip_"
|
||||
|
||||
build_target_killed() {
|
||||
echo "Aborted $target build."
|
||||
# Remove the logs for this board since it was aborted
|
||||
rm -f ${LOG_DIR}/$target.MAKELOG ${LOG_DIR}/$target.ERR
|
||||
exit
|
||||
}
|
||||
|
||||
build_target() {
|
||||
target=$1
|
||||
build_idx=$2
|
||||
|
||||
if [ "$ONLY_LIST" == 'y' ] ; then
|
||||
list_target ${target}
|
||||
return
|
||||
fi
|
||||
|
||||
if [ $BUILD_MANY == 1 ] ; then
|
||||
output_dir="${OUTPUT_PREFIX}/${target}"
|
||||
mkdir -p "${output_dir}"
|
||||
trap build_target_killed TERM
|
||||
else
|
||||
output_dir="${OUTPUT_PREFIX}"
|
||||
fi
|
||||
|
||||
export BUILD_DIR="${output_dir}"
|
||||
|
||||
target_arch=$(get_target_arch ${target})
|
||||
eval cross_toolchain=\$CROSS_COMPILE_`echo $target_arch | tr '[:lower:]' '[:upper:]'`
|
||||
if [ "${cross_toolchain}" ] ; then
|
||||
MAKE="make CROSS_COMPILE=${cross_toolchain}"
|
||||
elif [ "${CROSS_COMPILE}" ] ; then
|
||||
MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
|
||||
else
|
||||
MAKE=make
|
||||
fi
|
||||
|
||||
${MAKE} distclean >/dev/null
|
||||
${MAKE} -s ${target}_config
|
||||
|
||||
${MAKE} ${JOBS} ${CHECK} all \
|
||||
>${LOG_DIR}/$target.MAKELOG 2> ${LOG_DIR}/$target.ERR
|
||||
|
||||
# Check for 'make' errors
|
||||
if [ ${PIPESTATUS[0]} -ne 0 ] ; then
|
||||
RC=1
|
||||
fi
|
||||
|
||||
if [ $BUILD_MANY == 1 ] ; then
|
||||
trap - TERM
|
||||
|
||||
${MAKE} -s tidy
|
||||
|
||||
if [ -s ${LOG_DIR}/${target}.ERR ] ; then
|
||||
cp ${LOG_DIR}/${target}.ERR ${OUTPUT_PREFIX}/ERR/${target}
|
||||
else
|
||||
rm ${LOG_DIR}/${target}.ERR
|
||||
fi
|
||||
else
|
||||
if [ -s ${LOG_DIR}/${target}.ERR ] ; then
|
||||
if grep -iw error ${LOG_DIR}/${target}.ERR ; then
|
||||
: $(( ERR_CNT += 1 ))
|
||||
ERR_LIST="${ERR_LIST} $target"
|
||||
else
|
||||
: $(( WRN_CNT += 1 ))
|
||||
WRN_LIST="${WRN_LIST} $target"
|
||||
fi
|
||||
else
|
||||
rm ${LOG_DIR}/${target}.ERR
|
||||
fi
|
||||
fi
|
||||
|
||||
OBJS=${output_dir}/u-boot
|
||||
if [ -e ${output_dir}/spl/u-boot-spl ]; then
|
||||
OBJS="${OBJS} ${output_dir}/spl/u-boot-spl"
|
||||
fi
|
||||
|
||||
${CROSS_COMPILE}size ${OBJS} | tee -a ${LOG_DIR}/$target.MAKELOG
|
||||
|
||||
[ -e "${LOG_DIR}/${target}.ERR" ] && cat "${LOG_DIR}/${target}.ERR"
|
||||
|
||||
touch "${donep}${build_idx}"
|
||||
}
|
||||
|
||||
manage_builds() {
|
||||
search_idx=${OLDEST_IDX}
|
||||
if [ "$ONLY_LIST" == 'y' ] ; then return ; fi
|
||||
|
||||
while true; do
|
||||
if [ -e "${donep}${search_idx}" ] ; then
|
||||
: $(( CURRENT_CNT-- ))
|
||||
[ ${OLDEST_IDX} -eq ${search_idx} ] &&
|
||||
: $(( OLDEST_IDX++ ))
|
||||
|
||||
# Only want to count it once
|
||||
rm -f "${donep}${search_idx}"
|
||||
touch "${skipp}${search_idx}"
|
||||
elif [ -e "${skipp}${search_idx}" ] ; then
|
||||
[ ${OLDEST_IDX} -eq ${search_idx} ] &&
|
||||
: $(( OLDEST_IDX++ ))
|
||||
fi
|
||||
: $(( search_idx++ ))
|
||||
if [ ${search_idx} -gt ${TOTAL_CNT} ] ; then
|
||||
if [ ${CURRENT_CNT} -ge ${BUILD_NBUILDS} ] ; then
|
||||
search_idx=${OLDEST_IDX}
|
||||
sleep 1
|
||||
else
|
||||
break
|
||||
fi
|
||||
fi
|
||||
done
|
||||
}
|
||||
|
||||
build_targets() {
|
||||
for t in "$@" ; do
|
||||
# If a LIST_xxx var exists, use it. But avoid variable
|
||||
# expansion in the eval when a board name contains certain
|
||||
# characters that the shell interprets.
|
||||
case ${t} in
|
||||
*[-+=]*) list= ;;
|
||||
*) list=$(eval echo '${LIST_'$t'}') ;;
|
||||
esac
|
||||
if [ -n "${list}" ] ; then
|
||||
build_targets ${list}
|
||||
else
|
||||
: $((TOTAL_CNT += 1))
|
||||
: $((CURRENT_CNT += 1))
|
||||
rm -f "${donep}${TOTAL_CNT}"
|
||||
rm -f "${skipp}${TOTAL_CNT}"
|
||||
if [ "$CONTINUE" = 'y' -a -e ${LOG_DIR}/$t.MAKELOG ] ; then
|
||||
: $((SKIP_CNT += 1))
|
||||
touch "${donep}${TOTAL_CNT}"
|
||||
elif [ "$REBUILD_ERRORS" = 'y' -a ! -e ${LOG_DIR}/$t.ERR ] ; then
|
||||
: $((SKIP_CNT += 1))
|
||||
touch "${donep}${TOTAL_CNT}"
|
||||
else
|
||||
if [ $BUILD_MANY == 1 ] ; then
|
||||
build_target ${t} ${TOTAL_CNT} &
|
||||
else
|
||||
CUR_TGT="${t}"
|
||||
build_target ${t} ${TOTAL_CNT}
|
||||
CUR_TGT=''
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
|
||||
# We maintain a running count of all the builds we have done.
|
||||
# Each finished build will have a file called ${donep}${n},
|
||||
# where n is the index of the build. Each build
|
||||
# we've already noted as finished will have ${skipp}${n}.
|
||||
# We track the current index via TOTAL_CNT, and the oldest
|
||||
# index. When we exceed the maximum number of parallel builds,
|
||||
# We look from oldest to current for builds that have completed,
|
||||
# and update the current count and oldest index as appropriate.
|
||||
# If we've gone through the entire list, wait a second, and
|
||||
# reprocess the entire list until we find a build that has
|
||||
# completed
|
||||
if [ ${CURRENT_CNT} -ge ${BUILD_NBUILDS} ] ; then
|
||||
manage_builds
|
||||
fi
|
||||
done
|
||||
}
|
||||
|
||||
#-----------------------------------------------------------------------
|
||||
|
||||
kill_children() {
|
||||
local OS=$(uname -s)
|
||||
local children=""
|
||||
case "${OS}" in
|
||||
"Darwin")
|
||||
# Mac OS X is known to have BSD style ps
|
||||
local pgid=$(ps -p $$ -o pgid | sed -e "/PGID/d")
|
||||
children=$(ps -g $pgid -o pid | sed -e "/PID\|$$\|$pgid/d")
|
||||
;;
|
||||
*)
|
||||
# everything else tries the GNU style
|
||||
local pgid=$(ps -p $$ --no-headers -o "%r" | tr -d ' ')
|
||||
children=$(pgrep -g $pgid | sed -e "/$$\|$pgid/d")
|
||||
;;
|
||||
esac
|
||||
|
||||
kill $children 2> /dev/null
|
||||
wait $children 2> /dev/null
|
||||
|
||||
exit
|
||||
}
|
||||
|
||||
print_stats() {
|
||||
if [ "$ONLY_LIST" == 'y' ] ; then return ; fi
|
||||
|
||||
# Only count boards that completed
|
||||
: $((TOTAL_CNT = `find ${skipp}* 2> /dev/null | wc -l`))
|
||||
|
||||
rm -f ${donep}* ${skipp}*
|
||||
|
||||
if [ $BUILD_MANY == 1 ] && [ -e "${OUTPUT_PREFIX}/ERR" ] ; then
|
||||
ERR_LIST=`grep -riwl error ${OUTPUT_PREFIX}/ERR/`
|
||||
ERR_LIST=`for f in $ERR_LIST ; do echo -n " $(basename $f)" ; done`
|
||||
ERR_CNT=`echo $ERR_LIST | wc -w | awk '{print $1}'`
|
||||
WRN_LIST=`grep -riwL error ${OUTPUT_PREFIX}/ERR/`
|
||||
WRN_LIST=`for f in $WRN_LIST ; do echo -n " $(basename $f)" ; done`
|
||||
WRN_CNT=`echo $WRN_LIST | wc -w | awk '{print $1}'`
|
||||
else
|
||||
# Remove the logs for any board that was interrupted
|
||||
rm -f ${LOG_DIR}/${CUR_TGT}.MAKELOG ${LOG_DIR}/${CUR_TGT}.ERR
|
||||
fi
|
||||
|
||||
: $((TOTAL_CNT -= ${SKIP_CNT}))
|
||||
echo ""
|
||||
echo "--------------------- SUMMARY ----------------------------"
|
||||
if [ "$CONTINUE" = 'y' -o "$REBUILD_ERRORS" = 'y' ] ; then
|
||||
echo "Boards skipped: ${SKIP_CNT}"
|
||||
fi
|
||||
echo "Boards compiled: ${TOTAL_CNT}"
|
||||
if [ ${ERR_CNT} -gt 0 ] ; then
|
||||
echo "Boards with errors: ${ERR_CNT} (${ERR_LIST} )"
|
||||
fi
|
||||
if [ ${WRN_CNT} -gt 0 ] ; then
|
||||
echo "Boards with warnings but no errors: ${WRN_CNT} (${WRN_LIST} )"
|
||||
fi
|
||||
echo "----------------------------------------------------------"
|
||||
|
||||
if [ $BUILD_MANY == 1 ] ; then
|
||||
kill_children
|
||||
fi
|
||||
|
||||
exit $RC
|
||||
}
|
||||
|
||||
#-----------------------------------------------------------------------
|
||||
|
||||
# Build target groups selected by options, plus any command line args
|
||||
set -- ${SELECTED} "$@"
|
||||
# run PowerPC by default
|
||||
[ $# = 0 ] && set -- powerpc
|
||||
build_targets "$@"
|
||||
wait
|
975
Makefile
975
Makefile
|
@ -1,61 +1,948 @@
|
|||
export BUILD_TOPDIR=$(PWD)
|
||||
export STAGING_DIR=$(BUILD_TOPDIR)/tmp
|
||||
export TOPDIR=$(PWD)
|
||||
export UBOOTDIR=$(TOPDIR)/u-boot
|
||||
#
|
||||
# (C) Copyright 2000-2013
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
### Toolchain config ###
|
||||
#buildroot
|
||||
#CONFIG_TOOLCHAIN_PREFIX=/opt/build/toolchain-mipsbe-4.7.3/bin/mips-linux-
|
||||
VERSION = 2013
|
||||
PATCHLEVEL = 10
|
||||
SUBLEVEL =
|
||||
EXTRAVERSION =
|
||||
ifneq "$(SUBLEVEL)" ""
|
||||
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
|
||||
else
|
||||
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL)$(EXTRAVERSION)
|
||||
endif
|
||||
TIMESTAMP_FILE = $(obj)include/generated/timestamp_autogenerated.h
|
||||
VERSION_FILE = $(obj)include/generated/version_autogenerated.h
|
||||
|
||||
CONFIG_TOOLCHAIN_PREFIX=mips-buildroot-linux-uclibc-
|
||||
export PATH:=$(PWD)/buildroot/output/host/usr/bin/:$(PATH)
|
||||
HOSTARCH := $(shell uname -m | \
|
||||
sed -e s/i.86/x86/ \
|
||||
-e s/sun4u/sparc64/ \
|
||||
-e s/arm.*/arm/ \
|
||||
-e s/sa110/arm/ \
|
||||
-e s/ppc64/powerpc/ \
|
||||
-e s/ppc/powerpc/ \
|
||||
-e s/macppc/powerpc/\
|
||||
-e s/sh.*/sh/)
|
||||
|
||||
########################
|
||||
HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \
|
||||
sed -e 's/\(cygwin\).*/cygwin/')
|
||||
|
||||
export CROSS_COMPILE=$(CONFIG_TOOLCHAIN_PREFIX)
|
||||
export MAKECMD=make ARCH=mips
|
||||
export HOSTARCH HOSTOS
|
||||
|
||||
export UBOOT_GCC_4_3_3_EXTRA_CFLAGS=-fPIC
|
||||
export BUILD_TYPE=squashfs
|
||||
# Deal with colliding definitions from tcsh etc.
|
||||
VENDOR=
|
||||
|
||||
export COMPRESSED_UBOOT=0
|
||||
export CARABOOT_RELEASE=$(shell git describe --dirty --always --match="ar9331-v*")
|
||||
#########################################################################
|
||||
# Allow for silent builds
|
||||
ifeq (,$(findstring s,$(MAKEFLAGS)))
|
||||
XECHO = echo
|
||||
else
|
||||
XECHO = :
|
||||
endif
|
||||
|
||||
IMAGEPATH=$(BUILD_TOPDIR)/bin
|
||||
UBOOT_BINARY=u-boot.bin
|
||||
BOARD_TYPE:=
|
||||
#########################################################################
|
||||
#
|
||||
# U-boot build supports generating object files in a separate external
|
||||
# directory. Two use cases are supported:
|
||||
#
|
||||
# 1) Add O= to the make command line
|
||||
# 'make O=/tmp/build all'
|
||||
#
|
||||
# 2) Set environment variable BUILD_DIR to point to the desired location
|
||||
# 'export BUILD_DIR=/tmp/build'
|
||||
# 'make'
|
||||
#
|
||||
# The second approach can also be used with a MAKEALL script
|
||||
# 'export BUILD_DIR=/tmp/build'
|
||||
# './MAKEALL'
|
||||
#
|
||||
# Command line 'O=' setting overrides BUILD_DIR environment variable.
|
||||
#
|
||||
# When none of the above methods is used the local build is performed and
|
||||
# the object files are placed in the source directory.
|
||||
#
|
||||
|
||||
compile:
|
||||
cd $(UBOOTDIR) && $(MAKECMD) distclean
|
||||
cd $(UBOOTDIR) && $(MAKECMD) $(BOARD_TYPE)_config
|
||||
cd $(UBOOTDIR) && $(MAKECMD) all
|
||||
@echo Copy binaries to $(IMAGEPATH)/$(UBOOTFILE)
|
||||
mkdir -p $(IMAGEPATH)
|
||||
cp -f $(UBOOTDIR)/$(UBOOT_BINARY) $(IMAGEPATH)/$(UBOOTFILE)
|
||||
ifdef O
|
||||
ifeq ("$(origin O)", "command line")
|
||||
BUILD_DIR := $(O)
|
||||
endif
|
||||
endif
|
||||
|
||||
@echo Done
|
||||
# Call a source code checker (by default, "sparse") as part of the
|
||||
# C compilation.
|
||||
#
|
||||
# Use 'make C=1' to enable checking of re-compiled files.
|
||||
#
|
||||
# See the linux kernel file "Documentation/sparse.txt" for more details,
|
||||
# including where to get the "sparse" utility.
|
||||
|
||||
carambola2: BOARD_TYPE:= carambola2
|
||||
carambola2: UBOOTFILE=$(BOARD_TYPE)_u-boot.bin
|
||||
carambola2: compile
|
||||
ifdef C
|
||||
ifeq ("$(origin C)", "command line")
|
||||
CHECKSRC := $(C)
|
||||
endif
|
||||
endif
|
||||
ifndef CHECKSRC
|
||||
CHECKSRC = 0
|
||||
endif
|
||||
export CHECKSRC
|
||||
|
||||
ap1: BOARD_TYPE:= ap1
|
||||
ap1: UBOOTFILE=$(BOARD_TYPE)_u-boot.bin
|
||||
ap1: compile
|
||||
ifneq ($(BUILD_DIR),)
|
||||
saved-output := $(BUILD_DIR)
|
||||
|
||||
ap2: BOARD_TYPE:= ap2
|
||||
ap2: UBOOTFILE=$(BOARD_TYPE)_u-boot.bin
|
||||
ap2: compile
|
||||
# Attempt to create a output directory.
|
||||
$(shell [ -d ${BUILD_DIR} ] || mkdir -p ${BUILD_DIR})
|
||||
|
||||
jb02v3-skw: BOARD_TYPE:= jb02v3-skw
|
||||
jb02v3-skw: UBOOTFILE=$(BOARD_TYPE)_u-boot.bin
|
||||
jb02v3-skw: compile
|
||||
# Verify if it was successful.
|
||||
BUILD_DIR := $(shell cd $(BUILD_DIR) && /bin/pwd)
|
||||
$(if $(BUILD_DIR),,$(error output directory "$(saved-output)" does not exist))
|
||||
endif # ifneq ($(BUILD_DIR),)
|
||||
|
||||
jb02v2-cb2: BOARD_TYPE:= jb02v2-cb2
|
||||
jb02v2-cb2: UBOOTFILE=$(BOARD_TYPE)_u-boot.bin
|
||||
jb02v2-cb2: compile
|
||||
OBJTREE := $(if $(BUILD_DIR),$(BUILD_DIR),$(CURDIR))
|
||||
SPLTREE := $(OBJTREE)/spl
|
||||
TPLTREE := $(OBJTREE)/tpl
|
||||
SRCTREE := $(CURDIR)
|
||||
TOPDIR := $(SRCTREE)
|
||||
LNDIR := $(OBJTREE)
|
||||
export TOPDIR SRCTREE OBJTREE SPLTREE TPLTREE
|
||||
|
||||
all: carambola2 ap1 ap2 jb02v3-skw jb02v2-cb2
|
||||
MKCONFIG := $(SRCTREE)/mkconfig
|
||||
export MKCONFIG
|
||||
|
||||
ifneq ($(OBJTREE),$(SRCTREE))
|
||||
REMOTE_BUILD := 1
|
||||
export REMOTE_BUILD
|
||||
endif
|
||||
|
||||
# $(obj) and (src) are defined in config.mk but here in main Makefile
|
||||
# we also need them before config.mk is included which is the case for
|
||||
# some targets like unconfig, clean, clobber, distclean, etc.
|
||||
ifneq ($(OBJTREE),$(SRCTREE))
|
||||
obj := $(OBJTREE)/
|
||||
src := $(SRCTREE)/
|
||||
else
|
||||
obj :=
|
||||
src :=
|
||||
endif
|
||||
export obj src
|
||||
|
||||
# Make sure CDPATH settings don't interfere
|
||||
unexport CDPATH
|
||||
|
||||
#########################################################################
|
||||
|
||||
# The "tools" are needed early, so put this first
|
||||
# Don't include stuff already done in $(LIBS)
|
||||
# The "examples" conditionally depend on U-Boot (say, when USE_PRIVATE_LIBGCC
|
||||
# is "yes"), so compile examples after U-Boot is compiled.
|
||||
SUBDIR_TOOLS = tools
|
||||
SUBDIR_EXAMPLES = examples/standalone examples/api
|
||||
SUBDIRS = $(SUBDIR_TOOLS)
|
||||
|
||||
.PHONY : $(SUBDIRS) $(VERSION_FILE) $(TIMESTAMP_FILE)
|
||||
|
||||
ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk))
|
||||
|
||||
# Include autoconf.mk before config.mk so that the config options are available
|
||||
# to all top level build files. We need the dummy all: target to prevent the
|
||||
# dependency target in autoconf.mk.dep from being the default.
|
||||
all:
|
||||
sinclude $(obj)include/autoconf.mk.dep
|
||||
sinclude $(obj)include/autoconf.mk
|
||||
|
||||
ifndef CONFIG_SANDBOX
|
||||
SUBDIRS += $(SUBDIR_EXAMPLES)
|
||||
endif
|
||||
|
||||
# load ARCH, BOARD, and CPU configuration
|
||||
include $(obj)include/config.mk
|
||||
export ARCH CPU BOARD VENDOR SOC
|
||||
|
||||
# set default to nothing for native builds
|
||||
ifeq ($(HOSTARCH),$(ARCH))
|
||||
CROSS_COMPILE ?=
|
||||
endif
|
||||
|
||||
# load other configuration
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
# Targets which don't build the source code
|
||||
NON_BUILD_TARGETS = backup clean clobber distclean mkproper tidy unconfig
|
||||
|
||||
# Only do the generic board check when actually building, not configuring
|
||||
ifeq ($(filter $(NON_BUILD_TARGETS),$(MAKECMDGOALS)),)
|
||||
ifeq ($(findstring _config,$(MAKECMDGOALS)),)
|
||||
$(CHECK_GENERIC_BOARD)
|
||||
endif
|
||||
endif
|
||||
|
||||
# If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use
|
||||
# that (or fail if absent). Otherwise, search for a linker script in a
|
||||
# standard location.
|
||||
|
||||
LDSCRIPT_MAKEFILE_DIR = $(dir $(LDSCRIPT))
|
||||
|
||||
ifndef LDSCRIPT
|
||||
#LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds.debug
|
||||
ifdef CONFIG_SYS_LDSCRIPT
|
||||
# need to strip off double quotes
|
||||
LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
|
||||
endif
|
||||
endif
|
||||
|
||||
# If there is no specified link script, we look in a number of places for it
|
||||
ifndef LDSCRIPT
|
||||
ifeq ($(CONFIG_NAND_U_BOOT),y)
|
||||
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
|
||||
ifeq ($(wildcard $(LDSCRIPT)),)
|
||||
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
|
||||
endif
|
||||
endif
|
||||
ifeq ($(wildcard $(LDSCRIPT)),)
|
||||
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
|
||||
endif
|
||||
ifeq ($(wildcard $(LDSCRIPT)),)
|
||||
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot.lds
|
||||
endif
|
||||
ifeq ($(wildcard $(LDSCRIPT)),)
|
||||
LDSCRIPT := $(TOPDIR)/arch/$(ARCH)/cpu/u-boot.lds
|
||||
# We don't expect a Makefile here
|
||||
LDSCRIPT_MAKEFILE_DIR =
|
||||
endif
|
||||
ifeq ($(wildcard $(LDSCRIPT)),)
|
||||
$(error could not find linker script)
|
||||
endif
|
||||
endif
|
||||
|
||||
#########################################################################
|
||||
# U-Boot objects....order is important (i.e. start must be first)
|
||||
|
||||
OBJS = $(CPUDIR)/start.o
|
||||
ifeq ($(CPU),ppc4xx)
|
||||
OBJS += $(CPUDIR)/resetvec.o
|
||||
endif
|
||||
ifeq ($(CPU),mpc85xx)
|
||||
OBJS += $(CPUDIR)/resetvec.o
|
||||
endif
|
||||
|
||||
OBJS := $(addprefix $(obj),$(OBJS))
|
||||
|
||||
HAVE_VENDOR_COMMON_LIB = $(if $(wildcard board/$(VENDOR)/common/Makefile),y,n)
|
||||
|
||||
LIBS-y += lib/libgeneric.o
|
||||
LIBS-y += lib/rsa/librsa.o
|
||||
LIBS-y += lib/lzma/liblzma.o
|
||||
LIBS-y += lib/lzo/liblzo.o
|
||||
LIBS-y += lib/zlib/libz.o
|
||||
LIBS-$(CONFIG_TIZEN) += lib/tizen/libtizen.o
|
||||
LIBS-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/lib$(VENDOR).o
|
||||
LIBS-y += $(CPUDIR)/lib$(CPU).o
|
||||
ifdef SOC
|
||||
LIBS-y += $(CPUDIR)/$(SOC)/lib$(SOC).o
|
||||
endif
|
||||
ifeq ($(CPU),ixp)
|
||||
LIBS-y += drivers/net/npe/libnpe.o
|
||||
endif
|
||||
LIBS-$(CONFIG_OF_EMBED) += dts/libdts.o
|
||||
LIBS-y += arch/$(ARCH)/lib/lib$(ARCH).o
|
||||
LIBS-y += fs/libfs.o \
|
||||
fs/cbfs/libcbfs.o \
|
||||
fs/cramfs/libcramfs.o \
|
||||
fs/ext4/libext4fs.o \
|
||||
fs/fat/libfat.o \
|
||||
fs/fdos/libfdos.o \
|
||||
fs/jffs2/libjffs2.o \
|
||||
fs/reiserfs/libreiserfs.o \
|
||||
fs/sandbox/libsandboxfs.o \
|
||||
fs/ubifs/libubifs.o \
|
||||
fs/yaffs2/libyaffs2.o \
|
||||
fs/zfs/libzfs.o
|
||||
LIBS-y += net/libnet.o
|
||||
LIBS-y += disk/libdisk.o
|
||||
LIBS-y += drivers/bios_emulator/libatibiosemu.o
|
||||
LIBS-y += drivers/block/libblock.o
|
||||
LIBS-$(CONFIG_BOOTCOUNT_LIMIT) += drivers/bootcount/libbootcount.o
|
||||
LIBS-y += drivers/crypto/libcrypto.o
|
||||
LIBS-y += drivers/dma/libdma.o
|
||||
LIBS-y += drivers/fpga/libfpga.o
|
||||
LIBS-y += drivers/gpio/libgpio.o
|
||||
LIBS-y += drivers/hwmon/libhwmon.o
|
||||
LIBS-y += drivers/i2c/libi2c.o
|
||||
LIBS-y += drivers/input/libinput.o
|
||||
LIBS-y += drivers/misc/libmisc.o
|
||||
LIBS-y += drivers/mmc/libmmc.o
|
||||
LIBS-y += drivers/mtd/libmtd.o
|
||||
LIBS-y += drivers/mtd/nand/libnand.o
|
||||
LIBS-y += drivers/mtd/onenand/libonenand.o
|
||||
LIBS-y += drivers/mtd/ubi/libubi.o
|
||||
LIBS-y += drivers/mtd/spi/libspi_flash.o
|
||||
LIBS-y += drivers/net/libnet.o
|
||||
LIBS-y += drivers/net/phy/libphy.o
|
||||
LIBS-y += drivers/pci/libpci.o
|
||||
LIBS-y += drivers/pcmcia/libpcmcia.o
|
||||
LIBS-y += drivers/power/libpower.o \
|
||||
drivers/power/fuel_gauge/libfuel_gauge.o \
|
||||
drivers/power/mfd/libmfd.o \
|
||||
drivers/power/pmic/libpmic.o \
|
||||
drivers/power/battery/libbattery.o
|
||||
LIBS-y += drivers/spi/libspi.o
|
||||
LIBS-y += drivers/dfu/libdfu.o
|
||||
ifeq ($(CPU),mpc83xx)
|
||||
LIBS-y += drivers/qe/libqe.o
|
||||
LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
|
||||
LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
|
||||
endif
|
||||
ifeq ($(CPU),mpc85xx)
|
||||
LIBS-y += drivers/qe/libqe.o
|
||||
LIBS-y += drivers/net/fm/libfm.o
|
||||
LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
|
||||
LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
|
||||
endif
|
||||
ifeq ($(CPU),mpc86xx)
|
||||
LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
|
||||
LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
|
||||
endif
|
||||
LIBS-y += drivers/rtc/librtc.o
|
||||
LIBS-y += drivers/serial/libserial.o
|
||||
LIBS-y += drivers/sound/libsound.o
|
||||
LIBS-y += drivers/tpm/libtpm.o
|
||||
LIBS-y += drivers/twserial/libtws.o
|
||||
LIBS-y += drivers/usb/eth/libusb_eth.o
|
||||
LIBS-y += drivers/usb/gadget/libusb_gadget.o
|
||||
LIBS-y += drivers/usb/host/libusb_host.o
|
||||
LIBS-y += drivers/usb/musb/libusb_musb.o
|
||||
LIBS-y += drivers/usb/musb-new/libusb_musb-new.o
|
||||
LIBS-y += drivers/usb/phy/libusb_phy.o
|
||||
LIBS-y += drivers/usb/ulpi/libusb_ulpi.o
|
||||
LIBS-y += drivers/video/libvideo.o
|
||||
LIBS-y += drivers/watchdog/libwatchdog.o
|
||||
LIBS-y += common/libcommon.o
|
||||
LIBS-y += lib/libfdt/libfdt.o
|
||||
LIBS-y += api/libapi.o
|
||||
LIBS-y += post/libpost.o
|
||||
LIBS-y += test/libtest.o
|
||||
|
||||
ifneq ($(CONFIG_OMAP_COMMON),)
|
||||
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
|
||||
endif
|
||||
|
||||
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610))
|
||||
LIBS-y += arch/$(ARCH)/imx-common/libimx-common.o
|
||||
endif
|
||||
|
||||
ifeq ($(SOC),s5pc1xx)
|
||||
LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
|
||||
endif
|
||||
ifeq ($(SOC),exynos)
|
||||
LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
|
||||
endif
|
||||
ifneq ($(CONFIG_TEGRA),)
|
||||
LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o
|
||||
LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o
|
||||
LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o
|
||||
endif
|
||||
|
||||
LIBS := $(addprefix $(obj),$(sort $(LIBS-y)))
|
||||
.PHONY : $(LIBS)
|
||||
|
||||
LIBBOARD = board/$(BOARDDIR)/lib$(BOARD).o
|
||||
LIBBOARD := $(addprefix $(obj),$(LIBBOARD))
|
||||
|
||||
# Add GCC lib
|
||||
ifdef USE_PRIVATE_LIBGCC
|
||||
ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
|
||||
PLATFORM_LIBGCC = $(OBJTREE)/arch/$(ARCH)/lib/libgcc.o
|
||||
else
|
||||
PLATFORM_LIBGCC = -L $(USE_PRIVATE_LIBGCC) -lgcc
|
||||
endif
|
||||
else
|
||||
ifneq ("$(ARCH_PLATFORM_LIBGCC)","")
|
||||
PLATFORM_LIBGCC := -L $(shell dirname $(ARCH_PLATFORM_LIBGCC)) -lgcc
|
||||
else
|
||||
PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
|
||||
endif
|
||||
endif
|
||||
PLATFORM_LIBS += $(PLATFORM_LIBGCC)
|
||||
export PLATFORM_LIBS
|
||||
|
||||
# Special flags for CPP when processing the linker script.
|
||||
# Pass the version down so we can handle backwards compatibility
|
||||
# on the fly.
|
||||
LDPPFLAGS += \
|
||||
-include $(TOPDIR)/include/u-boot/u-boot.lds.h \
|
||||
-DCPUDIR=$(CPUDIR) \
|
||||
$(shell $(LD) --version | \
|
||||
sed -ne 's/GNU ld version \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
|
||||
|
||||
__OBJS := $(subst $(obj),,$(OBJS))
|
||||
__LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD))
|
||||
|
||||
#########################################################################
|
||||
#########################################################################
|
||||
|
||||
ifneq ($(CONFIG_BOARD_SIZE_LIMIT),)
|
||||
BOARD_SIZE_CHECK = \
|
||||
@actual=`wc -c $@ | awk '{print $$1}'`; \
|
||||
limit=`printf "%d" $(CONFIG_BOARD_SIZE_LIMIT)`; \
|
||||
if test $$actual -gt $$limit; then \
|
||||
echo "$@ exceeds file size limit:" >&2 ; \
|
||||
echo " limit: $$limit bytes" >&2 ; \
|
||||
echo " actual: $$actual bytes" >&2 ; \
|
||||
echo " excess: $$((actual - limit)) bytes" >&2; \
|
||||
exit 1; \
|
||||
fi
|
||||
else
|
||||
BOARD_SIZE_CHECK =
|
||||
endif
|
||||
|
||||
# Always append ALL so that arch config.mk's can add custom ones
|
||||
ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
|
||||
|
||||
ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
|
||||
ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
|
||||
ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
|
||||
ALL-$(CONFIG_SPL_FRAMEWORK) += $(obj)u-boot.img
|
||||
ALL-$(CONFIG_TPL) += $(obj)tpl/u-boot-tpl.bin
|
||||
ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
|
||||
ifneq ($(CONFIG_SPL_TARGET),)
|
||||
ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET))
|
||||
endif
|
||||
|
||||
# enable combined SPL/u-boot/dtb rules for tegra
|
||||
ifneq ($(CONFIG_TEGRA),)
|
||||
ifeq ($(CONFIG_OF_SEPARATE),y)
|
||||
ALL-y += $(obj)u-boot-dtb-tegra.bin
|
||||
else
|
||||
ALL-y += $(obj)u-boot-nodtb-tegra.bin
|
||||
endif
|
||||
endif
|
||||
|
||||
all: $(ALL-y) $(SUBDIR_EXAMPLES)
|
||||
|
||||
$(obj)u-boot.dtb: checkdtc $(obj)u-boot
|
||||
$(MAKE) -C dts binary
|
||||
mv $(obj)dts/dt.dtb $@
|
||||
|
||||
$(obj)u-boot-dtb.bin: $(obj)u-boot.bin $(obj)u-boot.dtb
|
||||
cat $^ >$@
|
||||
|
||||
$(obj)u-boot.hex: $(obj)u-boot
|
||||
$(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@
|
||||
|
||||
$(obj)u-boot.srec: $(obj)u-boot
|
||||
$(OBJCOPY) -O srec $< $@
|
||||
|
||||
$(obj)u-boot.bin: $(obj)u-boot
|
||||
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
|
||||
$(BOARD_SIZE_CHECK)
|
||||
|
||||
$(obj)u-boot.ldr: $(obj)u-boot
|
||||
$(CREATE_LDR_ENV)
|
||||
$(LDR) -T $(CONFIG_BFIN_CPU) -c $@ $< $(LDR_FLAGS)
|
||||
$(BOARD_SIZE_CHECK)
|
||||
|
||||
$(obj)u-boot.ldr.hex: $(obj)u-boot.ldr
|
||||
$(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@ -I binary
|
||||
|
||||
$(obj)u-boot.ldr.srec: $(obj)u-boot.ldr
|
||||
$(OBJCOPY) ${OBJCFLAGS} -O srec $< $@ -I binary
|
||||
|
||||
#
|
||||
# U-Boot entry point, needed for booting of full-blown U-Boot
|
||||
# from the SPL U-Boot version.
|
||||
#
|
||||
ifndef CONFIG_SYS_UBOOT_START
|
||||
CONFIG_SYS_UBOOT_START := 0
|
||||
endif
|
||||
|
||||
$(obj)u-boot.img: $(obj)u-boot.bin
|
||||
$(obj)tools/mkimage -A $(ARCH) -T firmware -C none \
|
||||
-O u-boot -a $(CONFIG_SYS_TEXT_BASE) \
|
||||
-e $(CONFIG_SYS_UBOOT_START) \
|
||||
-n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' $(VERSION_FILE) | \
|
||||
sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \
|
||||
-d $< $@
|
||||
|
||||
$(obj)u-boot.imx: $(obj)u-boot.bin depend
|
||||
$(MAKE) -C $(SRCTREE)/arch/arm/imx-common $(OBJTREE)/u-boot.imx
|
||||
|
||||
$(obj)u-boot.kwb: $(obj)u-boot.bin
|
||||
$(obj)tools/mkimage -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \
|
||||
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
|
||||
|
||||
$(obj)u-boot.pbl: $(obj)u-boot.bin
|
||||
$(obj)tools/mkimage -n $(CONFIG_PBLRCW_CONFIG) \
|
||||
-R $(CONFIG_PBLPBI_CONFIG) -T pblimage \
|
||||
-d $< $@
|
||||
|
||||
$(obj)u-boot.sha1: $(obj)u-boot.bin
|
||||
$(obj)tools/ubsha1 $(obj)u-boot.bin
|
||||
|
||||
$(obj)u-boot.dis: $(obj)u-boot
|
||||
$(OBJDUMP) -d $< > $@
|
||||
|
||||
# $@ is output, $(1) and $(2) are inputs, $(3) is padded intermediate,
|
||||
# $(4) is pad-to
|
||||
SPL_PAD_APPEND = \
|
||||
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(4) -I binary -O binary \
|
||||
$(1) $(obj)$(3); \
|
||||
cat $(obj)$(3) $(2) > $@; \
|
||||
rm $(obj)$(3)
|
||||
|
||||
ifdef CONFIG_TPL
|
||||
SPL_PAYLOAD := $(obj)tpl/u-boot-with-tpl.bin
|
||||
else
|
||||
SPL_PAYLOAD := $(obj)u-boot.bin
|
||||
endif
|
||||
|
||||
$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(SPL_PAYLOAD)
|
||||
$(call SPL_PAD_APPEND,$<,$(SPL_PAYLOAD),spl/u-boot-spl-pad.bin,$(CONFIG_SPL_PAD_TO))
|
||||
|
||||
$(obj)tpl/u-boot-with-tpl.bin: $(obj)tpl/u-boot-tpl.bin $(obj)u-boot.bin
|
||||
$(call SPL_PAD_APPEND,$<,$(obj)u-boot.bin,tpl/u-boot-tpl-pad.bin,$(CONFIG_TPL_PAD_TO))
|
||||
|
||||
$(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
|
||||
$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
|
||||
$(OBJTREE)/u-boot-with-spl.imx
|
||||
|
||||
$(obj)u-boot-with-nand-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
|
||||
$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
|
||||
$(OBJTREE)/u-boot-with-nand-spl.imx
|
||||
|
||||
$(obj)u-boot.ubl: $(obj)u-boot-with-spl.bin
|
||||
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
|
||||
-e $(CONFIG_SYS_TEXT_BASE) -d $< $(obj)u-boot.ubl
|
||||
|
||||
$(obj)u-boot.ais: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
|
||||
$(obj)tools/mkimage -s -n $(if $(CONFIG_AIS_CONFIG_FILE),$(CONFIG_AIS_CONFIG_FILE),"/dev/null") \
|
||||
-T aisimage \
|
||||
-e $(CONFIG_SPL_TEXT_BASE) \
|
||||
-d $(obj)spl/u-boot-spl.bin \
|
||||
$(obj)spl/u-boot-spl.ais
|
||||
$(OBJCOPY) ${OBJCFLAGS} -I binary \
|
||||
--pad-to=$(CONFIG_SPL_MAX_SIZE) -O binary \
|
||||
$(obj)spl/u-boot-spl.ais $(obj)spl/u-boot-spl-pad.ais
|
||||
cat $(obj)spl/u-boot-spl-pad.ais $(obj)u-boot.img > \
|
||||
$(obj)u-boot.ais
|
||||
|
||||
|
||||
$(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
|
||||
$(MAKE) -C $(SRCTREE)/$(CPUDIR)/$(SOC)/ $(OBJTREE)/u-boot.sb
|
||||
|
||||
# On x600 (SPEAr600) U-Boot is appended to U-Boot SPL.
|
||||
# Both images are created using mkimage (crc etc), so that the ROM
|
||||
# bootloader can check its integrity. Padding needs to be done to the
|
||||
# SPL image (with mkimage header) and not the binary. Otherwise the resulting image
|
||||
# which is loaded/copied by the ROM bootloader to SRAM doesn't fit.
|
||||
# The resulting image containing both U-Boot images is called u-boot.spr
|
||||
$(obj)u-boot.spr: $(obj)u-boot.img $(obj)spl/u-boot-spl.bin
|
||||
$(obj)tools/mkimage -A $(ARCH) -T firmware -C none \
|
||||
-a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n XLOADER \
|
||||
-d $(obj)spl/u-boot-spl.bin $(obj)spl/u-boot-spl.img
|
||||
tr "\000" "\377" < /dev/zero | dd ibs=1 count=$(CONFIG_SPL_PAD_TO) \
|
||||
of=$(obj)spl/u-boot-spl-pad.img 2>/dev/null
|
||||
dd if=$(obj)spl/u-boot-spl.img of=$(obj)spl/u-boot-spl-pad.img \
|
||||
conv=notrunc 2>/dev/null
|
||||
cat $(obj)spl/u-boot-spl-pad.img $(obj)u-boot.img > $@
|
||||
|
||||
ifneq ($(CONFIG_TEGRA),)
|
||||
$(obj)u-boot-nodtb-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
|
||||
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SYS_TEXT_BASE) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
|
||||
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
|
||||
rm $(obj)spl/u-boot-spl-pad.bin
|
||||
|
||||
ifeq ($(CONFIG_OF_SEPARATE),y)
|
||||
$(obj)u-boot-dtb-tegra.bin: $(obj)u-boot-nodtb-tegra.bin $(obj)u-boot.dtb
|
||||
cat $(obj)u-boot-nodtb-tegra.bin $(obj)u-boot.dtb > $@
|
||||
endif
|
||||
endif
|
||||
|
||||
$(obj)u-boot-img.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
|
||||
cat $(obj)spl/u-boot-spl.bin $(obj)u-boot.img > $@
|
||||
|
||||
# PPC4xx needs the SPL at the end of the image, since the reset vector
|
||||
# is located at 0xfffffffc. So we can't use the "u-boot-img.bin" target
|
||||
# and need to introduce a new build target with the full blown U-Boot
|
||||
# at the start padded up to the start of the SPL image. And then concat
|
||||
# the SPL image to the end.
|
||||
$(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
|
||||
tr "\000" "\377" < /dev/zero | dd ibs=1 count=$(CONFIG_UBOOT_PAD_TO) \
|
||||
of=$(obj)u-boot-pad.img 2>/dev/null
|
||||
dd if=$(obj)u-boot.img of=$(obj)u-boot-pad.img \
|
||||
conv=notrunc 2>/dev/null
|
||||
cat $(obj)u-boot-pad.img $(obj)spl/u-boot-spl.bin > $@
|
||||
|
||||
ifeq ($(CONFIG_SANDBOX),y)
|
||||
GEN_UBOOT = \
|
||||
cd $(LNDIR) && $(CC) $(SYMS) -T $(obj)u-boot.lds \
|
||||
-Wl,--start-group $(__LIBS) -Wl,--end-group \
|
||||
$(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map -o u-boot
|
||||
else
|
||||
GEN_UBOOT = \
|
||||
cd $(LNDIR) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) \
|
||||
$(__OBJS) \
|
||||
--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
|
||||
-Map u-boot.map -o u-boot
|
||||
endif
|
||||
|
||||
$(obj)u-boot: depend \
|
||||
$(SUBDIR_TOOLS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) $(obj)u-boot.lds
|
||||
$(GEN_UBOOT)
|
||||
ifeq ($(CONFIG_KALLSYMS),y)
|
||||
smap=`$(call SYSTEM_MAP,$(obj)u-boot) | \
|
||||
awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 "\\\\000"}'` ; \
|
||||
$(CC) $(CFLAGS) -DSYSTEM_MAP="\"$${smap}\"" \
|
||||
-c common/system_map.c -o $(obj)common/system_map.o
|
||||
$(GEN_UBOOT) $(obj)common/system_map.o
|
||||
endif
|
||||
|
||||
$(OBJS): depend
|
||||
$(MAKE) -C $(CPUDIR) $(if $(REMOTE_BUILD),$@,$(notdir $@))
|
||||
|
||||
$(LIBS): depend $(SUBDIR_TOOLS)
|
||||
$(MAKE) -C $(dir $(subst $(obj),,$@))
|
||||
|
||||
$(LIBBOARD): depend $(LIBS)
|
||||
$(MAKE) -C $(dir $(subst $(obj),,$@))
|
||||
|
||||
$(SUBDIRS): depend
|
||||
$(MAKE) -C $@ all
|
||||
|
||||
$(SUBDIR_EXAMPLES): $(obj)u-boot
|
||||
|
||||
$(LDSCRIPT): depend
|
||||
$(MAKE) -C $(dir $@) $(notdir $@)
|
||||
|
||||
$(obj)u-boot.lds: $(LDSCRIPT)
|
||||
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$< >$@
|
||||
|
||||
nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
|
||||
$(MAKE) -C nand_spl/board/$(BOARDDIR) all
|
||||
|
||||
$(obj)u-boot-nand.bin: nand_spl $(obj)u-boot.bin
|
||||
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
|
||||
|
||||
$(obj)spl/u-boot-spl.bin: $(SUBDIR_TOOLS) depend
|
||||
$(MAKE) -C spl all
|
||||
|
||||
$(obj)tpl/u-boot-tpl.bin: $(SUBDIR_TOOLS) depend
|
||||
$(MAKE) -C spl all CONFIG_TPL_BUILD=y
|
||||
|
||||
updater:
|
||||
$(MAKE) -C tools/updater all
|
||||
|
||||
# Explicitly make _depend in subdirs containing multiple targets to prevent
|
||||
# parallel sub-makes creating .depend files simultaneously.
|
||||
depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) \
|
||||
$(obj)include/spl-autoconf.mk \
|
||||
$(obj)include/tpl-autoconf.mk \
|
||||
$(obj)include/autoconf.mk \
|
||||
$(obj)include/generated/generic-asm-offsets.h \
|
||||
$(obj)include/generated/asm-offsets.h
|
||||
for dir in $(SUBDIRS) $(CPUDIR) $(LDSCRIPT_MAKEFILE_DIR) ; do \
|
||||
$(MAKE) -C $$dir _depend ; done
|
||||
|
||||
TAG_SUBDIRS = $(SUBDIRS)
|
||||
TAG_SUBDIRS += $(dir $(__LIBS))
|
||||
TAG_SUBDIRS += include
|
||||
|
||||
FIND := find
|
||||
FINDFLAGS := -L
|
||||
|
||||
checkstack:
|
||||
$(CROSS_COMPILE)objdump -d $(obj)u-boot \
|
||||
`$(FIND) $(obj) -name u-boot-spl -print` | \
|
||||
perl $(src)tools/checkstack.pl $(ARCH)
|
||||
|
||||
tags ctags:
|
||||
ctags -w -o $(obj)ctags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \
|
||||
-name '*.[chS]' -print`
|
||||
|
||||
etags:
|
||||
etags -a -o $(obj)etags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \
|
||||
-name '*.[chS]' -print`
|
||||
cscope:
|
||||
$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) -name '*.[chS]' -print > \
|
||||
cscope.files
|
||||
cscope -b -q -k
|
||||
|
||||
SYSTEM_MAP = \
|
||||
$(NM) $1 | \
|
||||
grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
|
||||
LC_ALL=C sort
|
||||
$(obj)System.map: $(obj)u-boot
|
||||
@$(call SYSTEM_MAP,$<) > $(obj)System.map
|
||||
|
||||
checkthumb:
|
||||
@if test $(call cc-version) -lt 0404; then \
|
||||
echo -n '*** Your GCC does not produce working '; \
|
||||
echo 'binaries in THUMB mode.'; \
|
||||
echo '*** Your board is configured for THUMB mode.'; \
|
||||
false; \
|
||||
fi
|
||||
|
||||
# GCC 3.x is reported to have problems generating the type of relocation
|
||||
# that U-Boot wants.
|
||||
# See http://lists.denx.de/pipermail/u-boot/2012-September/135156.html
|
||||
checkgcc4:
|
||||
@if test $(call cc-version) -lt 0400; then \
|
||||
echo -n '*** Your GCC is too old, please upgrade to GCC 4.x or newer'; \
|
||||
false; \
|
||||
fi
|
||||
|
||||
checkdtc:
|
||||
@if test $(call dtc-version) -lt 0104; then \
|
||||
echo '*** Your dtc is too old, please upgrade to dtc 1.4 or newer'; \
|
||||
false; \
|
||||
fi
|
||||
|
||||
#
|
||||
# Auto-generate the autoconf.mk file (which is included by all makefiles)
|
||||
#
|
||||
# This target actually generates 2 files; autoconf.mk and autoconf.mk.dep.
|
||||
# the dep file is only include in this top level makefile to determine when
|
||||
# to regenerate the autoconf.mk file.
|
||||
$(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h
|
||||
@$(XECHO) Generating $@ ; \
|
||||
set -e ; \
|
||||
: Generate the dependancies ; \
|
||||
$(CC) -x c -DDO_DEPS_ONLY -M $(CFLAGS) $(CPPFLAGS) \
|
||||
-MQ $(obj)include/autoconf.mk include/common.h > $@
|
||||
|
||||
$(obj)include/autoconf.mk: $(obj)include/config.h
|
||||
@$(XECHO) Generating $@ ; \
|
||||
set -e ; \
|
||||
: Extract the config macros ; \
|
||||
$(CPP) $(CFLAGS) -DDO_DEPS_ONLY -dM include/common.h | \
|
||||
sed -n -f tools/scripts/define2mk.sed > $@.tmp && \
|
||||
mv $@.tmp $@
|
||||
|
||||
# Auto-generate the spl-autoconf.mk file (which is included by all makefiles for SPL)
|
||||
$(obj)include/tpl-autoconf.mk: $(obj)include/config.h
|
||||
@$(XECHO) Generating $@ ; \
|
||||
set -e ; \
|
||||
: Extract the config macros ; \
|
||||
$(CPP) $(CFLAGS) -DCONFIG_TPL_BUILD -DCONFIG_SPL_BUILD\
|
||||
-DDO_DEPS_ONLY -dM include/common.h | \
|
||||
sed -n -f tools/scripts/define2mk.sed > $@.tmp && \
|
||||
mv $@.tmp $@
|
||||
|
||||
$(obj)include/spl-autoconf.mk: $(obj)include/config.h
|
||||
@$(XECHO) Generating $@ ; \
|
||||
set -e ; \
|
||||
: Extract the config macros ; \
|
||||
$(CPP) $(CFLAGS) -DCONFIG_SPL_BUILD -DDO_DEPS_ONLY -dM include/common.h | \
|
||||
sed -n -f tools/scripts/define2mk.sed > $@.tmp && \
|
||||
mv $@.tmp $@
|
||||
|
||||
$(obj)include/generated/generic-asm-offsets.h: $(obj)include/autoconf.mk.dep \
|
||||
$(obj)include/spl-autoconf.mk \
|
||||
$(obj)include/tpl-autoconf.mk \
|
||||
$(obj)lib/asm-offsets.s
|
||||
@$(XECHO) Generating $@
|
||||
tools/scripts/make-asm-offsets $(obj)lib/asm-offsets.s $@
|
||||
|
||||
$(obj)lib/asm-offsets.s: $(obj)include/autoconf.mk.dep \
|
||||
$(obj)include/spl-autoconf.mk \
|
||||
$(obj)include/tpl-autoconf.mk \
|
||||
$(src)lib/asm-offsets.c
|
||||
@mkdir -p $(obj)lib
|
||||
$(CC) -DDO_DEPS_ONLY \
|
||||
$(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
|
||||
-o $@ $(src)lib/asm-offsets.c -c -S
|
||||
|
||||
$(obj)include/generated/asm-offsets.h: $(obj)include/autoconf.mk.dep \
|
||||
$(obj)include/spl-autoconf.mk \
|
||||
$(obj)include/tpl-autoconf.mk \
|
||||
$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
|
||||
@$(XECHO) Generating $@
|
||||
tools/scripts/make-asm-offsets $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s $@
|
||||
|
||||
$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s: $(obj)include/autoconf.mk.dep \
|
||||
$(obj)include/spl-autoconf.mk \
|
||||
$(obj)include/tpl-autoconf.mk
|
||||
@mkdir -p $(obj)$(CPUDIR)/$(SOC)
|
||||
if [ -f $(src)$(CPUDIR)/$(SOC)/asm-offsets.c ];then \
|
||||
$(CC) -DDO_DEPS_ONLY \
|
||||
$(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
|
||||
-o $@ $(src)$(CPUDIR)/$(SOC)/asm-offsets.c -c -S; \
|
||||
else \
|
||||
touch $@; \
|
||||
fi
|
||||
|
||||
#########################################################################
|
||||
else # !config.mk
|
||||
all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \
|
||||
$(obj)u-boot.img $(obj)u-boot.dis $(obj)u-boot \
|
||||
$(filter-out tools,$(SUBDIRS)) \
|
||||
updater depend dep tags ctags etags cscope $(obj)System.map:
|
||||
@echo "System not configured - see README" >&2
|
||||
@ exit 1
|
||||
|
||||
tools: $(VERSION_FILE) $(TIMESTAMP_FILE)
|
||||
$(MAKE) -C $@ all
|
||||
endif # config.mk
|
||||
|
||||
# ARM relocations should all be R_ARM_RELATIVE.
|
||||
checkarmreloc: $(obj)u-boot
|
||||
@if test "R_ARM_RELATIVE" != \
|
||||
"`$(CROSS_COMPILE)readelf -r $< | cut -d ' ' -f 4 | grep R_ARM | sort -u`"; \
|
||||
then echo "$< contains relocations other than \
|
||||
R_ARM_RELATIVE"; false; fi
|
||||
|
||||
$(VERSION_FILE):
|
||||
@mkdir -p $(dir $(VERSION_FILE))
|
||||
@( localvers='$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ; \
|
||||
printf '#define PLAIN_VERSION "%s%s"\n' \
|
||||
"$(U_BOOT_VERSION)" "$${localvers}" ; \
|
||||
printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' \
|
||||
"$(U_BOOT_VERSION)" "$${localvers}" ; \
|
||||
) > $@.tmp
|
||||
@( printf '#define CC_VERSION_STRING "%s"\n' \
|
||||
'$(shell $(CC) --version | head -n 1)' )>> $@.tmp
|
||||
@( printf '#define LD_VERSION_STRING "%s"\n' \
|
||||
'$(shell $(LD) -v | head -n 1)' )>> $@.tmp
|
||||
@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
|
||||
|
||||
$(TIMESTAMP_FILE):
|
||||
@mkdir -p $(dir $(TIMESTAMP_FILE))
|
||||
@LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"' > $@.tmp
|
||||
@LC_ALL=C date +'#define U_BOOT_TIME "%T"' >> $@.tmp
|
||||
@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
|
||||
|
||||
easylogo env gdb:
|
||||
$(MAKE) -C tools/$@ all MTD_VERSION=${MTD_VERSION}
|
||||
gdbtools: gdb
|
||||
|
||||
xmldocs pdfdocs psdocs htmldocs mandocs: tools/kernel-doc/docproc
|
||||
$(MAKE) U_BOOT_VERSION=$(U_BOOT_VERSION) -C doc/DocBook/ $@
|
||||
|
||||
tools-all: easylogo env gdb $(VERSION_FILE) $(TIMESTAMP_FILE)
|
||||
$(MAKE) -C tools HOST_TOOLS_ALL=y
|
||||
|
||||
.PHONY : CHANGELOG
|
||||
CHANGELOG:
|
||||
git log --no-merges U-Boot-1_1_5.. | \
|
||||
unexpand -a | sed -e 's/\s\s*$$//' > $@
|
||||
|
||||
include/license.h: tools/bin2header COPYING
|
||||
cat COPYING | gzip -9 -c | ./tools/bin2header license_gzip > include/license.h
|
||||
#########################################################################
|
||||
|
||||
unconfig:
|
||||
@rm -f $(obj)include/config.h $(obj)include/config.mk \
|
||||
$(obj)board/*/config.tmp $(obj)board/*/*/config.tmp \
|
||||
$(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep \
|
||||
$(obj)include/spl-autoconf.mk \
|
||||
$(obj)include/tpl-autoconf.mk
|
||||
|
||||
%_config:: unconfig
|
||||
@$(MKCONFIG) -A $(@:_config=)
|
||||
|
||||
sinclude $(obj).boards.depend
|
||||
$(obj).boards.depend: boards.cfg
|
||||
@awk '(NF && $$1 !~ /^#/) { print $$7 ": " $$7 "_config; $$(MAKE)" }' $< > $@
|
||||
|
||||
#
|
||||
# Functions to generate common board directory names
|
||||
#
|
||||
lcname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\L\1/')
|
||||
ucname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\U\1/')
|
||||
|
||||
#########################################################################
|
||||
#########################################################################
|
||||
|
||||
clean:
|
||||
cd $(UBOOTDIR) && $(MAKECMD) distclean
|
||||
@rm -f $(obj)examples/standalone/82559_eeprom \
|
||||
$(obj)examples/standalone/atmel_df_pow2 \
|
||||
$(obj)examples/standalone/eepro100_eeprom \
|
||||
$(obj)examples/standalone/hello_world \
|
||||
$(obj)examples/standalone/interrupt \
|
||||
$(obj)examples/standalone/mem_to_mem_idma2intr \
|
||||
$(obj)examples/standalone/sched \
|
||||
$(obj)examples/standalone/smc911{11,x}_eeprom \
|
||||
$(obj)examples/standalone/test_burst \
|
||||
$(obj)examples/standalone/timer
|
||||
@rm -f $(obj)examples/api/demo{,.bin}
|
||||
@rm -f $(obj)tools/bmp_logo $(obj)tools/easylogo/easylogo \
|
||||
$(obj)tools/env/{fw_printenv,fw_setenv} \
|
||||
$(obj)tools/envcrc \
|
||||
$(obj)tools/gdb/{astest,gdbcont,gdbsend} \
|
||||
$(obj)tools/gen_eth_addr $(obj)tools/img2srec \
|
||||
$(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \
|
||||
$(obj)tools/mk{$(BOARD),}spl \
|
||||
$(obj)tools/mxsboot \
|
||||
$(obj)tools/ncb $(obj)tools/ubsha1 \
|
||||
$(obj)tools/kernel-doc/docproc \
|
||||
$(obj)tools/proftool
|
||||
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \
|
||||
$(obj)board/matrix_vision/*/bootscript.img \
|
||||
$(obj)board/voiceblue/eeprom \
|
||||
$(obj)u-boot.lds \
|
||||
$(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs] \
|
||||
$(obj)arch/blackfin/cpu/init.{lds,elf}
|
||||
@rm -f $(obj)include/bmp_logo.h
|
||||
@rm -f $(obj)include/bmp_logo_data.h
|
||||
@rm -f $(obj)lib/asm-offsets.s
|
||||
@rm -f $(obj)include/generated/asm-offsets.h
|
||||
@rm -f $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
|
||||
@rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
|
||||
@$(MAKE) -s -C doc/DocBook/ cleandocs
|
||||
@find $(OBJTREE) -type f \
|
||||
\( -name 'core' -o -name '*.bak' -o -name '*~' -o -name '*.su' \
|
||||
-o -name '*.o' -o -name '*.a' -o -name '*.exe' \
|
||||
-o -name '*.cfgtmp' \) -print \
|
||||
| xargs rm -f
|
||||
|
||||
# Removes everything not needed for testing u-boot
|
||||
tidy: clean
|
||||
@find $(OBJTREE) -type f \( -name '*.depend*' \) -print | xargs rm -f
|
||||
|
||||
clobber: tidy
|
||||
@find $(OBJTREE) -type f \( -name '*.srec' \
|
||||
-o -name '*.bin' -o -name u-boot.img \) \
|
||||
-print0 | xargs -0 rm -f
|
||||
@rm -f $(OBJS) $(obj)*.bak $(obj)ctags $(obj)etags $(obj)TAGS \
|
||||
$(obj)cscope.* $(obj)*.*~
|
||||
@rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL-y)
|
||||
@rm -f $(obj)u-boot.kwb
|
||||
@rm -f $(obj)u-boot.pbl
|
||||
@rm -f $(obj)u-boot.imx
|
||||
@rm -f $(obj)u-boot-with-spl.imx
|
||||
@rm -f $(obj)u-boot-with-nand-spl.imx
|
||||
@rm -f $(obj)u-boot.ubl
|
||||
@rm -f $(obj)u-boot.ais
|
||||
@rm -f $(obj)u-boot.dtb
|
||||
@rm -f $(obj)u-boot.sb
|
||||
@rm -f $(obj)u-boot.bd
|
||||
@rm -f $(obj)u-boot.spr
|
||||
@rm -f $(obj)nand_spl/{u-boot.{lds,lst},System.map}
|
||||
@rm -f $(obj)nand_spl/{u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map}
|
||||
@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.map}
|
||||
@rm -f $(obj)spl/u-boot-spl.lds
|
||||
@rm -f $(obj)tpl/{u-boot-tpl,u-boot-tpl.bin,u-boot-tpl.map}
|
||||
@rm -f $(obj)tpl/u-boot-spl.lds
|
||||
@rm -f $(obj)MLO MLO.byteswap
|
||||
@rm -f $(obj)SPL
|
||||
@rm -f $(obj)tools/xway-swap-bytes
|
||||
@rm -f $(obj)arch/powerpc/cpu/mpc824x/bedbug_603e.c
|
||||
@rm -f $(obj)arch/powerpc/cpu/mpc83xx/ddr-gen?.c
|
||||
@rm -fr $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
|
||||
@rm -fr $(obj)include/generated
|
||||
@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
|
||||
@rm -f $(obj)dts/*.tmp
|
||||
@rm -f $(obj)spl/u-boot-spl{,-pad}.ais
|
||||
|
||||
mrproper \
|
||||
distclean: clobber unconfig
|
||||
ifneq ($(OBJTREE),$(SRCTREE))
|
||||
rm -rf $(obj)*
|
||||
endif
|
||||
|
||||
backup:
|
||||
F=`basename $(TOPDIR)` ; cd .. ; \
|
||||
gtar --force-local -zcvf `LC_ALL=C date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
|
||||
|
||||
#########################################################################
|
||||
|
|
57
README.md
57
README.md
|
@ -1,57 +0,0 @@
|
|||
Caraboot
|
||||
========
|
||||
|
||||
U-Boot for Carambola2 based boards
|
||||
|
||||
|
||||
Build
|
||||
-------
|
||||
|
||||
1) Build buildroot toolchain (http://buildroot.org)
|
||||
|
||||
Download:
|
||||
```
|
||||
git clone git://git.buildroot.net/buildroot
|
||||
cd buildroot
|
||||
git checkout 2015.02
|
||||
```
|
||||
|
||||
Configure:
|
||||
```
|
||||
cd buildroot
|
||||
cp ../buildroot.config .config
|
||||
make oldconfig
|
||||
```
|
||||
In Target Options select Target Architecture as MIPS (big endian) and Target Architecture Variant as mips 32r2.
|
||||
In Toolchain select GCC Compiler version as gcc 4.7.x.
|
||||
Save and exit.
|
||||
|
||||
Build:
|
||||
```
|
||||
make toolchain
|
||||
```
|
||||
|
||||
2) Build Caraboot image
|
||||
|
||||
Download:
|
||||
```
|
||||
cd your_work_dir
|
||||
git clone https://github.com/8devices/Caraboot.git
|
||||
```
|
||||
|
||||
Configure:
|
||||
Open Caraboot Makefile and change CONFIG_TOOLCHAIN_PREFIX to your buildroot binary path, i.e ```CONFIG_TOOLCHAIN_PREFIX=your_work_dir/buildroot/output/host/usr/bin/mips-linux- ```
|
||||
```
|
||||
cd Caraboot
|
||||
vi/nano/gedit Makefile
|
||||
```
|
||||
|
||||
Build:
|
||||
```
|
||||
make
|
||||
```
|
||||
|
||||
The bootloader binary will be saved to ```bin/carambola2_u-boot.bin``` file.
|
||||
You can now use this file to upgrade your bootloader on Carambola2 board (http://8devices.com/wiki/carambola:2:gettingstarted:bootloader-upgrade)
|
||||
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
#
|
||||
# (C) Copyright 2007 Semihalf
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)libapi.o
|
||||
|
||||
COBJS-$(CONFIG_API) += api.o api_display.o api_net.o api_storage.o \
|
||||
api_platform-$(ARCH).o
|
||||
|
||||
COBJS := $(COBJS-y)
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
||||
$(LIB): $(obj).depend $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
|
@ -0,0 +1,55 @@
|
|||
U-Boot machine/arch independent API for external apps
|
||||
=====================================================
|
||||
|
||||
1. Main assumptions
|
||||
|
||||
- there is a single entry point (syscall) to the API
|
||||
|
||||
- per current design the syscall is a C-callable function in the U-Boot
|
||||
text, which might evolve into a real syscall using machine exception trap
|
||||
once this initial version proves functional
|
||||
|
||||
- the consumer app is responsible for producing appropriate context (call
|
||||
number and arguments)
|
||||
|
||||
- upon entry, the syscall dispatches the call to other (existing) U-Boot
|
||||
functional areas like networking or storage operations
|
||||
|
||||
- consumer application will recognize the API is available by searching
|
||||
a specified (assumed by convention) range of address space for the
|
||||
signature
|
||||
|
||||
- the U-Boot integral part of the API is meant to be thin and non-intrusive,
|
||||
leaving as much processing as possible on the consumer application side,
|
||||
for example it doesn't keep states, but relies on hints from the app and
|
||||
so on
|
||||
|
||||
- optional (CONFIG_API)
|
||||
|
||||
|
||||
2. Calls
|
||||
|
||||
- console related (getc, putc, tstc etc.)
|
||||
- system (reset, platform info)
|
||||
- time (delay, current)
|
||||
- env vars (enumerate all, get, set)
|
||||
- devices (enumerate all, open, close, read, write); currently two classes
|
||||
of devices are recognized and supported: network and storage (ide, scsi,
|
||||
usb etc.)
|
||||
|
||||
|
||||
3. Structure overview
|
||||
|
||||
- core API, integral part of U-Boot, mandatory
|
||||
- implements the single entry point (mimics UNIX syscall)
|
||||
|
||||
- glue
|
||||
- entry point at the consumer side, allows to make syscall, mandatory
|
||||
part
|
||||
|
||||
- helper conveniency wrappers so that consumer app does not have to use
|
||||
the syscall directly, but in a more friendly manner (a la libc calls),
|
||||
optional part
|
||||
|
||||
- consumer application
|
||||
- calls directly, or leverages the provided glue mid-layer
|
|
@ -0,0 +1,691 @@
|
|||
/*
|
||||
* (C) Copyright 2007 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <command.h>
|
||||
#include <common.h>
|
||||
#include <malloc.h>
|
||||
#include <environment.h>
|
||||
#include <linux/types.h>
|
||||
#include <api_public.h>
|
||||
|
||||
#include "api_private.h"
|
||||
|
||||
#define DEBUG
|
||||
#undef DEBUG
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* This is the API core.
|
||||
*
|
||||
* API_ functions are part of U-Boot code and constitute the lowest level
|
||||
* calls:
|
||||
*
|
||||
* - they know what values they need as arguments
|
||||
* - their direct return value pertains to the API_ "shell" itself (0 on
|
||||
* success, some error code otherwise)
|
||||
* - if the call returns a value it is buried within arguments
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef DEBUG
|
||||
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||
#else
|
||||
#define debugf(fmt, args...)
|
||||
#endif
|
||||
|
||||
typedef int (*cfp_t)(va_list argp);
|
||||
|
||||
static int calls_no;
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_getc(int *c)
|
||||
*/
|
||||
static int API_getc(va_list ap)
|
||||
{
|
||||
int *c;
|
||||
|
||||
if ((c = (int *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
*c = getc();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_tstc(int *c)
|
||||
*/
|
||||
static int API_tstc(va_list ap)
|
||||
{
|
||||
int *t;
|
||||
|
||||
if ((t = (int *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
*t = tstc();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_putc(char *ch)
|
||||
*/
|
||||
static int API_putc(va_list ap)
|
||||
{
|
||||
char *c;
|
||||
|
||||
if ((c = (char *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
putc(*c);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_puts(char **s)
|
||||
*/
|
||||
static int API_puts(va_list ap)
|
||||
{
|
||||
char *s;
|
||||
|
||||
if ((s = (char *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
puts(s);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_reset(void)
|
||||
*/
|
||||
static int API_reset(va_list ap)
|
||||
{
|
||||
do_reset(NULL, 0, 0, NULL);
|
||||
|
||||
/* NOT REACHED */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_get_sys_info(struct sys_info *si)
|
||||
*
|
||||
* fill out the sys_info struct containing selected parameters about the
|
||||
* machine
|
||||
*/
|
||||
static int API_get_sys_info(va_list ap)
|
||||
{
|
||||
struct sys_info *si;
|
||||
|
||||
si = (struct sys_info *)va_arg(ap, u_int32_t);
|
||||
if (si == NULL)
|
||||
return API_ENOMEM;
|
||||
|
||||
return (platform_sys_info(si)) ? 0 : API_ENODEV;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_udelay(unsigned long *udelay)
|
||||
*/
|
||||
static int API_udelay(va_list ap)
|
||||
{
|
||||
unsigned long *d;
|
||||
|
||||
if ((d = (unsigned long *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
udelay(*d);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_get_timer(unsigned long *current, unsigned long *base)
|
||||
*/
|
||||
static int API_get_timer(va_list ap)
|
||||
{
|
||||
unsigned long *base, *cur;
|
||||
|
||||
cur = (unsigned long *)va_arg(ap, u_int32_t);
|
||||
if (cur == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
base = (unsigned long *)va_arg(ap, u_int32_t);
|
||||
if (base == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
*cur = get_timer(*base);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_dev_enum(struct device_info *)
|
||||
*
|
||||
*
|
||||
* cookies uniqely identify the previously enumerated device instance and
|
||||
* provide a hint for what to inspect in current enum iteration:
|
||||
*
|
||||
* - net: ð_device struct address from list pointed to by eth_devices
|
||||
*
|
||||
* - storage: block_dev_desc_t struct address from &ide_dev_desc[n],
|
||||
* &scsi_dev_desc[n] and similar tables
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int API_dev_enum(va_list ap)
|
||||
{
|
||||
struct device_info *di;
|
||||
|
||||
/* arg is ptr to the device_info struct we are going to fill out */
|
||||
di = (struct device_info *)va_arg(ap, u_int32_t);
|
||||
if (di == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
if (di->cookie == NULL) {
|
||||
/* start over - clean up enumeration */
|
||||
dev_enum_reset(); /* XXX shouldn't the name contain 'stor'? */
|
||||
debugf("RESTART ENUM\n");
|
||||
|
||||
/* net device enumeration first */
|
||||
if (dev_enum_net(di))
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* The hidden assumption is there can only be one active network
|
||||
* device and it is identified upon enumeration (re)start, so there's
|
||||
* no point in trying to find network devices in other cases than the
|
||||
* (re)start and hence the 'next' device can only be storage
|
||||
*/
|
||||
if (!dev_enum_storage(di))
|
||||
/* make sure we mark there are no more devices */
|
||||
di->cookie = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int API_dev_open(va_list ap)
|
||||
{
|
||||
struct device_info *di;
|
||||
int err = 0;
|
||||
|
||||
/* arg is ptr to the device_info struct */
|
||||
di = (struct device_info *)va_arg(ap, u_int32_t);
|
||||
if (di == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
/* Allow only one consumer of the device at a time */
|
||||
if (di->state == DEV_STA_OPEN)
|
||||
return API_EBUSY;
|
||||
|
||||
if (di->cookie == NULL)
|
||||
return API_ENODEV;
|
||||
|
||||
if (di->type & DEV_TYP_STOR)
|
||||
err = dev_open_stor(di->cookie);
|
||||
|
||||
else if (di->type & DEV_TYP_NET)
|
||||
err = dev_open_net(di->cookie);
|
||||
else
|
||||
err = API_ENODEV;
|
||||
|
||||
if (!err)
|
||||
di->state = DEV_STA_OPEN;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
static int API_dev_close(va_list ap)
|
||||
{
|
||||
struct device_info *di;
|
||||
int err = 0;
|
||||
|
||||
/* arg is ptr to the device_info struct */
|
||||
di = (struct device_info *)va_arg(ap, u_int32_t);
|
||||
if (di == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
if (di->state == DEV_STA_CLOSED)
|
||||
return 0;
|
||||
|
||||
if (di->cookie == NULL)
|
||||
return API_ENODEV;
|
||||
|
||||
if (di->type & DEV_TYP_STOR)
|
||||
err = dev_close_stor(di->cookie);
|
||||
|
||||
else if (di->type & DEV_TYP_NET)
|
||||
err = dev_close_net(di->cookie);
|
||||
else
|
||||
/*
|
||||
* In case of unknown device we cannot change its state, so
|
||||
* only return error code
|
||||
*/
|
||||
err = API_ENODEV;
|
||||
|
||||
if (!err)
|
||||
di->state = DEV_STA_CLOSED;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Notice: this is for sending network packets only, as U-Boot does not
|
||||
* support writing to storage at the moment (12.2007)
|
||||
*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_dev_write(
|
||||
* struct device_info *di,
|
||||
* void *buf,
|
||||
* int *len
|
||||
* )
|
||||
*
|
||||
* buf: ptr to buffer from where to get the data to send
|
||||
*
|
||||
* len: length of packet to be sent (in bytes)
|
||||
*
|
||||
*/
|
||||
static int API_dev_write(va_list ap)
|
||||
{
|
||||
struct device_info *di;
|
||||
void *buf;
|
||||
int *len;
|
||||
int err = 0;
|
||||
|
||||
/* 1. arg is ptr to the device_info struct */
|
||||
di = (struct device_info *)va_arg(ap, u_int32_t);
|
||||
if (di == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
/* XXX should we check if device is open? i.e. the ->state ? */
|
||||
|
||||
if (di->cookie == NULL)
|
||||
return API_ENODEV;
|
||||
|
||||
/* 2. arg is ptr to buffer from where to get data to write */
|
||||
buf = (void *)va_arg(ap, u_int32_t);
|
||||
if (buf == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
/* 3. arg is length of buffer */
|
||||
len = (int *)va_arg(ap, u_int32_t);
|
||||
if (len == NULL)
|
||||
return API_EINVAL;
|
||||
if (*len <= 0)
|
||||
return API_EINVAL;
|
||||
|
||||
if (di->type & DEV_TYP_STOR)
|
||||
/*
|
||||
* write to storage is currently not supported by U-Boot:
|
||||
* no storage device implements block_write() method
|
||||
*/
|
||||
return API_ENODEV;
|
||||
|
||||
else if (di->type & DEV_TYP_NET)
|
||||
err = dev_write_net(di->cookie, buf, *len);
|
||||
else
|
||||
err = API_ENODEV;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_dev_read(
|
||||
* struct device_info *di,
|
||||
* void *buf,
|
||||
* size_t *len,
|
||||
* unsigned long *start
|
||||
* size_t *act_len
|
||||
* )
|
||||
*
|
||||
* buf: ptr to buffer where to put the read data
|
||||
*
|
||||
* len: ptr to length to be read
|
||||
* - network: len of packet to read (in bytes)
|
||||
* - storage: # of blocks to read (can vary in size depending on define)
|
||||
*
|
||||
* start: ptr to start block (only used for storage devices, ignored for
|
||||
* network)
|
||||
*
|
||||
* act_len: ptr to where to put the len actually read
|
||||
*/
|
||||
static int API_dev_read(va_list ap)
|
||||
{
|
||||
struct device_info *di;
|
||||
void *buf;
|
||||
lbasize_t *len_stor, *act_len_stor;
|
||||
lbastart_t *start;
|
||||
int *len_net, *act_len_net;
|
||||
|
||||
/* 1. arg is ptr to the device_info struct */
|
||||
di = (struct device_info *)va_arg(ap, u_int32_t);
|
||||
if (di == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
/* XXX should we check if device is open? i.e. the ->state ? */
|
||||
|
||||
if (di->cookie == NULL)
|
||||
return API_ENODEV;
|
||||
|
||||
/* 2. arg is ptr to buffer from where to put the read data */
|
||||
buf = (void *)va_arg(ap, u_int32_t);
|
||||
if (buf == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
if (di->type & DEV_TYP_STOR) {
|
||||
/* 3. arg - ptr to var with # of blocks to read */
|
||||
len_stor = (lbasize_t *)va_arg(ap, u_int32_t);
|
||||
if (!len_stor)
|
||||
return API_EINVAL;
|
||||
if (*len_stor <= 0)
|
||||
return API_EINVAL;
|
||||
|
||||
/* 4. arg - ptr to var with start block */
|
||||
start = (lbastart_t *)va_arg(ap, u_int32_t);
|
||||
|
||||
/* 5. arg - ptr to var where to put the len actually read */
|
||||
act_len_stor = (lbasize_t *)va_arg(ap, u_int32_t);
|
||||
if (!act_len_stor)
|
||||
return API_EINVAL;
|
||||
|
||||
*act_len_stor = dev_read_stor(di->cookie, buf, *len_stor, *start);
|
||||
|
||||
} else if (di->type & DEV_TYP_NET) {
|
||||
|
||||
/* 3. arg points to the var with length of packet to read */
|
||||
len_net = (int *)va_arg(ap, u_int32_t);
|
||||
if (!len_net)
|
||||
return API_EINVAL;
|
||||
if (*len_net <= 0)
|
||||
return API_EINVAL;
|
||||
|
||||
/* 4. - ptr to var where to put the len actually read */
|
||||
act_len_net = (int *)va_arg(ap, u_int32_t);
|
||||
if (!act_len_net)
|
||||
return API_EINVAL;
|
||||
|
||||
*act_len_net = dev_read_net(di->cookie, buf, *len_net);
|
||||
|
||||
} else
|
||||
return API_ENODEV;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_env_get(const char *name, char **value)
|
||||
*
|
||||
* name: ptr to name of env var
|
||||
*/
|
||||
static int API_env_get(va_list ap)
|
||||
{
|
||||
char *name, **value;
|
||||
|
||||
if ((name = (char *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
if ((value = (char **)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
*value = getenv(name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_env_set(const char *name, const char *value)
|
||||
*
|
||||
* name: ptr to name of env var
|
||||
*
|
||||
* value: ptr to value to be set
|
||||
*/
|
||||
static int API_env_set(va_list ap)
|
||||
{
|
||||
char *name, *value;
|
||||
|
||||
if ((name = (char *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
if ((value = (char *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
setenv(name, value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_env_enum(const char *last, char **next)
|
||||
*
|
||||
* last: ptr to name of env var found in last iteration
|
||||
*/
|
||||
static int API_env_enum(va_list ap)
|
||||
{
|
||||
int i, n;
|
||||
char *last, **next;
|
||||
|
||||
last = (char *)va_arg(ap, u_int32_t);
|
||||
|
||||
if ((next = (char **)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
if (last == NULL)
|
||||
/* start over */
|
||||
*next = ((char *)env_get_addr(0));
|
||||
else {
|
||||
*next = last;
|
||||
|
||||
for (i = 0; env_get_char(i) != '\0'; i = n + 1) {
|
||||
for (n = i; env_get_char(n) != '\0'; ++n) {
|
||||
if (n >= CONFIG_ENV_SIZE) {
|
||||
/* XXX shouldn't we set *next = NULL?? */
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (envmatch((uchar *)last, i) < 0)
|
||||
continue;
|
||||
|
||||
/* try to get next name */
|
||||
i = n + 1;
|
||||
if (env_get_char(i) == '\0') {
|
||||
/* no more left */
|
||||
*next = NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
*next = ((char *)env_get_addr(i));
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_display_get_info(int type, struct display_info *di)
|
||||
*/
|
||||
static int API_display_get_info(va_list ap)
|
||||
{
|
||||
int type;
|
||||
struct display_info *di;
|
||||
|
||||
type = va_arg(ap, int);
|
||||
di = va_arg(ap, struct display_info *);
|
||||
|
||||
return display_get_info(type, di);
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_display_draw_bitmap(ulong bitmap, int x, int y)
|
||||
*/
|
||||
static int API_display_draw_bitmap(va_list ap)
|
||||
{
|
||||
ulong bitmap;
|
||||
int x, y;
|
||||
|
||||
bitmap = va_arg(ap, ulong);
|
||||
x = va_arg(ap, int);
|
||||
y = va_arg(ap, int);
|
||||
|
||||
return display_draw_bitmap(bitmap, x, y);
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* void API_display_clear(void)
|
||||
*/
|
||||
static int API_display_clear(va_list ap)
|
||||
{
|
||||
display_clear();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static cfp_t calls_table[API_MAXCALL] = { NULL, };
|
||||
|
||||
/*
|
||||
* The main syscall entry point - this is not reentrant, only one call is
|
||||
* serviced until finished.
|
||||
*
|
||||
* e.g. syscall(1, int *, u_int32_t, u_int32_t, u_int32_t, u_int32_t);
|
||||
*
|
||||
* call: syscall number
|
||||
*
|
||||
* retval: points to the return value placeholder, this is the place the
|
||||
* syscall puts its return value, if NULL the caller does not
|
||||
* expect a return value
|
||||
*
|
||||
* ... syscall arguments (variable number)
|
||||
*
|
||||
* returns: 0 if the call not found, 1 if serviced
|
||||
*/
|
||||
int syscall(int call, int *retval, ...)
|
||||
{
|
||||
va_list ap;
|
||||
int rv;
|
||||
|
||||
if (call < 0 || call >= calls_no) {
|
||||
debugf("invalid call #%d\n", call);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (calls_table[call] == NULL) {
|
||||
debugf("syscall #%d does not have a handler\n", call);
|
||||
return 0;
|
||||
}
|
||||
|
||||
va_start(ap, retval);
|
||||
rv = calls_table[call](ap);
|
||||
if (retval != NULL)
|
||||
*retval = rv;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
void api_init(void)
|
||||
{
|
||||
struct api_signature *sig = NULL;
|
||||
|
||||
/* TODO put this into linker set one day... */
|
||||
calls_table[API_RSVD] = NULL;
|
||||
calls_table[API_GETC] = &API_getc;
|
||||
calls_table[API_PUTC] = &API_putc;
|
||||
calls_table[API_TSTC] = &API_tstc;
|
||||
calls_table[API_PUTS] = &API_puts;
|
||||
calls_table[API_RESET] = &API_reset;
|
||||
calls_table[API_GET_SYS_INFO] = &API_get_sys_info;
|
||||
calls_table[API_UDELAY] = &API_udelay;
|
||||
calls_table[API_GET_TIMER] = &API_get_timer;
|
||||
calls_table[API_DEV_ENUM] = &API_dev_enum;
|
||||
calls_table[API_DEV_OPEN] = &API_dev_open;
|
||||
calls_table[API_DEV_CLOSE] = &API_dev_close;
|
||||
calls_table[API_DEV_READ] = &API_dev_read;
|
||||
calls_table[API_DEV_WRITE] = &API_dev_write;
|
||||
calls_table[API_ENV_GET] = &API_env_get;
|
||||
calls_table[API_ENV_SET] = &API_env_set;
|
||||
calls_table[API_ENV_ENUM] = &API_env_enum;
|
||||
calls_table[API_DISPLAY_GET_INFO] = &API_display_get_info;
|
||||
calls_table[API_DISPLAY_DRAW_BITMAP] = &API_display_draw_bitmap;
|
||||
calls_table[API_DISPLAY_CLEAR] = &API_display_clear;
|
||||
calls_no = API_MAXCALL;
|
||||
|
||||
debugf("API initialized with %d calls\n", calls_no);
|
||||
|
||||
dev_stor_init();
|
||||
|
||||
/*
|
||||
* Produce the signature so the API consumers can find it
|
||||
*/
|
||||
sig = malloc(sizeof(struct api_signature));
|
||||
if (sig == NULL) {
|
||||
printf("API: could not allocate memory for the signature!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
debugf("API sig @ 0x%08x\n", sig);
|
||||
memcpy(sig->magic, API_SIG_MAGIC, 8);
|
||||
sig->version = API_SIG_VERSION;
|
||||
sig->syscall = &syscall;
|
||||
sig->checksum = 0;
|
||||
sig->checksum = crc32(0, (unsigned char *)sig,
|
||||
sizeof(struct api_signature));
|
||||
debugf("syscall entry: 0x%08x\n", sig->syscall);
|
||||
}
|
||||
|
||||
void platform_set_mr(struct sys_info *si, unsigned long start, unsigned long size,
|
||||
int flags)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (!si->mr || !size || (flags == 0))
|
||||
return;
|
||||
|
||||
/* find free slot */
|
||||
for (i = 0; i < si->mr_no; i++)
|
||||
if (si->mr[i].flags == 0) {
|
||||
/* insert new mem region */
|
||||
si->mr[i].start = start;
|
||||
si->mr[i].size = size;
|
||||
si->mr[i].flags = flags;
|
||||
return;
|
||||
}
|
||||
}
|
|
@ -0,0 +1,58 @@
|
|||
/*
|
||||
* Copyright (c) 2011 The Chromium OS Authors.
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <api_public.h>
|
||||
#include <lcd.h>
|
||||
#include <video_font.h> /* Get font width and height */
|
||||
|
||||
/* lcd.h needs BMP_LOGO_HEIGHT to calculate CONSOLE_ROWS */
|
||||
#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
|
||||
#include <bmp_logo.h>
|
||||
#endif
|
||||
|
||||
/* TODO(clchiou): add support of video device */
|
||||
|
||||
int display_get_info(int type, struct display_info *di)
|
||||
{
|
||||
if (!di)
|
||||
return API_EINVAL;
|
||||
|
||||
switch (type) {
|
||||
default:
|
||||
debug("%s: unsupport display device type: %d\n",
|
||||
__FILE__, type);
|
||||
return API_ENODEV;
|
||||
#ifdef CONFIG_LCD
|
||||
case DISPLAY_TYPE_LCD:
|
||||
di->pixel_width = panel_info.vl_col;
|
||||
di->pixel_height = panel_info.vl_row;
|
||||
di->screen_rows = lcd_get_screen_rows();
|
||||
di->screen_cols = lcd_get_screen_columns();
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
|
||||
di->type = type;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int display_draw_bitmap(ulong bitmap, int x, int y)
|
||||
{
|
||||
if (!bitmap)
|
||||
return API_EINVAL;
|
||||
#ifdef CONFIG_LCD
|
||||
return lcd_display_bitmap(bitmap, x, y);
|
||||
#else
|
||||
return API_ENODEV;
|
||||
#endif
|
||||
}
|
||||
|
||||
void display_clear(void)
|
||||
{
|
||||
#ifdef CONFIG_LCD
|
||||
lcd_clear();
|
||||
#endif
|
||||
}
|
|
@ -0,0 +1,87 @@
|
|||
/*
|
||||
* (C) Copyright 2007 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <net.h>
|
||||
#include <linux/types.h>
|
||||
#include <api_public.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define DEBUG
|
||||
#undef DEBUG
|
||||
|
||||
#ifdef DEBUG
|
||||
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||
#else
|
||||
#define debugf(fmt, args...)
|
||||
#endif
|
||||
|
||||
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||
|
||||
|
||||
static int dev_valid_net(void *cookie)
|
||||
{
|
||||
return ((void *)eth_get_dev() == cookie) ? 1 : 0;
|
||||
}
|
||||
|
||||
int dev_open_net(void *cookie)
|
||||
{
|
||||
if (!dev_valid_net(cookie))
|
||||
return API_ENODEV;
|
||||
|
||||
if (eth_init(gd->bd) < 0)
|
||||
return API_EIO;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dev_close_net(void *cookie)
|
||||
{
|
||||
if (!dev_valid_net(cookie))
|
||||
return API_ENODEV;
|
||||
|
||||
eth_halt();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* There can only be one active eth interface at a time - use what is
|
||||
* currently set to eth_current
|
||||
*/
|
||||
int dev_enum_net(struct device_info *di)
|
||||
{
|
||||
struct eth_device *eth_current = eth_get_dev();
|
||||
|
||||
di->type = DEV_TYP_NET;
|
||||
di->cookie = (void *)eth_current;
|
||||
if (di->cookie == NULL)
|
||||
return 0;
|
||||
|
||||
memcpy(di->di_net.hwaddr, eth_current->enetaddr, 6);
|
||||
|
||||
debugf("device found, returning cookie 0x%08x\n",
|
||||
(u_int32_t)di->cookie);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int dev_write_net(void *cookie, void *buf, int len)
|
||||
{
|
||||
/* XXX verify that cookie points to a valid net device??? */
|
||||
|
||||
return eth_send(buf, len);
|
||||
}
|
||||
|
||||
int dev_read_net(void *cookie, void *buf, int len)
|
||||
{
|
||||
/* XXX verify that cookie points to a valid net device??? */
|
||||
|
||||
return eth_receive(buf, len);
|
||||
}
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* (C) Copyright 2007 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*
|
||||
* This file contains routines that fetch data from ARM-dependent sources
|
||||
* (bd_info etc.)
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <linux/types.h>
|
||||
#include <api_public.h>
|
||||
|
||||
#include <asm/u-boot.h>
|
||||
#include <asm/global_data.h>
|
||||
|
||||
#include "api_private.h"
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/*
|
||||
* Important notice: handling of individual fields MUST be kept in sync with
|
||||
* include/asm-arm/u-boot.h and include/asm-arm/global_data.h, so any changes
|
||||
* need to reflect their current state and layout of structures involved!
|
||||
*/
|
||||
int platform_sys_info(struct sys_info *si)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
|
||||
platform_set_mr(si, gd->bd->bi_dram[i].start,
|
||||
gd->bd->bi_dram[i].size, MR_ATTR_DRAM);
|
||||
|
||||
return 1;
|
||||
}
|
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
* (C) Copyright 2007 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*
|
||||
* This file contains routines that fetch data from PowerPC-dependent sources
|
||||
* (bd_info etc.)
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <linux/types.h>
|
||||
#include <api_public.h>
|
||||
|
||||
#include <asm/u-boot.h>
|
||||
#include <asm/global_data.h>
|
||||
|
||||
#include "api_private.h"
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/*
|
||||
* Important notice: handling of individual fields MUST be kept in sync with
|
||||
* include/asm-ppc/u-boot.h and include/asm-ppc/global_data.h, so any changes
|
||||
* need to reflect their current state and layout of structures involved!
|
||||
*/
|
||||
int platform_sys_info(struct sys_info *si)
|
||||
{
|
||||
si->clk_bus = gd->bus_clk;
|
||||
si->clk_cpu = gd->cpu_clk;
|
||||
|
||||
#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) || \
|
||||
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
|
||||
#define bi_bar bi_immr_base
|
||||
#elif defined(CONFIG_MPC5xxx)
|
||||
#define bi_bar bi_mbar_base
|
||||
#elif defined(CONFIG_MPC83xx)
|
||||
#define bi_bar bi_immrbar
|
||||
#endif
|
||||
|
||||
#if defined(bi_bar)
|
||||
si->bar = gd->bd->bi_bar;
|
||||
#undef bi_bar
|
||||
#else
|
||||
si->bar = 0;
|
||||
#endif
|
||||
|
||||
platform_set_mr(si, gd->bd->bi_memstart, gd->bd->bi_memsize, MR_ATTR_DRAM);
|
||||
platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH);
|
||||
platform_set_mr(si, gd->bd->bi_sramstart, gd->bd->bi_sramsize, MR_ATTR_SRAM);
|
||||
|
||||
return 1;
|
||||
}
|
|
@ -0,0 +1,35 @@
|
|||
/*
|
||||
* (C) Copyright 2007 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef _API_PRIVATE_H_
|
||||
#define _API_PRIVATE_H_
|
||||
|
||||
void api_init(void);
|
||||
void platform_set_mr(struct sys_info *, unsigned long, unsigned long, int);
|
||||
int platform_sys_info(struct sys_info *);
|
||||
|
||||
void dev_enum_reset(void);
|
||||
int dev_enum_storage(struct device_info *);
|
||||
int dev_enum_net(struct device_info *);
|
||||
|
||||
int dev_open_stor(void *);
|
||||
int dev_open_net(void *);
|
||||
int dev_close_stor(void *);
|
||||
int dev_close_net(void *);
|
||||
|
||||
lbasize_t dev_read_stor(void *, void *, lbasize_t, lbastart_t);
|
||||
int dev_read_net(void *, void *, int);
|
||||
int dev_write_net(void *, void *, int);
|
||||
|
||||
void dev_stor_init(void);
|
||||
|
||||
int display_get_info(int type, struct display_info *di);
|
||||
int display_draw_bitmap(ulong bitmap, int x, int y);
|
||||
void display_clear(void);
|
||||
|
||||
#endif /* _API_PRIVATE_H_ */
|
|
@ -0,0 +1,373 @@
|
|||
/*
|
||||
* (C) Copyright 2007-2008 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <api_public.h>
|
||||
|
||||
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
|
||||
#include <usb.h>
|
||||
#endif
|
||||
|
||||
#define DEBUG
|
||||
#undef DEBUG
|
||||
|
||||
#ifdef DEBUG
|
||||
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||
#else
|
||||
#define debugf(fmt, args...)
|
||||
#endif
|
||||
|
||||
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||
|
||||
|
||||
#define ENUM_IDE 0
|
||||
#define ENUM_USB 1
|
||||
#define ENUM_SCSI 2
|
||||
#define ENUM_MMC 3
|
||||
#define ENUM_SATA 4
|
||||
#define ENUM_MAX 5
|
||||
|
||||
struct stor_spec {
|
||||
int max_dev;
|
||||
int enum_started;
|
||||
int enum_ended;
|
||||
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
|
||||
char *name;
|
||||
};
|
||||
|
||||
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, "" }, };
|
||||
|
||||
|
||||
void dev_stor_init(void)
|
||||
{
|
||||
#if defined(CONFIG_CMD_IDE)
|
||||
specs[ENUM_IDE].max_dev = CONFIG_SYS_IDE_MAXDEVICE;
|
||||
specs[ENUM_IDE].enum_started = 0;
|
||||
specs[ENUM_IDE].enum_ended = 0;
|
||||
specs[ENUM_IDE].type = DEV_TYP_STOR | DT_STOR_IDE;
|
||||
specs[ENUM_IDE].name = "ide";
|
||||
#endif
|
||||
#if defined(CONFIG_CMD_MMC)
|
||||
specs[ENUM_MMC].max_dev = CONFIG_SYS_MMC_MAX_DEVICE;
|
||||
specs[ENUM_MMC].enum_started = 0;
|
||||
specs[ENUM_MMC].enum_ended = 0;
|
||||
specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC;
|
||||
specs[ENUM_MMC].name = "mmc";
|
||||
#endif
|
||||
#if defined(CONFIG_CMD_SATA)
|
||||
specs[ENUM_SATA].max_dev = CONFIG_SYS_SATA_MAX_DEVICE;
|
||||
specs[ENUM_SATA].enum_started = 0;
|
||||
specs[ENUM_SATA].enum_ended = 0;
|
||||
specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA;
|
||||
specs[ENUM_SATA].name = "sata";
|
||||
#endif
|
||||
#if defined(CONFIG_CMD_SCSI)
|
||||
specs[ENUM_SCSI].max_dev = CONFIG_SYS_SCSI_MAX_DEVICE;
|
||||
specs[ENUM_SCSI].enum_started = 0;
|
||||
specs[ENUM_SCSI].enum_ended = 0;
|
||||
specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;
|
||||
specs[ENUM_SCSI].name = "scsi";
|
||||
#endif
|
||||
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
|
||||
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
|
||||
specs[ENUM_USB].enum_started = 0;
|
||||
specs[ENUM_USB].enum_ended = 0;
|
||||
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
|
||||
specs[ENUM_USB].name = "usb";
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Finds next available device in the storage group
|
||||
*
|
||||
* type: storage group type - ENUM_IDE, ENUM_SCSI etc.
|
||||
*
|
||||
* first: if 1 the first device in the storage group is returned (if
|
||||
* exists), if 0 the next available device is searched
|
||||
*
|
||||
* more: returns 0/1 depending if there are more devices in this group
|
||||
* available (for future iterations)
|
||||
*
|
||||
* returns: 0/1 depending if device found in this iteration
|
||||
*/
|
||||
static int dev_stor_get(int type, int first, int *more, struct device_info *di)
|
||||
{
|
||||
int found = 0;
|
||||
*more = 0;
|
||||
|
||||
int i;
|
||||
|
||||
block_dev_desc_t *dd;
|
||||
|
||||
if (first) {
|
||||
di->cookie = (void *)get_dev(specs[type].name, 0);
|
||||
if (di->cookie == NULL)
|
||||
return 0;
|
||||
else
|
||||
found = 1;
|
||||
|
||||
} else {
|
||||
for (i = 0; i < specs[type].max_dev; i++)
|
||||
if (di->cookie == (void *)get_dev(specs[type].name, i)) {
|
||||
/* previous cookie found -- advance to the
|
||||
* next device, if possible */
|
||||
|
||||
if (++i >= specs[type].max_dev) {
|
||||
/* out of range, no more to enum */
|
||||
di->cookie = NULL;
|
||||
break;
|
||||
}
|
||||
|
||||
di->cookie = (void *)get_dev(specs[type].name, i);
|
||||
if (di->cookie == NULL)
|
||||
return 0;
|
||||
else
|
||||
found = 1;
|
||||
|
||||
/* provide hint if there are more devices in
|
||||
* this group to enumerate */
|
||||
if ((i + 1) < specs[type].max_dev)
|
||||
*more = 1;
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (found) {
|
||||
di->type = specs[type].type;
|
||||
|
||||
if (di->cookie != NULL) {
|
||||
dd = (block_dev_desc_t *)di->cookie;
|
||||
if (dd->type == DEV_TYPE_UNKNOWN) {
|
||||
debugf("device instance exists, but is not active..");
|
||||
found = 0;
|
||||
} else {
|
||||
di->di_stor.block_count = dd->lba;
|
||||
di->di_stor.block_size = dd->blksz;
|
||||
}
|
||||
}
|
||||
|
||||
} else
|
||||
di->cookie = NULL;
|
||||
|
||||
return found;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* returns: ENUM_IDE, ENUM_USB etc. based on block_dev_desc_t
|
||||
*/
|
||||
static int dev_stor_type(block_dev_desc_t *dd)
|
||||
{
|
||||
int i, j;
|
||||
|
||||
for (i = ENUM_IDE; i < ENUM_MAX; i++)
|
||||
for (j = 0; j < specs[i].max_dev; j++)
|
||||
if (dd == get_dev(specs[i].name, j))
|
||||
return i;
|
||||
|
||||
return ENUM_MAX;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* returns: 0/1 whether cookie points to some device in this group
|
||||
*/
|
||||
static int dev_is_stor(int type, struct device_info *di)
|
||||
{
|
||||
return (dev_stor_type(di->cookie) == type) ? 1 : 0;
|
||||
}
|
||||
|
||||
|
||||
static int dev_enum_stor(int type, struct device_info *di)
|
||||
{
|
||||
int found = 0, more = 0;
|
||||
|
||||
debugf("called, type %d\n", type);
|
||||
|
||||
/*
|
||||
* Formulae for enumerating storage devices:
|
||||
* 1. if cookie (hint from previous enum call) is NULL we start again
|
||||
* with enumeration, so return the first available device, done.
|
||||
*
|
||||
* 2. if cookie is not NULL, check if it identifies some device in
|
||||
* this group:
|
||||
*
|
||||
* 2a. if cookie is a storage device from our group (IDE, USB etc.),
|
||||
* return next available (if exists) in this group
|
||||
*
|
||||
* 2b. if it isn't device from our group, check if such devices were
|
||||
* ever enumerated before:
|
||||
* - if not, return the first available device from this group
|
||||
* - else return 0
|
||||
*/
|
||||
|
||||
if (di->cookie == NULL) {
|
||||
|
||||
debugf("group%d - enum restart\n", type);
|
||||
|
||||
/*
|
||||
* 1. Enumeration (re-)started: take the first available
|
||||
* device, if exists
|
||||
*/
|
||||
found = dev_stor_get(type, 1, &more, di);
|
||||
specs[type].enum_started = 1;
|
||||
|
||||
} else if (dev_is_stor(type, di)) {
|
||||
|
||||
debugf("group%d - enum continued for the next device\n", type);
|
||||
|
||||
if (specs[type].enum_ended) {
|
||||
debugf("group%d - nothing more to enum!\n", type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 2a. Attempt to take a next available device in the group */
|
||||
found = dev_stor_get(type, 0, &more, di);
|
||||
|
||||
} else {
|
||||
|
||||
if (specs[type].enum_ended) {
|
||||
debugf("group %d - already enumerated, skipping\n", type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
debugf("group%d - first time enum\n", type);
|
||||
|
||||
if (specs[type].enum_started == 0) {
|
||||
/*
|
||||
* 2b. If enumerating devices in this group did not
|
||||
* happen before, it means the cookie pointed to a
|
||||
* device frome some other group (another storage
|
||||
* group, or network); in this case try to take the
|
||||
* first available device from our group
|
||||
*/
|
||||
specs[type].enum_started = 1;
|
||||
|
||||
/*
|
||||
* Attempt to take the first device in this group:
|
||||
*'first element' flag is set
|
||||
*/
|
||||
found = dev_stor_get(type, 1, &more, di);
|
||||
|
||||
} else {
|
||||
errf("group%d - out of order iteration\n", type);
|
||||
found = 0;
|
||||
more = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* If there are no more devices in this group, consider its
|
||||
* enumeration finished
|
||||
*/
|
||||
specs[type].enum_ended = (!more) ? 1 : 0;
|
||||
|
||||
if (found)
|
||||
debugf("device found, returning cookie 0x%08x\n",
|
||||
(u_int32_t)di->cookie);
|
||||
else
|
||||
debugf("no device found\n");
|
||||
|
||||
return found;
|
||||
}
|
||||
|
||||
void dev_enum_reset(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ENUM_MAX; i ++) {
|
||||
specs[i].enum_started = 0;
|
||||
specs[i].enum_ended = 0;
|
||||
}
|
||||
}
|
||||
|
||||
int dev_enum_storage(struct device_info *di)
|
||||
{
|
||||
int i;
|
||||
|
||||
/*
|
||||
* check: ide, usb, scsi, mmc
|
||||
*/
|
||||
for (i = ENUM_IDE; i < ENUM_MAX; i ++) {
|
||||
if (dev_enum_stor(i, di))
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dev_stor_is_valid(int type, block_dev_desc_t *dd)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < specs[type].max_dev; i++)
|
||||
if (dd == get_dev(specs[type].name, i))
|
||||
if (dd->type != DEV_TYPE_UNKNOWN)
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int dev_open_stor(void *cookie)
|
||||
{
|
||||
int type = dev_stor_type(cookie);
|
||||
|
||||
if (type == ENUM_MAX)
|
||||
return API_ENODEV;
|
||||
|
||||
if (dev_stor_is_valid(type, (block_dev_desc_t *)cookie))
|
||||
return 0;
|
||||
|
||||
return API_ENODEV;
|
||||
}
|
||||
|
||||
|
||||
int dev_close_stor(void *cookie)
|
||||
{
|
||||
/*
|
||||
* Not much to do as we actually do not alter storage devices upon
|
||||
* close
|
||||
*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int dev_stor_index(block_dev_desc_t *dd)
|
||||
{
|
||||
int i, type;
|
||||
|
||||
type = dev_stor_type(dd);
|
||||
for (i = 0; i < specs[type].max_dev; i++)
|
||||
if (dd == get_dev(specs[type].name, i))
|
||||
return i;
|
||||
|
||||
return (specs[type].max_dev);
|
||||
}
|
||||
|
||||
|
||||
lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start)
|
||||
{
|
||||
int type;
|
||||
block_dev_desc_t *dd = (block_dev_desc_t *)cookie;
|
||||
|
||||
if ((type = dev_stor_type(dd)) == ENUM_MAX)
|
||||
return 0;
|
||||
|
||||
if (!dev_stor_is_valid(type, dd))
|
||||
return 0;
|
||||
|
||||
if ((dd->block_read) == NULL) {
|
||||
debugf("no block_read() for device 0x%08x\n", cookie);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return (dd->block_read(dev_stor_index(dd), start, len, buf));
|
||||
}
|
|
@ -0,0 +1,2 @@
|
|||
/*/include/asm/arch
|
||||
/*/include/asm/proc
|
|
@ -0,0 +1,116 @@
|
|||
#
|
||||
# (C) Copyright 2000-2002
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
CROSS_COMPILE ?= arm-linux-
|
||||
|
||||
ifndef CONFIG_STANDALONE_LOAD_ADDR
|
||||
ifneq ($(CONFIG_OMAP_COMMON),)
|
||||
CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
|
||||
else
|
||||
CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
|
||||
endif
|
||||
endif
|
||||
|
||||
LDFLAGS_FINAL += --gc-sections
|
||||
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
|
||||
-fno-common -ffixed-r9 -msoft-float
|
||||
|
||||
#
|
||||
# When we use a hardfp toolchain if there are both 'libgcc.a' (hardfp) and
|
||||
# 'arm-linux-gnueabi/libgcc.a' (softfp) we need to use the latter. We
|
||||
# cannot always build with a hardfp-only toolchain.
|
||||
#
|
||||
ARCH_PLATFORM_LIBGCC := $(shell \
|
||||
X=`$(CC) -print-file-name=arm-linux-gnueabi/libgcc.a`; \
|
||||
if [ -f $$X ]; then echo $$X ; \
|
||||
else $(CC) -print-file-name=libgcc.a ; \
|
||||
fi)
|
||||
|
||||
# Support generic board on ARM
|
||||
__HAVE_ARCH_GENERIC_BOARD := y
|
||||
|
||||
PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
|
||||
|
||||
# Choose between ARM/Thumb instruction sets
|
||||
ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
|
||||
PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
|
||||
$(call cc-option,-marm,)\
|
||||
$(call cc-option,-mno-thumb-interwork,)\
|
||||
)
|
||||
else
|
||||
PF_CPPFLAGS_ARM := $(call cc-option,-marm,) \
|
||||
$(call cc-option,-mno-thumb-interwork,)
|
||||
endif
|
||||
|
||||
# Only test once
|
||||
ifneq ($(CONFIG_SPL_BUILD),y)
|
||||
ALL-$(CONFIG_SYS_THUMB_BUILD) += checkthumb
|
||||
endif
|
||||
|
||||
# Try if EABI is supported, else fall back to old API,
|
||||
# i. e. for example:
|
||||
# - with ELDK 4.2 (EABI supported), use:
|
||||
# -mabi=aapcs-linux
|
||||
# - with ELDK 4.1 (gcc 4.x, no EABI), use:
|
||||
# -mabi=apcs-gnu
|
||||
# - with ELDK 3.1 (gcc 3.x), use:
|
||||
# -mapcs-32
|
||||
PF_CPPFLAGS_ABI := $(call cc-option,\
|
||||
-mabi=aapcs-linux,\
|
||||
$(call cc-option,\
|
||||
-mapcs-32,\
|
||||
$(call cc-option,\
|
||||
-mabi=apcs-gnu,\
|
||||
)\
|
||||
)\
|
||||
)
|
||||
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI)
|
||||
|
||||
# For EABI, make sure to provide raise()
|
||||
ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
|
||||
# This file is parsed many times, so the string may get added multiple
|
||||
# times. Also, the prefix needs to be different based on whether
|
||||
# CONFIG_SPL_BUILD is defined or not. 'filter-out' the existing entry
|
||||
# before adding the correct one.
|
||||
ifdef CONFIG_SPL_BUILD
|
||||
PLATFORM_LIBS := $(SPLTREE)/arch/arm/lib/eabi_compat.o \
|
||||
$(filter-out %/arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS))
|
||||
else
|
||||
PLATFORM_LIBS := $(OBJTREE)/arch/arm/lib/eabi_compat.o \
|
||||
$(filter-out %/arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS))
|
||||
endif
|
||||
endif
|
||||
|
||||
# needed for relocation
|
||||
LDFLAGS_u-boot += -pie
|
||||
|
||||
#
|
||||
# FIXME: binutils versions < 2.22 have a bug in the assembler where
|
||||
# branches to weak symbols can be incorrectly optimized in thumb mode
|
||||
# to a short branch (b.n instruction) that won't reach when the symbol
|
||||
# gets preempted
|
||||
#
|
||||
# http://sourceware.org/bugzilla/show_bug.cgi?id=12532
|
||||
#
|
||||
ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
|
||||
ifeq ($(GAS_BUG_12532),)
|
||||
export GAS_BUG_12532:=$(shell if [ $(call binutils-version) -lt 0222 ] ; \
|
||||
then echo y; else echo n; fi)
|
||||
endif
|
||||
ifeq ($(GAS_BUG_12532),y)
|
||||
PLATFORM_RELFLAGS += -fno-optimize-sibling-calls
|
||||
endif
|
||||
endif
|
||||
|
||||
ifneq ($(CONFIG_SPL_BUILD),y)
|
||||
# Check that only R_ARM_RELATIVE relocations are generated.
|
||||
ALL-y += checkarmreloc
|
||||
# The movt / movw can hardcode 16 bit parts of the addresses in the
|
||||
# instruction. Relocation is not supported for that case, so disable
|
||||
# such usage by requiring word relocations.
|
||||
PLATFORM_CPPFLAGS += $(call cc-option, -mword-relocations)
|
||||
endif
|
|
@ -0,0 +1,31 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(CPU).o
|
||||
|
||||
START = start.o
|
||||
COBJS = cpu.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(START) $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,26 @@
|
|||
#
|
||||
# (C) Copyright 2002
|
||||
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
# Make ARMv5 to allow more compilers to work, even though its v6.
|
||||
PLATFORM_CPPFLAGS += -march=armv5
|
||||
# =========================================================================
|
||||
#
|
||||
# Supply options according to compiler version
|
||||
#
|
||||
# =========================================================================
|
||||
PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
|
||||
PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
|
||||
|
||||
ifneq ($(CONFIG_IMX_CONFIG),)
|
||||
ifdef CONFIG_SPL
|
||||
ifdef CONFIG_SPL_BUILD
|
||||
ALL-y += $(OBJTREE)/SPL
|
||||
endif
|
||||
else
|
||||
ALL-y += $(obj)u-boot.imx
|
||||
endif
|
||||
endif
|
|
@ -0,0 +1,160 @@
|
|||
/*
|
||||
* (C) Copyright 2004 Texas Insturments
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
/*
|
||||
* CPU specific code
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
static void cache_flush(void);
|
||||
|
||||
int cleanup_before_linux (void)
|
||||
{
|
||||
/*
|
||||
* this function is called just before we call linux
|
||||
* it prepares the processor for linux
|
||||
*
|
||||
* we turn off caches etc ...
|
||||
*/
|
||||
|
||||
disable_interrupts ();
|
||||
|
||||
#ifdef CONFIG_LCD
|
||||
{
|
||||
extern void lcd_disable(void);
|
||||
extern void lcd_panel_disable(void);
|
||||
|
||||
lcd_disable(); /* proper disable of lcd & panel */
|
||||
lcd_panel_disable();
|
||||
}
|
||||
#endif
|
||||
|
||||
/* turn off I/D-cache */
|
||||
icache_disable();
|
||||
dcache_disable();
|
||||
/* flush I/D-cache */
|
||||
cache_flush();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void cache_flush(void)
|
||||
{
|
||||
unsigned long i = 0;
|
||||
/* clean entire data cache */
|
||||
asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (i));
|
||||
/* invalidate both caches and flush btb */
|
||||
asm volatile("mcr p15, 0, %0, c7, c7, 0" : : "r" (i));
|
||||
/* mem barrier to sync things */
|
||||
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i));
|
||||
}
|
||||
|
||||
#ifndef CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
#ifndef CONFIG_SYS_CACHELINE_SIZE
|
||||
#define CONFIG_SYS_CACHELINE_SIZE 32
|
||||
#endif
|
||||
|
||||
void invalidate_dcache_all(void)
|
||||
{
|
||||
asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
|
||||
}
|
||||
|
||||
void flush_dcache_all(void)
|
||||
{
|
||||
asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (0));
|
||||
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
|
||||
}
|
||||
|
||||
static int check_cache_range(unsigned long start, unsigned long stop)
|
||||
{
|
||||
int ok = 1;
|
||||
|
||||
if (start & (CONFIG_SYS_CACHELINE_SIZE - 1))
|
||||
ok = 0;
|
||||
|
||||
if (stop & (CONFIG_SYS_CACHELINE_SIZE - 1))
|
||||
ok = 0;
|
||||
|
||||
if (!ok)
|
||||
debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
|
||||
start, stop);
|
||||
|
||||
return ok;
|
||||
}
|
||||
|
||||
void invalidate_dcache_range(unsigned long start, unsigned long stop)
|
||||
{
|
||||
if (!check_cache_range(start, stop))
|
||||
return;
|
||||
|
||||
while (start < stop) {
|
||||
asm volatile("mcr p15, 0, %0, c7, c6, 1" : : "r" (start));
|
||||
start += CONFIG_SYS_CACHELINE_SIZE;
|
||||
}
|
||||
}
|
||||
|
||||
void flush_dcache_range(unsigned long start, unsigned long stop)
|
||||
{
|
||||
if (!check_cache_range(start, stop))
|
||||
return;
|
||||
|
||||
while (start < stop) {
|
||||
asm volatile("mcr p15, 0, %0, c7, c14, 1" : : "r" (start));
|
||||
start += CONFIG_SYS_CACHELINE_SIZE;
|
||||
}
|
||||
|
||||
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
|
||||
}
|
||||
|
||||
void flush_cache(unsigned long start, unsigned long size)
|
||||
{
|
||||
flush_dcache_range(start, start + size);
|
||||
}
|
||||
|
||||
#else /* #ifndef CONFIG_SYS_DCACHE_OFF */
|
||||
void invalidate_dcache_all(void)
|
||||
{
|
||||
}
|
||||
|
||||
void flush_dcache_all(void)
|
||||
{
|
||||
}
|
||||
|
||||
void invalidate_dcache_range(unsigned long start, unsigned long stop)
|
||||
{
|
||||
}
|
||||
|
||||
void flush_dcache_range(unsigned long start, unsigned long stop)
|
||||
{
|
||||
}
|
||||
|
||||
void flush_cache(unsigned long start, unsigned long size)
|
||||
{
|
||||
}
|
||||
#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
|
||||
|
||||
#if !defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
|
||||
void enable_caches(void)
|
||||
{
|
||||
#ifndef CONFIG_SYS_ICACHE_OFF
|
||||
icache_enable();
|
||||
#endif
|
||||
#ifndef CONFIG_SYS_DCACHE_OFF
|
||||
dcache_enable();
|
||||
#endif
|
||||
}
|
||||
#endif
|
|
@ -0,0 +1,31 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS += generic.o
|
||||
COBJS += timer.o
|
||||
COBJS += devices.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
*
|
||||
* (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
|
||||
*
|
||||
* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/arch/clock.h>
|
||||
|
||||
void mx31_uart1_hw_init(void)
|
||||
{
|
||||
/* setup pins for UART1 */
|
||||
mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
|
||||
mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
|
||||
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
|
||||
mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
|
||||
}
|
||||
|
||||
void mx31_uart2_hw_init(void)
|
||||
{
|
||||
/* setup pins for UART2 */
|
||||
mx31_gpio_mux(MUX_RXD2__UART2_RXD_MUX);
|
||||
mx31_gpio_mux(MUX_TXD2__UART2_TXD_MUX);
|
||||
mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
|
||||
mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MXC_SPI
|
||||
/*
|
||||
* Note: putting several spi setups here makes no sense as they may differ
|
||||
* at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 of CSPI3)
|
||||
*/
|
||||
void mx31_spi2_hw_init(void)
|
||||
{
|
||||
/* SPI2 */
|
||||
mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
|
||||
mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
|
||||
mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
|
||||
mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
|
||||
mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
|
||||
mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
|
||||
mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
|
||||
|
||||
/* start SPI2 clock */
|
||||
__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
|
||||
}
|
||||
#endif
|
|
@ -0,0 +1,219 @@
|
|||
/*
|
||||
* (C) Copyright 2007
|
||||
* Sascha Hauer, Pengutronix
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <div64.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
|
||||
static u32 mx31_decode_pll(u32 reg, u32 infreq)
|
||||
{
|
||||
u32 mfi = GET_PLL_MFI(reg);
|
||||
s32 mfn = GET_PLL_MFN(reg);
|
||||
u32 mfd = GET_PLL_MFD(reg);
|
||||
u32 pd = GET_PLL_PD(reg);
|
||||
|
||||
mfi = mfi <= 5 ? 5 : mfi;
|
||||
mfn = mfn >= 512 ? mfn - 1024 : mfn;
|
||||
mfd += 1;
|
||||
pd += 1;
|
||||
|
||||
return lldiv(2 * (u64)infreq * (mfi * mfd + mfn),
|
||||
mfd * pd);
|
||||
}
|
||||
|
||||
static u32 mx31_get_mpl_dpdgck_clk(void)
|
||||
{
|
||||
u32 infreq;
|
||||
|
||||
if ((readl(CCM_CCMR) & CCMR_PRCS_MASK) == CCMR_FPM)
|
||||
infreq = MXC_CLK32 * 1024;
|
||||
else
|
||||
infreq = MXC_HCLK;
|
||||
|
||||
return mx31_decode_pll(readl(CCM_MPCTL), infreq);
|
||||
}
|
||||
|
||||
static u32 mx31_get_mcu_main_clk(void)
|
||||
{
|
||||
/* For now we assume mpl_dpdgck_clk == mcu_main_clk
|
||||
* which should be correct for most boards
|
||||
*/
|
||||
return mx31_get_mpl_dpdgck_clk();
|
||||
}
|
||||
|
||||
static u32 mx31_get_ipg_clk(void)
|
||||
{
|
||||
u32 freq = mx31_get_mcu_main_clk();
|
||||
u32 pdr0 = readl(CCM_PDR0);
|
||||
|
||||
freq /= GET_PDR0_MAX_PODF(pdr0) + 1;
|
||||
freq /= GET_PDR0_IPG_PODF(pdr0) + 1;
|
||||
|
||||
return freq;
|
||||
}
|
||||
|
||||
/* hsp is the clock for the ipu */
|
||||
static u32 mx31_get_hsp_clk(void)
|
||||
{
|
||||
u32 freq = mx31_get_mcu_main_clk();
|
||||
u32 pdr0 = readl(CCM_PDR0);
|
||||
|
||||
freq /= GET_PDR0_HSP_PODF(pdr0) + 1;
|
||||
|
||||
return freq;
|
||||
}
|
||||
|
||||
void mx31_dump_clocks(void)
|
||||
{
|
||||
u32 cpufreq = mx31_get_mcu_main_clk();
|
||||
printf("mx31 cpu clock: %dMHz\n", cpufreq / 1000000);
|
||||
printf("ipg clock : %dHz\n", mx31_get_ipg_clk());
|
||||
printf("hsp clock : %dHz\n", mx31_get_hsp_clk());
|
||||
}
|
||||
|
||||
unsigned int mxc_get_clock(enum mxc_clock clk)
|
||||
{
|
||||
switch (clk) {
|
||||
case MXC_ARM_CLK:
|
||||
return mx31_get_mcu_main_clk();
|
||||
case MXC_IPG_CLK:
|
||||
case MXC_IPG_PERCLK:
|
||||
case MXC_CSPI_CLK:
|
||||
case MXC_UART_CLK:
|
||||
case MXC_ESDHC_CLK:
|
||||
case MXC_I2C_CLK:
|
||||
return mx31_get_ipg_clk();
|
||||
case MXC_IPU_CLK:
|
||||
return mx31_get_hsp_clk();
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
u32 imx_get_uartclk(void)
|
||||
{
|
||||
return mxc_get_clock(MXC_UART_CLK);
|
||||
}
|
||||
|
||||
void mx31_gpio_mux(unsigned long mode)
|
||||
{
|
||||
unsigned long reg, shift, tmp;
|
||||
|
||||
reg = IOMUXC_BASE + (mode & 0x1fc);
|
||||
shift = (~mode & 0x3) * 8;
|
||||
|
||||
tmp = readl(reg);
|
||||
tmp &= ~(0xff << shift);
|
||||
tmp |= ((mode >> IOMUX_MODE_POS) & 0xff) << shift;
|
||||
writel(tmp, reg);
|
||||
}
|
||||
|
||||
void mx31_set_pad(enum iomux_pins pin, u32 config)
|
||||
{
|
||||
u32 field, l, reg;
|
||||
|
||||
pin &= IOMUX_PADNUM_MASK;
|
||||
reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4;
|
||||
field = (pin + 2) % 3;
|
||||
|
||||
l = readl(reg);
|
||||
l &= ~(0x1ff << (field * 10));
|
||||
l |= config << (field * 10);
|
||||
writel(l, reg);
|
||||
|
||||
}
|
||||
|
||||
void mx31_set_gpr(enum iomux_gp_func gp, char en)
|
||||
{
|
||||
u32 l;
|
||||
struct iomuxc_regs *iomuxc = (struct iomuxc_regs *)IOMUXC_BASE;
|
||||
|
||||
l = readl(&iomuxc->gpr);
|
||||
if (en)
|
||||
l |= gp;
|
||||
else
|
||||
l &= ~gp;
|
||||
|
||||
writel(l, &iomuxc->gpr);
|
||||
}
|
||||
|
||||
void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
|
||||
{
|
||||
struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;
|
||||
struct mx31_weim_cscr *cscr = &weim->cscr[cs];
|
||||
|
||||
writel(weimcs->upper, &cscr->upper);
|
||||
writel(weimcs->lower, &cscr->lower);
|
||||
writel(weimcs->additional, &cscr->additional);
|
||||
}
|
||||
|
||||
struct mx3_cpu_type mx31_cpu_type[] = {
|
||||
{ .srev = 0x00, .v = 0x10 },
|
||||
{ .srev = 0x10, .v = 0x11 },
|
||||
{ .srev = 0x11, .v = 0x11 },
|
||||
{ .srev = 0x12, .v = 0x1F },
|
||||
{ .srev = 0x13, .v = 0x1F },
|
||||
{ .srev = 0x14, .v = 0x12 },
|
||||
{ .srev = 0x15, .v = 0x12 },
|
||||
{ .srev = 0x28, .v = 0x20 },
|
||||
{ .srev = 0x29, .v = 0x20 },
|
||||
};
|
||||
|
||||
u32 get_cpu_rev(void)
|
||||
{
|
||||
u32 i, srev;
|
||||
|
||||
/* read SREV register from IIM module */
|
||||
struct iim_regs *iim = (struct iim_regs *)MX31_IIM_BASE_ADDR;
|
||||
srev = readl(&iim->iim_srev);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
|
||||
if (srev == mx31_cpu_type[i].srev)
|
||||
return mx31_cpu_type[i].v;
|
||||
|
||||
return srev | 0x8000;
|
||||
}
|
||||
|
||||
static char *get_reset_cause(void)
|
||||
{
|
||||
/* read RCSR register from CCM module */
|
||||
struct clock_control_regs *ccm =
|
||||
(struct clock_control_regs *)CCM_BASE;
|
||||
|
||||
u32 cause = readl(&ccm->rcsr) & 0x07;
|
||||
|
||||
switch (cause) {
|
||||
case 0x0000:
|
||||
return "POR";
|
||||
case 0x0001:
|
||||
return "RST";
|
||||
case 0x0002:
|
||||
return "WDOG";
|
||||
case 0x0006:
|
||||
return "JTAG";
|
||||
case 0x0007:
|
||||
return "ARM11P power gating";
|
||||
default:
|
||||
return "unknown reset";
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DISPLAY_CPUINFO)
|
||||
int print_cpuinfo(void)
|
||||
{
|
||||
u32 srev = get_cpu_rev();
|
||||
|
||||
printf("CPU: Freescale i.MX31 rev %d.%d%s at %d MHz.\n",
|
||||
(srev & 0xF0) >> 4, (srev & 0x0F),
|
||||
((srev & 0x8000) ? " unknown" : ""),
|
||||
mx31_get_mcu_main_clk() / 1000000);
|
||||
printf("Reset cause: %s\n", get_reset_cause());
|
||||
return 0;
|
||||
}
|
||||
#endif
|
|
@ -0,0 +1,147 @@
|
|||
/*
|
||||
* (C) Copyright 2007
|
||||
* Sascha Hauer, Pengutronix
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <div64.h>
|
||||
#include <watchdog.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
|
||||
|
||||
/* General purpose timers registers */
|
||||
#define GPTCR __REG(TIMER_BASE) /* Control register */
|
||||
#define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
|
||||
#define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
|
||||
#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
|
||||
|
||||
/* General purpose timers bitfields */
|
||||
#define GPTCR_SWR (1 << 15) /* Software reset */
|
||||
#define GPTCR_FRR (1 << 9) /* Freerun / restart */
|
||||
#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
|
||||
#define GPTCR_TEN 1 /* Timer enable */
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/*
|
||||
* "time" is measured in 1 / CONFIG_SYS_HZ seconds,
|
||||
* "tick" is internal timer period
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
|
||||
/* ~0.4% error - measured with stop-watch on 100s boot-delay */
|
||||
static inline unsigned long long tick_to_time(unsigned long long tick)
|
||||
{
|
||||
tick *= CONFIG_SYS_HZ;
|
||||
do_div(tick, MXC_CLK32);
|
||||
return tick;
|
||||
}
|
||||
|
||||
static inline unsigned long long time_to_tick(unsigned long long time)
|
||||
{
|
||||
time *= MXC_CLK32;
|
||||
do_div(time, CONFIG_SYS_HZ);
|
||||
return time;
|
||||
}
|
||||
|
||||
static inline unsigned long long us_to_tick(unsigned long long us)
|
||||
{
|
||||
us = us * MXC_CLK32 + 999999;
|
||||
do_div(us, 1000000);
|
||||
return us;
|
||||
}
|
||||
#else
|
||||
/* ~2% error */
|
||||
#define TICK_PER_TIME ((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
|
||||
#define US_PER_TICK (1000000 / MXC_CLK32)
|
||||
|
||||
static inline unsigned long long tick_to_time(unsigned long long tick)
|
||||
{
|
||||
do_div(tick, TICK_PER_TIME);
|
||||
return tick;
|
||||
}
|
||||
|
||||
static inline unsigned long long time_to_tick(unsigned long long time)
|
||||
{
|
||||
return time * TICK_PER_TIME;
|
||||
}
|
||||
|
||||
static inline unsigned long long us_to_tick(unsigned long long us)
|
||||
{
|
||||
us += US_PER_TICK - 1;
|
||||
do_div(us, US_PER_TICK);
|
||||
return us;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* The 32768Hz 32-bit timer overruns in 131072 seconds */
|
||||
int timer_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* setup GP Timer 1 */
|
||||
GPTCR = GPTCR_SWR;
|
||||
for (i = 0; i < 100; i++)
|
||||
GPTCR = 0; /* We have no udelay by now */
|
||||
GPTPR = 0; /* 32Khz */
|
||||
/* Freerun Mode, PERCLK1 input */
|
||||
GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
ulong now = GPTCNT; /* current tick value */
|
||||
|
||||
if (now >= gd->arch.lastinc) /* normal mode (non roll) */
|
||||
/* move stamp forward with absolut diff ticks */
|
||||
gd->arch.tbl += (now - gd->arch.lastinc);
|
||||
else /* we have rollover of incrementer */
|
||||
gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
|
||||
gd->arch.lastinc = now;
|
||||
return gd->arch.tbl;
|
||||
}
|
||||
|
||||
ulong get_timer_masked(void)
|
||||
{
|
||||
/*
|
||||
* get_ticks() returns a long long (64 bit), it wraps in
|
||||
* 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
|
||||
* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
|
||||
* 5 * 10^6 days - long enough.
|
||||
*/
|
||||
return tick_to_time(get_ticks());
|
||||
}
|
||||
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
return get_timer_masked() - base;
|
||||
}
|
||||
|
||||
/* delay x useconds AND preserve advance timestamp value */
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
unsigned long long tmp;
|
||||
ulong tmo;
|
||||
|
||||
tmo = us_to_tick(usec);
|
||||
tmp = get_ticks() + tmo; /* get current timestamp */
|
||||
|
||||
while (get_ticks() < tmp) /* loop till event */
|
||||
/*NOP*/;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
ulong get_tbclk(void)
|
||||
{
|
||||
return MXC_CLK32;
|
||||
}
|
|
@ -0,0 +1,34 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS += generic.o
|
||||
COBJS += timer.o
|
||||
COBJS += mx35_sdram.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,71 @@
|
|||
/*
|
||||
* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
|
||||
*
|
||||
* This program is used to generate definitions needed by
|
||||
* assembly language modules.
|
||||
*
|
||||
* We use the technique used in the OSF Mach kernel code:
|
||||
* generate asm statements containing #defines,
|
||||
* compile this file to assembler, and then extract the
|
||||
* #defines from the assembly-language output.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
|
||||
#include <linux/kbuild.h>
|
||||
|
||||
int main(void)
|
||||
{
|
||||
/* Round up to make sure size gives nice stack alignment */
|
||||
DEFINE(CLKCTL_CCMR, offsetof(struct ccm_regs, ccmr));
|
||||
DEFINE(CLKCTL_PDR0, offsetof(struct ccm_regs, pdr0));
|
||||
DEFINE(CLKCTL_PDR1, offsetof(struct ccm_regs, pdr1));
|
||||
DEFINE(CLKCTL_PDR2, offsetof(struct ccm_regs, pdr2));
|
||||
DEFINE(CLKCTL_PDR3, offsetof(struct ccm_regs, pdr3));
|
||||
DEFINE(CLKCTL_PDR4, offsetof(struct ccm_regs, pdr4));
|
||||
DEFINE(CLKCTL_RCSR, offsetof(struct ccm_regs, rcsr));
|
||||
DEFINE(CLKCTL_MPCTL, offsetof(struct ccm_regs, mpctl));
|
||||
DEFINE(CLKCTL_PPCTL, offsetof(struct ccm_regs, ppctl));
|
||||
DEFINE(CLKCTL_ACMR, offsetof(struct ccm_regs, acmr));
|
||||
DEFINE(CLKCTL_COSR, offsetof(struct ccm_regs, cosr));
|
||||
DEFINE(CLKCTL_CGR0, offsetof(struct ccm_regs, cgr0));
|
||||
DEFINE(CLKCTL_CGR1, offsetof(struct ccm_regs, cgr1));
|
||||
DEFINE(CLKCTL_CGR2, offsetof(struct ccm_regs, cgr2));
|
||||
DEFINE(CLKCTL_CGR3, offsetof(struct ccm_regs, cgr3));
|
||||
|
||||
/* Multi-Layer AHB Crossbar Switch */
|
||||
DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
|
||||
DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
|
||||
DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
|
||||
DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
|
||||
DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
|
||||
DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
|
||||
DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
|
||||
DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
|
||||
DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
|
||||
DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
|
||||
DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
|
||||
DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
|
||||
DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
|
||||
DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
|
||||
DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
|
||||
DEFINE(MAX_MGPCR5, offsetof(struct max_regs, mgpcr5));
|
||||
|
||||
/* AHB <-> IP-Bus Interface */
|
||||
DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
|
||||
DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
|
||||
DEFINE(AIPS_PACR_0_7, offsetof(struct aips_regs, pacr_0_7));
|
||||
DEFINE(AIPS_PACR_8_15, offsetof(struct aips_regs, pacr_8_15));
|
||||
DEFINE(AIPS_PACR_16_23, offsetof(struct aips_regs, pacr_16_23));
|
||||
DEFINE(AIPS_PACR_24_31, offsetof(struct aips_regs, pacr_24_31));
|
||||
DEFINE(AIPS_OPACR_0_7, offsetof(struct aips_regs, opacr_0_7));
|
||||
DEFINE(AIPS_OPACR_8_15, offsetof(struct aips_regs, opacr_8_15));
|
||||
DEFINE(AIPS_OPACR_16_23, offsetof(struct aips_regs, opacr_16_23));
|
||||
DEFINE(AIPS_OPACR_24_31, offsetof(struct aips_regs, opacr_24_31));
|
||||
DEFINE(AIPS_OPACR_32_39, offsetof(struct aips_regs, opacr_32_39));
|
||||
|
||||
return 0;
|
||||
}
|
|
@ -0,0 +1,547 @@
|
|||
/*
|
||||
* (C) Copyright 2007
|
||||
* Sascha Hauer, Pengutronix
|
||||
*
|
||||
* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <div64.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/arch/crm_regs.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
#ifdef CONFIG_FSL_ESDHC
|
||||
#include <fsl_esdhc.h>
|
||||
#endif
|
||||
#include <netdev.h>
|
||||
#include <spl.h>
|
||||
|
||||
#define CLK_CODE(arm, ahb, sel) (((arm) << 16) + ((ahb) << 8) + (sel))
|
||||
#define CLK_CODE_ARM(c) (((c) >> 16) & 0xFF)
|
||||
#define CLK_CODE_AHB(c) (((c) >> 8) & 0xFF)
|
||||
#define CLK_CODE_PATH(c) ((c) & 0xFF)
|
||||
|
||||
#define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o))
|
||||
|
||||
#ifdef CONFIG_FSL_ESDHC
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
#endif
|
||||
|
||||
static int g_clk_mux_auto[8] = {
|
||||
CLK_CODE(1, 3, 0), CLK_CODE(1, 2, 1), CLK_CODE(2, 1, 1), -1,
|
||||
CLK_CODE(1, 6, 0), CLK_CODE(1, 4, 1), CLK_CODE(2, 2, 1), -1,
|
||||
};
|
||||
|
||||
static int g_clk_mux_consumer[16] = {
|
||||
CLK_CODE(1, 4, 0), CLK_CODE(1, 3, 1), CLK_CODE(1, 3, 1), -1,
|
||||
-1, -1, CLK_CODE(4, 1, 0), CLK_CODE(1, 5, 0),
|
||||
CLK_CODE(1, 8, 1), CLK_CODE(1, 6, 1), CLK_CODE(2, 4, 0), -1,
|
||||
-1, -1, CLK_CODE(4, 2, 0), -1,
|
||||
};
|
||||
|
||||
static int hsp_div_table[3][16] = {
|
||||
{4, 3, 2, -1, -1, -1, 1, 5, 4, 3, 2, -1, -1, -1, 1, -1},
|
||||
{-1, -1, -1, -1, -1, -1, -1, -1, 8, 6, 4, -1, -1, -1, 2, -1},
|
||||
{3, -1, -1, -1, -1, -1, -1, -1, 3, -1, -1, -1, -1, -1, -1, -1},
|
||||
};
|
||||
|
||||
u32 get_cpu_rev(void)
|
||||
{
|
||||
int reg;
|
||||
struct iim_regs *iim =
|
||||
(struct iim_regs *)IIM_BASE_ADDR;
|
||||
reg = readl(&iim->iim_srev);
|
||||
if (!reg) {
|
||||
reg = readw(ROMPATCH_REV);
|
||||
reg <<= 4;
|
||||
} else {
|
||||
reg += CHIP_REV_1_0;
|
||||
}
|
||||
|
||||
return 0x35000 + (reg & 0xFF);
|
||||
}
|
||||
|
||||
static u32 get_arm_div(u32 pdr0, u32 *fi, u32 *fd)
|
||||
{
|
||||
int *pclk_mux;
|
||||
if (pdr0 & MXC_CCM_PDR0_AUTO_CON) {
|
||||
pclk_mux = g_clk_mux_consumer +
|
||||
((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >>
|
||||
MXC_CCM_PDR0_CON_MUX_DIV_OFFSET);
|
||||
} else {
|
||||
pclk_mux = g_clk_mux_auto +
|
||||
((pdr0 & MXC_CCM_PDR0_AUTO_MUX_DIV_MASK) >>
|
||||
MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET);
|
||||
}
|
||||
|
||||
if ((*pclk_mux) == -1)
|
||||
return -1;
|
||||
|
||||
if (fi && fd) {
|
||||
if (!CLK_CODE_PATH(*pclk_mux)) {
|
||||
*fi = *fd = 1;
|
||||
return CLK_CODE_ARM(*pclk_mux);
|
||||
}
|
||||
if (pdr0 & MXC_CCM_PDR0_AUTO_CON) {
|
||||
*fi = 3;
|
||||
*fd = 4;
|
||||
} else {
|
||||
*fi = 2;
|
||||
*fd = 3;
|
||||
}
|
||||
}
|
||||
return CLK_CODE_ARM(*pclk_mux);
|
||||
}
|
||||
|
||||
static int get_ahb_div(u32 pdr0)
|
||||
{
|
||||
int *pclk_mux;
|
||||
|
||||
pclk_mux = g_clk_mux_consumer +
|
||||
((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >>
|
||||
MXC_CCM_PDR0_CON_MUX_DIV_OFFSET);
|
||||
|
||||
if ((*pclk_mux) == -1)
|
||||
return -1;
|
||||
|
||||
return CLK_CODE_AHB(*pclk_mux);
|
||||
}
|
||||
|
||||
static u32 decode_pll(u32 reg, u32 infreq)
|
||||
{
|
||||
u32 mfi = (reg >> 10) & 0xf;
|
||||
s32 mfn = reg & 0x3ff;
|
||||
u32 mfd = (reg >> 16) & 0x3ff;
|
||||
u32 pd = (reg >> 26) & 0xf;
|
||||
|
||||
mfi = mfi <= 5 ? 5 : mfi;
|
||||
mfn = mfn >= 512 ? mfn - 1024 : mfn;
|
||||
mfd += 1;
|
||||
pd += 1;
|
||||
|
||||
return lldiv(2 * (u64)infreq * (mfi * mfd + mfn),
|
||||
mfd * pd);
|
||||
}
|
||||
|
||||
static u32 get_mcu_main_clk(void)
|
||||
{
|
||||
u32 arm_div = 0, fi = 0, fd = 0;
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
arm_div = get_arm_div(readl(&ccm->pdr0), &fi, &fd);
|
||||
fi *= decode_pll(readl(&ccm->mpctl), MXC_HCLK);
|
||||
return fi / (arm_div * fd);
|
||||
}
|
||||
|
||||
static u32 get_ipg_clk(void)
|
||||
{
|
||||
u32 freq = get_mcu_main_clk();
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
u32 pdr0 = readl(&ccm->pdr0);
|
||||
|
||||
return freq / (get_ahb_div(pdr0) * 2);
|
||||
}
|
||||
|
||||
static u32 get_ipg_per_clk(void)
|
||||
{
|
||||
u32 freq = get_mcu_main_clk();
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
u32 pdr0 = readl(&ccm->pdr0);
|
||||
u32 pdr4 = readl(&ccm->pdr4);
|
||||
u32 div;
|
||||
if (pdr0 & MXC_CCM_PDR0_PER_SEL) {
|
||||
div = CCM_GET_DIVIDER(pdr4,
|
||||
MXC_CCM_PDR4_PER0_PODF_MASK,
|
||||
MXC_CCM_PDR4_PER0_PODF_OFFSET) + 1;
|
||||
} else {
|
||||
div = CCM_GET_DIVIDER(pdr0,
|
||||
MXC_CCM_PDR0_PER_PODF_MASK,
|
||||
MXC_CCM_PDR0_PER_PODF_OFFSET) + 1;
|
||||
div *= get_ahb_div(pdr0);
|
||||
}
|
||||
return freq / div;
|
||||
}
|
||||
|
||||
u32 imx_get_uartclk(void)
|
||||
{
|
||||
u32 freq;
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
u32 pdr4 = readl(&ccm->pdr4);
|
||||
|
||||
if (readl(&ccm->pdr3) & MXC_CCM_PDR3_UART_M_U)
|
||||
freq = get_mcu_main_clk();
|
||||
else
|
||||
freq = decode_pll(readl(&ccm->ppctl), MXC_HCLK);
|
||||
freq /= CCM_GET_DIVIDER(pdr4,
|
||||
MXC_CCM_PDR4_UART_PODF_MASK,
|
||||
MXC_CCM_PDR4_UART_PODF_OFFSET) + 1;
|
||||
return freq;
|
||||
}
|
||||
|
||||
unsigned int mxc_get_main_clock(enum mxc_main_clock clk)
|
||||
{
|
||||
u32 nfc_pdf, hsp_podf;
|
||||
u32 pll, ret_val = 0, usb_podf;
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
|
||||
u32 reg = readl(&ccm->pdr0);
|
||||
u32 reg4 = readl(&ccm->pdr4);
|
||||
|
||||
reg |= 0x1;
|
||||
|
||||
switch (clk) {
|
||||
case CPU_CLK:
|
||||
ret_val = get_mcu_main_clk();
|
||||
break;
|
||||
case AHB_CLK:
|
||||
ret_val = get_mcu_main_clk();
|
||||
break;
|
||||
case HSP_CLK:
|
||||
if (reg & CLKMODE_CONSUMER) {
|
||||
hsp_podf = (reg >> 20) & 0x3;
|
||||
pll = get_mcu_main_clk();
|
||||
hsp_podf = hsp_div_table[hsp_podf][(reg>>16)&0xF];
|
||||
if (hsp_podf > 0) {
|
||||
ret_val = pll / hsp_podf;
|
||||
} else {
|
||||
puts("mismatch HSP with ARM clock setting\n");
|
||||
ret_val = 0;
|
||||
}
|
||||
} else {
|
||||
ret_val = get_mcu_main_clk();
|
||||
}
|
||||
break;
|
||||
case IPG_CLK:
|
||||
ret_val = get_ipg_clk();
|
||||
break;
|
||||
case IPG_PER_CLK:
|
||||
ret_val = get_ipg_per_clk();
|
||||
break;
|
||||
case NFC_CLK:
|
||||
nfc_pdf = (reg4 >> 28) & 0xF;
|
||||
pll = get_mcu_main_clk();
|
||||
/* AHB/nfc_pdf */
|
||||
ret_val = pll / (nfc_pdf + 1);
|
||||
break;
|
||||
case USB_CLK:
|
||||
usb_podf = (reg4 >> 22) & 0x3F;
|
||||
if (reg4 & 0x200)
|
||||
pll = get_mcu_main_clk();
|
||||
else
|
||||
pll = decode_pll(readl(&ccm->ppctl), MXC_HCLK);
|
||||
|
||||
ret_val = pll / (usb_podf + 1);
|
||||
break;
|
||||
default:
|
||||
printf("Unknown clock: %d\n", clk);
|
||||
break;
|
||||
}
|
||||
|
||||
return ret_val;
|
||||
}
|
||||
unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk)
|
||||
{
|
||||
u32 ret_val = 0, pdf, pre_pdf, clk_sel;
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
u32 mpdr2 = readl(&ccm->pdr2);
|
||||
u32 mpdr3 = readl(&ccm->pdr3);
|
||||
u32 mpdr4 = readl(&ccm->pdr4);
|
||||
|
||||
switch (clk) {
|
||||
case UART1_BAUD:
|
||||
case UART2_BAUD:
|
||||
case UART3_BAUD:
|
||||
clk_sel = mpdr3 & (1 << 14);
|
||||
pdf = (mpdr4 >> 10) & 0x3F;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
|
||||
break;
|
||||
case SSI1_BAUD:
|
||||
pre_pdf = (mpdr2 >> 24) & 0x7;
|
||||
pdf = mpdr2 & 0x3F;
|
||||
clk_sel = mpdr2 & (1 << 6);
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case SSI2_BAUD:
|
||||
pre_pdf = (mpdr2 >> 27) & 0x7;
|
||||
pdf = (mpdr2 >> 8) & 0x3F;
|
||||
clk_sel = mpdr2 & (1 << 6);
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case CSI_BAUD:
|
||||
clk_sel = mpdr2 & (1 << 7);
|
||||
pdf = (mpdr2 >> 16) & 0x3F;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
|
||||
break;
|
||||
case MSHC_CLK:
|
||||
pre_pdf = readl(&ccm->pdr1);
|
||||
clk_sel = (pre_pdf & 0x80);
|
||||
pdf = (pre_pdf >> 22) & 0x3F;
|
||||
pre_pdf = (pre_pdf >> 28) & 0x7;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case ESDHC1_CLK:
|
||||
clk_sel = mpdr3 & 0x40;
|
||||
pdf = mpdr3 & 0x3F;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
|
||||
break;
|
||||
case ESDHC2_CLK:
|
||||
clk_sel = mpdr3 & 0x40;
|
||||
pdf = (mpdr3 >> 8) & 0x3F;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
|
||||
break;
|
||||
case ESDHC3_CLK:
|
||||
clk_sel = mpdr3 & 0x40;
|
||||
pdf = (mpdr3 >> 16) & 0x3F;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
|
||||
break;
|
||||
case SPDIF_CLK:
|
||||
clk_sel = mpdr3 & 0x400000;
|
||||
pre_pdf = (mpdr3 >> 29) & 0x7;
|
||||
pdf = (mpdr3 >> 23) & 0x3F;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
default:
|
||||
printf("%s(): This clock: %d not supported yet\n",
|
||||
__func__, clk);
|
||||
break;
|
||||
}
|
||||
|
||||
return ret_val;
|
||||
}
|
||||
|
||||
unsigned int mxc_get_clock(enum mxc_clock clk)
|
||||
{
|
||||
switch (clk) {
|
||||
case MXC_ARM_CLK:
|
||||
return get_mcu_main_clk();
|
||||
case MXC_AHB_CLK:
|
||||
break;
|
||||
case MXC_IPG_CLK:
|
||||
return get_ipg_clk();
|
||||
case MXC_IPG_PERCLK:
|
||||
case MXC_I2C_CLK:
|
||||
return get_ipg_per_clk();
|
||||
case MXC_UART_CLK:
|
||||
return imx_get_uartclk();
|
||||
case MXC_ESDHC1_CLK:
|
||||
return mxc_get_peri_clock(ESDHC1_CLK);
|
||||
case MXC_ESDHC2_CLK:
|
||||
return mxc_get_peri_clock(ESDHC2_CLK);
|
||||
case MXC_ESDHC3_CLK:
|
||||
return mxc_get_peri_clock(ESDHC3_CLK);
|
||||
case MXC_USB_CLK:
|
||||
return mxc_get_main_clock(USB_CLK);
|
||||
case MXC_FEC_CLK:
|
||||
return get_ipg_clk();
|
||||
case MXC_CSPI_CLK:
|
||||
return get_ipg_clk();
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FEC_MXC
|
||||
/*
|
||||
* The MX35 has no fuse for MAC, return a NULL MAC
|
||||
*/
|
||||
void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
|
||||
{
|
||||
memset(mac, 0, 6);
|
||||
}
|
||||
|
||||
u32 imx_get_fecclk(void)
|
||||
{
|
||||
return mxc_get_clock(MXC_IPG_CLK);
|
||||
}
|
||||
#endif
|
||||
|
||||
int do_mx35_showclocks(cmd_tbl_t *cmdtp,
|
||||
int flag, int argc, char * const argv[])
|
||||
{
|
||||
u32 cpufreq = get_mcu_main_clk();
|
||||
printf("mx35 cpu clock: %dMHz\n", cpufreq / 1000000);
|
||||
printf("ipg clock : %dHz\n", get_ipg_clk());
|
||||
printf("ipg per clock : %dHz\n", get_ipg_per_clk());
|
||||
printf("uart clock : %dHz\n", mxc_get_clock(MXC_UART_CLK));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_CMD(
|
||||
clocks, CONFIG_SYS_MAXARGS, 1, do_mx35_showclocks,
|
||||
"display clocks",
|
||||
""
|
||||
);
|
||||
|
||||
#if defined(CONFIG_DISPLAY_CPUINFO)
|
||||
static char *get_reset_cause(void)
|
||||
{
|
||||
/* read RCSR register from CCM module */
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
|
||||
u32 cause = readl(&ccm->rcsr) & 0x0F;
|
||||
|
||||
switch (cause) {
|
||||
case 0x0000:
|
||||
return "POR";
|
||||
case 0x0002:
|
||||
return "JTAG";
|
||||
case 0x0004:
|
||||
return "RST";
|
||||
case 0x0008:
|
||||
return "WDOG";
|
||||
default:
|
||||
return "unknown reset";
|
||||
}
|
||||
}
|
||||
|
||||
int print_cpuinfo(void)
|
||||
{
|
||||
u32 srev = get_cpu_rev();
|
||||
|
||||
printf("CPU: Freescale i.MX35 rev %d.%d at %d MHz.\n",
|
||||
(srev & 0xF0) >> 4, (srev & 0x0F),
|
||||
get_mcu_main_clk() / 1000000);
|
||||
|
||||
printf("Reset cause: %s\n", get_reset_cause());
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Initializes on-chip ethernet controllers.
|
||||
* to override, implement board_eth_init()
|
||||
*/
|
||||
int cpu_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = -ENODEV;
|
||||
|
||||
#if defined(CONFIG_FEC_MXC)
|
||||
rc = fecmxc_initialize(bis);
|
||||
#endif
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FSL_ESDHC
|
||||
/*
|
||||
* Initializes on-chip MMC controllers.
|
||||
* to override, implement board_mmc_init()
|
||||
*/
|
||||
int cpu_mmc_init(bd_t *bis)
|
||||
{
|
||||
return fsl_esdhc_mmc_init(bis);
|
||||
}
|
||||
#endif
|
||||
|
||||
int get_clocks(void)
|
||||
{
|
||||
#ifdef CONFIG_FSL_ESDHC
|
||||
#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
|
||||
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
|
||||
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
|
||||
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
|
||||
#else
|
||||
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
|
||||
#endif
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define RCSR_MEM_CTL_WEIM 0
|
||||
#define RCSR_MEM_CTL_NAND 1
|
||||
#define RCSR_MEM_CTL_ATA 2
|
||||
#define RCSR_MEM_CTL_EXPANSION 3
|
||||
#define RCSR_MEM_TYPE_NOR 0
|
||||
#define RCSR_MEM_TYPE_ONENAND 2
|
||||
#define RCSR_MEM_TYPE_SD 0
|
||||
#define RCSR_MEM_TYPE_I2C 2
|
||||
#define RCSR_MEM_TYPE_SPI 3
|
||||
|
||||
u32 spl_boot_device(void)
|
||||
{
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
|
||||
u32 rcsr = readl(&ccm->rcsr);
|
||||
u32 mem_type, mem_ctl;
|
||||
|
||||
/* In external mode, no boot device is returned */
|
||||
if ((rcsr >> 10) & 0x03)
|
||||
return BOOT_DEVICE_NONE;
|
||||
|
||||
mem_ctl = (rcsr >> 25) & 0x03;
|
||||
mem_type = (rcsr >> 23) & 0x03;
|
||||
|
||||
switch (mem_ctl) {
|
||||
case RCSR_MEM_CTL_WEIM:
|
||||
switch (mem_type) {
|
||||
case RCSR_MEM_TYPE_NOR:
|
||||
return BOOT_DEVICE_NOR;
|
||||
case RCSR_MEM_TYPE_ONENAND:
|
||||
return BOOT_DEVICE_ONENAND;
|
||||
default:
|
||||
return BOOT_DEVICE_NONE;
|
||||
}
|
||||
case RCSR_MEM_CTL_NAND:
|
||||
return BOOT_DEVICE_NAND;
|
||||
case RCSR_MEM_CTL_EXPANSION:
|
||||
switch (mem_type) {
|
||||
case RCSR_MEM_TYPE_SD:
|
||||
return BOOT_DEVICE_MMC1;
|
||||
case RCSR_MEM_TYPE_I2C:
|
||||
return BOOT_DEVICE_I2C;
|
||||
case RCSR_MEM_TYPE_SPI:
|
||||
return BOOT_DEVICE_SPI;
|
||||
default:
|
||||
return BOOT_DEVICE_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
return BOOT_DEVICE_NONE;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
u32 spl_boot_mode(void)
|
||||
{
|
||||
switch (spl_boot_device()) {
|
||||
case BOOT_DEVICE_MMC1:
|
||||
#ifdef CONFIG_SPL_FAT_SUPPORT
|
||||
return MMCSD_MODE_FAT;
|
||||
#else
|
||||
return MMCSD_MODE_RAW;
|
||||
#endif
|
||||
break;
|
||||
case BOOT_DEVICE_NAND:
|
||||
return 0;
|
||||
break;
|
||||
default:
|
||||
puts("spl: ERROR: unsupported device\n");
|
||||
hang();
|
||||
}
|
||||
}
|
||||
#endif
|
|
@ -0,0 +1,121 @@
|
|||
/*
|
||||
* Copyright (C) 2012, Stefano Babic <sbabic@denx.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <linux/types.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
|
||||
#define ESDCTL_DDR2_EMR2 0x04000000
|
||||
#define ESDCTL_DDR2_EMR3 0x06000000
|
||||
#define ESDCTL_PRECHARGE 0x00000400
|
||||
#define ESDCTL_DDR2_EN_DLL 0x02000400
|
||||
#define ESDCTL_DDR2_RESET_DLL 0x00000333
|
||||
#define ESDCTL_DDR2_MR 0x00000233
|
||||
#define ESDCTL_DDR2_OCD_DEFAULT 0x02000780
|
||||
|
||||
enum {
|
||||
SMODE_NORMAL = 0,
|
||||
SMODE_PRECHARGE,
|
||||
SMODE_AUTO_REFRESH,
|
||||
SMODE_LOAD_REG,
|
||||
SMODE_MANUAL_REFRESH
|
||||
};
|
||||
|
||||
#define set_mode(x, en, m) (x | (en << 31) | (m << 28))
|
||||
|
||||
static inline void dram_wait(unsigned int count)
|
||||
{
|
||||
volatile unsigned int wait = count;
|
||||
|
||||
while (wait--)
|
||||
;
|
||||
|
||||
}
|
||||
|
||||
void mx3_setup_sdram_bank(u32 start_address, u32 ddr2_config,
|
||||
u32 row, u32 col, u32 dsize, u32 refresh)
|
||||
{
|
||||
struct esdc_regs *esdc = (struct esdc_regs *)ESDCTL_BASE_ADDR;
|
||||
u32 *cfg_reg, *ctl_reg;
|
||||
u32 val;
|
||||
u32 ctlval;
|
||||
|
||||
switch (start_address) {
|
||||
case CSD0_BASE_ADDR:
|
||||
cfg_reg = &esdc->esdcfg0;
|
||||
ctl_reg = &esdc->esdctl0;
|
||||
break;
|
||||
case CSD1_BASE_ADDR:
|
||||
cfg_reg = &esdc->esdcfg1;
|
||||
ctl_reg = &esdc->esdctl1;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
|
||||
/* The MX35 supports 11 up to 14 rows */
|
||||
if (row < 11 || row > 14 || col < 8 || col > 10)
|
||||
return;
|
||||
ctlval = (row - 11) << 24 | (col - 8) << 20 | (dsize << 16);
|
||||
|
||||
/* Initialize MISC register for DDR2 */
|
||||
val = ESDC_MISC_RST | ESDC_MISC_MDDR_EN | ESDC_MISC_MDDR_DL_RST |
|
||||
ESDC_MISC_DDR_EN | ESDC_MISC_DDR2_EN;
|
||||
writel(val, &esdc->esdmisc);
|
||||
val &= ~(ESDC_MISC_RST | ESDC_MISC_MDDR_DL_RST);
|
||||
writel(val, &esdc->esdmisc);
|
||||
|
||||
/*
|
||||
* according to DDR2 specs, wait a while before
|
||||
* the PRECHARGE_ALL command
|
||||
*/
|
||||
dram_wait(0x20000);
|
||||
|
||||
/* Load DDR2 config and timing */
|
||||
writel(ddr2_config, cfg_reg);
|
||||
|
||||
/* Precharge ALL */
|
||||
writel(set_mode(ctlval, 1, SMODE_PRECHARGE),
|
||||
ctl_reg);
|
||||
writel(0xda, start_address + ESDCTL_PRECHARGE);
|
||||
|
||||
/* Load mode */
|
||||
writel(set_mode(ctlval, 1, SMODE_LOAD_REG),
|
||||
ctl_reg);
|
||||
writeb(0xda, start_address + ESDCTL_DDR2_EMR2); /* EMRS2 */
|
||||
writeb(0xda, start_address + ESDCTL_DDR2_EMR3); /* EMRS3 */
|
||||
writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */
|
||||
writeb(0xda, start_address + ESDCTL_DDR2_RESET_DLL); /* Reset DLL */
|
||||
|
||||
/* Precharge ALL */
|
||||
writel(set_mode(ctlval, 1, SMODE_PRECHARGE),
|
||||
ctl_reg);
|
||||
writel(0xda, start_address + ESDCTL_PRECHARGE);
|
||||
|
||||
/* Set mode auto refresh : at least two refresh are required */
|
||||
writel(set_mode(ctlval, 1, SMODE_AUTO_REFRESH),
|
||||
ctl_reg);
|
||||
writel(0xda, start_address);
|
||||
writel(0xda, start_address);
|
||||
|
||||
writel(set_mode(ctlval, 1, SMODE_LOAD_REG),
|
||||
ctl_reg);
|
||||
writeb(0xda, start_address + ESDCTL_DDR2_MR);
|
||||
writeb(0xda, start_address + ESDCTL_DDR2_OCD_DEFAULT);
|
||||
|
||||
/* OCD mode exit */
|
||||
writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */
|
||||
|
||||
/* Set normal mode */
|
||||
writel(set_mode(ctlval, 1, SMODE_NORMAL) | refresh,
|
||||
ctl_reg);
|
||||
|
||||
dram_wait(0x20000);
|
||||
|
||||
/* Do not set delay lines, only for MDDR */
|
||||
}
|
|
@ -0,0 +1,130 @@
|
|||
/*
|
||||
* (C) Copyright 2007
|
||||
* Sascha Hauer, Pengutronix
|
||||
*
|
||||
* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <div64.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/arch/crm_regs.h>
|
||||
#include <asm/arch/clock.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define timestamp (gd->arch.tbl)
|
||||
#define lastinc (gd->arch.lastinc)
|
||||
|
||||
/* General purpose timers bitfields */
|
||||
#define GPTCR_SWR (1<<15) /* Software reset */
|
||||
#define GPTCR_FRR (1<<9) /* Freerun / restart */
|
||||
#define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */
|
||||
#define GPTCR_TEN (1) /* Timer enable */
|
||||
|
||||
/*
|
||||
* "time" is measured in 1 / CONFIG_SYS_HZ seconds,
|
||||
* "tick" is internal timer period
|
||||
*/
|
||||
/* ~0.4% error - measured with stop-watch on 100s boot-delay */
|
||||
static inline unsigned long long tick_to_time(unsigned long long tick)
|
||||
{
|
||||
tick *= CONFIG_SYS_HZ;
|
||||
do_div(tick, MXC_CLK32);
|
||||
|
||||
return tick;
|
||||
}
|
||||
|
||||
static inline unsigned long long us_to_tick(unsigned long long us)
|
||||
{
|
||||
us = us * MXC_CLK32 + 999999;
|
||||
do_div(us, 1000000);
|
||||
|
||||
return us;
|
||||
}
|
||||
|
||||
/*
|
||||
* nothing really to do with interrupts, just starts up a counter.
|
||||
* The 32KHz 32-bit timer overruns in 134217 seconds
|
||||
*/
|
||||
int timer_init(void)
|
||||
{
|
||||
int i;
|
||||
struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
|
||||
struct ccm_regs *ccm = (struct ccm_regs *)CCM_BASE_ADDR;
|
||||
|
||||
/* setup GP Timer 1 */
|
||||
writel(GPTCR_SWR, &gpt->ctrl);
|
||||
|
||||
writel(readl(&ccm->cgr1) | 3 << MXC_CCM_CGR1_GPT_OFFSET, &ccm->cgr1);
|
||||
|
||||
for (i = 0; i < 100; i++)
|
||||
writel(0, &gpt->ctrl); /* We have no udelay by now */
|
||||
writel(0, &gpt->pre); /* prescaler = 1 */
|
||||
/* Freerun Mode, 32KHz input */
|
||||
writel(readl(&gpt->ctrl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
|
||||
&gpt->ctrl);
|
||||
writel(readl(&gpt->ctrl) | GPTCR_TEN, &gpt->ctrl);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
|
||||
ulong now = readl(&gpt->counter); /* current tick value */
|
||||
|
||||
if (now >= lastinc) {
|
||||
/*
|
||||
* normal mode (non roll)
|
||||
* move stamp forward with absolut diff ticks
|
||||
*/
|
||||
timestamp += (now - lastinc);
|
||||
} else {
|
||||
/* we have rollover of incrementer */
|
||||
timestamp += (0xFFFFFFFF - lastinc) + now;
|
||||
}
|
||||
lastinc = now;
|
||||
return timestamp;
|
||||
}
|
||||
|
||||
ulong get_timer_masked(void)
|
||||
{
|
||||
/*
|
||||
* get_ticks() returns a long long (64 bit), it wraps in
|
||||
* 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
|
||||
* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
|
||||
* 5 * 10^6 days - long enough.
|
||||
*/
|
||||
return tick_to_time(get_ticks());
|
||||
}
|
||||
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
return get_timer_masked() - base;
|
||||
}
|
||||
|
||||
/* delay x useconds AND preserve advance timstamp value */
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
unsigned long long tmp;
|
||||
ulong tmo;
|
||||
|
||||
tmo = us_to_tick(usec);
|
||||
tmp = get_ticks() + tmo; /* get current timestamp */
|
||||
|
||||
while (get_ticks() < tmp) /* loop till event */
|
||||
/*NOP*/;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
ulong get_tbclk(void)
|
||||
{
|
||||
return MXC_CLK32;
|
||||
}
|
|
@ -0,0 +1,373 @@
|
|||
/*
|
||||
* armboot - Startup Code for OMP2420/ARM1136 CPU-core
|
||||
*
|
||||
* Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
|
||||
*
|
||||
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
|
||||
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
|
||||
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
|
||||
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
|
||||
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <asm-offsets.h>
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
.globl _start
|
||||
_start: b reset
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
|
||||
_hang:
|
||||
.word do_hang
|
||||
.word 0x12345678
|
||||
.word 0x12345678
|
||||
.word 0x12345678
|
||||
.word 0x12345678
|
||||
.word 0x12345678
|
||||
.word 0x12345678
|
||||
.word 0x12345678 /* now 16*4=64 */
|
||||
#else
|
||||
ldr pc, _undefined_instruction
|
||||
ldr pc, _software_interrupt
|
||||
ldr pc, _prefetch_abort
|
||||
ldr pc, _data_abort
|
||||
ldr pc, _not_used
|
||||
ldr pc, _irq
|
||||
ldr pc, _fiq
|
||||
|
||||
_undefined_instruction: .word undefined_instruction
|
||||
_software_interrupt: .word software_interrupt
|
||||
_prefetch_abort: .word prefetch_abort
|
||||
_data_abort: .word data_abort
|
||||
_not_used: .word not_used
|
||||
_irq: .word irq
|
||||
_fiq: .word fiq
|
||||
_pad: .word 0x12345678 /* now 16*4=64 */
|
||||
#endif /* CONFIG_SPL_BUILD */
|
||||
.global _end_vect
|
||||
_end_vect:
|
||||
|
||||
.balignl 16,0xdeadbeef
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Startup Code (reset vector)
|
||||
*
|
||||
* do important init only if we don't start from memory!
|
||||
* setup Memory and board specific bits prior to relocation.
|
||||
* relocate armboot to ram
|
||||
* setup stack
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
.globl _TEXT_BASE
|
||||
_TEXT_BASE:
|
||||
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
|
||||
.word CONFIG_SPL_TEXT_BASE
|
||||
#else
|
||||
.word CONFIG_SYS_TEXT_BASE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* These are defined in the board-specific linker script.
|
||||
* Subtracting _start from them lets the linker put their
|
||||
* relative position in the executable instead of leaving
|
||||
* them null.
|
||||
*/
|
||||
.globl _bss_start_ofs
|
||||
_bss_start_ofs:
|
||||
.word __bss_start - _start
|
||||
|
||||
.globl _bss_end_ofs
|
||||
_bss_end_ofs:
|
||||
.word __bss_end - _start
|
||||
|
||||
.globl _end_ofs
|
||||
_end_ofs:
|
||||
.word _end - _start
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
/* IRQ stack memory (calculated at run-time) */
|
||||
.globl IRQ_STACK_START
|
||||
IRQ_STACK_START:
|
||||
.word 0x0badc0de
|
||||
|
||||
/* IRQ stack memory (calculated at run-time) */
|
||||
.globl FIQ_STACK_START
|
||||
FIQ_STACK_START:
|
||||
.word 0x0badc0de
|
||||
#endif
|
||||
|
||||
/* IRQ stack memory (calculated at run-time) + 8 bytes */
|
||||
.globl IRQ_STACK_START_IN
|
||||
IRQ_STACK_START_IN:
|
||||
.word 0x0badc0de
|
||||
|
||||
/*
|
||||
* the actual reset code
|
||||
*/
|
||||
|
||||
reset:
|
||||
/*
|
||||
* set the cpu to SVC32 mode
|
||||
*/
|
||||
mrs r0,cpsr
|
||||
bic r0,r0,#0x1f
|
||||
orr r0,r0,#0xd3
|
||||
msr cpsr,r0
|
||||
|
||||
/* the mask ROM code should have PLL and others stable */
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
bl cpu_init_crit
|
||||
#endif
|
||||
|
||||
bl _main
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
|
||||
.globl c_runtime_cpu_setup
|
||||
c_runtime_cpu_setup:
|
||||
|
||||
bx lr
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* CPU_init_critical registers
|
||||
*
|
||||
* setup important registers
|
||||
* setup memory timing
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
cpu_init_crit:
|
||||
/*
|
||||
* flush v4 I/D caches
|
||||
*/
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
|
||||
mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
|
||||
|
||||
/*
|
||||
* disable MMU stuff and caches
|
||||
*/
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
|
||||
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
|
||||
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
|
||||
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
/*
|
||||
* Jump to board specific initialization... The Mask ROM will have already initialized
|
||||
* basic memory. Go here to bump up clock rate and handle wake up conditions.
|
||||
*/
|
||||
mov ip, lr /* persevere link reg across call */
|
||||
bl lowlevel_init /* go setup pll,mux,memory */
|
||||
mov lr, ip /* restore link */
|
||||
mov pc, lr /* back to my caller */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Interrupt handling
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
@
|
||||
@ IRQ stack frame.
|
||||
@
|
||||
#define S_FRAME_SIZE 72
|
||||
|
||||
#define S_OLD_R0 68
|
||||
#define S_PSR 64
|
||||
#define S_PC 60
|
||||
#define S_LR 56
|
||||
#define S_SP 52
|
||||
|
||||
#define S_IP 48
|
||||
#define S_FP 44
|
||||
#define S_R10 40
|
||||
#define S_R9 36
|
||||
#define S_R8 32
|
||||
#define S_R7 28
|
||||
#define S_R6 24
|
||||
#define S_R5 20
|
||||
#define S_R4 16
|
||||
#define S_R3 12
|
||||
#define S_R2 8
|
||||
#define S_R1 4
|
||||
#define S_R0 0
|
||||
|
||||
#define MODE_SVC 0x13
|
||||
#define I_BIT 0x80
|
||||
|
||||
/*
|
||||
* use bad_save_user_regs for abort/prefetch/undef/swi ...
|
||||
* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
|
||||
*/
|
||||
|
||||
.macro bad_save_user_regs
|
||||
sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
|
||||
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
|
||||
|
||||
ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
|
||||
ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
|
||||
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
|
||||
|
||||
add r5, sp, #S_SP
|
||||
mov r1, lr
|
||||
stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
|
||||
mov r0, sp @ save current stack into r0 (param register)
|
||||
.endm
|
||||
|
||||
.macro irq_save_user_regs
|
||||
sub sp, sp, #S_FRAME_SIZE
|
||||
stmia sp, {r0 - r12} @ Calling r0-r12
|
||||
add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
|
||||
stmdb r8, {sp, lr}^ @ Calling SP, LR
|
||||
str lr, [r8, #0] @ Save calling PC
|
||||
mrs r6, spsr
|
||||
str r6, [r8, #4] @ Save CPSR
|
||||
str r0, [r8, #8] @ Save OLD_R0
|
||||
mov r0, sp
|
||||
.endm
|
||||
|
||||
.macro irq_restore_user_regs
|
||||
ldmia sp, {r0 - lr}^ @ Calling r0 - lr
|
||||
mov r0, r0
|
||||
ldr lr, [sp, #S_PC] @ Get PC
|
||||
add sp, sp, #S_FRAME_SIZE
|
||||
subs pc, lr, #4 @ return & move spsr_svc into cpsr
|
||||
.endm
|
||||
|
||||
.macro get_bad_stack
|
||||
ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
|
||||
|
||||
str lr, [r13] @ save caller lr in position 0 of saved stack
|
||||
mrs lr, spsr @ get the spsr
|
||||
str lr, [r13, #4] @ save spsr in position 1 of saved stack
|
||||
|
||||
mov r13, #MODE_SVC @ prepare SVC-Mode
|
||||
@ msr spsr_c, r13
|
||||
msr spsr, r13 @ switch modes, make sure moves will execute
|
||||
mov lr, pc @ capture return pc
|
||||
movs pc, lr @ jump to next instruction & switch modes.
|
||||
.endm
|
||||
|
||||
.macro get_bad_stack_swi
|
||||
sub r13, r13, #4 @ space on current stack for scratch reg.
|
||||
str r0, [r13] @ save R0's value.
|
||||
ldr r0, IRQ_STACK_START_IN @ get data regions start
|
||||
str lr, [r0] @ save caller lr in position 0 of saved stack
|
||||
mrs lr, spsr @ get the spsr
|
||||
str lr, [r0, #4] @ save spsr in position 1 of saved stack
|
||||
ldr lr, [r0] @ restore lr
|
||||
ldr r0, [r13] @ restore r0
|
||||
add r13, r13, #4 @ pop stack entry
|
||||
.endm
|
||||
|
||||
.macro get_irq_stack @ setup IRQ stack
|
||||
ldr sp, IRQ_STACK_START
|
||||
.endm
|
||||
|
||||
.macro get_fiq_stack @ setup FIQ stack
|
||||
ldr sp, FIQ_STACK_START
|
||||
.endm
|
||||
#endif /* CONFIG_SPL_BUILD */
|
||||
|
||||
/*
|
||||
* exception handlers
|
||||
*/
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
.align 5
|
||||
do_hang:
|
||||
ldr sp, _TEXT_BASE /* use 32 words about stack */
|
||||
bl hang /* hang and never return */
|
||||
#else /* !CONFIG_SPL_BUILD */
|
||||
.align 5
|
||||
undefined_instruction:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_undefined_instruction
|
||||
|
||||
.align 5
|
||||
software_interrupt:
|
||||
get_bad_stack_swi
|
||||
bad_save_user_regs
|
||||
bl do_software_interrupt
|
||||
|
||||
.align 5
|
||||
prefetch_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_prefetch_abort
|
||||
|
||||
.align 5
|
||||
data_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_data_abort
|
||||
|
||||
.align 5
|
||||
not_used:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_not_used
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
|
||||
.align 5
|
||||
irq:
|
||||
get_irq_stack
|
||||
irq_save_user_regs
|
||||
bl do_irq
|
||||
irq_restore_user_regs
|
||||
|
||||
.align 5
|
||||
fiq:
|
||||
get_fiq_stack
|
||||
/* someone ought to write a more effiction fiq_save_user_regs */
|
||||
irq_save_user_regs
|
||||
bl do_fiq
|
||||
irq_restore_user_regs
|
||||
|
||||
#else
|
||||
|
||||
.align 5
|
||||
irq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_irq
|
||||
|
||||
.align 5
|
||||
fiq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_fiq
|
||||
|
||||
#endif
|
||||
.align 5
|
||||
.global arm1136_cache_flush
|
||||
arm1136_cache_flush:
|
||||
#if !defined(CONFIG_SYS_ICACHE_OFF)
|
||||
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
|
||||
#endif
|
||||
#if !defined(CONFIG_SYS_DCACHE_OFF)
|
||||
mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
|
||||
#endif
|
||||
mov pc, lr @ back to caller
|
||||
#endif /* CONFIG_SPL_BUILD */
|
|
@ -0,0 +1,46 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* (C) Copyright 2010
|
||||
* Texas Instruments, <www.ti.com>
|
||||
* Aneesh V <aneesh@ti.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
|
||||
LENGTH = CONFIG_SPL_MAX_SIZE }
|
||||
MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
|
||||
LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
__start = .;
|
||||
arch/arm/cpu/arm1136/start.o (.text*)
|
||||
*(.text*)
|
||||
} >.sram
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
|
||||
. = ALIGN(4);
|
||||
__image_copy_end = .;
|
||||
_end = .;
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start = .;
|
||||
*(.bss*)
|
||||
. = ALIGN(4);
|
||||
__bss_end = .;
|
||||
} >.sdram
|
||||
}
|
|
@ -0,0 +1,34 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# (C) Copyright 2008
|
||||
# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(CPU).o
|
||||
|
||||
START = start.o
|
||||
COBJS = cpu.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(START) $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,37 @@
|
|||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License
|
||||
# version 2 as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful, but
|
||||
# WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
SOBJS := lowlevel_init.o
|
||||
COBJS := init.o reset.o timer.o mbox.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.c) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,19 @@
|
|||
#
|
||||
# (C) Copyright 2012 Stephen Warren
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License
|
||||
# version 2 as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful, but
|
||||
# WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
|
||||
# Don't attempt to override the target CPU/ABI options;
|
||||
# the Raspberry Pi toolchain does the right thing by default.
|
||||
PLATFORM_RELFLAGS := $(filter-out -msoft-float,$(PLATFORM_RELFLAGS))
|
||||
PLATFORM_CPPFLAGS := $(filter-out -march=armv5t,$(PLATFORM_CPPFLAGS))
|
|
@ -0,0 +1,24 @@
|
|||
/*
|
||||
* (C) Copyright 2012 Stephen Warren
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
int arch_cpu_init(void)
|
||||
{
|
||||
icache_enable();
|
||||
|
||||
return 0;
|
||||
}
|
|
@ -0,0 +1,19 @@
|
|||
/*
|
||||
* (C) Copyright 2012 Stephen Warren
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
mov pc, lr
|
|
@ -0,0 +1,153 @@
|
|||
/*
|
||||
* (C) Copyright 2012 Stephen Warren
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/mbox.h>
|
||||
|
||||
#define TIMEOUT (100 * 1000) /* 100mS in uS */
|
||||
|
||||
int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
|
||||
{
|
||||
struct bcm2835_mbox_regs *regs =
|
||||
(struct bcm2835_mbox_regs *)BCM2835_MBOX_PHYSADDR;
|
||||
ulong endtime = get_timer(0) + TIMEOUT;
|
||||
u32 val;
|
||||
|
||||
debug("time: %lu timeout: %lu\n", get_timer(0), endtime);
|
||||
|
||||
if (send & BCM2835_CHAN_MASK) {
|
||||
printf("mbox: Illegal mbox data 0x%08x\n", send);
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Drain any stale responses */
|
||||
|
||||
for (;;) {
|
||||
val = readl(®s->status);
|
||||
if (val & BCM2835_MBOX_STATUS_RD_EMPTY)
|
||||
break;
|
||||
if (get_timer(0) >= endtime) {
|
||||
printf("mbox: Timeout draining stale responses\n");
|
||||
return -1;
|
||||
}
|
||||
val = readl(®s->read);
|
||||
}
|
||||
|
||||
/* Wait for space to send */
|
||||
|
||||
for (;;) {
|
||||
val = readl(®s->status);
|
||||
if (!(val & BCM2835_MBOX_STATUS_WR_FULL))
|
||||
break;
|
||||
if (get_timer(0) >= endtime) {
|
||||
printf("mbox: Timeout waiting for send space\n");
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Send the request */
|
||||
|
||||
val = BCM2835_MBOX_PACK(chan, send);
|
||||
debug("mbox: TX raw: 0x%08x\n", val);
|
||||
writel(val, ®s->write);
|
||||
|
||||
/* Wait for the response */
|
||||
|
||||
for (;;) {
|
||||
val = readl(®s->status);
|
||||
if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY))
|
||||
break;
|
||||
if (get_timer(0) >= endtime) {
|
||||
printf("mbox: Timeout waiting for response\n");
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Read the response */
|
||||
|
||||
val = readl(®s->read);
|
||||
debug("mbox: RX raw: 0x%08x\n", val);
|
||||
|
||||
/* Validate the response */
|
||||
|
||||
if (BCM2835_MBOX_UNPACK_CHAN(val) != chan) {
|
||||
printf("mbox: Response channel mismatch\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
*recv = BCM2835_MBOX_UNPACK_DATA(val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
void dump_buf(struct bcm2835_mbox_hdr *buffer)
|
||||
{
|
||||
u32 *p;
|
||||
u32 words;
|
||||
int i;
|
||||
|
||||
p = (u32 *)buffer;
|
||||
words = buffer->buf_size / 4;
|
||||
for (i = 0; i < words; i++)
|
||||
printf(" 0x%04x: 0x%08x\n", i * 4, p[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer)
|
||||
{
|
||||
int ret;
|
||||
u32 rbuffer;
|
||||
struct bcm2835_mbox_tag_hdr *tag;
|
||||
int tag_index;
|
||||
|
||||
#ifdef DEBUG
|
||||
printf("mbox: TX buffer\n");
|
||||
dump_buf(buffer);
|
||||
#endif
|
||||
|
||||
ret = bcm2835_mbox_call_raw(chan, (u32)buffer, &rbuffer);
|
||||
if (ret)
|
||||
return ret;
|
||||
if (rbuffer != (u32)buffer) {
|
||||
printf("mbox: Response buffer mismatch\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
printf("mbox: RX buffer\n");
|
||||
dump_buf(buffer);
|
||||
#endif
|
||||
|
||||
/* Validate overall response status */
|
||||
|
||||
if (buffer->code != BCM2835_MBOX_RESP_CODE_SUCCESS) {
|
||||
printf("mbox: Header response code invalid\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Validate each tag's response status */
|
||||
|
||||
tag = (void *)(buffer + 1);
|
||||
tag_index = 0;
|
||||
while (tag->tag) {
|
||||
if (!(tag->val_len & BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)) {
|
||||
printf("mbox: Tag %d missing val_len response bit\n",
|
||||
tag_index);
|
||||
return -1;
|
||||
}
|
||||
/*
|
||||
* Clear the reponse bit so clients can just look right at the
|
||||
* length field without extra processing
|
||||
*/
|
||||
tag->val_len &= ~BCM2835_MBOX_TAG_VAL_LEN_RESPONSE;
|
||||
tag = (void *)(((u8 *)tag) + sizeof(*tag) + tag->val_buf_size);
|
||||
tag_index++;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
|
@ -0,0 +1,35 @@
|
|||
/*
|
||||
* (C) Copyright 2012 Stephen Warren
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/wdog.h>
|
||||
|
||||
#define RESET_TIMEOUT 10
|
||||
|
||||
void reset_cpu(ulong addr)
|
||||
{
|
||||
struct bcm2835_wdog_regs *regs =
|
||||
(struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
|
||||
uint32_t rstc;
|
||||
|
||||
rstc = readl(®s->rstc);
|
||||
rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
|
||||
rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
|
||||
|
||||
writel(BCM2835_WDOG_PASSWORD | RESET_TIMEOUT, ®s->wdog);
|
||||
writel(BCM2835_WDOG_PASSWORD | rstc, ®s->rstc);
|
||||
}
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* (C) Copyright 2012 Stephen Warren
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/timer.h>
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
ulong get_timer_us(ulong base)
|
||||
{
|
||||
struct bcm2835_timer_regs *regs =
|
||||
(struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR;
|
||||
|
||||
return readl(®s->clo) - base;
|
||||
}
|
||||
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
ulong us = get_timer_us(0);
|
||||
us /= (1000000 / CONFIG_SYS_HZ);
|
||||
us -= base;
|
||||
return us;
|
||||
}
|
||||
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
return get_timer(0);
|
||||
}
|
||||
|
||||
ulong get_tbclk(void)
|
||||
{
|
||||
return CONFIG_SYS_HZ;
|
||||
}
|
||||
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
ulong endtime;
|
||||
signed long diff;
|
||||
|
||||
endtime = get_timer_us(0) + usec;
|
||||
|
||||
do {
|
||||
ulong now = get_timer_us(0);
|
||||
diff = endtime - now;
|
||||
} while (diff >= 0);
|
||||
}
|
|
@ -0,0 +1,17 @@
|
|||
#
|
||||
# (C) Copyright 2002
|
||||
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
# Make ARMv5 to allow more compilers to work, even though its v6.
|
||||
PLATFORM_CPPFLAGS += -march=armv5t
|
||||
# =========================================================================
|
||||
#
|
||||
# Supply options according to compiler version
|
||||
#
|
||||
# =========================================================================
|
||||
PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,\
|
||||
$(call cc-option,-malignment-traps,))
|
||||
PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* (C) Copyright 2004 Texas Insturments
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
/*
|
||||
* CPU specific code
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
static void cache_flush (void);
|
||||
|
||||
int cleanup_before_linux (void)
|
||||
{
|
||||
/*
|
||||
* this function is called just before we call linux
|
||||
* it prepares the processor for linux
|
||||
*
|
||||
* we turn off caches etc ...
|
||||
*/
|
||||
|
||||
disable_interrupts ();
|
||||
|
||||
/* turn off I/D-cache */
|
||||
icache_disable();
|
||||
dcache_disable();
|
||||
/* flush I/D-cache */
|
||||
cache_flush();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* flush I/D-cache */
|
||||
static void cache_flush (void)
|
||||
{
|
||||
/* invalidate both caches and flush btb */
|
||||
asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (0));
|
||||
/* mem barrier to sync things */
|
||||
asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
|
||||
}
|
|
@ -0,0 +1,358 @@
|
|||
/*
|
||||
* armboot - Startup Code for ARM1176 CPU-core
|
||||
*
|
||||
* Copyright (c) 2007 Samsung Electronics
|
||||
*
|
||||
* Copyright (C) 2008
|
||||
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*
|
||||
* 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
|
||||
* 2007-09-21 - Added MoviNAND and OneNAND boot codes by
|
||||
* jsgood (jsgood.yang@samsung.com)
|
||||
* Base codes by scsuh (sc.suh)
|
||||
*/
|
||||
|
||||
#include <asm-offsets.h>
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
|
||||
#ifndef CONFIG_SYS_PHY_UBOOT_BASE
|
||||
#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
|
||||
#endif
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Jump vector table as in table 3.1 in [1]
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
.globl _start
|
||||
_start: b reset
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
ldr pc, _undefined_instruction
|
||||
ldr pc, _software_interrupt
|
||||
ldr pc, _prefetch_abort
|
||||
ldr pc, _data_abort
|
||||
ldr pc, _not_used
|
||||
ldr pc, _irq
|
||||
ldr pc, _fiq
|
||||
|
||||
_undefined_instruction:
|
||||
.word undefined_instruction
|
||||
_software_interrupt:
|
||||
.word software_interrupt
|
||||
_prefetch_abort:
|
||||
.word prefetch_abort
|
||||
_data_abort:
|
||||
.word data_abort
|
||||
_not_used:
|
||||
.word not_used
|
||||
_irq:
|
||||
.word irq
|
||||
_fiq:
|
||||
.word fiq
|
||||
_pad:
|
||||
.word 0x12345678 /* now 16*4=64 */
|
||||
#else
|
||||
. = _start + 64
|
||||
#endif
|
||||
|
||||
.global _end_vect
|
||||
_end_vect:
|
||||
.balignl 16,0xdeadbeef
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Startup Code (reset vector)
|
||||
*
|
||||
* do important init only if we don't start from memory!
|
||||
* setup Memory and board specific bits prior to relocation.
|
||||
* relocate armboot to ram
|
||||
* setup stack
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
.globl _TEXT_BASE
|
||||
_TEXT_BASE:
|
||||
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
|
||||
.word CONFIG_SPL_TEXT_BASE
|
||||
#else
|
||||
.word CONFIG_SYS_TEXT_BASE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* These are defined in the board-specific linker script.
|
||||
* Subtracting _start from them lets the linker put their
|
||||
* relative position in the executable instead of leaving
|
||||
* them null.
|
||||
*/
|
||||
|
||||
.globl _bss_start_ofs
|
||||
_bss_start_ofs:
|
||||
.word __bss_start - _start
|
||||
|
||||
.globl _bss_end_ofs
|
||||
_bss_end_ofs:
|
||||
.word __bss_end - _start
|
||||
|
||||
.globl _end_ofs
|
||||
_end_ofs:
|
||||
.word _end - _start
|
||||
|
||||
/* IRQ stack memory (calculated at run-time) + 8 bytes */
|
||||
.globl IRQ_STACK_START_IN
|
||||
IRQ_STACK_START_IN:
|
||||
.word 0x0badc0de
|
||||
|
||||
/*
|
||||
* the actual reset code
|
||||
*/
|
||||
|
||||
reset:
|
||||
/*
|
||||
* set the cpu to SVC32 mode
|
||||
*/
|
||||
mrs r0, cpsr
|
||||
bic r0, r0, #0x3f
|
||||
orr r0, r0, #0xd3
|
||||
msr cpsr, r0
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* CPU_init_critical registers
|
||||
*
|
||||
* setup important registers
|
||||
* setup memory timing
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
/*
|
||||
* we do sys-critical inits only at reboot,
|
||||
* not when booting from ram!
|
||||
*/
|
||||
cpu_init_crit:
|
||||
/*
|
||||
* When booting from NAND - it has definitely been a reset, so, no need
|
||||
* to flush caches and disable the MMU
|
||||
*/
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
/*
|
||||
* flush v4 I/D caches
|
||||
*/
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
|
||||
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
|
||||
|
||||
/*
|
||||
* disable MMU stuff and caches
|
||||
*/
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
|
||||
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
|
||||
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
|
||||
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
|
||||
|
||||
/* Prepare to disable the MMU */
|
||||
adr r2, mmu_disable_phys
|
||||
sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
|
||||
b mmu_disable
|
||||
|
||||
.align 5
|
||||
/* Run in a single cache-line */
|
||||
mmu_disable:
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
nop
|
||||
nop
|
||||
mov pc, r2
|
||||
mmu_disable_phys:
|
||||
|
||||
#ifdef CONFIG_DISABLE_TCM
|
||||
/*
|
||||
* Disable the TCMs
|
||||
*/
|
||||
mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
|
||||
cmp r0, #0
|
||||
beq skip_tcmdisable
|
||||
mov r1, #0
|
||||
mov r2, #1
|
||||
tst r0, r2
|
||||
mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
|
||||
tst r0, r2, LSL #16
|
||||
mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
|
||||
skip_tcmdisable:
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PERIPORT_REMAP
|
||||
/* Peri port setup */
|
||||
ldr r0, =CONFIG_PERIPORT_BASE
|
||||
orr r0, r0, #CONFIG_PERIPORT_SIZE
|
||||
mcr p15,0,r0,c15,c2,4
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Go setup Memory and board specific bits prior to relocation.
|
||||
*/
|
||||
bl lowlevel_init /* go setup pll,mux,memory */
|
||||
|
||||
bl _main
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
|
||||
.globl c_runtime_cpu_setup
|
||||
c_runtime_cpu_setup:
|
||||
|
||||
mov pc, lr
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Interrupt handling
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
@
|
||||
@ IRQ stack frame.
|
||||
@
|
||||
#define S_FRAME_SIZE 72
|
||||
|
||||
#define S_OLD_R0 68
|
||||
#define S_PSR 64
|
||||
#define S_PC 60
|
||||
#define S_LR 56
|
||||
#define S_SP 52
|
||||
|
||||
#define S_IP 48
|
||||
#define S_FP 44
|
||||
#define S_R10 40
|
||||
#define S_R9 36
|
||||
#define S_R8 32
|
||||
#define S_R7 28
|
||||
#define S_R6 24
|
||||
#define S_R5 20
|
||||
#define S_R4 16
|
||||
#define S_R3 12
|
||||
#define S_R2 8
|
||||
#define S_R1 4
|
||||
#define S_R0 0
|
||||
|
||||
#define MODE_SVC 0x13
|
||||
#define I_BIT 0x80
|
||||
|
||||
/*
|
||||
* use bad_save_user_regs for abort/prefetch/undef/swi ...
|
||||
*/
|
||||
|
||||
.macro bad_save_user_regs
|
||||
/* carve out a frame on current user stack */
|
||||
sub sp, sp, #S_FRAME_SIZE
|
||||
/* Save user registers (now in svc mode) r0-r12 */
|
||||
stmia sp, {r0 - r12}
|
||||
|
||||
ldr r2, IRQ_STACK_START_IN
|
||||
/* get values for "aborted" pc and cpsr (into parm regs) */
|
||||
ldmia r2, {r2 - r3}
|
||||
/* grab pointer to old stack */
|
||||
add r0, sp, #S_FRAME_SIZE
|
||||
|
||||
add r5, sp, #S_SP
|
||||
mov r1, lr
|
||||
/* save sp_SVC, lr_SVC, pc, cpsr */
|
||||
stmia r5, {r0 - r3}
|
||||
/* save current stack into r0 (param register) */
|
||||
mov r0, sp
|
||||
.endm
|
||||
|
||||
.macro get_bad_stack
|
||||
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
|
||||
|
||||
/* save caller lr in position 0 of saved stack */
|
||||
str lr, [r13]
|
||||
/* get the spsr */
|
||||
mrs lr, spsr
|
||||
/* save spsr in position 1 of saved stack */
|
||||
str lr, [r13, #4]
|
||||
|
||||
/* prepare SVC-Mode */
|
||||
mov r13, #MODE_SVC
|
||||
@ msr spsr_c, r13
|
||||
/* switch modes, make sure moves will execute */
|
||||
msr spsr, r13
|
||||
/* capture return pc */
|
||||
mov lr, pc
|
||||
/* jump to next instruction & switch modes. */
|
||||
movs pc, lr
|
||||
.endm
|
||||
|
||||
.macro get_bad_stack_swi
|
||||
/* space on current stack for scratch reg. */
|
||||
sub r13, r13, #4
|
||||
/* save R0's value. */
|
||||
str r0, [r13]
|
||||
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
|
||||
/* save caller lr in position 0 of saved stack */
|
||||
str lr, [r0]
|
||||
/* get the spsr */
|
||||
mrs lr, spsr
|
||||
/* save spsr in position 1 of saved stack */
|
||||
str lr, [r0, #4]
|
||||
/* restore lr */
|
||||
ldr lr, [r0]
|
||||
/* restore r0 */
|
||||
ldr r0, [r13]
|
||||
/* pop stack entry */
|
||||
add r13, r13, #4
|
||||
.endm
|
||||
|
||||
/*
|
||||
* exception handlers
|
||||
*/
|
||||
.align 5
|
||||
undefined_instruction:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_undefined_instruction
|
||||
|
||||
.align 5
|
||||
software_interrupt:
|
||||
get_bad_stack_swi
|
||||
bad_save_user_regs
|
||||
bl do_software_interrupt
|
||||
|
||||
.align 5
|
||||
prefetch_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_prefetch_abort
|
||||
|
||||
.align 5
|
||||
data_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_data_abort
|
||||
|
||||
.align 5
|
||||
not_used:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_not_used
|
||||
|
||||
.align 5
|
||||
irq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_irq
|
||||
|
||||
.align 5
|
||||
fiq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_fiq
|
||||
#endif /* CONFIG_SPL_BUILD */
|
|
@ -0,0 +1,29 @@
|
|||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS += aemif.o clock.o init.o mux.o timer.o
|
||||
SOBJS += lowlevel_init.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* TNETV107X: Asynchronous EMIF Configuration
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/mux.h>
|
||||
|
||||
#define ASYNC_EMIF_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE
|
||||
#define ASYNC_EMIF_CONFIG(cs) (ASYNC_EMIF_BASE+0x10+(cs)*4)
|
||||
#define ASYNC_EMIF_ONENAND_CONTROL (ASYNC_EMIF_BASE+0x5c)
|
||||
#define ASYNC_EMIF_NAND_CONTROL (ASYNC_EMIF_BASE+0x60)
|
||||
#define ASYNC_EMIF_WAITCYCLE_CONFIG (ASYNC_EMIF_BASE+0x4)
|
||||
|
||||
#define CONFIG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
|
||||
#define CONFIG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
|
||||
#define CONFIG_WR_SETUP(v) (((v) & 0x0f) << 26)
|
||||
#define CONFIG_WR_STROBE(v) (((v) & 0x3f) << 20)
|
||||
#define CONFIG_WR_HOLD(v) (((v) & 0x07) << 17)
|
||||
#define CONFIG_RD_SETUP(v) (((v) & 0x0f) << 13)
|
||||
#define CONFIG_RD_STROBE(v) (((v) & 0x3f) << 7)
|
||||
#define CONFIG_RD_HOLD(v) (((v) & 0x07) << 4)
|
||||
#define CONFIG_TURN_AROUND(v) (((v) & 0x03) << 2)
|
||||
#define CONFIG_WIDTH(v) (((v) & 0x03) << 0)
|
||||
|
||||
#define NUM_CS 4
|
||||
|
||||
#define set_config_field(reg, field, val) \
|
||||
do { \
|
||||
if (val != -1) { \
|
||||
reg &= ~CONFIG_##field(0xffffffff); \
|
||||
reg |= CONFIG_##field(val); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
void configure_async_emif(int cs, struct async_emif_config *cfg)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
||||
if (cfg->mode == ASYNC_EMIF_MODE_NAND) {
|
||||
tmp = __raw_readl(ASYNC_EMIF_NAND_CONTROL);
|
||||
tmp |= (1 << cs);
|
||||
__raw_writel(tmp, ASYNC_EMIF_NAND_CONTROL);
|
||||
|
||||
} else if (cfg->mode == ASYNC_EMIF_MODE_ONENAND) {
|
||||
tmp = __raw_readl(ASYNC_EMIF_ONENAND_CONTROL);
|
||||
tmp |= (1 << cs);
|
||||
__raw_writel(tmp, ASYNC_EMIF_ONENAND_CONTROL);
|
||||
}
|
||||
|
||||
tmp = __raw_readl(ASYNC_EMIF_CONFIG(cs));
|
||||
|
||||
set_config_field(tmp, SELECT_STROBE, cfg->select_strobe);
|
||||
set_config_field(tmp, EXTEND_WAIT, cfg->extend_wait);
|
||||
set_config_field(tmp, WR_SETUP, cfg->wr_setup);
|
||||
set_config_field(tmp, WR_STROBE, cfg->wr_strobe);
|
||||
set_config_field(tmp, WR_HOLD, cfg->wr_hold);
|
||||
set_config_field(tmp, RD_SETUP, cfg->rd_setup);
|
||||
set_config_field(tmp, RD_STROBE, cfg->rd_strobe);
|
||||
set_config_field(tmp, RD_HOLD, cfg->rd_hold);
|
||||
set_config_field(tmp, TURN_AROUND, cfg->turn_around);
|
||||
set_config_field(tmp, WIDTH, cfg->width);
|
||||
|
||||
__raw_writel(tmp, ASYNC_EMIF_CONFIG(cs));
|
||||
}
|
||||
|
||||
void init_async_emif(int num_cs, struct async_emif_config *config)
|
||||
{
|
||||
int cs;
|
||||
|
||||
clk_enable(TNETV107X_LPSC_AEMIF);
|
||||
|
||||
for (cs = 0; cs < num_cs; cs++)
|
||||
configure_async_emif(cs, config + cs);
|
||||
}
|
|
@ -0,0 +1,432 @@
|
|||
/*
|
||||
* TNETV107X: Clock management APIs
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm-generic/errno.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/arch/clock.h>
|
||||
|
||||
#define CLOCK_BASE TNETV107X_CLOCK_CONTROL_BASE
|
||||
#define PSC_BASE TNETV107X_PSC_BASE
|
||||
|
||||
#define BIT(x) (1 << (x))
|
||||
|
||||
#define MAX_PREDIV 64
|
||||
#define MAX_POSTDIV 8
|
||||
#define MAX_MULT 512
|
||||
#define MAX_DIV (MAX_PREDIV * MAX_POSTDIV)
|
||||
|
||||
/* LPSC registers */
|
||||
#define PSC_PTCMD 0x120
|
||||
#define PSC_PTSTAT 0x128
|
||||
#define PSC_MDSTAT(n) (0x800 + (n) * 4)
|
||||
#define PSC_MDCTL(n) (0xA00 + (n) * 4)
|
||||
|
||||
#define PSC_MDCTL_LRSTZ BIT(8)
|
||||
|
||||
#define psc_reg_read(reg) __raw_readl((u32 *)(PSC_BASE + (reg)))
|
||||
#define psc_reg_write(reg, val) __raw_writel(val, (u32 *)(PSC_BASE + (reg)))
|
||||
|
||||
/* SSPLL registers */
|
||||
struct sspll_regs {
|
||||
u32 modes;
|
||||
u32 postdiv;
|
||||
u32 prediv;
|
||||
u32 mult_factor;
|
||||
u32 divider_range;
|
||||
u32 bw_divider;
|
||||
u32 spr_amount;
|
||||
u32 spr_rate_div;
|
||||
u32 diag;
|
||||
};
|
||||
|
||||
/* SSPLL base addresses */
|
||||
static struct sspll_regs *sspll_regs[] = {
|
||||
(struct sspll_regs *)(CLOCK_BASE + 0x040),
|
||||
(struct sspll_regs *)(CLOCK_BASE + 0x080),
|
||||
(struct sspll_regs *)(CLOCK_BASE + 0x0c0),
|
||||
};
|
||||
|
||||
#define sspll_reg(pll, reg) (&(sspll_regs[pll]->reg))
|
||||
#define sspll_reg_read(pll, reg) __raw_readl(sspll_reg(pll, reg))
|
||||
#define sspll_reg_write(pll, reg, val) __raw_writel(val, sspll_reg(pll, reg))
|
||||
|
||||
|
||||
/* PLL Control Registers */
|
||||
struct pllctl_regs {
|
||||
u32 ctl; /* 00 */
|
||||
u32 ocsel; /* 04 */
|
||||
u32 secctl; /* 08 */
|
||||
u32 __pad0;
|
||||
u32 mult; /* 10 */
|
||||
u32 prediv; /* 14 */
|
||||
u32 div1; /* 18 */
|
||||
u32 div2; /* 1c */
|
||||
u32 div3; /* 20 */
|
||||
u32 oscdiv1; /* 24 */
|
||||
u32 postdiv; /* 28 */
|
||||
u32 bpdiv; /* 2c */
|
||||
u32 wakeup; /* 30 */
|
||||
u32 __pad1;
|
||||
u32 cmd; /* 38 */
|
||||
u32 stat; /* 3c */
|
||||
u32 alnctl; /* 40 */
|
||||
u32 dchange; /* 44 */
|
||||
u32 cken; /* 48 */
|
||||
u32 ckstat; /* 4c */
|
||||
u32 systat; /* 50 */
|
||||
u32 ckctl; /* 54 */
|
||||
u32 __pad2[2];
|
||||
u32 div4; /* 60 */
|
||||
u32 div5; /* 64 */
|
||||
u32 div6; /* 68 */
|
||||
u32 div7; /* 6c */
|
||||
u32 div8; /* 70 */
|
||||
};
|
||||
|
||||
struct lpsc_map {
|
||||
int pll, div;
|
||||
};
|
||||
|
||||
static struct pllctl_regs *pllctl_regs[] = {
|
||||
(struct pllctl_regs *)(CLOCK_BASE + 0x700),
|
||||
(struct pllctl_regs *)(CLOCK_BASE + 0x300),
|
||||
(struct pllctl_regs *)(CLOCK_BASE + 0x500),
|
||||
};
|
||||
|
||||
#define pllctl_reg(pll, reg) (&(pllctl_regs[pll]->reg))
|
||||
#define pllctl_reg_read(pll, reg) __raw_readl(pllctl_reg(pll, reg))
|
||||
#define pllctl_reg_write(pll, reg, val) __raw_writel(val, pllctl_reg(pll, reg))
|
||||
|
||||
#define pllctl_reg_rmw(pll, reg, mask, val) \
|
||||
pllctl_reg_write(pll, reg, \
|
||||
(pllctl_reg_read(pll, reg) & ~(mask)) | val)
|
||||
|
||||
#define pllctl_reg_setbits(pll, reg, mask) \
|
||||
pllctl_reg_rmw(pll, reg, 0, mask)
|
||||
|
||||
#define pllctl_reg_clrbits(pll, reg, mask) \
|
||||
pllctl_reg_rmw(pll, reg, mask, 0)
|
||||
|
||||
/* PLLCTL Bits */
|
||||
#define PLLCTL_CLKMODE BIT(8)
|
||||
#define PLLCTL_PLLSELB BIT(7)
|
||||
#define PLLCTL_PLLENSRC BIT(5)
|
||||
#define PLLCTL_PLLDIS BIT(4)
|
||||
#define PLLCTL_PLLRST BIT(3)
|
||||
#define PLLCTL_PLLPWRDN BIT(1)
|
||||
#define PLLCTL_PLLEN BIT(0)
|
||||
|
||||
#define PLLDIV_ENABLE BIT(15)
|
||||
|
||||
static int pll_div_offset[] = {
|
||||
#define div_offset(reg) offsetof(struct pllctl_regs, reg)
|
||||
div_offset(div1), div_offset(div2), div_offset(div3),
|
||||
div_offset(div4), div_offset(div5), div_offset(div6),
|
||||
div_offset(div7), div_offset(div8),
|
||||
};
|
||||
|
||||
static unsigned long pll_bypass_mask[] = { 1, 4, 2 };
|
||||
static unsigned long pll_div_mask[] = { 0x01ff, 0x00ff, 0x00ff };
|
||||
|
||||
/* Mappings from PLL+DIV to subsystem clocks */
|
||||
#define sys_arm1176_clk {SYS_PLL, 0}
|
||||
#define sys_dsp_clk {SYS_PLL, 1}
|
||||
#define sys_ddr_clk {SYS_PLL, 2}
|
||||
#define sys_full_clk {SYS_PLL, 3}
|
||||
#define sys_lcd_clk {SYS_PLL, 4}
|
||||
#define sys_vlynq_ref_clk {SYS_PLL, 5}
|
||||
#define sys_tsc_clk {SYS_PLL, 6}
|
||||
#define sys_half_clk {SYS_PLL, 7}
|
||||
|
||||
#define eth_clk_5 {ETH_PLL, 0}
|
||||
#define eth_clk_50 {ETH_PLL, 1}
|
||||
#define eth_clk_125 {ETH_PLL, 2}
|
||||
#define eth_clk_250 {ETH_PLL, 3}
|
||||
#define eth_clk_25 {ETH_PLL, 4}
|
||||
|
||||
#define tdm_clk {TDM_PLL, 0}
|
||||
#define tdm_extra_clk {TDM_PLL, 1}
|
||||
#define tdm1_clk {TDM_PLL, 2}
|
||||
|
||||
static const struct lpsc_map lpsc_clk_map[] = {
|
||||
[TNETV107X_LPSC_ARM] = sys_arm1176_clk,
|
||||
[TNETV107X_LPSC_GEM] = sys_dsp_clk,
|
||||
[TNETV107X_LPSC_DDR2_PHY] = sys_ddr_clk,
|
||||
[TNETV107X_LPSC_TPCC] = sys_full_clk,
|
||||
[TNETV107X_LPSC_TPTC0] = sys_full_clk,
|
||||
[TNETV107X_LPSC_TPTC1] = sys_full_clk,
|
||||
[TNETV107X_LPSC_RAM] = sys_full_clk,
|
||||
[TNETV107X_LPSC_MBX_LITE] = sys_arm1176_clk,
|
||||
[TNETV107X_LPSC_LCD] = sys_lcd_clk,
|
||||
[TNETV107X_LPSC_ETHSS] = eth_clk_125,
|
||||
[TNETV107X_LPSC_AEMIF] = sys_full_clk,
|
||||
[TNETV107X_LPSC_CHIP_CFG] = sys_half_clk,
|
||||
[TNETV107X_LPSC_TSC] = sys_tsc_clk,
|
||||
[TNETV107X_LPSC_ROM] = sys_half_clk,
|
||||
[TNETV107X_LPSC_UART2] = sys_half_clk,
|
||||
[TNETV107X_LPSC_PKTSEC] = sys_half_clk,
|
||||
[TNETV107X_LPSC_SECCTL] = sys_half_clk,
|
||||
[TNETV107X_LPSC_KEYMGR] = sys_half_clk,
|
||||
[TNETV107X_LPSC_KEYPAD] = sys_half_clk,
|
||||
[TNETV107X_LPSC_GPIO] = sys_half_clk,
|
||||
[TNETV107X_LPSC_MDIO] = sys_half_clk,
|
||||
[TNETV107X_LPSC_SDIO0] = sys_half_clk,
|
||||
[TNETV107X_LPSC_UART0] = sys_half_clk,
|
||||
[TNETV107X_LPSC_UART1] = sys_half_clk,
|
||||
[TNETV107X_LPSC_TIMER0] = sys_half_clk,
|
||||
[TNETV107X_LPSC_TIMER1] = sys_half_clk,
|
||||
[TNETV107X_LPSC_WDT_ARM] = sys_half_clk,
|
||||
[TNETV107X_LPSC_WDT_DSP] = sys_half_clk,
|
||||
[TNETV107X_LPSC_SSP] = sys_half_clk,
|
||||
[TNETV107X_LPSC_TDM0] = tdm_clk,
|
||||
[TNETV107X_LPSC_VLYNQ] = sys_vlynq_ref_clk,
|
||||
[TNETV107X_LPSC_MCDMA] = sys_half_clk,
|
||||
[TNETV107X_LPSC_USB0] = sys_half_clk,
|
||||
[TNETV107X_LPSC_TDM1] = tdm1_clk,
|
||||
[TNETV107X_LPSC_DEBUGSS] = sys_half_clk,
|
||||
[TNETV107X_LPSC_ETHSS_RGMII] = eth_clk_250,
|
||||
[TNETV107X_LPSC_SYSTEM] = sys_half_clk,
|
||||
[TNETV107X_LPSC_IMCOP] = sys_dsp_clk,
|
||||
[TNETV107X_LPSC_SPARE] = sys_half_clk,
|
||||
[TNETV107X_LPSC_SDIO1] = sys_half_clk,
|
||||
[TNETV107X_LPSC_USB1] = sys_half_clk,
|
||||
[TNETV107X_LPSC_USBSS] = sys_half_clk,
|
||||
[TNETV107X_LPSC_DDR2_EMIF1_VRST] = sys_ddr_clk,
|
||||
[TNETV107X_LPSC_DDR2_EMIF2_VCTL_RST] = sys_ddr_clk,
|
||||
};
|
||||
|
||||
static const unsigned long pll_ext_freq[] = {
|
||||
[SYS_PLL] = CONFIG_PLL_SYS_EXT_FREQ,
|
||||
[ETH_PLL] = CONFIG_PLL_ETH_EXT_FREQ,
|
||||
[TDM_PLL] = CONFIG_PLL_TDM_EXT_FREQ,
|
||||
};
|
||||
|
||||
static unsigned long pll_freq_get(int pll)
|
||||
{
|
||||
unsigned long mult = 1, prediv = 1, postdiv = 1;
|
||||
unsigned long ref = CONFIG_SYS_INT_OSC_FREQ;
|
||||
unsigned long ret;
|
||||
u32 bypass;
|
||||
|
||||
bypass = __raw_readl((u32 *)(CLOCK_BASE));
|
||||
if (!(bypass & pll_bypass_mask[pll])) {
|
||||
mult = sspll_reg_read(pll, mult_factor);
|
||||
prediv = sspll_reg_read(pll, prediv) + 1;
|
||||
postdiv = sspll_reg_read(pll, postdiv) + 1;
|
||||
}
|
||||
|
||||
if (pllctl_reg_read(pll, ctl) & PLLCTL_CLKMODE)
|
||||
ref = pll_ext_freq[pll];
|
||||
|
||||
if (!(pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN))
|
||||
return ref;
|
||||
|
||||
ret = (unsigned long)(ref + ((unsigned long long)ref * mult) / 256);
|
||||
ret /= (prediv * postdiv);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static unsigned long __pll_div_freq_get(int pll, unsigned int fpll,
|
||||
int div)
|
||||
{
|
||||
int divider = 1;
|
||||
unsigned long divreg;
|
||||
|
||||
divreg = __raw_readl((void *)pllctl_regs[pll] + pll_div_offset[div]);
|
||||
|
||||
if (divreg & PLLDIV_ENABLE)
|
||||
divider = (divreg & pll_div_mask[pll]) + 1;
|
||||
|
||||
return fpll / divider;
|
||||
}
|
||||
|
||||
static unsigned long pll_div_freq_get(int pll, int div)
|
||||
{
|
||||
unsigned int fpll = pll_freq_get(pll);
|
||||
|
||||
return __pll_div_freq_get(pll, fpll, div);
|
||||
}
|
||||
|
||||
static void __pll_div_freq_set(int pll, unsigned int fpll, int div,
|
||||
unsigned long hz)
|
||||
{
|
||||
int divider = (fpll / hz - 1);
|
||||
|
||||
divider &= pll_div_mask[pll];
|
||||
divider |= PLLDIV_ENABLE;
|
||||
|
||||
__raw_writel(divider, (void *)pllctl_regs[pll] + pll_div_offset[div]);
|
||||
pllctl_reg_setbits(pll, alnctl, (1 << div));
|
||||
pllctl_reg_setbits(pll, dchange, (1 << div));
|
||||
}
|
||||
|
||||
static unsigned long pll_div_freq_set(int pll, int div, unsigned long hz)
|
||||
{
|
||||
unsigned int fpll = pll_freq_get(pll);
|
||||
|
||||
__pll_div_freq_set(pll, fpll, div, hz);
|
||||
|
||||
pllctl_reg_write(pll, cmd, 1);
|
||||
|
||||
/* Wait until new divider takes effect */
|
||||
while (pllctl_reg_read(pll, stat) & 0x01);
|
||||
|
||||
return __pll_div_freq_get(pll, fpll, div);
|
||||
}
|
||||
|
||||
unsigned long clk_get_rate(unsigned int clk)
|
||||
{
|
||||
return pll_div_freq_get(lpsc_clk_map[clk].pll, lpsc_clk_map[clk].div);
|
||||
}
|
||||
|
||||
unsigned long clk_round_rate(unsigned int clk, unsigned long hz)
|
||||
{
|
||||
unsigned long fpll, divider, pll;
|
||||
|
||||
pll = lpsc_clk_map[clk].pll;
|
||||
fpll = pll_freq_get(pll);
|
||||
divider = (fpll / hz - 1);
|
||||
divider &= pll_div_mask[pll];
|
||||
|
||||
return fpll / (divider + 1);
|
||||
}
|
||||
|
||||
int clk_set_rate(unsigned int clk, unsigned long _hz)
|
||||
{
|
||||
unsigned long hz;
|
||||
|
||||
hz = clk_round_rate(clk, _hz);
|
||||
if (hz != _hz)
|
||||
return -EINVAL; /* Cannot set to target freq */
|
||||
|
||||
pll_div_freq_set(lpsc_clk_map[clk].pll, lpsc_clk_map[clk].div, hz);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void lpsc_control(int mod, unsigned long state, int lrstz)
|
||||
{
|
||||
u32 mdctl;
|
||||
|
||||
mdctl = psc_reg_read(PSC_MDCTL(mod));
|
||||
mdctl &= ~0x1f;
|
||||
mdctl |= state;
|
||||
|
||||
if (lrstz == 0)
|
||||
mdctl &= ~PSC_MDCTL_LRSTZ;
|
||||
else if (lrstz == 1)
|
||||
mdctl |= PSC_MDCTL_LRSTZ;
|
||||
|
||||
psc_reg_write(PSC_MDCTL(mod), mdctl);
|
||||
|
||||
psc_reg_write(PSC_PTCMD, 1);
|
||||
|
||||
/* wait for power domain transition to end */
|
||||
while (psc_reg_read(PSC_PTSTAT) & 1);
|
||||
|
||||
/* Wait for module state change */
|
||||
while ((psc_reg_read(PSC_MDSTAT(mod)) & 0x1f) != state);
|
||||
}
|
||||
|
||||
int lpsc_status(unsigned int id)
|
||||
{
|
||||
return psc_reg_read(PSC_MDSTAT(id)) & 0x1f;
|
||||
}
|
||||
|
||||
static void init_pll(const struct pll_init_data *data)
|
||||
{
|
||||
unsigned long fpll;
|
||||
unsigned long best_pre = 0, best_post = 0, best_mult = 0;
|
||||
unsigned long div, prediv, postdiv, mult;
|
||||
unsigned long delta, actual;
|
||||
long best_delta = -1;
|
||||
int i;
|
||||
u32 tmp;
|
||||
|
||||
if (data->pll == SYS_PLL)
|
||||
return; /* cannot reconfigure system pll on the fly */
|
||||
|
||||
tmp = pllctl_reg_read(data->pll, ctl);
|
||||
if (data->internal_osc) {
|
||||
tmp &= ~PLLCTL_CLKMODE;
|
||||
fpll = CONFIG_SYS_INT_OSC_FREQ;
|
||||
} else {
|
||||
tmp |= PLLCTL_CLKMODE;
|
||||
fpll = pll_ext_freq[data->pll];
|
||||
}
|
||||
pllctl_reg_write(data->pll, ctl, tmp);
|
||||
|
||||
mult = data->pll_freq / fpll;
|
||||
for (mult = MAX(mult, 1); mult <= MAX_MULT; mult++) {
|
||||
div = (fpll * mult) / data->pll_freq;
|
||||
if (div < 1 || div > MAX_DIV)
|
||||
continue;
|
||||
|
||||
for (postdiv = 1; postdiv <= min(div, MAX_POSTDIV); postdiv++) {
|
||||
prediv = div / postdiv;
|
||||
if (prediv < 1 || prediv > MAX_PREDIV)
|
||||
continue;
|
||||
|
||||
actual = (fpll / prediv) * (mult / postdiv);
|
||||
delta = (actual - data->pll_freq);
|
||||
if (delta < 0)
|
||||
delta = -delta;
|
||||
if ((delta < best_delta) || (best_delta == -1)) {
|
||||
best_delta = delta;
|
||||
best_mult = mult;
|
||||
best_pre = prediv;
|
||||
best_post = postdiv;
|
||||
if (delta == 0)
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
}
|
||||
done:
|
||||
|
||||
if (best_delta == -1) {
|
||||
printf("pll cannot derive %lu from %lu\n",
|
||||
data->pll_freq, fpll);
|
||||
return;
|
||||
}
|
||||
|
||||
fpll = fpll * best_mult;
|
||||
fpll /= best_pre * best_post;
|
||||
|
||||
pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLENSRC);
|
||||
pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLEN);
|
||||
|
||||
pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLRST);
|
||||
|
||||
pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLPWRDN);
|
||||
pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLDIS);
|
||||
|
||||
sspll_reg_write(data->pll, mult_factor, (best_mult - 1) << 8);
|
||||
sspll_reg_write(data->pll, prediv, best_pre - 1);
|
||||
sspll_reg_write(data->pll, postdiv, best_post - 1);
|
||||
|
||||
for (i = 0; i < 10; i++)
|
||||
if (data->div_freq[i])
|
||||
__pll_div_freq_set(data->pll, fpll, i,
|
||||
data->div_freq[i]);
|
||||
|
||||
pllctl_reg_write(data->pll, cmd, 1);
|
||||
|
||||
/* Wait until pll "go" operation completes */
|
||||
while (pllctl_reg_read(data->pll, stat) & 0x01);
|
||||
|
||||
pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLRST);
|
||||
pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLEN);
|
||||
}
|
||||
|
||||
void init_plls(int num_pll, struct pll_init_data *config)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < num_pll; i++)
|
||||
init_pll(&config[i]);
|
||||
}
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* TNETV107X: Architecture initialization
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
void chip_configuration_unlock(void)
|
||||
{
|
||||
__raw_writel(TNETV107X_KICK0_MAGIC, TNETV107X_KICK0);
|
||||
__raw_writel(TNETV107X_KICK1_MAGIC, TNETV107X_KICK1);
|
||||
}
|
||||
|
||||
int arch_cpu_init(void)
|
||||
{
|
||||
icache_enable();
|
||||
chip_configuration_unlock();
|
||||
|
||||
return 0;
|
||||
}
|
|
@ -0,0 +1,10 @@
|
|||
/*
|
||||
* TNETV107X: Low-level pre-relocation initialization
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* nothing for now, maybe needed for more exotic boot modes */
|
||||
mov pc, lr
|
|
@ -0,0 +1,319 @@
|
|||
/*
|
||||
* TNETV107X: Pinmux configuration
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/mux.h>
|
||||
|
||||
#define MUX_MODE_1 0x00
|
||||
#define MUX_MODE_2 0x04
|
||||
#define MUX_MODE_3 0x0c
|
||||
#define MUX_MODE_4 0x1c
|
||||
|
||||
#define MUX_DEBUG 0
|
||||
|
||||
static const struct pin_config pin_table[] = {
|
||||
/* reg shift mode */
|
||||
TNETV107X_MUX_CFG(0, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(0, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(0, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(0, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(0, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(0, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(3, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(3, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 10, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(3, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(3, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 20, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(3, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 25, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(4, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(4, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(4, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(4, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 20, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(4, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 25, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 10, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 20, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 25, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 10, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 20, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 25, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(7, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(7, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(7, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 10, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(7, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(7, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(7, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(8, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(8, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(8, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(8, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(8, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(8, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(8, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(9, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(9, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(9, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(9, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(9, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 10, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(9, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(9, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(9, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(9, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 20, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(10, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(10, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(10, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(10, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(10, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(10, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(11, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(11, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(13, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(13, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(13, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(13, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(15, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(15, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(16, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(16, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(16, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(16, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(16, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(16, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(16, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(17, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(17, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(17, 0, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(17, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(17, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(17, 5, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(17, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(17, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(17, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(17, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(17, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(17, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(18, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(18, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(18, 0, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(18, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(18, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(18, 5, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(18, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(18, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(18, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(18, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(18, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(18, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(19, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(19, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(19, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(19, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(19, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(19, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(20, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 5, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(22, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(22, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(22, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(22, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 20, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(22, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 25, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(23, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(23, 0, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(23, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(23, 5, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(23, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(23, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(24, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(24, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(24, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(24, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(24, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(24, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(24, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(24, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(25, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(25, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(25, 0, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(25, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(25, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(25, 5, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(25, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(25, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(25, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(25, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(25, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(25, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(25, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(26, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(26, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(26, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(26, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 25, MUX_MODE_2),
|
||||
};
|
||||
|
||||
const int pin_table_size = sizeof(pin_table) / sizeof(pin_table[0]);
|
||||
|
||||
int mux_select_pin(short index)
|
||||
{
|
||||
const struct pin_config *cfg;
|
||||
unsigned long mask, mode, reg;
|
||||
|
||||
if (index >= pin_table_size)
|
||||
return 0;
|
||||
|
||||
cfg = &pin_table[index];
|
||||
|
||||
mask = 0x1f << cfg->mask_offset;
|
||||
mode = cfg->mode << cfg->mask_offset;
|
||||
|
||||
reg = __raw_readl(TNETV107X_PINMUX(cfg->reg_index));
|
||||
reg = (reg & ~mask) | mode;
|
||||
__raw_writel(reg, TNETV107X_PINMUX(cfg->reg_index));
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int mux_select_pins(const short *pins)
|
||||
{
|
||||
int i, ret = 1;
|
||||
|
||||
for (i = 0; pins[i] >= 0; i++)
|
||||
ret &= mux_select_pin(pins[i]);
|
||||
|
||||
return ret;
|
||||
}
|
|
@ -0,0 +1,93 @@
|
|||
/*
|
||||
* TNETV107X: Timer implementation
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
|
||||
struct timer_regs {
|
||||
u_int32_t pid12;
|
||||
u_int32_t pad[3];
|
||||
u_int32_t tim12;
|
||||
u_int32_t tim34;
|
||||
u_int32_t prd12;
|
||||
u_int32_t prd34;
|
||||
u_int32_t tcr;
|
||||
u_int32_t tgcr;
|
||||
u_int32_t wdtcr;
|
||||
};
|
||||
|
||||
#define regs ((struct timer_regs *)CONFIG_SYS_TIMERBASE)
|
||||
|
||||
#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
|
||||
#define TIM_CLK_DIV 16
|
||||
|
||||
static ulong timestamp;
|
||||
static ulong lastinc;
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
clk_enable(TNETV107X_LPSC_TIMER0);
|
||||
|
||||
lastinc = timestamp = 0;
|
||||
|
||||
/* We are using timer34 in unchained 32-bit mode, full speed */
|
||||
__raw_writel(0x0, ®s->tcr);
|
||||
__raw_writel(0x0, ®s->tgcr);
|
||||
__raw_writel(0x06 | ((TIM_CLK_DIV - 1) << 8), ®s->tgcr);
|
||||
__raw_writel(0x0, ®s->tim34);
|
||||
__raw_writel(TIMER_LOAD_VAL, ®s->prd34);
|
||||
__raw_writel(2 << 22, ®s->tcr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static ulong get_timer_raw(void)
|
||||
{
|
||||
ulong now = __raw_readl(®s->tim34);
|
||||
|
||||
if (now >= lastinc)
|
||||
timestamp += now - lastinc;
|
||||
else
|
||||
timestamp += now + TIMER_LOAD_VAL - lastinc;
|
||||
|
||||
lastinc = now;
|
||||
|
||||
return timestamp;
|
||||
}
|
||||
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
return (get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base;
|
||||
}
|
||||
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
return get_timer(0);
|
||||
}
|
||||
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
ulong tmo;
|
||||
ulong endtime;
|
||||
signed long diff;
|
||||
|
||||
tmo = CONFIG_SYS_HZ_CLOCK / 1000;
|
||||
tmo *= usec;
|
||||
tmo /= (1000 * TIM_CLK_DIV);
|
||||
|
||||
endtime = get_timer_raw() + tmo;
|
||||
|
||||
do {
|
||||
ulong now = get_timer_raw();
|
||||
diff = endtime - now;
|
||||
} while (diff >= 0);
|
||||
}
|
||||
|
||||
ulong get_tbclk(void)
|
||||
{
|
||||
return CONFIG_SYS_HZ;
|
||||
}
|
|
@ -0,0 +1,31 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(CPU).o
|
||||
|
||||
START = start.o
|
||||
COBJS = interrupts.o cpu.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(START) $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,17 @@
|
|||
#
|
||||
# (C) Copyright 2002
|
||||
# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
# Marius Groeger <mgroeger@sysgo.de>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
PLATFORM_CPPFLAGS += -march=armv4 -mtune=arm7tdmi
|
||||
# =========================================================================
|
||||
#
|
||||
# Supply options according to compiler version
|
||||
#
|
||||
# =========================================================================
|
||||
PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,\
|
||||
$(call cc-option,-malignment-traps,))
|
||||
PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
/*
|
||||
* cleanup_before_linux() - Prepare the CPU to jump to Linux
|
||||
*
|
||||
* This function is called just before we call Linux, it
|
||||
* prepares the processor for linux
|
||||
*/
|
||||
int cleanup_before_linux(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
|
@ -0,0 +1,33 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
void do_irq (struct pt_regs *pt_regs)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_TEGRA)
|
||||
static ulong timestamp;
|
||||
static ulong lastdec;
|
||||
|
||||
int timer_init (void)
|
||||
{
|
||||
/* No timer routines for tegra as yet */
|
||||
lastdec = 0;
|
||||
timestamp = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
|
@ -0,0 +1,333 @@
|
|||
/*
|
||||
* armboot - Startup Code for ARM720 CPU-core
|
||||
*
|
||||
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
|
||||
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <asm-offsets.h>
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Jump vector table as in table 3.1 in [1]
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
.globl _start
|
||||
_start: b reset
|
||||
ldr pc, _undefined_instruction
|
||||
ldr pc, _software_interrupt
|
||||
ldr pc, _prefetch_abort
|
||||
ldr pc, _data_abort
|
||||
ldr pc, _not_used
|
||||
ldr pc, _irq
|
||||
ldr pc, _fiq
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
_undefined_instruction: .word _undefined_instruction
|
||||
_software_interrupt: .word _software_interrupt
|
||||
_prefetch_abort: .word _prefetch_abort
|
||||
_data_abort: .word _data_abort
|
||||
_not_used: .word _not_used
|
||||
_irq: .word _irq
|
||||
_fiq: .word _fiq
|
||||
_pad: .word 0x12345678 /* now 16*4=64 */
|
||||
#else
|
||||
_undefined_instruction: .word undefined_instruction
|
||||
_software_interrupt: .word software_interrupt
|
||||
_prefetch_abort: .word prefetch_abort
|
||||
_data_abort: .word data_abort
|
||||
_not_used: .word not_used
|
||||
_irq: .word irq
|
||||
_fiq: .word fiq
|
||||
_pad: .word 0x12345678 /* now 16*4=64 */
|
||||
#endif /* CONFIG_SPL_BUILD */
|
||||
|
||||
.balignl 16,0xdeadbeef
|
||||
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Startup Code (reset vector)
|
||||
*
|
||||
* do important init only if we don't start from RAM!
|
||||
* relocate armboot to ram
|
||||
* setup stack
|
||||
* jump to second stage
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
.globl _TEXT_BASE
|
||||
_TEXT_BASE:
|
||||
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
|
||||
.word CONFIG_SPL_TEXT_BASE
|
||||
#else
|
||||
.word CONFIG_SYS_TEXT_BASE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* These are defined in the board-specific linker script.
|
||||
* Subtracting _start from them lets the linker put their
|
||||
* relative position in the executable instead of leaving
|
||||
* them null.
|
||||
*/
|
||||
.globl _bss_start_ofs
|
||||
_bss_start_ofs:
|
||||
.word __bss_start - _start
|
||||
|
||||
.globl _bss_end_ofs
|
||||
_bss_end_ofs:
|
||||
.word __bss_end - _start
|
||||
|
||||
.globl _end_ofs
|
||||
_end_ofs:
|
||||
.word _end - _start
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
/* IRQ stack memory (calculated at run-time) */
|
||||
.globl IRQ_STACK_START
|
||||
IRQ_STACK_START:
|
||||
.word 0x0badc0de
|
||||
|
||||
/* IRQ stack memory (calculated at run-time) */
|
||||
.globl FIQ_STACK_START
|
||||
FIQ_STACK_START:
|
||||
.word 0x0badc0de
|
||||
#endif
|
||||
|
||||
/* IRQ stack memory (calculated at run-time) + 8 bytes */
|
||||
.globl IRQ_STACK_START_IN
|
||||
IRQ_STACK_START_IN:
|
||||
.word 0x0badc0de
|
||||
|
||||
/*
|
||||
* the actual reset code
|
||||
*/
|
||||
|
||||
reset:
|
||||
/*
|
||||
* set the cpu to SVC32 mode
|
||||
*/
|
||||
mrs r0,cpsr
|
||||
bic r0,r0,#0x1f
|
||||
orr r0,r0,#0xd3
|
||||
msr cpsr,r0
|
||||
|
||||
/*
|
||||
* we do sys-critical inits only at reboot,
|
||||
* not when booting from ram!
|
||||
*/
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
bl cpu_init_crit
|
||||
#endif
|
||||
|
||||
bl _main
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
|
||||
.globl c_runtime_cpu_setup
|
||||
c_runtime_cpu_setup:
|
||||
|
||||
mov pc, lr
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* CPU_init_critical registers
|
||||
*
|
||||
* setup important registers
|
||||
* setup memory timing
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
cpu_init_crit:
|
||||
|
||||
mov ip, lr
|
||||
/*
|
||||
* before relocating, we have to setup RAM timing
|
||||
* because memory timing is board-dependent, you will
|
||||
* find a lowlevel_init.S in your board directory.
|
||||
*/
|
||||
bl lowlevel_init
|
||||
mov lr, ip
|
||||
|
||||
mov pc, lr
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Interrupt handling
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
@
|
||||
@ IRQ stack frame.
|
||||
@
|
||||
#define S_FRAME_SIZE 72
|
||||
|
||||
#define S_OLD_R0 68
|
||||
#define S_PSR 64
|
||||
#define S_PC 60
|
||||
#define S_LR 56
|
||||
#define S_SP 52
|
||||
|
||||
#define S_IP 48
|
||||
#define S_FP 44
|
||||
#define S_R10 40
|
||||
#define S_R9 36
|
||||
#define S_R8 32
|
||||
#define S_R7 28
|
||||
#define S_R6 24
|
||||
#define S_R5 20
|
||||
#define S_R4 16
|
||||
#define S_R3 12
|
||||
#define S_R2 8
|
||||
#define S_R1 4
|
||||
#define S_R0 0
|
||||
|
||||
#define MODE_SVC 0x13
|
||||
#define I_BIT 0x80
|
||||
|
||||
/*
|
||||
* use bad_save_user_regs for abort/prefetch/undef/swi ...
|
||||
* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
|
||||
*/
|
||||
|
||||
.macro bad_save_user_regs
|
||||
sub sp, sp, #S_FRAME_SIZE
|
||||
stmia sp, {r0 - r12} @ Calling r0-r12
|
||||
add r8, sp, #S_PC
|
||||
|
||||
ldr r2, IRQ_STACK_START_IN
|
||||
ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
|
||||
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
|
||||
|
||||
add r5, sp, #S_SP
|
||||
mov r1, lr
|
||||
stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
|
||||
mov r0, sp
|
||||
.endm
|
||||
|
||||
.macro irq_save_user_regs
|
||||
sub sp, sp, #S_FRAME_SIZE
|
||||
stmia sp, {r0 - r12} @ Calling r0-r12
|
||||
add r8, sp, #S_PC
|
||||
stmdb r8, {sp, lr}^ @ Calling SP, LR
|
||||
str lr, [r8, #0] @ Save calling PC
|
||||
mrs r6, spsr
|
||||
str r6, [r8, #4] @ Save CPSR
|
||||
str r0, [r8, #8] @ Save OLD_R0
|
||||
mov r0, sp
|
||||
.endm
|
||||
|
||||
.macro irq_restore_user_regs
|
||||
ldmia sp, {r0 - lr}^ @ Calling r0 - lr
|
||||
mov r0, r0
|
||||
ldr lr, [sp, #S_PC] @ Get PC
|
||||
add sp, sp, #S_FRAME_SIZE
|
||||
subs pc, lr, #4 @ return & move spsr_svc into cpsr
|
||||
.endm
|
||||
|
||||
.macro get_bad_stack
|
||||
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
|
||||
|
||||
str lr, [r13] @ save caller lr / spsr
|
||||
mrs lr, spsr
|
||||
str lr, [r13, #4]
|
||||
|
||||
mov r13, #MODE_SVC @ prepare SVC-Mode
|
||||
msr spsr_c, r13
|
||||
mov lr, pc
|
||||
movs pc, lr
|
||||
.endm
|
||||
|
||||
.macro get_irq_stack @ setup IRQ stack
|
||||
ldr sp, IRQ_STACK_START
|
||||
.endm
|
||||
|
||||
.macro get_fiq_stack @ setup FIQ stack
|
||||
ldr sp, FIQ_STACK_START
|
||||
.endm
|
||||
|
||||
/*
|
||||
* exception handlers
|
||||
*/
|
||||
.align 5
|
||||
undefined_instruction:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_undefined_instruction
|
||||
|
||||
.align 5
|
||||
software_interrupt:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_software_interrupt
|
||||
|
||||
.align 5
|
||||
prefetch_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_prefetch_abort
|
||||
|
||||
.align 5
|
||||
data_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_data_abort
|
||||
|
||||
.align 5
|
||||
not_used:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_not_used
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
|
||||
.align 5
|
||||
irq:
|
||||
get_irq_stack
|
||||
irq_save_user_regs
|
||||
bl do_irq
|
||||
irq_restore_user_regs
|
||||
|
||||
.align 5
|
||||
fiq:
|
||||
get_fiq_stack
|
||||
/* someone ought to write a more effiction fiq_save_user_regs */
|
||||
irq_save_user_regs
|
||||
bl do_fiq
|
||||
irq_restore_user_regs
|
||||
|
||||
#else
|
||||
|
||||
.align 5
|
||||
irq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_irq
|
||||
|
||||
.align 5
|
||||
fiq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_fiq
|
||||
|
||||
#endif
|
||||
#endif /* CONFIG_SPL_BUILD */
|
|
@ -0,0 +1,32 @@
|
|||
#
|
||||
# (C) Copyright 2010,2011 Nvidia Corporation.
|
||||
#
|
||||
# (C) Copyright 2000-2008
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)libtegra-common.o
|
||||
|
||||
COBJS-$(CONFIG_SPL_BUILD) += spl.o
|
||||
COBJS-y += cpu.o
|
||||
|
||||
SRCS := $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,341 @@
|
|||
/*
|
||||
* Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/gp_padctrl.h>
|
||||
#include <asm/arch/pinmux.h>
|
||||
#include <asm/arch/tegra.h>
|
||||
#include <asm/arch-tegra/clk_rst.h>
|
||||
#include <asm/arch-tegra/pmc.h>
|
||||
#include <asm/arch-tegra/scu.h>
|
||||
#include "cpu.h"
|
||||
|
||||
int get_num_cpus(void)
|
||||
{
|
||||
struct apb_misc_gp_ctlr *gp;
|
||||
uint rev;
|
||||
|
||||
gp = (struct apb_misc_gp_ctlr *)NV_PA_APB_MISC_GP_BASE;
|
||||
rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT;
|
||||
|
||||
switch (rev) {
|
||||
case CHIPID_TEGRA20:
|
||||
return 2;
|
||||
break;
|
||||
case CHIPID_TEGRA30:
|
||||
case CHIPID_TEGRA114:
|
||||
default:
|
||||
return 4;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Timing tables for each SOC for all four oscillator options.
|
||||
*/
|
||||
struct clk_pll_table tegra_pll_x_table[TEGRA_SOC_CNT][CLOCK_OSC_FREQ_COUNT] = {
|
||||
/* T20: 1 GHz */
|
||||
/* n, m, p, cpcon */
|
||||
{{ 1000, 13, 0, 12}, /* OSC 13M */
|
||||
{ 625, 12, 0, 8}, /* OSC 19.2M */
|
||||
{ 1000, 12, 0, 12}, /* OSC 12M */
|
||||
{ 1000, 26, 0, 12}, /* OSC 26M */
|
||||
},
|
||||
|
||||
/* T25: 1.2 GHz */
|
||||
{{ 923, 10, 0, 12},
|
||||
{ 750, 12, 0, 8},
|
||||
{ 600, 6, 0, 12},
|
||||
{ 600, 13, 0, 12},
|
||||
},
|
||||
|
||||
/* T30: 1.4 GHz */
|
||||
{{ 862, 8, 0, 8},
|
||||
{ 583, 8, 0, 4},
|
||||
{ 700, 6, 0, 8},
|
||||
{ 700, 13, 0, 8},
|
||||
},
|
||||
|
||||
/* T114: 1.4 GHz */
|
||||
{{ 862, 8, 0, 8},
|
||||
{ 583, 8, 0, 4},
|
||||
{ 696, 12, 0, 8},
|
||||
{ 700, 13, 0, 8},
|
||||
},
|
||||
};
|
||||
|
||||
void adjust_pllp_out_freqs(void)
|
||||
{
|
||||
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
|
||||
struct clk_pll *pll = &clkrst->crc_pll[CLOCK_ID_PERIPH];
|
||||
u32 reg;
|
||||
|
||||
/* Set T30 PLLP_OUT1, 2, 3 & 4 freqs to 9.6, 48, 102 & 204MHz */
|
||||
reg = readl(&pll->pll_out[0]); /* OUTA, contains OUT2 / OUT1 */
|
||||
reg |= (IN_408_OUT_48_DIVISOR << PLLP_OUT2_RATIO) | PLLP_OUT2_OVR
|
||||
| (IN_408_OUT_9_6_DIVISOR << PLLP_OUT1_RATIO) | PLLP_OUT1_OVR;
|
||||
writel(reg, &pll->pll_out[0]);
|
||||
|
||||
reg = readl(&pll->pll_out[1]); /* OUTB, contains OUT4 / OUT3 */
|
||||
reg |= (IN_408_OUT_204_DIVISOR << PLLP_OUT4_RATIO) | PLLP_OUT4_OVR
|
||||
| (IN_408_OUT_102_DIVISOR << PLLP_OUT3_RATIO) | PLLP_OUT3_OVR;
|
||||
writel(reg, &pll->pll_out[1]);
|
||||
}
|
||||
|
||||
int pllx_set_rate(struct clk_pll_simple *pll , u32 divn, u32 divm,
|
||||
u32 divp, u32 cpcon)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
/* If PLLX is already enabled, just return */
|
||||
if (readl(&pll->pll_base) & PLL_ENABLE_MASK) {
|
||||
debug("pllx_set_rate: PLLX already enabled, returning\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
debug(" pllx_set_rate entry\n");
|
||||
|
||||
/* Set BYPASS, m, n and p to PLLX_BASE */
|
||||
reg = PLL_BYPASS_MASK | (divm << PLL_DIVM_SHIFT);
|
||||
reg |= ((divn << PLL_DIVN_SHIFT) | (divp << PLL_DIVP_SHIFT));
|
||||
writel(reg, &pll->pll_base);
|
||||
|
||||
/* Set cpcon to PLLX_MISC */
|
||||
reg = (cpcon << PLL_CPCON_SHIFT);
|
||||
|
||||
/* Set dccon to PLLX_MISC if freq > 600MHz */
|
||||
if (divn > 600)
|
||||
reg |= (1 << PLL_DCCON_SHIFT);
|
||||
writel(reg, &pll->pll_misc);
|
||||
|
||||
/* Enable PLLX */
|
||||
reg = readl(&pll->pll_base);
|
||||
reg |= PLL_ENABLE_MASK;
|
||||
|
||||
/* Disable BYPASS */
|
||||
reg &= ~PLL_BYPASS_MASK;
|
||||
writel(reg, &pll->pll_base);
|
||||
|
||||
/* Set lock_enable to PLLX_MISC */
|
||||
reg = readl(&pll->pll_misc);
|
||||
reg |= PLL_LOCK_ENABLE_MASK;
|
||||
writel(reg, &pll->pll_misc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void init_pllx(void)
|
||||
{
|
||||
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
|
||||
struct clk_pll_simple *pll = &clkrst->crc_pll_simple[SIMPLE_PLLX];
|
||||
int soc_type, sku_info, chip_sku;
|
||||
enum clock_osc_freq osc;
|
||||
struct clk_pll_table *sel;
|
||||
|
||||
debug("init_pllx entry\n");
|
||||
|
||||
/* get SOC (chip) type */
|
||||
soc_type = tegra_get_chip();
|
||||
debug(" init_pllx: SoC = 0x%02X\n", soc_type);
|
||||
|
||||
/* get SKU info */
|
||||
sku_info = tegra_get_sku_info();
|
||||
debug(" init_pllx: SKU info byte = 0x%02X\n", sku_info);
|
||||
|
||||
/* get chip SKU, combo of the above info */
|
||||
chip_sku = tegra_get_chip_sku();
|
||||
debug(" init_pllx: Chip SKU = %d\n", chip_sku);
|
||||
|
||||
/* get osc freq */
|
||||
osc = clock_get_osc_freq();
|
||||
debug(" init_pllx: osc = %d\n", osc);
|
||||
|
||||
/* set pllx */
|
||||
sel = &tegra_pll_x_table[chip_sku][osc];
|
||||
pllx_set_rate(pll, sel->n, sel->m, sel->p, sel->cpcon);
|
||||
|
||||
/* adjust PLLP_out1-4 on T3x/T114 */
|
||||
if (soc_type >= CHIPID_TEGRA30) {
|
||||
debug(" init_pllx: adjusting PLLP out freqs\n");
|
||||
adjust_pllp_out_freqs();
|
||||
}
|
||||
}
|
||||
|
||||
void enable_cpu_clock(int enable)
|
||||
{
|
||||
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
|
||||
u32 clk;
|
||||
|
||||
/*
|
||||
* NOTE:
|
||||
* Regardless of whether the request is to enable or disable the CPU
|
||||
* clock, every processor in the CPU complex except the master (CPU 0)
|
||||
* will have it's clock stopped because the AVP only talks to the
|
||||
* master.
|
||||
*/
|
||||
|
||||
if (enable) {
|
||||
/* Initialize PLLX */
|
||||
init_pllx();
|
||||
|
||||
/* Wait until all clocks are stable */
|
||||
udelay(PLL_STABILIZATION_DELAY);
|
||||
|
||||
writel(CCLK_BURST_POLICY, &clkrst->crc_cclk_brst_pol);
|
||||
writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div);
|
||||
}
|
||||
|
||||
/*
|
||||
* Read the register containing the individual CPU clock enables and
|
||||
* always stop the clocks to CPUs > 0.
|
||||
*/
|
||||
clk = readl(&clkrst->crc_clk_cpu_cmplx);
|
||||
clk |= 1 << CPU1_CLK_STP_SHIFT;
|
||||
if (get_num_cpus() == 4)
|
||||
clk |= (1 << CPU2_CLK_STP_SHIFT) + (1 << CPU3_CLK_STP_SHIFT);
|
||||
|
||||
/* Stop/Unstop the CPU clock */
|
||||
clk &= ~CPU0_CLK_STP_MASK;
|
||||
clk |= !enable << CPU0_CLK_STP_SHIFT;
|
||||
writel(clk, &clkrst->crc_clk_cpu_cmplx);
|
||||
|
||||
clock_enable(PERIPH_ID_CPU);
|
||||
}
|
||||
|
||||
static int is_cpu_powered(void)
|
||||
{
|
||||
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||
|
||||
return (readl(&pmc->pmc_pwrgate_status) & CPU_PWRED) ? 1 : 0;
|
||||
}
|
||||
|
||||
static void remove_cpu_io_clamps(void)
|
||||
{
|
||||
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||
u32 reg;
|
||||
|
||||
/* Remove the clamps on the CPU I/O signals */
|
||||
reg = readl(&pmc->pmc_remove_clamping);
|
||||
reg |= CPU_CLMP;
|
||||
writel(reg, &pmc->pmc_remove_clamping);
|
||||
|
||||
/* Give I/O signals time to stabilize */
|
||||
udelay(IO_STABILIZATION_DELAY);
|
||||
}
|
||||
|
||||
void powerup_cpu(void)
|
||||
{
|
||||
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||
u32 reg;
|
||||
int timeout = IO_STABILIZATION_DELAY;
|
||||
|
||||
if (!is_cpu_powered()) {
|
||||
/* Toggle the CPU power state (OFF -> ON) */
|
||||
reg = readl(&pmc->pmc_pwrgate_toggle);
|
||||
reg &= PARTID_CP;
|
||||
reg |= START_CP;
|
||||
writel(reg, &pmc->pmc_pwrgate_toggle);
|
||||
|
||||
/* Wait for the power to come up */
|
||||
while (!is_cpu_powered()) {
|
||||
if (timeout-- == 0)
|
||||
printf("CPU failed to power up!\n");
|
||||
else
|
||||
udelay(10);
|
||||
}
|
||||
|
||||
/*
|
||||
* Remove the I/O clamps from CPU power partition.
|
||||
* Recommended only on a Warm boot, if the CPU partition gets
|
||||
* power gated. Shouldn't cause any harm when called after a
|
||||
* cold boot according to HW, probably just redundant.
|
||||
*/
|
||||
remove_cpu_io_clamps();
|
||||
}
|
||||
}
|
||||
|
||||
void reset_A9_cpu(int reset)
|
||||
{
|
||||
/*
|
||||
* NOTE: Regardless of whether the request is to hold the CPU in reset
|
||||
* or take it out of reset, every processor in the CPU complex
|
||||
* except the master (CPU 0) will be held in reset because the
|
||||
* AVP only talks to the master. The AVP does not know that there
|
||||
* are multiple processors in the CPU complex.
|
||||
*/
|
||||
int mask = crc_rst_cpu | crc_rst_de | crc_rst_debug;
|
||||
int num_cpus = get_num_cpus();
|
||||
int cpu;
|
||||
|
||||
debug("reset_a9_cpu entry\n");
|
||||
/* Hold CPUs 1 onwards in reset, and CPU 0 if asked */
|
||||
for (cpu = 1; cpu < num_cpus; cpu++)
|
||||
reset_cmplx_set_enable(cpu, mask, 1);
|
||||
reset_cmplx_set_enable(0, mask, reset);
|
||||
|
||||
/* Enable/Disable master CPU reset */
|
||||
reset_set_enable(PERIPH_ID_CPU, reset);
|
||||
}
|
||||
|
||||
void clock_enable_coresight(int enable)
|
||||
{
|
||||
u32 rst, src = 2;
|
||||
int soc_type;
|
||||
|
||||
debug("clock_enable_coresight entry\n");
|
||||
clock_set_enable(PERIPH_ID_CORESIGHT, enable);
|
||||
reset_set_enable(PERIPH_ID_CORESIGHT, !enable);
|
||||
|
||||
if (enable) {
|
||||
/*
|
||||
* Put CoreSight on PLLP_OUT0 and divide it down as per
|
||||
* PLLP base frequency based on SoC type (T20/T30/T114).
|
||||
* Clock divider request would setup CSITE clock as 144MHz
|
||||
* for PLLP base 216MHz and 204MHz for PLLP base 408MHz
|
||||
*/
|
||||
|
||||
soc_type = tegra_get_chip();
|
||||
if (soc_type == CHIPID_TEGRA30 || soc_type == CHIPID_TEGRA114)
|
||||
src = CLK_DIVIDER(NVBL_PLLP_KHZ, 204000);
|
||||
else if (soc_type == CHIPID_TEGRA20)
|
||||
src = CLK_DIVIDER(NVBL_PLLP_KHZ, 144000);
|
||||
else
|
||||
printf("%s: Unknown SoC type %X!\n",
|
||||
__func__, soc_type);
|
||||
|
||||
clock_ll_set_source_divisor(PERIPH_ID_CSI, 0, src);
|
||||
|
||||
/* Unlock the CPU CoreSight interfaces */
|
||||
rst = CORESIGHT_UNLOCK;
|
||||
writel(rst, CSITE_CPU_DBG0_LAR);
|
||||
writel(rst, CSITE_CPU_DBG1_LAR);
|
||||
if (get_num_cpus() == 4) {
|
||||
writel(rst, CSITE_CPU_DBG2_LAR);
|
||||
writel(rst, CSITE_CPU_DBG3_LAR);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void halt_avp(void)
|
||||
{
|
||||
for (;;) {
|
||||
writel((HALT_COP_EVENT_JTAG | HALT_COP_EVENT_IRQ_1 \
|
||||
| HALT_COP_EVENT_FIQ_1 | (FLOW_MODE_STOP<<29)),
|
||||
FLOW_CTLR_HALT_COP_EVENTS);
|
||||
}
|
||||
}
|
|
@ -0,0 +1,70 @@
|
|||
/*
|
||||
* (C) Copyright 2010-2011
|
||||
* NVIDIA Corporation <www.nvidia.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
#include <asm/types.h>
|
||||
|
||||
/* Stabilization delays, in usec */
|
||||
#define PLL_STABILIZATION_DELAY (300)
|
||||
#define IO_STABILIZATION_DELAY (1000)
|
||||
|
||||
#if defined(CONFIG_TEGRA20)
|
||||
#define NVBL_PLLP_KHZ (216000)
|
||||
#elif defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA114)
|
||||
#define NVBL_PLLP_KHZ (408000)
|
||||
#else
|
||||
#error "Unknown Tegra chip!"
|
||||
#endif
|
||||
|
||||
#define PLLX_ENABLED (1 << 30)
|
||||
#define CCLK_BURST_POLICY 0x20008888
|
||||
#define SUPER_CCLK_DIVIDER 0x80000000
|
||||
|
||||
/* Calculate clock fractional divider value from ref and target frequencies */
|
||||
#define CLK_DIVIDER(REF, FREQ) ((((REF) * 2) / FREQ) - 2)
|
||||
|
||||
/* Calculate clock frequency value from reference and clock divider value */
|
||||
#define CLK_FREQUENCY(REF, REG) (((REF) * 2) / (REG + 2))
|
||||
|
||||
/* AVP/CPU ID */
|
||||
#define PG_UP_TAG_0_PID_CPU 0x55555555 /* CPU aka "a9" aka "mpcore" */
|
||||
#define PG_UP_TAG_0 0x0
|
||||
|
||||
#define CORESIGHT_UNLOCK 0xC5ACCE55;
|
||||
|
||||
#define EXCEP_VECTOR_CPU_RESET_VECTOR (NV_PA_EVP_BASE + 0x100)
|
||||
#define CSITE_CPU_DBG0_LAR (NV_PA_CSITE_BASE + 0x10FB0)
|
||||
#define CSITE_CPU_DBG1_LAR (NV_PA_CSITE_BASE + 0x12FB0)
|
||||
#define CSITE_CPU_DBG2_LAR (NV_PA_CSITE_BASE + 0x14FB0)
|
||||
#define CSITE_CPU_DBG3_LAR (NV_PA_CSITE_BASE + 0x16FB0)
|
||||
|
||||
#define FLOW_CTLR_HALT_COP_EVENTS (NV_PA_FLOW_BASE + 4)
|
||||
#define FLOW_MODE_STOP 2
|
||||
#define HALT_COP_EVENT_JTAG (1 << 28)
|
||||
#define HALT_COP_EVENT_IRQ_1 (1 << 11)
|
||||
#define HALT_COP_EVENT_FIQ_1 (1 << 9)
|
||||
|
||||
#define FLOW_MODE_NONE 0
|
||||
|
||||
#define SIMPLE_PLLX (CLOCK_ID_XCPU - CLOCK_ID_FIRST_SIMPLE)
|
||||
|
||||
struct clk_pll_table {
|
||||
u16 n;
|
||||
u16 m;
|
||||
u8 p;
|
||||
u8 cpcon;
|
||||
};
|
||||
|
||||
void clock_enable_coresight(int enable);
|
||||
void enable_cpu_clock(int enable);
|
||||
void halt_avp(void) __attribute__ ((noreturn));
|
||||
void init_pllx(void);
|
||||
void powerup_cpu(void);
|
||||
void reset_A9_cpu(int reset);
|
||||
void start_cpu(u32 reset_vector);
|
||||
int tegra_get_chip(void);
|
||||
int tegra_get_sku_info(void);
|
||||
int tegra_get_chip_sku(void);
|
||||
void adjust_pllp_out_freqs(void);
|
|
@ -0,0 +1,47 @@
|
|||
/*
|
||||
* (C) Copyright 2012
|
||||
* NVIDIA Inc, <www.nvidia.com>
|
||||
*
|
||||
* Allen Martin <amartin@nvidia.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <spl.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/pinmux.h>
|
||||
#include <asm/arch/tegra.h>
|
||||
#include <asm/arch-tegra/board.h>
|
||||
#include <asm/arch/spl.h>
|
||||
#include "cpu.h"
|
||||
|
||||
void spl_board_init(void)
|
||||
{
|
||||
struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
|
||||
|
||||
/* enable JTAG */
|
||||
writel(0xC0, &pmt->pmt_cfg_ctl);
|
||||
|
||||
board_init_uart_f();
|
||||
|
||||
/* Initialize periph GPIOs */
|
||||
gpio_early_init_uart();
|
||||
|
||||
clock_early_init();
|
||||
preloader_console_init();
|
||||
}
|
||||
|
||||
u32 spl_boot_device(void)
|
||||
{
|
||||
return BOOT_DEVICE_RAM;
|
||||
}
|
||||
|
||||
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
|
||||
{
|
||||
debug("image entry point: 0x%X\n", spl_image->entry_point);
|
||||
|
||||
start_cpu((u32)spl_image->entry_point);
|
||||
halt_avp();
|
||||
}
|
|
@ -0,0 +1,42 @@
|
|||
#
|
||||
# Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
|
||||
#
|
||||
# (C) Copyright 2000-2008
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
#COBJS-y += cpu.o t11x.o
|
||||
COBJS-y += cpu.o
|
||||
|
||||
SRCS := $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,19 @@
|
|||
#
|
||||
# Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
|
||||
#
|
||||
# (C) Copyright 2002
|
||||
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
#
|
||||
USE_PRIVATE_LIBGCC = yes
|
|
@ -0,0 +1,324 @@
|
|||
/*
|
||||
* Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/flow.h>
|
||||
#include <asm/arch/pinmux.h>
|
||||
#include <asm/arch/tegra.h>
|
||||
#include <asm/arch-tegra/clk_rst.h>
|
||||
#include <asm/arch-tegra/pmc.h>
|
||||
#include "../tegra-common/cpu.h"
|
||||
|
||||
/* Tegra114-specific CPU init code */
|
||||
static void enable_cpu_power_rail(void)
|
||||
{
|
||||
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
|
||||
u32 reg;
|
||||
|
||||
debug("enable_cpu_power_rail entry\n");
|
||||
|
||||
/* un-tristate PWR_I2C SCL/SDA, rest of the defaults are correct */
|
||||
pinmux_tristate_disable(PINGRP_PWR_I2C_SCL);
|
||||
pinmux_tristate_disable(PINGRP_PWR_I2C_SDA);
|
||||
|
||||
/*
|
||||
* Set CPUPWRGOOD_TIMER - APB clock is 1/2 of SCLK (102MHz),
|
||||
* set it for 25ms (102MHz * .025)
|
||||
*/
|
||||
reg = 0x26E8F0;
|
||||
writel(reg, &pmc->pmc_cpupwrgood_timer);
|
||||
|
||||
/* Set polarity to 0 (normal) and enable CPUPWRREQ_OE */
|
||||
clrbits_le32(&pmc->pmc_cntrl, CPUPWRREQ_POL);
|
||||
setbits_le32(&pmc->pmc_cntrl, CPUPWRREQ_OE);
|
||||
|
||||
/*
|
||||
* Set CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2_0_CAR2PMC_CPU_ACK_WIDTH
|
||||
* to 408 to satisfy the requirement of having at least 16 CPU clock
|
||||
* cycles before clamp removal.
|
||||
*/
|
||||
|
||||
clrbits_le32(&clkrst->crc_cpu_softrst_ctrl2, 0xFFF);
|
||||
setbits_le32(&clkrst->crc_cpu_softrst_ctrl2, 408);
|
||||
}
|
||||
|
||||
static void enable_cpu_clocks(void)
|
||||
{
|
||||
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
|
||||
u32 reg;
|
||||
|
||||
debug("enable_cpu_clocks entry\n");
|
||||
|
||||
/* Wait for PLL-X to lock */
|
||||
do {
|
||||
reg = readl(&clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base);
|
||||
} while ((reg & (1 << 27)) == 0);
|
||||
|
||||
/* Wait until all clocks are stable */
|
||||
udelay(PLL_STABILIZATION_DELAY);
|
||||
|
||||
writel(CCLK_BURST_POLICY, &clkrst->crc_cclk_brst_pol);
|
||||
writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div);
|
||||
|
||||
/* Always enable the main CPU complex clocks */
|
||||
clock_enable(PERIPH_ID_CPU);
|
||||
clock_enable(PERIPH_ID_CPULP);
|
||||
clock_enable(PERIPH_ID_CPUG);
|
||||
}
|
||||
|
||||
static void remove_cpu_resets(void)
|
||||
{
|
||||
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
|
||||
u32 reg;
|
||||
|
||||
debug("remove_cpu_resets entry\n");
|
||||
/* Take the slow non-CPU partition out of reset */
|
||||
reg = readl(&clkrst->crc_rst_cpulp_cmplx_clr);
|
||||
writel((reg | CLR_NONCPURESET), &clkrst->crc_rst_cpulp_cmplx_clr);
|
||||
|
||||
/* Take the fast non-CPU partition out of reset */
|
||||
reg = readl(&clkrst->crc_rst_cpug_cmplx_clr);
|
||||
writel((reg | CLR_NONCPURESET), &clkrst->crc_rst_cpug_cmplx_clr);
|
||||
|
||||
/* Clear the SW-controlled reset of the slow cluster */
|
||||
reg = readl(&clkrst->crc_rst_cpulp_cmplx_clr);
|
||||
reg |= (CLR_CPURESET0+CLR_DBGRESET0+CLR_CORERESET0+CLR_CXRESET0);
|
||||
writel(reg, &clkrst->crc_rst_cpulp_cmplx_clr);
|
||||
|
||||
/* Clear the SW-controlled reset of the fast cluster */
|
||||
reg = readl(&clkrst->crc_rst_cpug_cmplx_clr);
|
||||
reg |= (CLR_CPURESET0+CLR_DBGRESET0+CLR_CORERESET0+CLR_CXRESET0);
|
||||
reg |= (CLR_CPURESET1+CLR_DBGRESET1+CLR_CORERESET1+CLR_CXRESET1);
|
||||
reg |= (CLR_CPURESET2+CLR_DBGRESET2+CLR_CORERESET2+CLR_CXRESET2);
|
||||
reg |= (CLR_CPURESET3+CLR_DBGRESET3+CLR_CORERESET3+CLR_CXRESET3);
|
||||
writel(reg, &clkrst->crc_rst_cpug_cmplx_clr);
|
||||
}
|
||||
|
||||
/**
|
||||
* The T114 requires some special clock initialization, including setting up
|
||||
* the DVC I2C, turning on MSELECT and selecting the G CPU cluster
|
||||
*/
|
||||
void t114_init_clocks(void)
|
||||
{
|
||||
struct clk_rst_ctlr *clkrst =
|
||||
(struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
|
||||
struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE;
|
||||
u32 val;
|
||||
|
||||
debug("t114_init_clocks entry\n");
|
||||
|
||||
/* Set active CPU cluster to G */
|
||||
clrbits_le32(&flow->cluster_control, 1);
|
||||
|
||||
/*
|
||||
* Switch system clock to PLLP_OUT4 (108 MHz), AVP will now run
|
||||
* at 108 MHz. This is glitch free as only the source is changed, no
|
||||
* special precaution needed.
|
||||
*/
|
||||
val = (SCLK_SOURCE_PLLP_OUT4 << SCLK_SWAKEUP_FIQ_SOURCE_SHIFT) |
|
||||
(SCLK_SOURCE_PLLP_OUT4 << SCLK_SWAKEUP_IRQ_SOURCE_SHIFT) |
|
||||
(SCLK_SOURCE_PLLP_OUT4 << SCLK_SWAKEUP_RUN_SOURCE_SHIFT) |
|
||||
(SCLK_SOURCE_PLLP_OUT4 << SCLK_SWAKEUP_IDLE_SOURCE_SHIFT) |
|
||||
(SCLK_SYS_STATE_RUN << SCLK_SYS_STATE_SHIFT);
|
||||
writel(val, &clkrst->crc_sclk_brst_pol);
|
||||
|
||||
writel(SUPER_SCLK_ENB_MASK, &clkrst->crc_super_sclk_div);
|
||||
|
||||
debug("Setting up PLLX\n");
|
||||
init_pllx();
|
||||
|
||||
val = (1 << CLK_SYS_RATE_AHB_RATE_SHIFT);
|
||||
writel(val, &clkrst->crc_clk_sys_rate);
|
||||
|
||||
/* Enable clocks to required peripherals. TBD - minimize this list */
|
||||
debug("Enabling clocks\n");
|
||||
|
||||
clock_set_enable(PERIPH_ID_CACHE2, 1);
|
||||
clock_set_enable(PERIPH_ID_GPIO, 1);
|
||||
clock_set_enable(PERIPH_ID_TMR, 1);
|
||||
clock_set_enable(PERIPH_ID_RTC, 1);
|
||||
clock_set_enable(PERIPH_ID_CPU, 1);
|
||||
clock_set_enable(PERIPH_ID_EMC, 1);
|
||||
clock_set_enable(PERIPH_ID_I2C5, 1);
|
||||
clock_set_enable(PERIPH_ID_FUSE, 1);
|
||||
clock_set_enable(PERIPH_ID_PMC, 1);
|
||||
clock_set_enable(PERIPH_ID_APBDMA, 1);
|
||||
clock_set_enable(PERIPH_ID_MEM, 1);
|
||||
clock_set_enable(PERIPH_ID_IRAMA, 1);
|
||||
clock_set_enable(PERIPH_ID_IRAMB, 1);
|
||||
clock_set_enable(PERIPH_ID_IRAMC, 1);
|
||||
clock_set_enable(PERIPH_ID_IRAMD, 1);
|
||||
clock_set_enable(PERIPH_ID_CORESIGHT, 1);
|
||||
clock_set_enable(PERIPH_ID_MSELECT, 1);
|
||||
clock_set_enable(PERIPH_ID_EMC1, 1);
|
||||
clock_set_enable(PERIPH_ID_MC1, 1);
|
||||
clock_set_enable(PERIPH_ID_DVFS, 1);
|
||||
|
||||
/*
|
||||
* Set MSELECT clock source as PLLP (00), and ask for a clock
|
||||
* divider that would set the MSELECT clock at 102MHz for a
|
||||
* PLLP base of 408MHz.
|
||||
*/
|
||||
clock_ll_set_source_divisor(PERIPH_ID_MSELECT, 0,
|
||||
CLK_DIVIDER(NVBL_PLLP_KHZ, 102000));
|
||||
|
||||
/* I2C5 (DVC) gets CLK_M and a divisor of 17 */
|
||||
clock_ll_set_source_divisor(PERIPH_ID_I2C5, 3, 16);
|
||||
|
||||
/* Give clocks time to stabilize */
|
||||
udelay(1000);
|
||||
|
||||
/* Take required peripherals out of reset */
|
||||
debug("Taking periphs out of reset\n");
|
||||
reset_set_enable(PERIPH_ID_CACHE2, 0);
|
||||
reset_set_enable(PERIPH_ID_GPIO, 0);
|
||||
reset_set_enable(PERIPH_ID_TMR, 0);
|
||||
reset_set_enable(PERIPH_ID_COP, 0);
|
||||
reset_set_enable(PERIPH_ID_EMC, 0);
|
||||
reset_set_enable(PERIPH_ID_I2C5, 0);
|
||||
reset_set_enable(PERIPH_ID_FUSE, 0);
|
||||
reset_set_enable(PERIPH_ID_APBDMA, 0);
|
||||
reset_set_enable(PERIPH_ID_MEM, 0);
|
||||
reset_set_enable(PERIPH_ID_CORESIGHT, 0);
|
||||
reset_set_enable(PERIPH_ID_MSELECT, 0);
|
||||
reset_set_enable(PERIPH_ID_EMC1, 0);
|
||||
reset_set_enable(PERIPH_ID_MC1, 0);
|
||||
reset_set_enable(PERIPH_ID_DVFS, 0);
|
||||
|
||||
debug("t114_init_clocks exit\n");
|
||||
}
|
||||
|
||||
static int is_partition_powered(u32 mask)
|
||||
{
|
||||
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||
u32 reg;
|
||||
|
||||
/* Get power gate status */
|
||||
reg = readl(&pmc->pmc_pwrgate_status);
|
||||
return (reg & mask) == mask;
|
||||
}
|
||||
|
||||
static int is_clamp_enabled(u32 mask)
|
||||
{
|
||||
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||
u32 reg;
|
||||
|
||||
/* Get clamp status. TODO: Add pmc_clamp_status alias to pmc.h */
|
||||
reg = readl(&pmc->pmc_pwrgate_timer_on);
|
||||
return (reg & mask) == mask;
|
||||
}
|
||||
|
||||
static void power_partition(u32 status, u32 partid)
|
||||
{
|
||||
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||
|
||||
debug("%s: status = %08X, part ID = %08X\n", __func__, status, partid);
|
||||
/* Is the partition already on? */
|
||||
if (!is_partition_powered(status)) {
|
||||
/* No, toggle the partition power state (OFF -> ON) */
|
||||
debug("power_partition, toggling state\n");
|
||||
clrbits_le32(&pmc->pmc_pwrgate_toggle, 0x1F);
|
||||
setbits_le32(&pmc->pmc_pwrgate_toggle, partid);
|
||||
setbits_le32(&pmc->pmc_pwrgate_toggle, START_CP);
|
||||
|
||||
/* Wait for the power to come up */
|
||||
while (!is_partition_powered(status))
|
||||
;
|
||||
|
||||
/* Wait for the clamp status to be cleared */
|
||||
while (is_clamp_enabled(status))
|
||||
;
|
||||
|
||||
/* Give I/O signals time to stabilize */
|
||||
udelay(IO_STABILIZATION_DELAY);
|
||||
}
|
||||
}
|
||||
|
||||
void powerup_cpus(void)
|
||||
{
|
||||
debug("powerup_cpus entry\n");
|
||||
|
||||
/* We boot to the fast cluster */
|
||||
debug("powerup_cpus entry: G cluster\n");
|
||||
/* Power up the fast cluster rail partition */
|
||||
power_partition(CRAIL, CRAILID);
|
||||
|
||||
/* Power up the fast cluster non-CPU partition */
|
||||
power_partition(C0NC, C0NCID);
|
||||
|
||||
/* Power up the fast cluster CPU0 partition */
|
||||
power_partition(CE0, CE0ID);
|
||||
}
|
||||
|
||||
void start_cpu(u32 reset_vector)
|
||||
{
|
||||
u32 imme, inst;
|
||||
|
||||
debug("start_cpu entry, reset_vector = %x\n", reset_vector);
|
||||
|
||||
t114_init_clocks();
|
||||
|
||||
/* Enable VDD_CPU */
|
||||
enable_cpu_power_rail();
|
||||
|
||||
/* Get the CPU(s) running */
|
||||
enable_cpu_clocks();
|
||||
|
||||
/* Enable CoreSight */
|
||||
clock_enable_coresight(1);
|
||||
|
||||
/* Take CPU(s) out of reset */
|
||||
remove_cpu_resets();
|
||||
|
||||
/* Set the entry point for CPU execution from reset */
|
||||
|
||||
/*
|
||||
* A01P with patched boot ROM; vector hard-coded to 0x4003fffc.
|
||||
* See nvbug 1193357 for details.
|
||||
*/
|
||||
|
||||
/* mov r0, #lsb(reset_vector) */
|
||||
imme = reset_vector & 0xffff;
|
||||
inst = imme & 0xfff;
|
||||
inst |= ((imme >> 12) << 16);
|
||||
inst |= 0xe3000000;
|
||||
writel(inst, 0x4003fff0);
|
||||
|
||||
/* movt r0, #msb(reset_vector) */
|
||||
imme = (reset_vector >> 16) & 0xffff;
|
||||
inst = imme & 0xfff;
|
||||
inst |= ((imme >> 12) << 16);
|
||||
inst |= 0xe3400000;
|
||||
writel(inst, 0x4003fff4);
|
||||
|
||||
/* bx r0 */
|
||||
writel(0xe12fff10, 0x4003fff8);
|
||||
|
||||
/* b -12 */
|
||||
imme = (u32)-20;
|
||||
inst = (imme >> 2) & 0xffffff;
|
||||
inst |= 0xea000000;
|
||||
writel(inst, 0x4003fffc);
|
||||
|
||||
/* Write to orignal location for compatibility */
|
||||
writel(reset_vector, EXCEP_VECTOR_CPU_RESET_VECTOR);
|
||||
|
||||
/* If the CPU(s) don't already have power, power 'em up */
|
||||
powerup_cpus();
|
||||
}
|
|
@ -0,0 +1,31 @@
|
|||
#
|
||||
# (C) Copyright 2010,2011 Nvidia Corporation.
|
||||
#
|
||||
# (C) Copyright 2000-2008
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS-y += cpu.o
|
||||
|
||||
SRCS := $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,10 @@
|
|||
#
|
||||
# (C) Copyright 2010,2011
|
||||
# NVIDIA Corporation <www.nvidia.com>
|
||||
#
|
||||
# (C) Copyright 2002
|
||||
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
USE_PRIVATE_LIBGCC = yes
|
|
@ -0,0 +1,70 @@
|
|||
/*
|
||||
* Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/tegra.h>
|
||||
#include <asm/arch-tegra/pmc.h>
|
||||
#include "../tegra-common/cpu.h"
|
||||
|
||||
static void enable_cpu_power_rail(void)
|
||||
{
|
||||
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||
u32 reg;
|
||||
|
||||
reg = readl(&pmc->pmc_cntrl);
|
||||
reg |= CPUPWRREQ_OE;
|
||||
writel(reg, &pmc->pmc_cntrl);
|
||||
|
||||
/*
|
||||
* The TI PMU65861C needs a 3.75ms delay between enabling
|
||||
* the power rail and enabling the CPU clock. This delay
|
||||
* between SM1EN and SM1 is for switching time + the ramp
|
||||
* up of the voltage to the CPU (VDD_CPU from PMU).
|
||||
*/
|
||||
udelay(3750);
|
||||
}
|
||||
|
||||
void start_cpu(u32 reset_vector)
|
||||
{
|
||||
/* Enable VDD_CPU */
|
||||
enable_cpu_power_rail();
|
||||
|
||||
/* Hold the CPUs in reset */
|
||||
reset_A9_cpu(1);
|
||||
|
||||
/* Disable the CPU clock */
|
||||
enable_cpu_clock(0);
|
||||
|
||||
/* Enable CoreSight */
|
||||
clock_enable_coresight(1);
|
||||
|
||||
/*
|
||||
* Set the entry point for CPU execution from reset,
|
||||
* if it's a non-zero value.
|
||||
*/
|
||||
if (reset_vector)
|
||||
writel(reset_vector, EXCEP_VECTOR_CPU_RESET_VECTOR);
|
||||
|
||||
/* Enable the CPU clock */
|
||||
enable_cpu_clock(1);
|
||||
|
||||
/* If the CPU doesn't already have power, power it up */
|
||||
powerup_cpu();
|
||||
|
||||
/* Take the CPU out of reset */
|
||||
reset_A9_cpu(0);
|
||||
}
|
|
@ -0,0 +1,41 @@
|
|||
#
|
||||
# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
|
||||
#
|
||||
# (C) Copyright 2000-2008
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS-y += cpu.o
|
||||
|
||||
SRCS := $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,19 @@
|
|||
#
|
||||
# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
|
||||
#
|
||||
# (C) Copyright 2002
|
||||
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
#
|
||||
USE_PRIVATE_LIBGCC = yes
|
|
@ -0,0 +1,176 @@
|
|||
/*
|
||||
* Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/flow.h>
|
||||
#include <asm/arch/tegra.h>
|
||||
#include <asm/arch-tegra/clk_rst.h>
|
||||
#include <asm/arch-tegra/pmc.h>
|
||||
#include <asm/arch-tegra/tegra_i2c.h>
|
||||
#include "../tegra-common/cpu.h"
|
||||
|
||||
/* Tegra30-specific CPU init code */
|
||||
void tegra_i2c_ll_write_addr(uint addr, uint config)
|
||||
{
|
||||
struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
|
||||
|
||||
writel(addr, ®->cmd_addr0);
|
||||
writel(config, ®->cnfg);
|
||||
}
|
||||
|
||||
void tegra_i2c_ll_write_data(uint data, uint config)
|
||||
{
|
||||
struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
|
||||
|
||||
writel(data, ®->cmd_data1);
|
||||
writel(config, ®->cnfg);
|
||||
}
|
||||
|
||||
#define TPS65911_I2C_ADDR 0x5A
|
||||
#define TPS65911_VDDCTRL_OP_REG 0x28
|
||||
#define TPS65911_VDDCTRL_SR_REG 0x27
|
||||
#define TPS65911_VDDCTRL_OP_DATA (0x2300 | TPS65911_VDDCTRL_OP_REG)
|
||||
#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG)
|
||||
#define I2C_SEND_2_BYTES 0x0A02
|
||||
|
||||
static void enable_cpu_power_rail(void)
|
||||
{
|
||||
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||
u32 reg;
|
||||
|
||||
debug("enable_cpu_power_rail entry\n");
|
||||
reg = readl(&pmc->pmc_cntrl);
|
||||
reg |= CPUPWRREQ_OE;
|
||||
writel(reg, &pmc->pmc_cntrl);
|
||||
|
||||
/*
|
||||
* Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus.
|
||||
* First set VDD to 1.4V, then enable the VDD regulator.
|
||||
*/
|
||||
tegra_i2c_ll_write_addr(TPS65911_I2C_ADDR, 2);
|
||||
tegra_i2c_ll_write_data(TPS65911_VDDCTRL_OP_DATA, I2C_SEND_2_BYTES);
|
||||
udelay(1000);
|
||||
tegra_i2c_ll_write_data(TPS65911_VDDCTRL_SR_DATA, I2C_SEND_2_BYTES);
|
||||
udelay(10 * 1000);
|
||||
}
|
||||
|
||||
/**
|
||||
* The T30 requires some special clock initialization, including setting up
|
||||
* the dvc i2c, turning on mselect and selecting the G CPU cluster
|
||||
*/
|
||||
void t30_init_clocks(void)
|
||||
{
|
||||
struct clk_rst_ctlr *clkrst =
|
||||
(struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
|
||||
struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE;
|
||||
u32 val;
|
||||
|
||||
debug("t30_init_clocks entry\n");
|
||||
/* Set active CPU cluster to G */
|
||||
clrbits_le32(flow->cluster_control, 1 << 0);
|
||||
|
||||
/*
|
||||
* Switch system clock to PLLP_OUT4 (108 MHz), AVP will now run
|
||||
* at 108 MHz. This is glitch free as only the source is changed, no
|
||||
* special precaution needed.
|
||||
*/
|
||||
val = (SCLK_SOURCE_PLLP_OUT4 << SCLK_SWAKEUP_FIQ_SOURCE_SHIFT) |
|
||||
(SCLK_SOURCE_PLLP_OUT4 << SCLK_SWAKEUP_IRQ_SOURCE_SHIFT) |
|
||||
(SCLK_SOURCE_PLLP_OUT4 << SCLK_SWAKEUP_RUN_SOURCE_SHIFT) |
|
||||
(SCLK_SOURCE_PLLP_OUT4 << SCLK_SWAKEUP_IDLE_SOURCE_SHIFT) |
|
||||
(SCLK_SYS_STATE_RUN << SCLK_SYS_STATE_SHIFT);
|
||||
writel(val, &clkrst->crc_sclk_brst_pol);
|
||||
|
||||
writel(SUPER_SCLK_ENB_MASK, &clkrst->crc_super_sclk_div);
|
||||
|
||||
val = (0 << CLK_SYS_RATE_HCLK_DISABLE_SHIFT) |
|
||||
(1 << CLK_SYS_RATE_AHB_RATE_SHIFT) |
|
||||
(0 << CLK_SYS_RATE_PCLK_DISABLE_SHIFT) |
|
||||
(0 << CLK_SYS_RATE_APB_RATE_SHIFT);
|
||||
writel(val, &clkrst->crc_clk_sys_rate);
|
||||
|
||||
/* Put i2c, mselect in reset and enable clocks */
|
||||
reset_set_enable(PERIPH_ID_DVC_I2C, 1);
|
||||
clock_set_enable(PERIPH_ID_DVC_I2C, 1);
|
||||
reset_set_enable(PERIPH_ID_MSELECT, 1);
|
||||
clock_set_enable(PERIPH_ID_MSELECT, 1);
|
||||
|
||||
/* Switch MSELECT clock to PLLP (00) and use a divisor of 2 */
|
||||
clock_ll_set_source_divisor(PERIPH_ID_MSELECT, 0, 2);
|
||||
|
||||
/*
|
||||
* Our high-level clock routines are not available prior to
|
||||
* relocation. We use the low-level functions which require a
|
||||
* hard-coded divisor. Use CLK_M with divide by (n + 1 = 17)
|
||||
*/
|
||||
clock_ll_set_source_divisor(PERIPH_ID_DVC_I2C, 3, 16);
|
||||
|
||||
/*
|
||||
* Give clocks time to stabilize, then take i2c and mselect out of
|
||||
* reset
|
||||
*/
|
||||
udelay(1000);
|
||||
reset_set_enable(PERIPH_ID_DVC_I2C, 0);
|
||||
reset_set_enable(PERIPH_ID_MSELECT, 0);
|
||||
}
|
||||
|
||||
static void set_cpu_running(int run)
|
||||
{
|
||||
struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE;
|
||||
|
||||
debug("set_cpu_running entry, run = %d\n", run);
|
||||
writel(run ? FLOW_MODE_NONE : FLOW_MODE_STOP, &flow->halt_cpu_events);
|
||||
}
|
||||
|
||||
void start_cpu(u32 reset_vector)
|
||||
{
|
||||
debug("start_cpu entry, reset_vector = %x\n", reset_vector);
|
||||
t30_init_clocks();
|
||||
|
||||
/* Enable VDD_CPU */
|
||||
enable_cpu_power_rail();
|
||||
|
||||
set_cpu_running(0);
|
||||
|
||||
/* Hold the CPUs in reset */
|
||||
reset_A9_cpu(1);
|
||||
|
||||
/* Disable the CPU clock */
|
||||
enable_cpu_clock(0);
|
||||
|
||||
/* Enable CoreSight */
|
||||
clock_enable_coresight(1);
|
||||
|
||||
/*
|
||||
* Set the entry point for CPU execution from reset,
|
||||
* if it's a non-zero value.
|
||||
*/
|
||||
if (reset_vector)
|
||||
writel(reset_vector, EXCEP_VECTOR_CPU_RESET_VECTOR);
|
||||
|
||||
/* Enable the CPU clock */
|
||||
enable_cpu_clock(1);
|
||||
|
||||
/* If the CPU doesn't already have power, power it up */
|
||||
powerup_cpu();
|
||||
|
||||
/* Take the CPU out of reset */
|
||||
reset_A9_cpu(0);
|
||||
|
||||
set_cpu_running(1);
|
||||
}
|
|
@ -0,0 +1,33 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(CPU).o
|
||||
|
||||
START = start.o
|
||||
|
||||
COBJS-y += cpu.o
|
||||
COBJS-$(CONFIG_USE_IRQ) += interrupts.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(START) $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,30 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
SOBJS += reset.o
|
||||
COBJS += timer.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,10 @@
|
|||
/*
|
||||
* (C) Copyright 2009 Faraday Technology
|
||||
* Po-Yu Chuang <ratbert@faraday-tech.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
.global reset_cpu
|
||||
reset_cpu:
|
||||
b reset_cpu
|
|
@ -0,0 +1,118 @@
|
|||
/*
|
||||
* (C) Copyright 2009 Faraday Technology
|
||||
* Po-Yu Chuang <ratbert@faraday-tech.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <div64.h>
|
||||
#include <asm/io.h>
|
||||
#include <faraday/ftpmu010.h>
|
||||
#include <faraday/fttmr010.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define TIMER_CLOCK 32768
|
||||
#define TIMER_LOAD_VAL 0xffffffff
|
||||
|
||||
static inline unsigned long long tick_to_time(unsigned long long tick)
|
||||
{
|
||||
tick *= CONFIG_SYS_HZ;
|
||||
do_div(tick, gd->arch.timer_rate_hz);
|
||||
|
||||
return tick;
|
||||
}
|
||||
|
||||
static inline unsigned long long usec_to_tick(unsigned long long usec)
|
||||
{
|
||||
usec *= gd->arch.timer_rate_hz;
|
||||
do_div(usec, 1000000);
|
||||
|
||||
return usec;
|
||||
}
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
|
||||
unsigned int cr;
|
||||
|
||||
debug("%s()\n", __func__);
|
||||
|
||||
/* disable timers */
|
||||
writel(0, &tmr->cr);
|
||||
|
||||
/* use 32768Hz oscillator for RTC, WDT, TIMER */
|
||||
ftpmu010_32768osc_enable();
|
||||
|
||||
/* setup timer */
|
||||
writel(TIMER_LOAD_VAL, &tmr->timer3_load);
|
||||
writel(TIMER_LOAD_VAL, &tmr->timer3_counter);
|
||||
writel(0, &tmr->timer3_match1);
|
||||
writel(0, &tmr->timer3_match2);
|
||||
|
||||
/* we don't want timer to issue interrupts */
|
||||
writel(FTTMR010_TM3_MATCH1 |
|
||||
FTTMR010_TM3_MATCH2 |
|
||||
FTTMR010_TM3_OVERFLOW,
|
||||
&tmr->interrupt_mask);
|
||||
|
||||
cr = readl(&tmr->cr);
|
||||
cr |= FTTMR010_TM3_CLOCK; /* use external clock */
|
||||
cr |= FTTMR010_TM3_ENABLE;
|
||||
writel(cr, &tmr->cr);
|
||||
|
||||
gd->arch.timer_rate_hz = TIMER_CLOCK;
|
||||
gd->arch.tbu = gd->arch.tbl = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Get the current 64 bit timer tick count
|
||||
*/
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
|
||||
ulong now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter);
|
||||
|
||||
/* increment tbu if tbl has rolled over */
|
||||
if (now < gd->arch.tbl)
|
||||
gd->arch.tbu++;
|
||||
gd->arch.tbl = now;
|
||||
return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
|
||||
}
|
||||
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
unsigned long long start;
|
||||
ulong tmo;
|
||||
|
||||
start = get_ticks(); /* get current timestamp */
|
||||
tmo = usec_to_tick(usec); /* convert usecs to ticks */
|
||||
while ((get_ticks() - start) < tmo)
|
||||
; /* loop till time has passed */
|
||||
}
|
||||
|
||||
/*
|
||||
* get_timer(base) can be used to check for timeouts or
|
||||
* to measure elasped time relative to an event:
|
||||
*
|
||||
* ulong start_time = get_timer(0) sets start_time to the current
|
||||
* time value.
|
||||
* get_timer(start_time) returns the time elapsed since then.
|
||||
*
|
||||
* The time is used in CONFIG_SYS_HZ units!
|
||||
*/
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
return tick_to_time(get_ticks()) - base;
|
||||
}
|
||||
|
||||
/*
|
||||
* Return the number of timer ticks per second.
|
||||
*/
|
||||
ulong get_tbclk(void)
|
||||
{
|
||||
return gd->arch.timer_rate_hz;
|
||||
}
|
|
@ -0,0 +1,34 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
SOBJS += lowlevel_init.o
|
||||
COBJS += reset.o
|
||||
COBJS += timer.o
|
||||
COBJS += clock.o
|
||||
COBJS += cpu.o
|
||||
COBJS += at91rm9200_devices.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,67 @@
|
|||
/*
|
||||
* [partely copied from arch/arm/cpu/arm926ejs/at91/arm9260_devices.c]
|
||||
*
|
||||
* (C) Copyright 2011
|
||||
* Andreas Bießmann <andreas.devel@googlemail.com>
|
||||
*
|
||||
* (C) Copyright 2007-2008
|
||||
* Stelian Pop <stelian@popies.net>
|
||||
* Lead Tech Design <www.leadtechdesign.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/at91_common.h>
|
||||
#include <asm/arch/at91_pmc.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
/*
|
||||
* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
|
||||
* peripheral pins. Good to have if hardware is soldered optionally
|
||||
* or in case of SPI no slave is selected. Avoid lines to float
|
||||
* needlessly. Use a short local PUP define.
|
||||
*
|
||||
* Due to errata "TXD floats when CTS is inactive" pullups are always
|
||||
* on for TXD pins.
|
||||
*/
|
||||
#ifdef CONFIG_AT91_GPIO_PULLUP
|
||||
# define PUP CONFIG_AT91_GPIO_PULLUP
|
||||
#else
|
||||
# define PUP 0
|
||||
#endif
|
||||
|
||||
void at91_serial0_hw_init(void)
|
||||
{
|
||||
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
|
||||
|
||||
at91_set_a_periph(AT91_PIO_PORTA, 17, 1); /* TXD0 */
|
||||
at91_set_a_periph(AT91_PIO_PORTA, 18, PUP); /* RXD0 */
|
||||
writel(1 << ATMEL_ID_USART0, &pmc->pcer);
|
||||
}
|
||||
|
||||
void at91_serial1_hw_init(void)
|
||||
{
|
||||
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
|
||||
|
||||
at91_set_a_periph(AT91_PIO_PORTB, 20, PUP); /* RXD1 */
|
||||
at91_set_a_periph(AT91_PIO_PORTB, 21, 1); /* TXD1 */
|
||||
writel(1 << ATMEL_ID_USART1, &pmc->pcer);
|
||||
}
|
||||
|
||||
void at91_serial2_hw_init(void)
|
||||
{
|
||||
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
|
||||
|
||||
at91_set_a_periph(AT91_PIO_PORTA, 22, PUP); /* RXD2 */
|
||||
at91_set_a_periph(AT91_PIO_PORTA, 23, 1); /* TXD2 */
|
||||
writel(1 << ATMEL_ID_USART2, &pmc->pcer);
|
||||
}
|
||||
|
||||
void at91_seriald_hw_init(void)
|
||||
{
|
||||
at91_set_a_periph(AT91_PIO_PORTA, 30, PUP); /* DRXD */
|
||||
at91_set_a_periph(AT91_PIO_PORTA, 31, 1); /* DTXD */
|
||||
/* writing SYS to PCER has no effect on AT91RM9200 */
|
||||
}
|
|
@ -0,0 +1,157 @@
|
|||
/*
|
||||
* [origin: Linux kernel linux/arch/arm/mach-at91/clock.c]
|
||||
*
|
||||
* Copyright (C) 2011 Andreas Bießmann
|
||||
* Copyright (C) 2005 David Brownell
|
||||
* Copyright (C) 2005 Ivan Kokshaysky
|
||||
* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/at91_pmc.h>
|
||||
#include <asm/arch/clk.h>
|
||||
|
||||
#if !defined(CONFIG_AT91FAMILY)
|
||||
# error You need to define CONFIG_AT91FAMILY in your board config!
|
||||
#endif
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
static unsigned long at91_css_to_rate(unsigned long css)
|
||||
{
|
||||
switch (css) {
|
||||
case AT91_PMC_MCKR_CSS_SLOW:
|
||||
return CONFIG_SYS_AT91_SLOW_CLOCK;
|
||||
case AT91_PMC_MCKR_CSS_MAIN:
|
||||
return gd->arch.main_clk_rate_hz;
|
||||
case AT91_PMC_MCKR_CSS_PLLA:
|
||||
return gd->arch.plla_rate_hz;
|
||||
case AT91_PMC_MCKR_CSS_PLLB:
|
||||
return gd->arch.pllb_rate_hz;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_USB_ATMEL
|
||||
static unsigned at91_pll_calc(unsigned main_freq, unsigned out_freq)
|
||||
{
|
||||
unsigned i, div = 0, mul = 0, diff = 1 << 30;
|
||||
unsigned ret = (out_freq > 155000000) ? 0xbe00 : 0x3e00;
|
||||
|
||||
/* PLL output max 240 MHz (or 180 MHz per errata) */
|
||||
if (out_freq > 240000000)
|
||||
goto fail;
|
||||
|
||||
for (i = 1; i < 256; i++) {
|
||||
int diff1;
|
||||
unsigned input, mul1;
|
||||
|
||||
/*
|
||||
* PLL input between 1MHz and 32MHz per spec, but lower
|
||||
* frequences seem necessary in some cases so allow 100K.
|
||||
* Warning: some newer products need 2MHz min.
|
||||
*/
|
||||
input = main_freq / i;
|
||||
if (input < 100000)
|
||||
continue;
|
||||
if (input > 32000000)
|
||||
continue;
|
||||
|
||||
mul1 = out_freq / input;
|
||||
if (mul1 > 2048)
|
||||
continue;
|
||||
if (mul1 < 2)
|
||||
goto fail;
|
||||
|
||||
diff1 = out_freq - input * mul1;
|
||||
if (diff1 < 0)
|
||||
diff1 = -diff1;
|
||||
if (diff > diff1) {
|
||||
diff = diff1;
|
||||
div = i;
|
||||
mul = mul1;
|
||||
if (diff == 0)
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (i == 256 && diff > (out_freq >> 5))
|
||||
goto fail;
|
||||
return ret | ((mul - 1) << 16) | div;
|
||||
fail:
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static u32 at91_pll_rate(u32 freq, u32 reg)
|
||||
{
|
||||
unsigned mul, div;
|
||||
|
||||
div = reg & 0xff;
|
||||
mul = (reg >> 16) & 0x7ff;
|
||||
if (div && mul) {
|
||||
freq /= div;
|
||||
freq *= mul + 1;
|
||||
} else
|
||||
freq = 0;
|
||||
|
||||
return freq;
|
||||
}
|
||||
|
||||
int at91_clock_init(unsigned long main_clock)
|
||||
{
|
||||
unsigned freq, mckr;
|
||||
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
|
||||
#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
|
||||
unsigned tmp;
|
||||
/*
|
||||
* When the bootloader initialized the main oscillator correctly,
|
||||
* there's no problem using the cycle counter. But if it didn't,
|
||||
* or when using oscillator bypass mode, we must be told the speed
|
||||
* of the main clock.
|
||||
*/
|
||||
if (!main_clock) {
|
||||
do {
|
||||
tmp = readl(&pmc->mcfr);
|
||||
} while (!(tmp & AT91_PMC_MCFR_MAINRDY));
|
||||
tmp &= AT91_PMC_MCFR_MAINF_MASK;
|
||||
main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
|
||||
}
|
||||
#endif
|
||||
gd->arch.main_clk_rate_hz = main_clock;
|
||||
|
||||
/* report if PLLA is more than mildly overclocked */
|
||||
gd->arch.plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
|
||||
|
||||
#ifdef CONFIG_USB_ATMEL
|
||||
/*
|
||||
* USB clock init: choose 48 MHz PLLB value,
|
||||
* disable 48MHz clock during usb peripheral suspend.
|
||||
*
|
||||
* REVISIT: assumes MCK doesn't derive from PLLB!
|
||||
*/
|
||||
gd->arch.at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
|
||||
AT91_PMC_PLLBR_USBDIV_2;
|
||||
gd->arch.pllb_rate_hz = at91_pll_rate(main_clock,
|
||||
gd->arch.at91_pllb_usb_init);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* MCK and CPU derive from one of those primary clocks.
|
||||
* For now, assume this parentage won't change.
|
||||
*/
|
||||
mckr = readl(&pmc->mckr);
|
||||
gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
|
||||
freq = gd->arch.mck_rate_hz;
|
||||
|
||||
freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */
|
||||
/* mdiv */
|
||||
gd->arch.mck_rate_hz = freq /
|
||||
(1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
|
||||
gd->arch.cpu_clk_rate_hz = freq;
|
||||
|
||||
return 0;
|
||||
}
|
|
@ -0,0 +1,26 @@
|
|||
/*
|
||||
* [origin: arch/arm/cpu/arm926ejs/at91/cpu.c]
|
||||
*
|
||||
* (C) Copyright 2011
|
||||
* Andreas Bießmann, andreas.devel@googlemail.com
|
||||
* (C) Copyright 2010
|
||||
* Reinhard Meyer, reinhard.meyer@emk-elektronik.de
|
||||
* (C) Copyright 2009
|
||||
* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/clk.h>
|
||||
|
||||
#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 0
|
||||
#endif
|
||||
|
||||
int arch_cpu_init(void)
|
||||
{
|
||||
return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
|
||||
}
|
|
@ -0,0 +1,152 @@
|
|||
/*
|
||||
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
|
||||
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
|
||||
*
|
||||
* Modified for the at91rm9200dk board by
|
||||
* (C) Copyright 2004
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/at91_mc.h>
|
||||
#include <asm/arch/at91_pmc.h>
|
||||
#include <asm/arch/at91_pio.h>
|
||||
|
||||
#define ARM920T_CONTROL 0xC0000000 /* @ set bit 31 (iA) and 30 (nF) */
|
||||
|
||||
_MTEXT_BASE:
|
||||
#undef START_FROM_MEM
|
||||
#ifdef START_FROM_MEM
|
||||
.word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
|
||||
#else
|
||||
.word CONFIG_SYS_TEXT_BASE
|
||||
#endif
|
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
ldr r1, =AT91_ASM_PMC_MOR
|
||||
/* Main oscillator Enable register */
|
||||
#ifdef CONFIG_SYS_USE_MAIN_OSCILLATOR
|
||||
ldr r0, =0x0000FF01 /* Enable main oscillator */
|
||||
#else
|
||||
ldr r0, =0x0000FF00 /* Disable main oscillator */
|
||||
#endif
|
||||
str r0, [r1] /*AT91C_CKGR_MOR] */
|
||||
/* Add loop to compensate Main Oscillator startup time */
|
||||
ldr r0, =0x00000010
|
||||
LoopOsc:
|
||||
subs r0, r0, #1
|
||||
bhi LoopOsc
|
||||
|
||||
/* memory control configuration */
|
||||
/* this isn't very elegant, but what the heck */
|
||||
ldr r0, =SMRDATA
|
||||
ldr r1, _MTEXT_BASE
|
||||
sub r0, r0, r1
|
||||
ldr r2, =SMRDATAE
|
||||
sub r2, r2, r1
|
||||
pllloop:
|
||||
/* the address */
|
||||
ldr r1, [r0], #4
|
||||
/* the value */
|
||||
ldr r3, [r0], #4
|
||||
str r3, [r1]
|
||||
cmp r2, r0
|
||||
bne pllloop
|
||||
/* delay - this is all done by guess */
|
||||
ldr r0, =0x00010000
|
||||
/* (vs reading PMC_SR for LOCKA, LOCKB ... or MOSCS earlier) */
|
||||
lock:
|
||||
subs r0, r0, #1
|
||||
bhi lock
|
||||
ldr r0, =SMRDATA1
|
||||
ldr r1, _MTEXT_BASE
|
||||
sub r0, r0, r1
|
||||
ldr r2, =SMRDATA1E
|
||||
sub r2, r2, r1
|
||||
sdinit:
|
||||
/* the address */
|
||||
ldr r1, [r0], #4
|
||||
/* the value */
|
||||
ldr r3, [r0], #4
|
||||
str r3, [r1]
|
||||
cmp r2, r0
|
||||
bne sdinit
|
||||
|
||||
/* switch from FastBus to Asynchronous clock mode */
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #ARM920T_CONTROL
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
/* everything is fine now */
|
||||
mov pc, lr
|
||||
|
||||
.ltorg
|
||||
|
||||
SMRDATA:
|
||||
.word AT91_ASM_MC_EBI_CFG
|
||||
.word CONFIG_SYS_EBI_CFGR_VAL
|
||||
.word AT91_ASM_MC_SMC_CSR0
|
||||
.word CONFIG_SYS_SMC_CSR0_VAL
|
||||
.word AT91_ASM_PMC_PLLAR
|
||||
.word CONFIG_SYS_PLLAR_VAL
|
||||
.word AT91_ASM_PMC_PLLBR
|
||||
.word CONFIG_SYS_PLLBR_VAL
|
||||
.word AT91_ASM_PMC_MCKR
|
||||
.word CONFIG_SYS_MCKR_VAL
|
||||
SMRDATAE:
|
||||
/* here there's a delay */
|
||||
SMRDATA1:
|
||||
.word AT91_ASM_PIOC_ASR
|
||||
.word CONFIG_SYS_PIOC_ASR_VAL
|
||||
.word AT91_ASM_PIOC_BSR
|
||||
.word CONFIG_SYS_PIOC_BSR_VAL
|
||||
.word AT91_ASM_PIOC_PDR
|
||||
.word CONFIG_SYS_PIOC_PDR_VAL
|
||||
.word AT91_ASM_MC_EBI_CSA
|
||||
.word CONFIG_SYS_EBI_CSA_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_CR
|
||||
.word CONFIG_SYS_SDRC_CR_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL1
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL2
|
||||
.word CONFIG_SYS_SDRAM1
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_TR
|
||||
.word CONFIG_SYS_SDRC_TR_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL3
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
SMRDATA1E:
|
||||
/* SMRDATA1 is 176 bytes long */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Lineo, Inc. <www.lineo.com>
|
||||
* Bernhard Kuhn <bkuhn@lineo.com>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/at91_st.h>
|
||||
|
||||
void __attribute__((weak)) board_reset(void)
|
||||
{
|
||||
/* true empty function for defining weak symbol */
|
||||
}
|
||||
|
||||
void reset_cpu(ulong ignored)
|
||||
{
|
||||
at91_st_t *st = (at91_st_t *) ATMEL_BASE_ST;
|
||||
|
||||
board_reset();
|
||||
|
||||
/* Reset the cpu by setting up the watchdog timer */
|
||||
writel(AT91_ST_WDMR_RSTEN | AT91_ST_WDMR_EXTEN | AT91_ST_WDMR_WDV(2),
|
||||
&st->wdmr);
|
||||
writel(AT91_ST_CR_WDRST, &st->cr);
|
||||
/* and let it timeout */
|
||||
while (1)
|
||||
;
|
||||
/* Never reached */
|
||||
}
|
|
@ -0,0 +1,127 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Lineo, Inc. <www.lineo.com>
|
||||
* Bernhard Kuhn <bkuhn@lineo.com>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/at91_tc.h>
|
||||
#include <asm/arch/at91_pmc.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/* the number of clocks per CONFIG_SYS_HZ */
|
||||
#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
|
||||
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
|
||||
|
||||
/* enables TC1.0 clock */
|
||||
writel(1 << ATMEL_ID_TC0, &pmc->pcer); /* enable clock */
|
||||
|
||||
writel(0, &tc->bcr);
|
||||
writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
|
||||
AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr);
|
||||
|
||||
writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr);
|
||||
/* set to MCLK/2 and restart the timer
|
||||
when the value in TC_RC is reached */
|
||||
writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
|
||||
|
||||
writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interrupts */
|
||||
writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
|
||||
|
||||
writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
|
||||
gd->arch.lastinc = 0;
|
||||
gd->arch.tbl = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* timer without interrupts
|
||||
*/
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
return get_timer_masked() - base;
|
||||
}
|
||||
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
udelay_masked(usec);
|
||||
}
|
||||
|
||||
ulong get_timer_raw(void)
|
||||
{
|
||||
at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
|
||||
u32 now;
|
||||
|
||||
now = readl(&tc->tc[0].cv) & 0x0000ffff;
|
||||
|
||||
if (now >= gd->arch.lastinc) {
|
||||
/* normal mode */
|
||||
gd->arch.tbl += now - gd->arch.lastinc;
|
||||
} else {
|
||||
/* we have an overflow ... */
|
||||
gd->arch.tbl += now + TIMER_LOAD_VAL - gd->arch.lastinc;
|
||||
}
|
||||
gd->arch.lastinc = now;
|
||||
|
||||
return gd->arch.tbl;
|
||||
}
|
||||
|
||||
ulong get_timer_masked(void)
|
||||
{
|
||||
return get_timer_raw()/TIMER_LOAD_VAL;
|
||||
}
|
||||
|
||||
void udelay_masked(unsigned long usec)
|
||||
{
|
||||
u32 tmo;
|
||||
u32 endtime;
|
||||
signed long diff;
|
||||
|
||||
tmo = CONFIG_SYS_HZ_CLOCK / 1000;
|
||||
tmo *= usec;
|
||||
tmo /= 1000;
|
||||
|
||||
endtime = get_timer_raw() + tmo;
|
||||
|
||||
do {
|
||||
u32 now = get_timer_raw();
|
||||
diff = endtime - now;
|
||||
} while (diff >= 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (read timebase as long long).
|
||||
* On ARM it just returns the timer value.
|
||||
*/
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
return get_timer(0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
ulong get_tbclk(void)
|
||||
{
|
||||
return CONFIG_SYS_HZ;
|
||||
}
|
|
@ -0,0 +1,15 @@
|
|||
#
|
||||
# (C) Copyright 2002
|
||||
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
PLATFORM_CPPFLAGS += -march=armv4
|
||||
# =========================================================================
|
||||
#
|
||||
# Supply options according to compiler version
|
||||
#
|
||||
# =========================================================================
|
||||
PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
|
||||
PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
|
|
@ -0,0 +1,48 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
/*
|
||||
* CPU specific code
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
static void cache_flush(void);
|
||||
|
||||
int cleanup_before_linux (void)
|
||||
{
|
||||
/*
|
||||
* this function is called just before we call linux
|
||||
* it prepares the processor for linux
|
||||
*
|
||||
* we turn off caches etc ...
|
||||
*/
|
||||
|
||||
disable_interrupts ();
|
||||
|
||||
/* turn off I/D-cache */
|
||||
icache_disable();
|
||||
dcache_disable();
|
||||
/* flush I/D-cache */
|
||||
cache_flush();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* flush I/D-cache */
|
||||
static void cache_flush (void)
|
||||
{
|
||||
unsigned long i = 0;
|
||||
|
||||
asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
|
||||
}
|
|
@ -0,0 +1,41 @@
|
|||
#
|
||||
# Cirrus Logic EP93xx CPU-specific Makefile
|
||||
#
|
||||
# Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
#
|
||||
# Copyright (C) 2004, 2005
|
||||
# Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
|
||||
#
|
||||
# Copyright (C) 2006
|
||||
# Dominic Rath <Dominic.Rath@gmx.de>
|
||||
#
|
||||
# Based on an original Makefile, which is
|
||||
#
|
||||
# (C) Copyright 2000, 2001, 2002
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS = cpu.o led.o speed.o timer.o
|
||||
SOBJS = lowlevel_init.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* Cirrus Logic EP93xx CPU-specific support.
|
||||
*
|
||||
* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
*
|
||||
* Copyright (C) 2004, 2005
|
||||
* Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/ep93xx.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
/* We reset the CPU by generating a 1-->0 transition on DeviceCfg bit 31. */
|
||||
extern void reset_cpu(ulong addr)
|
||||
{
|
||||
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
|
||||
uint32_t value;
|
||||
|
||||
/* Unlock DeviceCfg and set SWRST */
|
||||
writel(0xAA, &syscon->sysswlock);
|
||||
value = readl(&syscon->devicecfg);
|
||||
value |= SYSCON_DEVICECFG_SWRST;
|
||||
writel(value, &syscon->devicecfg);
|
||||
|
||||
/* Unlock DeviceCfg and clear SWRST */
|
||||
writel(0xAA, &syscon->sysswlock);
|
||||
value = readl(&syscon->devicecfg);
|
||||
value &= ~SYSCON_DEVICECFG_SWRST;
|
||||
writel(value, &syscon->devicecfg);
|
||||
|
||||
/* Dying... */
|
||||
while (1)
|
||||
; /* noop */
|
||||
}
|
|
@ -0,0 +1,85 @@
|
|||
/*
|
||||
* Copyright (C) 2010, 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/ep93xx.h>
|
||||
#include <config.h>
|
||||
#include <status_led.h>
|
||||
|
||||
static uint8_t saved_state[2] = {STATUS_LED_OFF, STATUS_LED_OFF};
|
||||
static uint32_t gpio_pin[2] = {1 << STATUS_LED_GREEN,
|
||||
1 << STATUS_LED_RED};
|
||||
|
||||
inline void switch_LED_on(uint8_t led)
|
||||
{
|
||||
register struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;
|
||||
|
||||
writel(readl(&gpio->pedr) | gpio_pin[led], &gpio->pedr);
|
||||
saved_state[led] = STATUS_LED_ON;
|
||||
}
|
||||
|
||||
inline void switch_LED_off(uint8_t led)
|
||||
{
|
||||
register struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;
|
||||
|
||||
writel(readl(&gpio->pedr) & ~gpio_pin[led], &gpio->pedr);
|
||||
saved_state[led] = STATUS_LED_OFF;
|
||||
}
|
||||
|
||||
void red_led_on(void)
|
||||
{
|
||||
switch_LED_on(STATUS_LED_RED);
|
||||
}
|
||||
|
||||
void red_led_off(void)
|
||||
{
|
||||
switch_LED_off(STATUS_LED_RED);
|
||||
}
|
||||
|
||||
void green_led_on(void)
|
||||
{
|
||||
switch_LED_on(STATUS_LED_GREEN);
|
||||
}
|
||||
|
||||
void green_led_off(void)
|
||||
{
|
||||
switch_LED_off(STATUS_LED_GREEN);
|
||||
}
|
||||
|
||||
void __led_init(led_id_t mask, int state)
|
||||
{
|
||||
__led_set(mask, state);
|
||||
}
|
||||
|
||||
void __led_toggle(led_id_t mask)
|
||||
{
|
||||
if (STATUS_LED_RED == mask) {
|
||||
if (STATUS_LED_ON == saved_state[STATUS_LED_RED])
|
||||
red_led_off();
|
||||
else
|
||||
red_led_on();
|
||||
} else if (STATUS_LED_GREEN == mask) {
|
||||
if (STATUS_LED_ON == saved_state[STATUS_LED_GREEN])
|
||||
green_led_off();
|
||||
else
|
||||
green_led_on();
|
||||
}
|
||||
}
|
||||
|
||||
void __led_set(led_id_t mask, int state)
|
||||
{
|
||||
if (STATUS_LED_RED == mask) {
|
||||
if (STATUS_LED_ON == state)
|
||||
red_led_on();
|
||||
else
|
||||
red_led_off();
|
||||
} else if (STATUS_LED_GREEN == mask) {
|
||||
if (STATUS_LED_ON == state)
|
||||
green_led_on();
|
||||
else
|
||||
green_led_off();
|
||||
}
|
||||
}
|
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* Low-level initialization for EP93xx
|
||||
*
|
||||
* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
*
|
||||
* Copyright (C) 2006 Dominic Rath <Dominic.Rath@gmx.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <version.h>
|
||||
#include <asm/arch/ep93xx.h>
|
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* backup return address */
|
||||
ldr r1, =SYSCON_SCRATCH0
|
||||
str lr, [r1]
|
||||
|
||||
/* Turn on both LEDs */
|
||||
bl red_led_on
|
||||
bl green_led_on
|
||||
|
||||
/* Configure flash wait states before we switch to the PLL */
|
||||
bl flash_cfg
|
||||
|
||||
/* Set up PLL */
|
||||
bl pll_cfg
|
||||
|
||||
/* Turn off the Green LED and leave the Red LED on */
|
||||
bl green_led_off
|
||||
|
||||
/* Setup SDRAM */
|
||||
bl sdram_cfg
|
||||
|
||||
/* Turn on Green LED, Turn off the Red LED */
|
||||
bl green_led_on
|
||||
bl red_led_off
|
||||
|
||||
/* FIXME: we use async mode for now */
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #0xc0000000
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
/* restore return address */
|
||||
ldr r1, =SYSCON_SCRATCH0
|
||||
ldr lr, [r1]
|
||||
|
||||
mov pc, lr
|
|
@ -0,0 +1,96 @@
|
|||
/*
|
||||
* Cirrus Logic EP93xx PLL support.
|
||||
*
|
||||
* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/ep93xx.h>
|
||||
#include <asm/io.h>
|
||||
#include <div64.h>
|
||||
|
||||
/*
|
||||
* CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
|
||||
*
|
||||
* get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
|
||||
* the specified bus in HZ.
|
||||
*/
|
||||
|
||||
/*
|
||||
* return the PLL output frequency
|
||||
*
|
||||
* PLL rate = CONFIG_SYS_CLK_FREQ * (X1FBD + 1) * (X2FBD + 1)
|
||||
* / (X2IPD + 1) / 2^PS
|
||||
*/
|
||||
static ulong get_PLLCLK(uint32_t *pllreg)
|
||||
{
|
||||
uint8_t i;
|
||||
const uint32_t clkset = readl(pllreg);
|
||||
uint64_t rate = CONFIG_SYS_CLK_FREQ;
|
||||
rate *= ((clkset >> SYSCON_CLKSET_PLL_X1FBD1_SHIFT) & 0x1f) + 1;
|
||||
rate *= ((clkset >> SYSCON_CLKSET_PLL_X2FBD2_SHIFT) & 0x3f) + 1;
|
||||
do_div(rate, (clkset & 0x1f) + 1); /* X2IPD */
|
||||
for (i = 0; i < ((clkset >> SYSCON_CLKSET_PLL_PS_SHIFT) & 3); i++)
|
||||
rate >>= 1;
|
||||
|
||||
return (ulong)rate;
|
||||
}
|
||||
|
||||
/* return FCLK frequency */
|
||||
ulong get_FCLK()
|
||||
{
|
||||
const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
|
||||
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
|
||||
|
||||
const uint32_t clkset1 = readl(&syscon->clkset1);
|
||||
const uint8_t fclk_div =
|
||||
fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7];
|
||||
const ulong fclk_rate = get_PLLCLK(&syscon->clkset1) / fclk_div;
|
||||
|
||||
return fclk_rate;
|
||||
}
|
||||
|
||||
/* return HCLK frequency */
|
||||
ulong get_HCLK(void)
|
||||
{
|
||||
const uint8_t hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
|
||||
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
|
||||
|
||||
const uint32_t clkset1 = readl(&syscon->clkset1);
|
||||
const uint8_t hclk_div =
|
||||
hclk_divisors[(clkset1 >> SYSCON_CLKSET1_HCLK_DIV_SHIFT) & 7];
|
||||
const ulong hclk_rate = get_PLLCLK(&syscon->clkset1) / hclk_div;
|
||||
|
||||
return hclk_rate;
|
||||
}
|
||||
|
||||
/* return PCLK frequency */
|
||||
ulong get_PCLK(void)
|
||||
{
|
||||
const uint8_t pclk_divisors[] = { 1, 2, 4, 8 };
|
||||
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
|
||||
|
||||
const uint32_t clkset1 = readl(&syscon->clkset1);
|
||||
const uint8_t pclk_div =
|
||||
pclk_divisors[(clkset1 >> SYSCON_CLKSET1_PCLK_DIV_SHIFT) & 3];
|
||||
const ulong pclk_rate = get_HCLK() / pclk_div;
|
||||
|
||||
return pclk_rate;
|
||||
}
|
||||
|
||||
/* return UCLK frequency */
|
||||
ulong get_UCLK(void)
|
||||
{
|
||||
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
|
||||
ulong uclk_rate;
|
||||
|
||||
const uint32_t value = readl(&syscon->pwrcnt);
|
||||
if (value & SYSCON_PWRCNT_UART_BAUD)
|
||||
uclk_rate = CONFIG_SYS_CLK_FREQ;
|
||||
else
|
||||
uclk_rate = CONFIG_SYS_CLK_FREQ / 2;
|
||||
|
||||
return uclk_rate;
|
||||
}
|
|
@ -0,0 +1,120 @@
|
|||
/*
|
||||
* Cirrus Logic EP93xx timer support.
|
||||
*
|
||||
* Copyright (C) 2009, 2010 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
*
|
||||
* Copyright (C) 2004, 2005
|
||||
* Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
|
||||
*
|
||||
* Based on the original intr.c Cirrus Logic EP93xx Rev D. interrupt support,
|
||||
* author unknown.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <linux/types.h>
|
||||
#include <asm/arch/ep93xx.h>
|
||||
#include <asm/io.h>
|
||||
#include <div64.h>
|
||||
|
||||
#define TIMER_CLKSEL (1 << 3)
|
||||
#define TIMER_ENABLE (1 << 7)
|
||||
|
||||
#define TIMER_FREQ 508469 /* ticks / second */
|
||||
#define TIMER_MAX_VAL 0xFFFFFFFF
|
||||
|
||||
static struct ep93xx_timer
|
||||
{
|
||||
unsigned long long ticks;
|
||||
unsigned long last_read;
|
||||
} timer;
|
||||
|
||||
static inline unsigned long long usecs_to_ticks(unsigned long usecs)
|
||||
{
|
||||
unsigned long long ticks = (unsigned long long)usecs * TIMER_FREQ;
|
||||
do_div(ticks, 1000 * 1000);
|
||||
|
||||
return ticks;
|
||||
}
|
||||
|
||||
static inline void read_timer(void)
|
||||
{
|
||||
struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE;
|
||||
const unsigned long now = TIMER_MAX_VAL - readl(&timer_regs->timer3.value);
|
||||
|
||||
if (now >= timer.last_read)
|
||||
timer.ticks += now - timer.last_read;
|
||||
else
|
||||
/* an overflow occurred */
|
||||
timer.ticks += TIMER_MAX_VAL - timer.last_read + now;
|
||||
|
||||
timer.last_read = now;
|
||||
}
|
||||
|
||||
/*
|
||||
* Get the number of ticks (in CONFIG_SYS_HZ resolution)
|
||||
*/
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
unsigned long long sys_ticks;
|
||||
|
||||
read_timer();
|
||||
|
||||
sys_ticks = timer.ticks * CONFIG_SYS_HZ;
|
||||
do_div(sys_ticks, TIMER_FREQ);
|
||||
|
||||
return sys_ticks;
|
||||
}
|
||||
|
||||
unsigned long get_timer_masked(void)
|
||||
{
|
||||
return get_ticks();
|
||||
}
|
||||
|
||||
unsigned long get_timer(unsigned long base)
|
||||
{
|
||||
return get_timer_masked() - base;
|
||||
}
|
||||
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
unsigned long long target;
|
||||
|
||||
read_timer();
|
||||
|
||||
target = timer.ticks + usecs_to_ticks(usec);
|
||||
|
||||
while (timer.ticks < target)
|
||||
read_timer();
|
||||
}
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE;
|
||||
|
||||
/* use timer 3 with 508KHz and free running, not enabled now */
|
||||
writel(TIMER_CLKSEL, &timer_regs->timer3.control);
|
||||
|
||||
/* set initial timer value */
|
||||
writel(TIMER_MAX_VAL, &timer_regs->timer3.load);
|
||||
|
||||
/* Enable the timer */
|
||||
writel(TIMER_ENABLE | TIMER_CLKSEL,
|
||||
&timer_regs->timer3.control);
|
||||
|
||||
/* Reset the timer */
|
||||
read_timer();
|
||||
timer.ticks = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
unsigned long get_tbclk(void)
|
||||
{
|
||||
return CONFIG_SYS_HZ;
|
||||
}
|
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
*(.__image_copy_start)
|
||||
arch/arm/cpu/arm920t/start.o (.text*)
|
||||
/* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */
|
||||
. = 0x1000;
|
||||
LONG(0x53555243)
|
||||
*(.text*)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(.rodata*) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : { *(.data*) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.got : { *(.got) }
|
||||
|
||||
. = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
.u_boot_list : {
|
||||
KEEP(*(SORT(.u_boot_list*)));
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.image_copy_end :
|
||||
{
|
||||
*(.__image_copy_end)
|
||||
}
|
||||
|
||||
__bss_start = .;
|
||||
.bss : { *(.bss*) }
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
}
|
|
@ -0,0 +1,31 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS += generic.o
|
||||
COBJS += speed.o
|
||||
COBJS += timer.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -0,0 +1,77 @@
|
|||
/*
|
||||
* arch/arm/mach-imx/generic.c
|
||||
*
|
||||
* author: Sascha Hauer
|
||||
* Created: april 20th, 2004
|
||||
* Copyright: Synertronixx GmbH
|
||||
*
|
||||
* Common code for i.MX machines
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
#ifdef CONFIG_IMX
|
||||
|
||||
#include <asm/arch/imx-regs.h>
|
||||
|
||||
void imx_gpio_mode(int gpio_mode)
|
||||
{
|
||||
unsigned int pin = gpio_mode & GPIO_PIN_MASK;
|
||||
unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> 5;
|
||||
unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> 10;
|
||||
unsigned int tmp;
|
||||
|
||||
/* Pullup enable */
|
||||
if(gpio_mode & GPIO_PUEN)
|
||||
PUEN(port) |= (1<<pin);
|
||||
else
|
||||
PUEN(port) &= ~(1<<pin);
|
||||
|
||||
/* Data direction */
|
||||
if(gpio_mode & GPIO_OUT)
|
||||
DDIR(port) |= 1<<pin;
|
||||
else
|
||||
DDIR(port) &= ~(1<<pin);
|
||||
|
||||
/* Primary / alternate function */
|
||||
if(gpio_mode & GPIO_AF)
|
||||
GPR(port) |= (1<<pin);
|
||||
else
|
||||
GPR(port) &= ~(1<<pin);
|
||||
|
||||
/* use as gpio? */
|
||||
if( ocr == 3 )
|
||||
GIUS(port) |= (1<<pin);
|
||||
else
|
||||
GIUS(port) &= ~(1<<pin);
|
||||
|
||||
/* Output / input configuration */
|
||||
/* FIXME: I'm not very sure about OCR and ICONF, someone
|
||||
* should have a look over it
|
||||
*/
|
||||
if(pin<16) {
|
||||
tmp = OCR1(port);
|
||||
tmp &= ~( 3<<(pin*2));
|
||||
tmp |= (ocr << (pin*2));
|
||||
OCR1(port) = tmp;
|
||||
|
||||
if( gpio_mode & GPIO_AOUT )
|
||||
ICONFA1(port) &= ~( 3<<(pin*2));
|
||||
if( gpio_mode & GPIO_BOUT )
|
||||
ICONFB1(port) &= ~( 3<<(pin*2));
|
||||
} else {
|
||||
tmp = OCR2(port);
|
||||
tmp &= ~( 3<<((pin-16)*2));
|
||||
tmp |= (ocr << ((pin-16)*2));
|
||||
OCR2(port) = tmp;
|
||||
|
||||
if( gpio_mode & GPIO_AOUT )
|
||||
ICONFA2(port) &= ~( 3<<((pin-16)*2));
|
||||
if( gpio_mode & GPIO_BOUT )
|
||||
ICONFB2(port) &= ~( 3<<((pin-16)*2));
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* CONFIG_IMX */
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue